From patchwork Tue Sep 29 22:43:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807295 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 666BD13B2 for ; Tue, 29 Sep 2020 22:44:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3D49C2075A for ; Tue, 29 Sep 2020 22:44:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="ULdr7Nw0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728745AbgI2WoI (ORCPT ); Tue, 29 Sep 2020 18:44:08 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:56496 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728206AbgI2WoH (ORCPT ); Tue, 29 Sep 2020 18:44:07 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419446; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=66DSIrlhCeV+xyo2otn2L+hQAxSXyWg/ic5Sp/vZwto=; b=ULdr7Nw0p1uhfr5UCkjuiUaL2dOTdtdPFLV+UMWpBZ/eap+SKkd3qGujp1dxlIR2az3uyj AG1OCKtbGqfRl5kPkenxOgHRJDF1iwtaGhK34nhX3XJN+xzskHO0TTaRlrx+vJC1JpQ2pQ TVWew8ASE8Yc7cZiVsOz9TTNOXodVzI= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-360-2qylDWBuOPmxHvBleHzlmQ-1; Tue, 29 Sep 2020 18:44:04 -0400 X-MC-Unique: 2qylDWBuOPmxHvBleHzlmQ-1 Received: by mail-wr1-f72.google.com with SMTP id o6so2351096wrp.1 for ; Tue, 29 Sep 2020 15:44:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=66DSIrlhCeV+xyo2otn2L+hQAxSXyWg/ic5Sp/vZwto=; b=t9r7pBlb4rC+G4YfFQr9oLBivT8NlBtfa5+wckvZDkgd+wS4+pGmhAwrjjM7Rm+35D 9rw7io9+heidZwaV0ggg2k/Nfa3y7WyCr6q78LP5t+dxvsdXKAagO/0RAd1QnHYhMGRz l+QrVbJm0Z08uGIwMd8vOyqq7x54y+3lqZbykvXyLwU0fBKC4rNSD3cDn5JUXRHL9n1G KAN6dl6dLvSBSxhAWi5tY0+Iz3HZYgOGXWoK8e7Tya1wr0x+wqVfaSw8kZad29Jp0m25 r3eZLW6hMf/g5p0NX+LcbgPkZ6abcSevqoc7/gNisDQOCesxhlwPq7lvija0lEUHFoQE ic4g== X-Gm-Message-State: AOAM533oPbBsoCfzBdMM/KnqGntW8tP5Bzlp83NWpRSD3YgxpQMB/PmF U5MlqxhL6T1rpEIw1Paw8IwoGyi1E3Pu/lWB/4bM0rGpdz9mMeXDETH8bvpL4pEKFTZX9uTNpEb Zh7S0K+sVx9n3 X-Received: by 2002:adf:efc9:: with SMTP id i9mr6933028wrp.187.1601419443106; Tue, 29 Sep 2020 15:44:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw/JFirmQq0FLOkZYRppQAwyrCFiFhW/sOaJqe1ygyRV//BqkXnJHjtm0eIPBJooqWr+G3TNQ== X-Received: by 2002:adf:efc9:: with SMTP id i9mr6933012wrp.187.1601419442929; Tue, 29 Sep 2020 15:44:02 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id t202sm7798963wmt.14.2020.09.29.15.44.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Keith Packard Subject: [PATCH v4 01/12] accel/tcg: Add stub for cpu_loop_exit() Date: Wed, 30 Sep 2020 00:43:44 +0200 Message-Id: <20200929224355.1224017-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Since the support of SYS_READC in commit 8de702cb67 the semihosting code is strongly depedent of the TCG accelerator via a call to cpu_loop_exit(). Ideally we would only build semihosting support when TCG is available, but unfortunately this is not trivial because semihosting is used by many targets in different configurations. For now add a simple stub to avoid link failure when building with --disable-tcg: hw/semihosting/console.c:160: undefined reference to `cpu_loop_exit' Cc: Keith Packard Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- accel/stubs/tcg-stub.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index e4bbf997aa..1eec7fb90e 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -29,3 +29,8 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, /* Handled by hardware accelerator. */ g_assert_not_reached(); } + +void cpu_loop_exit(CPUState *cpu) +{ + g_assert_not_reached(); +} From patchwork Tue Sep 29 22:43:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807297 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 479C66CB for ; Tue, 29 Sep 2020 22:44:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 23D8F20757 for ; Tue, 29 Sep 2020 22:44:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="gseoum29" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728786AbgI2WoQ (ORCPT ); Tue, 29 Sep 2020 18:44:16 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:58049 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728752AbgI2WoP (ORCPT ); Tue, 29 Sep 2020 18:44:15 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419453; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fnVaKlxSjgosYNWUZ3C9BB5KnUFHrX+zW6dbopznvYU=; b=gseoum29fdMMi9pAAhmaHd/MpI6MgtF4z/bkBo/74ggV083oewrBdNu98p9UrTSOSAZQYA K6NAcLuH0/cKtoGLZK7QMZMhxzyT+FkJnn5NTTGbCOb5pEDJLQtCztY+lDUceSmxdcdtvG fNh0xJiXpy/WGljQrH7cAFKm+8+mm7Y= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-169-N5EKgtdrPGycX8WYivndOg-1; Tue, 29 Sep 2020 18:44:09 -0400 X-MC-Unique: N5EKgtdrPGycX8WYivndOg-1 Received: by mail-wr1-f71.google.com with SMTP id v12so2361617wrm.9 for ; Tue, 29 Sep 2020 15:44:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fnVaKlxSjgosYNWUZ3C9BB5KnUFHrX+zW6dbopznvYU=; b=Y3a4le9ZSGWdSWjQnDaiA4KydoGVCw7sh7DMWpPfeMlLd71iGMhFeiynW8hZo6aBak sAgWxPNzq6ibcQQ3jNOQymDTy6Foy6hw52ZEtyvFUw2CdOaX9Dr0DpGG5QkzcXxRpEgz RrbqKKs6veNIrp4lUhB/7dwcolfScj4aceTXfslu3rJ1czxb+0za9S9tJ9faSLS3ycsq e/n+AZRI5MAFKCstRwcdMygUz+1rpk/P6iF/iBXdgayn1AKwlRrbKciFw5wKPdZDGhQa jzangOSB1nzM97b3lOTpFgoq6vvYDI9utC8T88jc+7MB0s/Vuj3Kaea9Ho2cM9wwwE+n yyUg== X-Gm-Message-State: AOAM53399S7GDANqgk+oHKgEwvv70GeMD/X5MIhsZ3KcPTQQuglTW7in kkcoTUn2SejhLw4pxkwsP5fW4+/LLpv69CXw7d8DtD2yWdGZUv3lsVTATNzOQitTx3nUgbqHCU2 3UHpgZ7kv0ZeY X-Received: by 2002:adf:f2d0:: with SMTP id d16mr6386590wrp.332.1601419448302; Tue, 29 Sep 2020 15:44:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz32LQg/FraBPNB2aGTQWNffth7R+ByzmBlrprh0rhJbQuVc73LtYh8e6YQu2ibVKmeTxTjoQ== X-Received: by 2002:adf:f2d0:: with SMTP id d16mr6386570wrp.332.1601419448124; Tue, 29 Sep 2020 15:44:08 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id e13sm8276536wre.60.2020.09.29.15.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Claudio Fontana Subject: [PATCH v4 02/12] meson: Allow optional target/${ARCH}/Kconfig Date: Wed, 30 Sep 2020 00:43:45 +0200 Message-Id: <20200929224355.1224017-3-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Extend the generic Meson script to pass optional target Kconfig file to the minikconf script. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Paolo Bonzini --- We could use fs.exists() but is_file() is more specific (can not be a directory). Cc: Paolo Bonzini Cc: Claudio Fontana --- meson.build | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index d36dd085b5..9ab5d514d7 100644 --- a/meson.build +++ b/meson.build @@ -529,6 +529,7 @@ kconfig_external_symbols = [ ] ignored = ['TARGET_XML_FILES', 'TARGET_ABI_DIR', 'TARGET_DIRS'] +fs = import('fs') foreach target : target_dirs config_target = keyval.load(meson.current_build_dir() / target / 'config-target.mak') @@ -569,8 +570,13 @@ foreach target : target_dirs endforeach config_devices_mak = target + '-config-devices.mak' + target_kconfig = 'target' / config_target['TARGET_BASE_ARCH'] / 'Kconfig' + minikconf_input = ['default-configs' / target + '.mak', 'Kconfig'] + if fs.is_file(target_kconfig) + minikconf_input += [target_kconfig] + endif config_devices_mak = configure_file( - input: ['default-configs' / target + '.mak', 'Kconfig'], + input: minikconf_input, output: config_devices_mak, depfile: config_devices_mak + '.d', capture: true, From patchwork Tue Sep 29 22:43:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807299 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B492A6CB for ; Tue, 29 Sep 2020 22:44:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8C5B82075A for ; Tue, 29 Sep 2020 22:44:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="PHWvgZgw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728875AbgI2WoS (ORCPT ); Tue, 29 Sep 2020 18:44:18 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:41885 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728860AbgI2WoR (ORCPT ); Tue, 29 Sep 2020 18:44:17 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419456; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fVtzhoPQ9oRe5A4whgi5/tX3r24KuxvOyig0n+4hw6k=; b=PHWvgZgwnPBuN08mYdI+e2MAUd+frzRoOP6kAdur50LRba23uRMnxy1PxPYUS/g8Zvt0Ai mhRWblm4vru1xWeL0rym3WSaECPAFbhyNSFl5sABrfT07JDPNRnwH26EWUquVfaL8R957N jqEpRu6WAtf9+OQGWxORim+xxnUNeM0= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-205-tVekPGQTNHOEcxQWK9vNmA-1; Tue, 29 Sep 2020 18:44:14 -0400 X-MC-Unique: tVekPGQTNHOEcxQWK9vNmA-1 Received: by mail-wr1-f72.google.com with SMTP id a2so2345762wrp.8 for ; Tue, 29 Sep 2020 15:44:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fVtzhoPQ9oRe5A4whgi5/tX3r24KuxvOyig0n+4hw6k=; b=RGz71pSRV1nmQMI0KcvQt+RW8miWP9nlYsSvIA+TBzmRntxa9fIZByoLepxrp36FTo m1gEmd8bcdEheiJQ+4WtFaREkkJEVIeoggbRfUvQfwyYx630oyLFhHnZWqorViuN2pr/ stQvYyA5soiziph5JdPb4shpE4GVVd7lZWiAlF43nbIVinw4/yO3adZoPlBUUhfC/zOf 3DKPy9lgbOzEPkdL1FCkmPRemLjkHU4pkLKWa4fM8O1qchayzIepaPln1SBOEAQ9AHvm u6EdYnCUY3nsPQtE9x6XOnYP/AK5pTnKL10O68LItsxpQN0vgIAI9QujSti62lFD6rYx 2XYA== X-Gm-Message-State: AOAM533OvhiiP2id5X9oZLPM1W2jGc6t/9UStWtKSwRpyS8afYMxkaKv q/oE3aCFEqwti4COSwbRBziRQB0BZc/3FM+okdjA+KnKjKiKm0bhuLgXSCdWuOirg5txCecbCFV nsSSP2yvKxcUA X-Received: by 2002:a5d:5261:: with SMTP id l1mr6619428wrc.193.1601419453411; Tue, 29 Sep 2020 15:44:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzeOEbx68Td8hBaYyIFzxkCzoKhQ+EE4XU8IG3LB8RbTCWtKeOlhoOS8sgyI3yT3aeSBndgRw== X-Received: by 2002:a5d:5261:: with SMTP id l1mr6619416wrc.193.1601419453250; Tue, 29 Sep 2020 15:44:13 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id l18sm7902646wrp.84.2020.09.29.15.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 03/12] target/arm: Select SEMIHOSTING if TCG is available Date: Wed, 30 Sep 2020 00:43:46 +0200 Message-Id: <20200929224355.1224017-4-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add a kconfig entry which not explicitly selected by another entry, but which selects SEMIHOSTING if TCG is available. This avoids: /usr/bin/ld: libqemu-aarch64-softmmu.fa.p/target_arm_arm-semi.c.o: in function `do_arm_semihosting': target/arm/arm-semi.c:784: undefined reference to `qemu_semihosting_console_outc' target/arm/arm-semi.c:787: undefined reference to `qemu_semihosting_console_outs' /usr/bin/ld: target/arm/arm-semi.c:815: undefined reference to `qemu_semihosting_console_inc' Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) create mode 100644 target/arm/Kconfig diff --git a/target/arm/Kconfig b/target/arm/Kconfig new file mode 100644 index 0000000000..972d9a1b9a --- /dev/null +++ b/target/arm/Kconfig @@ -0,0 +1,4 @@ +# arch-specific rule to select SEMIHOSTING if ARM && TCG +config ARM_SEMIHOSTING +   default y if TCG + select SEMIHOSTING From patchwork Tue Sep 29 22:43:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807301 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 496BA6CB for ; Tue, 29 Sep 2020 22:44:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 26E622075A for ; Tue, 29 Sep 2020 22:44:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="PTlzYPKc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728966AbgI2WoW (ORCPT ); Tue, 29 Sep 2020 18:44:22 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:20333 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728930AbgI2WoW (ORCPT ); Tue, 29 Sep 2020 18:44:22 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419461; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9dR9Nk0eM9jSf6djV760qyeufq0GIQie0fmgNB3aO7w=; b=PTlzYPKcstPxoAuB3OFhmY47tSSFDviIPSAgnL7JEm0iCBkHG5Uf7frh2bJBwaznaoY/f7 52HmfU8abVO6PgdGFSSQBZGyNbIdbkDDz5TnMuM0RMi4B0BkcX+3ArUfb2ddAczQ2WNZMU 3APiHm9r+JvDeShqYgoXJVYMPNPYnqM= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-264-Q_fXLT1aPjWxvUQXVVSurA-1; Tue, 29 Sep 2020 18:44:19 -0400 X-MC-Unique: Q_fXLT1aPjWxvUQXVVSurA-1 Received: by mail-wm1-f70.google.com with SMTP id r83so1991729wma.8 for ; Tue, 29 Sep 2020 15:44:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9dR9Nk0eM9jSf6djV760qyeufq0GIQie0fmgNB3aO7w=; b=umao2M7Qbth3mjpr1Gn2jJV6JcFP0R7U57NHqbyzLgIi7B/tYsNwhbudMq0ehFQEYU vA4ZJqjGzUFK2Wy8LGTkU76U6VymZRn5F3fPhw0ZTTbFOAI9Ye046XdUj24UXodlWlr3 8fwMigt2QzoIOm40yeAcodv0bpRKqTqDaEbdobsULBQd282TyGP1nkUdAiZzAM+775mw 5e0aBR3k7F5Ru+KhdOZZ7qBIVzDB3/whDUzg6LNEkFFQ6sytyCY7/175GH+nWvQCHIMm /lokBLu67pJVPA5vsj65uU1Nrn6hiqC8yAgO8TaFeQUi0AIOBnPzNqVzUsk72z1GcvWw aSig== X-Gm-Message-State: AOAM530YdYDuCT389sCUvnmI/PDyDJ3o4necWoEwUoz/77jXAuO0hcuI sAuY3I4uUUzSR106IoBeKVul2Xq6ITE3NiLZHIP5cYpUMpreihavRjD2AeDyqTC4LZoCgw+25nq WbN3ZBovYPfwj X-Received: by 2002:adf:fd01:: with SMTP id e1mr6312398wrr.44.1601419458523; Tue, 29 Sep 2020 15:44:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxwh51NEq7twr61W/5e9Rg5U9losDLPsHpgTL0nTFBNwMoNiIws2/CzkKqcV0aZDFoO9xffGw== X-Received: by 2002:adf:fd01:: with SMTP id e1mr6312389wrr.44.1601419458354; Tue, 29 Sep 2020 15:44:18 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id y1sm7440740wmi.36.2020.09.29.15.44.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 04/12] target/arm: Restrict ARMv4 cpus to TCG accel Date: Wed, 30 Sep 2020 00:43:47 +0200 Message-Id: <20200929224355.1224017-5-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv4 CPUs when TCG is available: - StrongARM (SA1100/1110) - OMAP1510 (TI925T) Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 7d040827af..b546b20654 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -1,3 +1,7 @@ +config ARM_V4 + bool + select TCG + config ARM_VIRT bool imply PCI_DEVICES @@ -30,6 +34,7 @@ config ARM_VIRT config CHEETAH bool + select ARM_V4 select OMAP select TSC210X @@ -244,6 +249,7 @@ config COLLIE config SX1 bool + select ARM_V4 select OMAP config VERSATILE From patchwork Tue Sep 29 22:43:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807303 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE6D013B2 for ; Tue, 29 Sep 2020 22:44:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98C8D2075A for ; Tue, 29 Sep 2020 22:44:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="TarwSgt5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728981AbgI2Wo2 (ORCPT ); Tue, 29 Sep 2020 18:44:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:35102 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728892AbgI2Wo2 (ORCPT ); Tue, 29 Sep 2020 18:44:28 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419466; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=o4HjcXP3qwr6X7IJP4D/f1xvLwTdd8bPvM5GyTvUpNE=; b=TarwSgt5cfNQkCdjsuAzWedt3xT71a4Vk8TLLkcdx44eARQSywMrtR+sg4jt0V6SSX5H49 qeEoP26owe7236A3U7zQsxCTxxFrPtgsOv6EwpscYyofPw9Uy9GBkDAvcsh6hH5o1sUO68 hOX0WMT48cMQzYfdrvpB1D0Npi/ByHE= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-545-TMtX7qLvN0eY4UcH7ujmlA-1; Tue, 29 Sep 2020 18:44:24 -0400 X-MC-Unique: TMtX7qLvN0eY4UcH7ujmlA-1 Received: by mail-wr1-f72.google.com with SMTP id v5so2379385wrr.0 for ; Tue, 29 Sep 2020 15:44:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o4HjcXP3qwr6X7IJP4D/f1xvLwTdd8bPvM5GyTvUpNE=; b=ZoEeGesy7NXRmVJdphGw8eMzLmFFfzSx4/EgOXyaTp7Q7PQQ65eVbrF1aJESORibpb Of57fbMp1jMPBkAGDib537035jubtJ5EGs8JjpXrce8QVAHmYerBUZQ205X+80YfWpIz axVUItTooe194i8ZmMi+QBL+KBZ+q8L86gaOFkl/ugpiGKQKvK5WRdQafQT7lfVnLj5h tYPJ9Dmc4sOdC5FGKuH49H6WjEl7TPkg8sC8g5Ftpej/Iv+cc8No+6z9eDB/GcokbvX7 Vp0vqBxTHJJoFnAL2dSUMqTRzedK07S9xg189YwDA0hmVi5uOiROzVyPVKcaGvP87THe D8dg== X-Gm-Message-State: AOAM531rj/DTnqAn7oskIFW5e9KleFPYnnmUgMFyqUDH6frBCEjfyXhL wbKPypSkeW6guRFcXgZ5+/ODYFAQ4u1oHiUaA0EUEMUqBPbl3gl/8QJTP3f6bW8WB1BVixFoyr5 9bJP6FAOAjx++ X-Received: by 2002:adf:83c3:: with SMTP id 61mr6487534wre.287.1601419463554; Tue, 29 Sep 2020 15:44:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxiKG03zq+uHxa3VA+7jIh3VXyDityJ8NdNAGTWh+0EeM/7OentrHFt37Qc69GgvEZbvFzI7w== X-Received: by 2002:adf:83c3:: with SMTP id 61mr6487523wre.287.1601419463375; Tue, 29 Sep 2020 15:44:23 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id l4sm8483138wrc.14.2020.09.29.15.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 05/12] target/arm: Restrict ARMv5 cpus to TCG accel Date: Wed, 30 Sep 2020 00:43:48 +0200 Message-Id: <20200929224355.1224017-6-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv5 CPUs when TCG is available: - ARM926 - ARM946 - ARM1026 - XScale (PXA250/255/260/261/262/270) Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index b546b20654..d2876b2c8b 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -2,6 +2,10 @@ config ARM_V4 bool select TCG +config ARM_V5 + bool + select TCG + config ARM_VIRT bool imply PCI_DEVICES @@ -44,6 +48,7 @@ config CUBIEBOARD config DIGIC bool + select ARM_V5 select PTIMER select PFLASH_CFI02 @@ -73,6 +78,7 @@ config HIGHBANK config INTEGRATOR bool + select ARM_V5 select ARM_TIMER select INTEGRATOR_DEBUG select PL011 # UART @@ -99,6 +105,7 @@ config MUSCA config MUSICPAL bool + select ARM_V5 select BITBANG_I2C select MARVELL_88W8618 select PTIMER @@ -138,6 +145,7 @@ config OMAP config PXA2XX bool + select ARM_V5 select FRAMEBUFFER select I2C select SERIAL @@ -254,6 +262,7 @@ config SX1 config VERSATILE bool + select ARM_V5 select ARM_TIMER # sp804 select PFLASH_CFI01 select LSI_SCSI_PCI @@ -373,6 +382,7 @@ config NPCM7XX config FSL_IMX25 bool + select ARM_V5 select IMX select IMX_FEC select IMX_I2C @@ -399,6 +409,7 @@ config FSL_IMX6 config ASPEED_SOC bool + select ARM_V5 select DS1338 select FTGMAC100 select I2C From patchwork Tue Sep 29 22:43:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807305 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DAC4E6CB for ; Tue, 29 Sep 2020 22:44:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B797F2075A for ; Tue, 29 Sep 2020 22:44:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="O8udYsK7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729042AbgI2Wof (ORCPT ); Tue, 29 Sep 2020 18:44:35 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:31794 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729004AbgI2Wof (ORCPT ); Tue, 29 Sep 2020 18:44:35 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419473; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=i7QZwS1vfY6pxc/yL3I5YaiK5BX/yKl7ag6KjP4fakU=; b=O8udYsK7WOBMA9eh9Qqc5No52Atw3a0A6MIYo6jTxZx5e9rW51cZFDUhW9U+04yU3TuSdo Py7UnLlYayEqhDObTujQ0JkvoPVDM9Q7G6dM57TCNqnweTnYZommsu299ZdC8ZrNNLi8+2 BlVOFh109f2rsdWlKEF70IKoOcFOvAE= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-471-2OUza2cwMOiqxRLg0qE63A-1; Tue, 29 Sep 2020 18:44:29 -0400 X-MC-Unique: 2OUza2cwMOiqxRLg0qE63A-1 Received: by mail-wr1-f72.google.com with SMTP id w7so2370412wrp.2 for ; Tue, 29 Sep 2020 15:44:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=i7QZwS1vfY6pxc/yL3I5YaiK5BX/yKl7ag6KjP4fakU=; b=WluX6aPfdugSMCzo+6ENiW6Yo2XFEFCXCidWiT1TaVkfSgWnGwawYjWUYiqvr4/ycY iVizdSPcRzHX1c9dUlV0VdU9tKQHd4am3bsffTUSygN1BIJtowX9V+W7l/3M8ECi7pPj lCClFsAr4m/1CPnrIqNFaPv5MvakeoMik+04XM99usXkWXFXdvDtHIBkEaQ9WotAN8YG j5c2wyltrBGn5Ym97BzEVSS9L76zXtD+J/MvAWtQ2BMN4uGvTuLtj28kM0UHTZqtkGDd 0YOTUSsrMOLo/tsIwcuQuf7jZHY/U8VZLuwyNkQYwTSGfIPiY6jhP1qvCpTqo8dxmNqQ zGDg== X-Gm-Message-State: AOAM531DS0NCELjI3JItBeiBT9Ik5FBZCPDReUQWb+B27i9xugdD2MHq MaSX43dDiGboYFuLQGLfREbtitu5PVJNsmTQZn+uDz7JRGCojexyWO1QyOn2BsmzULi/4PlPUG/ t6acO4OeO2cEP X-Received: by 2002:adf:dcd1:: with SMTP id x17mr7104482wrm.150.1601419468593; Tue, 29 Sep 2020 15:44:28 -0700 (PDT) X-Google-Smtp-Source: ABdhPJweTjjV4JKSEFC7bdGe1az/c9DKmrvmR/EC6wrTRHkRT+Xz0xLKGZVKIrTri3by7ejJMMBAyw== X-Received: by 2002:adf:dcd1:: with SMTP id x17mr7104459wrm.150.1601419468383; Tue, 29 Sep 2020 15:44:28 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id j10sm7850036wrn.2.2020.09.29.15.44.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 06/12] target/arm: Restrict ARMv6 cpus to TCG accel Date: Wed, 30 Sep 2020 00:43:49 +0200 Message-Id: <20200929224355.1224017-7-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM requires a cpu based on (at least) the ARMv7 architecture. Only enable the following ARMv6 CPUs when TCG is available: - ARM1136 - ARM1176 - ARM11MPCore - Cortex-M0 Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index d2876b2c8b..e01eb55bc0 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -6,6 +6,10 @@ config ARM_V5 bool select TCG +config ARM_V6 + bool + select TCG + config ARM_VIRT bool imply PCI_DEVICES @@ -123,6 +127,7 @@ config NETDUINOPLUS2 config NSERIES bool + select ARM_V6 select OMAP select TMP105 # tempature sensor select BLIZZARD # LCD/TV controller @@ -391,6 +396,7 @@ config FSL_IMX25 config FSL_IMX31 bool + select ARM_V6 select SERIAL select IMX select IMX_I2C From patchwork Tue Sep 29 22:43:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807307 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 638B813B2 for ; Tue, 29 Sep 2020 22:44:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DB9D2075A for ; Tue, 29 Sep 2020 22:44:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="VDeS28/5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729069AbgI2Wok (ORCPT ); Tue, 29 Sep 2020 18:44:40 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:53769 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729077AbgI2Wok (ORCPT ); Tue, 29 Sep 2020 18:44:40 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419479; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O2ptRm8f/lOeml0jS1cRqmJHNlSkXaKtAQigKfi/TLU=; b=VDeS28/5DLv9Nbk/QM0vSy1hMBwn4jw8NplhkjiCQF2pTcWYhQBoPn0+a11LLURSnjQ/b4 SEERYJeLnhs8XwRF1wzD0TpGR7bALTFJ1H24H0M5H43kX1LI5BgDkyFUPeVn27ncFyf4ET XTYjH23bVkZhRKsCCW+ACkSo3KE2WFw= Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-67-d8IMP6GhMsyiEKjvsHM7JQ-1; Tue, 29 Sep 2020 18:44:35 -0400 X-MC-Unique: d8IMP6GhMsyiEKjvsHM7JQ-1 Received: by mail-wr1-f72.google.com with SMTP id v12so2361965wrm.9 for ; Tue, 29 Sep 2020 15:44:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=O2ptRm8f/lOeml0jS1cRqmJHNlSkXaKtAQigKfi/TLU=; b=R+RkHVGZpBZNhJYWIcvG3CtouJR7cUzFcYb/0TbbVGQUgr2GrO7u5UNoCB+2Rxc8cK h6luXYyHL2EdstzHnXDr6QO/P9Lan0xlG4Wkskedpbv3CqjYapaY8dFe0IXReUl8FfxI BuosFfFg155VkNhm0SiOWvAexMNKR21Ar8XDquyOVQc/ULFoh9ePu2t3KKkAn5UIRLeb +pOePBufRDP01uj9t6JXp24ZbP8Q9nv/s3zla/10yWxiGBQNBbpDx2Uuszp3Cc1wQwQz +ZRYh2A/QOom9gyTR+h5LcFvaBi/YjAzqeBJlGdpQqplVNhfyhAxzlQVTpT9pjNNqTPE 52cQ== X-Gm-Message-State: AOAM531ahnbJdcB1IgIu3l7XkYW5ZQh6OarG0MrBgqpS+VsnjDsmu4xC UMTcXP0Dj1yJQp2bhHhLq9uzu+grdpBun2QlXdBQwhcMwrxniLLBpulSQxxrC4BQ7Y8+H+H0Kwt w1SiAwEqmWpH8 X-Received: by 2002:a5d:444b:: with SMTP id x11mr6634813wrr.402.1601419473912; Tue, 29 Sep 2020 15:44:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz4aaS54Wk933OJIRQKbP4cZ/YFPBu2pchNU62vp4qGrFYgoGCxMVfKfqvmCyuVMDLcMh8vXQ== X-Received: by 2002:a5d:444b:: with SMTP id x11mr6634802wrr.402.1601419473707; Tue, 29 Sep 2020 15:44:33 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id m10sm7056524wmi.9.2020.09.29.15.44.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 07/12] target/arm: Restrict ARMv7 R-profile cpus to TCG accel Date: Wed, 30 Sep 2020 00:43:50 +0200 Message-Id: <20200929224355.1224017-8-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org A KVM-only build won't be able to run R-profile cpus. Only enable the following ARMv7 R-Profile CPUs when TCG is available: - Cortex-R5 - Cortex-R5F Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index e01eb55bc0..7f19872722 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -10,6 +10,10 @@ config ARM_V6 bool select TCG +config ARM_V7R + bool + select TCG + config ARM_VIRT bool imply PCI_DEVICES @@ -358,6 +362,7 @@ config XLNX_ZYNQMP_ARM bool select AHCI select ARM_GIC + select ARM_V7R select CADENCE select DDC select DPCD From patchwork Tue Sep 29 22:43:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807309 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 119116CB for ; Tue, 29 Sep 2020 22:44:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DCCE32075A for ; Tue, 29 Sep 2020 22:44:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="P/j9ak1i" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729016AbgI2Won (ORCPT ); Tue, 29 Sep 2020 18:44:43 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:24479 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729077AbgI2Won (ORCPT ); Tue, 29 Sep 2020 18:44:43 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419482; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VMKffrN5obKOm6UxS550K4u6DmnYBBMm9AG93ufLP5A=; b=P/j9ak1iWY31QwB+H3Ib0oWDOUlaqqGD6QoZnM7NJ3UxtwiT/o12Z8i0LSe3uYymnOkkIx 3+yRDAomXAbdE+91Wo/1k+39sqaO/n7oeGrjha1hbKuUUhf2x7ky7zYZC392xA5rUX9Gxq IDjGRPVvqaUu5GC3KTpiVS5kvoPKHDk= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-52-lQ74zRzpMoaEudBtCcxLzQ-1; Tue, 29 Sep 2020 18:44:40 -0400 X-MC-Unique: lQ74zRzpMoaEudBtCcxLzQ-1 Received: by mail-wr1-f71.google.com with SMTP id d13so2328904wrr.23 for ; Tue, 29 Sep 2020 15:44:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VMKffrN5obKOm6UxS550K4u6DmnYBBMm9AG93ufLP5A=; b=UCizQgMdhVntD0tSWp1MEidzp4Di5OWwExI/UjKzS03zBZGJHDK7mi1u0gp2s0Tvfm zPbRdZ8aYFjkpChfg94b+1BdFTHIvufrGN6vzll/gJpaEAdC4J+C1x0V7tv4Tv9tvtrv Y+I9676P2/Po0zmfzI7JnhjYr1jNHa1/5TGEErjMPcLl3+MFjBL1+Pbt6De8yrt582dz etgCoysOyhcrOXeL3QDOByrz4ajetziLjZObyq7IEa6zVJCmUrsxtQQWSxmfZGDI+AXU OtJ0Vu8HzmIQYa8MQtEP0EWQRGL9SIGydV7kXpkEhMkzpMZSxEd9EOD6CS42BLFCW0to 0akQ== X-Gm-Message-State: AOAM532dAm404zkuAyX5PtO7v0Rx3iM8NwNVQFHxKHJE6cYhadZQmo/C ytW6XPLu/Vm/XhiqHxcpVdtPEVE4Q86CsBm1+Rf0575kxhW0EHH5ogiU1G76OeY0eFYmiGQ+jCe jil48mNazIzIh X-Received: by 2002:a7b:c76d:: with SMTP id x13mr6762359wmk.10.1601419478956; Tue, 29 Sep 2020 15:44:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxd5/l6Pz82+iT32jI8EMtGES+WPwtktxL0xH6iDe0EYmyk+iEByXkfuzuL6KdhyW+6NVNK1w== X-Received: by 2002:a7b:c76d:: with SMTP id x13mr6762351wmk.10.1601419478789; Tue, 29 Sep 2020 15:44:38 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id l17sm6922065wme.11.2020.09.29.15.44.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 08/12] target/arm: Restrict ARMv7 M-profile cpus to TCG accel Date: Wed, 30 Sep 2020 00:43:51 +0200 Message-Id: <20200929224355.1224017-9-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org A KVM-only build won't be able to run M-profile cpus. Only enable the following ARMv7 M-Profile CPUs when TCG is available: - Cortex-M0 - Cortex-M3 - Cortex-M4 - Cortex-M33 We don't need to enforce CONFIG_ARM_V7M in default-configs because all machines using a Cortex-M are already explicitly selected. Signed-off-by: Philippe Mathieu-Daudé --- default-configs/arm-softmmu.mak | 3 --- hw/arm/Kconfig | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 08a32123b4..002c97862b 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -1,8 +1,5 @@ # Default configuration for arm-softmmu -# TODO: ARM_V7M is currently always required - make this more flexible! -CONFIG_ARM_V7M=y - # CONFIG_PCI_DEVICES=n # CONFIG_TEST_DEVICES=n diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 7f19872722..15faa2f2d7 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -14,6 +14,10 @@ config ARM_V7R bool select TCG +config ARM_V7M + bool + select TCG + config ARM_VIRT bool imply PCI_DEVICES From patchwork Tue Sep 29 22:43:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807311 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C719013B2 for ; Tue, 29 Sep 2020 22:44:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FEA42075A for ; Tue, 29 Sep 2020 22:44:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="gqd5QE93" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729111AbgI2Wot (ORCPT ); Tue, 29 Sep 2020 18:44:49 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:37810 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729082AbgI2Wot (ORCPT ); Tue, 29 Sep 2020 18:44:49 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419487; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=p7uLIKQXb5D6cyBHRbAjul4kYmamhdwITN6LVBpYWc0=; b=gqd5QE93T/WHUeXIyM6NEciTkDHNbVw50R0zCPmwJc2/GbSrUncj61Uzq4wa+7Xt22AtOd PKdw9WuXarbPWCWAI3PIP7dwcEZ2Ee6w3Mn0K608jhuqMUr5zdL0r1NnB11caljR+/jgF7 EHw13N6zZ6SurjnupU/jFbdFdZ27r4g= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-77-9UdFxYDbMFa3lILjaMad0w-1; Tue, 29 Sep 2020 18:44:45 -0400 X-MC-Unique: 9UdFxYDbMFa3lILjaMad0w-1 Received: by mail-wm1-f71.google.com with SMTP id x6so2427447wmi.1 for ; Tue, 29 Sep 2020 15:44:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p7uLIKQXb5D6cyBHRbAjul4kYmamhdwITN6LVBpYWc0=; b=Nr/8M0u/vkdsP2+pAf8vn9FqVJPL9j29TGhrcFwobeflUHr370dIkx8LMTQPACwMuy OC4RXZIuVGqevBaHBkrdmRtbF2m/q04GLcYEA5kCPUggMLygHnTaEGrln+aNTNGMxp/G 16UIoHI6FNRCxhrdZoE8DGw2G1flrwwcxj2Trtwp3E0UddF34S3+yETP3HIxD8WHZ//Q Km1XxUqzpKYJ/emzgXYwnQZJ5W6OVCQ2IdVeM+qzb62NbIynwtPmeUPz9nOuGcNVMaDC kKsSTClvoiCQyOIlXPWKJmOaWR23ZVIB+jrF2a/yzKHcpe/4IfH1RUK9AZ35x/sJwLGb 2TqA== X-Gm-Message-State: AOAM533wWNFEct7tsn4iv2Utw1/hRB23AI1JIBLh6HNbb+xCjDiLnWBE SRq92S9JGuYNJw24ng2SQSf6kfqrscwX7hpgYs2FyvQj6uykhMJ4riwfw4wOv04XXQI31fqCcix aLerwgdPBkL48 X-Received: by 2002:a1c:7215:: with SMTP id n21mr7195517wmc.154.1601419483962; Tue, 29 Sep 2020 15:44:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9RqoWhYxxMGceyGdVBz1Ep153XBWsJa08idXxAaedi/xi2UMsikdfSG5GMUTBNffkCC6uig== X-Received: by 2002:a1c:7215:: with SMTP id n21mr7195501wmc.154.1601419483746; Tue, 29 Sep 2020 15:44:43 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id 70sm7516873wme.15.2020.09.29.15.44.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 09/12] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M Date: Wed, 30 Sep 2020 00:43:52 +0200 Message-Id: <20200929224355.1224017-10-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Thomas Huth We've already got the CONFIG_ARM_V7M switch, but it currently can not be disabled yet. The m_helper.c code should not be compiled into the binary if the switch is not enabled. We also have to provide some stubs in a separate file to make sure that we still can link the other code without CONFIG_ARM_V7M. Signed-off-by: Thomas Huth Message-Id: <20190903154810.27365-4-thuth@redhat.com> [PMD: Keep m_helper-stub.c but extend it, rewrite the rest] Signed-off-by: Philippe Mathieu-Daudé --- Rewrite since v3, therefore removed Richard R-b tag. --- target/arm/cpu.h | 12 ------- target/arm/cpu_tcg.c | 4 ++- target/arm/helper.c | 7 ---- target/arm/m_helper-stub.c | 73 ++++++++++++++++++++++++++++++++++++++ target/arm/meson.build | 4 ++- 5 files changed, 79 insertions(+), 21 deletions(-) create mode 100644 target/arm/m_helper-stub.c diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 6036f61d60..c5f4c1b181 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2117,12 +2117,6 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, /* Interface between CPU and Interrupt controller. */ #ifndef CONFIG_USER_ONLY bool armv7m_nvic_can_take_pending_exception(void *opaque); -#else -static inline bool armv7m_nvic_can_take_pending_exception(void *opaque) -{ - return true; -} -#endif /** * armv7m_nvic_set_pending: mark the specified exception as pending * @opaque: the NVIC @@ -2228,13 +2222,7 @@ int armv7m_nvic_raw_execution_priority(void *opaque); * @secure: the security state to test * This corresponds to the pseudocode IsReqExecPriNeg(). */ -#ifndef CONFIG_USER_ONLY bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure); -#else -static inline bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure) -{ - return false; -} #endif /* Interface for defining coprocessor registers. diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index 00b0e08f33..563b0e82bc 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -15,6 +15,7 @@ /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) +#ifndef CONFIG_USER_ONLY static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { CPUClass *cc = CPU_GET_CLASS(cs); @@ -38,6 +39,7 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) } return ret; } +#endif /* CONFIG_USER_ONLY */ static void arm926_initfn(Object *obj) { @@ -602,9 +604,9 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data) acc->info = data; #ifndef CONFIG_USER_ONLY cc->do_interrupt = arm_v7m_cpu_do_interrupt; + cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt; #endif - cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt; cc->gdb_core_xml_file = "arm-m-profile.xml"; } diff --git a/target/arm/helper.c b/target/arm/helper.c index 88bd9dd35d..5196a17bdb 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12653,13 +12653,6 @@ int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) } } -#ifndef CONFIG_TCG -ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) -{ - g_assert_not_reached(); -} -#endif - ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) { if (arm_feature(env, ARM_FEATURE_M)) { diff --git a/target/arm/m_helper-stub.c b/target/arm/m_helper-stub.c new file mode 100644 index 0000000000..6d751424e8 --- /dev/null +++ b/target/arm/m_helper-stub.c @@ -0,0 +1,73 @@ +/* + * ARM V7M related stubs. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "cpu.h" +#include "exec/helper-proto.h" +#include "internals.h" + +void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) +{ + g_assert_not_reached(); +} + +void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) +{ + g_assert_not_reached(); +} + +uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) +{ + g_assert_not_reached(); +} + +void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) +{ + g_assert_not_reached(); +} + +uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) +{ + g_assert_not_reached(); +} + +void HELPER(v7m_preserve_fp_state)(CPUARMState *env) +{ + g_assert_not_reached(); +} + +void write_v7m_exception(CPUARMState *env, uint32_t new_exc) +{ + g_assert_not_reached(); +} + +void HELPER(v7m_vlldm)(CPUARMState *env, uint32_t fptr) +{ + g_assert_not_reached(); +} + +void HELPER(v7m_vlstm)(CPUARMState *env, uint32_t fptr) +{ + g_assert_not_reached(); +} + +ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) +{ + g_assert_not_reached(); +} + +#ifndef CONFIG_USER_ONLY + +bool armv7m_nvic_can_take_pending_exception(void *opaque) +{ + g_assert_not_reached(); +} + +void arm_v7m_cpu_do_interrupt(CPUState *cs) +{ + g_assert_not_reached(); +} + +#endif /* CONFIG_USER_ONLY */ diff --git a/target/arm/meson.build b/target/arm/meson.build index f5de2a77b8..f6a88297a8 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -21,7 +21,6 @@ arm_ss.add(files( 'gdbstub.c', 'helper.c', 'iwmmxt_helper.c', - 'm_helper.c', 'neon_helper.c', 'op_helper.c', 'tlb_helper.c', @@ -30,9 +29,12 @@ arm_ss.add(files( 'vfp_helper.c', 'cpu_tcg.c', )) +arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c')) + arm_ss.add(zlib) arm_ss.add(when: 'CONFIG_TCG', if_true: files('arm-semi.c')) +arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c')) arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c')) From patchwork Tue Sep 29 22:43:53 2020 Content-Type: text/plain; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id t4sm8074682wrr.26.2020.09.29.15.44.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Samuel Ortiz Subject: [PATCH v4 10/12] target/arm: Do not build TCG objects when TCG is off Date: Wed, 30 Sep 2020 00:43:53 +0200 Message-Id: <20200929224355.1224017-11-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Samuel Ortiz We can now safely turn all TCG dependent build off when CONFIG_TCG is off. This allows building ARM binaries with --disable-tcg. Signed-off-by: Samuel Ortiz [PMD: Heavily rebased during almost 2 years then finally rewritten =) ] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/meson.build | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/target/arm/meson.build b/target/arm/meson.build index f6a88297a8..9b7727d4bb 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -16,24 +16,29 @@ arm_ss = ss.source_set() arm_ss.add(gen) arm_ss.add(files( 'cpu.c', - 'crypto_helper.c', - 'debug_helper.c', 'gdbstub.c', 'helper.c', + 'vfp_helper.c', +)) + +arm_tcg_ss = ss.source_set() +arm_tcg_ss.add(files( + 'arm-semi.c', + 'cpu_tcg.c', + 'crypto_helper.c', + 'debug_helper.c', 'iwmmxt_helper.c', 'neon_helper.c', 'op_helper.c', 'tlb_helper.c', 'translate.c', 'vec_helper.c', - 'vfp_helper.c', - 'cpu_tcg.c', )) -arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c')) + +arm_tcg_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c')) arm_ss.add(zlib) -arm_ss.add(when: 'CONFIG_TCG', if_true: files('arm-semi.c')) arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c')) arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c')) @@ -41,6 +46,9 @@ arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: fil arm_ss.add(when: 'TARGET_AARCH64', if_true: files( 'cpu64.c', 'gdbstub64.c', +)) + +arm_tcg_ss.add(when: 'TARGET_AARCH64', if_true: files( 'helper-a64.c', 'mte_helper.c', 'pauth_helper.c', @@ -49,14 +57,16 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files( 'translate-sve.c', )) +arm_ss.add_all(when: 'CONFIG_TCG', if_true: arm_tcg_ss) + arm_softmmu_ss = ss.source_set() arm_softmmu_ss.add(files( 'arch_dump.c', 'arm-powerctl.c', 'machine.c', 'monitor.c', - 'psci.c', )) +arm_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('psci.c')) target_arch += {'arm': arm_ss} target_softmmu_arch += {'arm': arm_softmmu_ss} From patchwork Tue Sep 29 22:43:54 2020 Content-Type: text/plain; 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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id u66sm15214592wme.1.2020.09.29.15.44.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 11/12] target/arm: Reorder meson.build rules Date: Wed, 30 Sep 2020 00:43:54 +0200 Message-Id: <20200929224355.1224017-12-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Reorder the rules to make this file easier to modify. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- I prefer to not squash that with the previous patch, as it makes it harder to review. --- target/arm/meson.build | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/target/arm/meson.build b/target/arm/meson.build index 9b7727d4bb..341af8f2ca 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -14,6 +14,7 @@ gen = [ arm_ss = ss.source_set() arm_ss.add(gen) +arm_ss.add(zlib) arm_ss.add(files( 'cpu.c', 'gdbstub.c', @@ -21,6 +22,13 @@ arm_ss.add(files( 'vfp_helper.c', )) +arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c')) + +arm_ss.add(when: 'TARGET_AARCH64', if_true: files( + 'cpu64.c', + 'gdbstub64.c', +)) + arm_tcg_ss = ss.source_set() arm_tcg_ss.add(files( 'arm-semi.c', @@ -35,26 +43,16 @@ arm_tcg_ss.add(files( 'vec_helper.c', )) -arm_tcg_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c')) - -arm_ss.add(zlib) - arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c')) - -arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c')) - -arm_ss.add(when: 'TARGET_AARCH64', if_true: files( - 'cpu64.c', - 'gdbstub64.c', -)) +arm_tcg_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c')) arm_tcg_ss.add(when: 'TARGET_AARCH64', if_true: files( 'helper-a64.c', 'mte_helper.c', 'pauth_helper.c', - 'sve_helper.c', 'translate-a64.c', 'translate-sve.c', + 'sve_helper.c', )) arm_ss.add_all(when: 'CONFIG_TCG', if_true: arm_tcg_ss) From patchwork Tue Sep 29 22:43:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11807317 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E5602139A for ; Tue, 29 Sep 2020 22:45:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE3B92075A for ; Tue, 29 Sep 2020 22:45:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="MBcq+HEr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729179AbgI2WpF (ORCPT ); Tue, 29 Sep 2020 18:45:05 -0400 Received: from us-smtp-delivery-124.mimecast.com ([63.128.21.124]:50592 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728115AbgI2WpF (ORCPT ); Tue, 29 Sep 2020 18:45:05 -0400 Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1601419504; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LDAC3FC/MEaPD4LUvl2bkbirLPCAiqLo/YtDEMBCclM=; b=MBcq+HErkyunAKFXRGXfNEMmW1C+I/t7uaVZq7oebOyPkwRklEekU9LNveaa+blSVW2Zta kM09w7pdt4xwL7AFuPsGScYyfwV5bqF3JDzy1YK/mbGXG7ZzMcSg6ax7UaV89FqBNrp6oN ydPYeowBe4mNrENq81Yq2mU+yJWDBcs= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-358-M4ww9AR3NsSVNdfbGqvkLw-1; Tue, 29 Sep 2020 18:45:00 -0400 X-MC-Unique: M4ww9AR3NsSVNdfbGqvkLw-1 Received: by mail-wr1-f71.google.com with SMTP id b2so2336622wrs.7 for ; Tue, 29 Sep 2020 15:45:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LDAC3FC/MEaPD4LUvl2bkbirLPCAiqLo/YtDEMBCclM=; b=nH1tWlOan+7m9bJr8iw04JXFtR+tiugEIF4A++rUu0Gaxd7LqEZq02PBaPKM0HpJWN MSoUc3oKM/bm0DgwO74pS7VH1BPyFYFE7VWVWB8Znuqkd+DusiOTAUrp8yUySTW9k8Y1 IClC9nwQjPMlYIMHz/lCJk0157Y+EdEuIyu0h7/QvLT0ccwQlf9oDd0DBuIG7/uQT8pY L/BNbOD2Qm/On8zVvUUSjRlZvTLf+W9eoBwfa+yaGCk4S+bH+YlKJnpYCAGXqYvk+MCH 0bnJykpkFx8zKEa0FUH1A4Dph0Cyu97HE/ENOgLDY16e8LxF2jjIcVqygVUonHDZaFMq sOnA== X-Gm-Message-State: AOAM532QjUNzwF9o28wksOi0b8ErhhzFWDROsFqQqkXAlgFCUkgxUwJQ w90BO3xszV0VUz1S2DFVN31OXpq+Yyqw5kNQoKfhif3eU9Rmb6sEv7+H/C1lrC78tSpPE9WOMgL wfJe0wmBaTfRq X-Received: by 2002:a5d:43cf:: with SMTP id v15mr6808319wrr.269.1601419499106; Tue, 29 Sep 2020 15:44:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwH+Rg1xe9gd9DlTZs7Ar3VzsQvPodRcCF6Ci4iIpufBqC6fONYRBje8t5F8NeD4ocLB3USiA== X-Received: by 2002:a5d:43cf:: with SMTP id v15mr6808303wrr.269.1601419498855; Tue, 29 Sep 2020 15:44:58 -0700 (PDT) Received: from x1w.redhat.com (74.red-83-53-161.dynamicip.rima-tde.net. [83.53.161.74]) by smtp.gmail.com with ESMTPSA id 76sm7666468wma.42.2020.09.29.15.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2020 15:44:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Paolo Bonzini , Richard Henderson , Fam Zheng , Peter Maydell , kvm@vger.kernel.org, =?utf-8?q?Al?= =?utf-8?q?ex_Benn=C3=A9e?= , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v4 12/12] .travis.yml: Add a KVM-only Aarch64 job Date: Wed, 30 Sep 2020 00:43:55 +0200 Message-Id: <20200929224355.1224017-13-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200929224355.1224017-1-philmd@redhat.com> References: <20200929224355.1224017-1-philmd@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add a job to build QEMU on Aarch64 with TCG disabled, so this configuration won't bitrot over time. We explicitly modify default-configs/aarch64-softmmu.mak to only select the 'virt' and 'SBSA-REF' machines. Signed-off-by: Philippe Mathieu-Daudé --- Job ran for 7 min 30 sec https://travis-ci.org/github/philmd/qemu/jobs/731428859 --- .travis.yml | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/.travis.yml b/.travis.yml index c75221dca3..cad65cf181 100644 --- a/.travis.yml +++ b/.travis.yml @@ -402,6 +402,41 @@ jobs: - CONFIG="--disable-containers --target-list=${MAIN_SOFTMMU_TARGETS}" - UNRELIABLE=true + - name: "[aarch64] GCC (disable-tcg)" + arch: arm64 + dist: bionic + addons: + apt_packages: + - libaio-dev + - libattr1-dev + - libcap-ng-dev + - libgcrypt20-dev + - libgnutls28-dev + - libiscsi-dev + - liblttng-ust-dev + - libnfs-dev + - libnss3-dev + - libpixman-1-dev + - libpng-dev + - librados-dev + - libseccomp-dev + - liburcu-dev + - libusb-1.0-0-dev + - libvdeplug-dev + - libvte-2.91-dev + # Tests dependencies + - genisoimage + env: + - CONFIG="--disable-containers --disable-tcg --enable-kvm --disable-tools" + - TEST_CMD="make check-unit" + - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-aarch64" + before_script: + # Only use the 'virt' and 'sbsa-ref' machine which don't need TCG. + - echo CONFIG_ARM_VIRT=y > default-configs/aarch64-softmmu.mak + - echo CONFIG_SBSA_REF=y >> default-configs/aarch64-softmmu.mak + - mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR} + - ${SRC_DIR}/configure ${BASE_CONFIG} ${CONFIG} || { cat config.log && exit 1; } + - name: "[ppc64] GCC check-tcg" arch: ppc64le dist: xenial