From patchwork Thu Oct 8 12:32:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 11822879 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA33314D5 for ; Thu, 8 Oct 2020 12:33:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A743B217BA for ; Thu, 8 Oct 2020 12:33:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730041AbgJHMdA (ORCPT ); Thu, 8 Oct 2020 08:33:00 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:31438 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730031AbgJHMc4 (ORCPT ); Thu, 8 Oct 2020 08:32:56 -0400 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 08 Oct 2020 05:32:49 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 08 Oct 2020 05:32:47 -0700 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 08 Oct 2020 18:02:25 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 865EA1FE20; Thu, 8 Oct 2020 18:02:24 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, manivannan.sadhasivam@linaro.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org Cc: sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v3 1/3] dt-bindings: qcom: Add ipq8074 bindings Date: Thu, 8 Oct 2020 18:02:22 +0530 Message-Id: <1602160344-19586-2-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> References: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the new device-tree bindings for boards HK10-C1 and HK10-C2 based on ipq8074 SoC. Signed-off-by: Gokul Sriram Palanisamy Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee..7b294be 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -47,6 +47,8 @@ description: | cp01-c1 dragonboard hk01 + hk10-c1 + hk10-c2 idp liquid mtp @@ -148,6 +150,8 @@ properties: - items: - enum: - qcom,ipq8074-hk01 + - qcom,ipq8074-hk10-c1 + - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 - items: From patchwork Thu Oct 8 12:32:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 11822875 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC95B14D5 for ; Thu, 8 Oct 2020 12:32:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A44BD21D43 for ; Thu, 8 Oct 2020 12:32:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729997AbgJHMcs (ORCPT ); Thu, 8 Oct 2020 08:32:48 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:34698 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729885AbgJHMcr (ORCPT ); Thu, 8 Oct 2020 08:32:47 -0400 Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 08 Oct 2020 05:32:46 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 08 Oct 2020 05:32:44 -0700 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 08 Oct 2020 18:02:25 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id 9AC5121C0A; Thu, 8 Oct 2020 18:02:24 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, manivannan.sadhasivam@linaro.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org Cc: sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v3 2/3] arm64: dts: Add board support for HK10 Date: Thu, 8 Oct 2020 18:02:23 +0530 Message-Id: <1602160344-19586-3-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> References: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add initial support for IPQ8074 SoC based HK10-C1 and HK10-C2 evaluation boards. Signed-off-by: Gokul Sriram Palanisamy --- arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts | 11 ++++ arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts | 14 +++++ arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 76 ++++++++++++++++++++++++++++ 4 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d8f1466..7e628fe 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -4,6 +4,8 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts new file mode 100644 index 0000000..2bfcf42 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c1.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2020 The Linux Foundation. All rights reserved. + */ +/dts-v1/; + +#include "ipq8074-hk10.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C1"; + compatible = "qcom,ipq8074-hk10-c1", "qcom,ipq8074"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts new file mode 100644 index 0000000..1897e96 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; +/* Copyright (c) 2020 The Linux Foundation. All rights reserved. + */ +#include "ipq8074-hk10.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ8074/AP-HK10-C2"; + compatible = "qcom,ipq8074-hk10-c2", "qcom,ipq8074"; +}; + +&q6v5_wcss { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi new file mode 100644 index 0000000..0827055 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ +/dts-v1/; + +#include "ipq8074.dtsi" + +/ { + #address-cells = <0x2>; + #size-cells = <0x2>; + + interrupt-parent = <&intc>; + + aliases { + serial0 = &blsp1_uart5; + }; + + chosen { + stdout-path = "serial0"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0x20000000>; + }; +}; + +&blsp1_spi1 { + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; + +&blsp1_uart5 { + status = "ok"; +}; + +&pcie0 { + status = "ok"; + perst-gpio = <&tlmm 58 0x1>; +}; + +&pcie1 { + status = "ok"; + perst-gpio = <&tlmm 61 0x1>; +}; + +&qmp_pcie_phy0 { + status = "ok"; +}; + +&qmp_pcie_phy1 { + status = "ok"; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + }; +}; From patchwork Thu Oct 8 12:32:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gokul Sriram Palanisamy X-Patchwork-Id: 11822873 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7747A139F for ; Thu, 8 Oct 2020 12:32:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5EFE821D46 for ; Thu, 8 Oct 2020 12:32:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729987AbgJHMcr (ORCPT ); Thu, 8 Oct 2020 08:32:47 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:56625 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729906AbgJHMcr (ORCPT ); Thu, 8 Oct 2020 08:32:47 -0400 Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 08 Oct 2020 05:32:47 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 08 Oct 2020 05:32:45 -0700 X-QCInternal: smtphost Received: from gokulsri-linux.qualcomm.com ([10.201.2.207]) by ironmsg02-blr.qualcomm.com with ESMTP; 08 Oct 2020 18:02:25 +0530 Received: by gokulsri-linux.qualcomm.com (Postfix, from userid 432570) id AB1F821C0B; Thu, 8 Oct 2020 18:02:24 +0530 (IST) From: Gokul Sriram Palanisamy To: sboyd@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, manivannan.sadhasivam@linaro.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org Cc: sricharan@codeaurora.org, gokulsri@codeaurora.org Subject: [PATCH v3 3/3] arm64: dts: Enabled MHI device over PCIe Date: Thu, 8 Oct 2020 18:02:24 +0530 Message-Id: <1602160344-19586-4-git-send-email-gokulsri@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> References: <1602160344-19586-1-git-send-email-gokulsri@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enabled MHI device support over PCIe and added memory reservation required for MHI enabled QCN9000 PCIe card. Signed-off-by: Gokul Sriram Palanisamy Reported-by: kernel test robot Reported-by: kernel test robot --- arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 47 ++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi index 0827055..e5c1ec0 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi @@ -24,6 +24,22 @@ device_type = "memory"; reg = <0x0 0x40000000 0x0 0x20000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + qcn9000_pcie0: memory@50f00000 { + no-map; + reg = <0x0 0x50f00000 0x0 0x03700000>; + }; + + qcn9000_pcie1: memory@54600000 { + no-map; + reg = <0x0 0x54600000 0x0 0x03700000>; + }; + }; }; &blsp1_spi1 { @@ -45,11 +61,42 @@ &pcie0 { status = "ok"; perst-gpio = <&tlmm 58 0x1>; + + pcie0_rp: pcie0_rp { + reg = <0 0 0 0 0>; + + status = "ok"; + mhi_0: qcom,mhi@0 { + reg = <0 0 0 0 0 >; + + qrtr_instance_id = <0x20>; + base-addr = <0x50f00000>; + m3-dump-addr = <0x53c00000>; + etr-addr = <0x53d00000>; + qcom,caldb-addr = <0x53e00000>; + }; + }; }; &pcie1 { status = "ok"; perst-gpio = <&tlmm 61 0x1>; + + pcie1_rp: pcie1_rp { + reg = <0 0 0 0 0>; + + status = "ok"; + mhi_1: qcom,mhi@1 { + reg = <0 0 0 0 0 >; + + qrtr_instance_id = <0x21>; + base-addr = <0x54600000>; + m3-dump-addr = <0x57300000>; + etr-addr = <0x57400000>; + qcom,caldb-addr = <0x57500000>; + }; + }; + }; }; &qmp_pcie_phy0 {