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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: hVAt97YLTaojDVseOaU3+YbzhvV92vazZ77f44RMnUZLYlRbtXNFgZaf+JFRQNKUYNSJn41+3UZxy8MFG/q5v132VuAfl5XTcmSKL4iE4uUB7l1EUVqlP/HyfLurJk+A2Fa6ClW9Kk4lXt4eg34tt0qzNj7GpcaOYmNUA4UliGBi/T4KgTFDMynKwlpJqigwib5kp/wVb5Z0yvUcsVmxIemm63B8haAipbv8OuzV3LMhP5nqxU+9njcyGhhEb66UKa/oyAKGHO5zzmTxvl1lB8E9h3AYQXbyZULlNvCXwfgSGvGGAXC1naKklyIHp5EIlNfyd8mkcd0a3tI/raoWXxXmq0+iyEH7ujIGw/y4DVBtAuKDmT+XRxu2cHijyNV5bGz89yQePRd0tDVttkSzS5g9l/eaQcre3DDODtOoGBFfTpc7q+nyMOr3ba1BSWO/fAq6kVRY5tZK+h3zMioRVKkuLiejonbzscrP7mLeT8BkGDK0TzuKgdLeJCcVJJ4k6sHUzNbA0Ryxodz4bX6/k2IPK6f1i7v6pDIlve69fZaBzdpltXqtuJlKHHidpF1KlkTGqxa1NdKGVHBoPqXvjozHDBPrLKUKv5g4eV6VEECOpmiohDaXed1pDVCfNLC0uyEgYs5ddvvwV3MObavApw== X-OriginatorOrg: sifive.com X-MS-Exchange-CrossTenant-Network-Message-Id: b09b4a8c-a13c-423f-4401-08d86c69a8b2 X-MS-Exchange-CrossTenant-AuthSource: DM6PR13MB3451.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2020 15:40:33.2714 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: o/7F2L5JAy9zEaZysIMcTUzkpfUl02WnQLZ2vJ2oqw8OSDIpRQMH66rFH/nljS0l5Pi0zANUUK0Z5HCq9Zofag== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR13MB4479 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201009_114035_167543_2DAA0948 X-CRM114-Status: GOOD ( 17.25 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.223.45 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.223.45 listed in wl.mailspike.net] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@lunn.ch, peter@korsgaard.com, aou@eecs.berkeley.edu, palmer@dabbelt.com, linux-i2c@vger.kernel.org, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org, Sagar Shrikant Kadam Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org The FU540-C000 has a broken IRQ and support was added earlier so that it will operate in polling mode, but seems to work only in case interrupts property is missing from the i2c0 dt-node. This should not be the case and the driver should handle polling mode with the interrupt property present in i2c0 node of the device tree. So check if it's the FU540-C000 soc and enable polling mode master xfers, as the IRQ for this chip is broken. Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround for Sifive FU540-C000 SoC") Signed-off-by: Sagar Shrikant Kadam --- drivers/i2c/busses/i2c-ocores.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index f5fc75b..9b3d1ab 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -686,17 +686,21 @@ static int ocores_i2c_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); + /* + * Set OCORES_FLAG_BROKEN_IRQ to enable workaround for + * FU540-C000 SoC in polling mode. + * Since the SoC does have interrupt it's dt has the interrupt + * defined but it should be bypassed in driver as this SoC has + * a broken IRQ, hence update the master_xfer to use polling + * transfers. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "sifive,fu540-c000-i2c")) + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; + irq = platform_get_irq(pdev, 0); - if (irq == -ENXIO) { + if (i2c->flags & OCORES_FLAG_BROKEN_IRQ || irq == -ENXIO) { ocores_algorithm.master_xfer = ocores_xfer_polling; - - /* - * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for - * FU540-C000 SoC in polling mode. - */ - match = of_match_node(ocores_i2c_match, pdev->dev.of_node); - if (match && (long)match->data == TYPE_SIFIVE_REV0) - i2c->flags |= OCORES_FLAG_BROKEN_IRQ; } else { if (irq < 0) return irq;