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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: kHXfT95BQiZZEqBSEcyU0JweuIVzKLu0tEeuOZ2oqopAAdaaHGeH0CYmpuz29AOGInwTkebzTQlo9ijuJhKwvQbdoXwUDJrARDHKW7qn0WS3TUhVWyTmL8QfnHExZq5VjMpsE2QmmQMtwoQW9snVMObl9YuS4wAd99l72BAED2o/oVQNFBTh+40aSQBN2pbVgNRYJ7ojeLcqlHEzUq3aPtT04G4epkN8Zm6jZU7QDyNMy+tSf8QS0JTWFldJMjh5CMVcMXNVNEZoblk5OuUr040vnXRy7QxlKyC6HLA34/CN2k1Bcgh/Jgk75Ewr/XhSVxFcKeVpenieljKfPPcuKxFlWIHs3GC2wFsNJ3zJDmDzqCkyhxa5N2z8+CUsDCnAgOZ1ejrmdpVbaTG6Z0e1TFlH1Bkn9xh8PA8M82Pw/fCpk/4ZmPAizRlKvi6jCUTOZ3hVVwP0q+TDJRogoLwMULh6nIfm8d9DRiGZEB6vSyB7GTIZaxyePQEgMDpiVsU3UBprT/VMVn8dttQOo3g6Vz42HEAQC4ohTWMEplTkRZJZ8A6hRXE2LL/1IlTydDSSfdKvrxP6gLMYjrcjUjmopYEdZlDL78m+8NbXootPFVxZEm4cam8KhH2WDWfZB001Ikyat6aNOFgrJJPtPdwAVQ== X-OriginatorOrg: sifive.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7271fa4d-42c8-46c5-a3c8-08d875d0a524 X-MS-Exchange-CrossTenant-AuthSource: DM6PR13MB3451.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2020 14:50:25.8763 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6k0wbpnAOVBX7seGmH74hvL5h5WLXH7id9sCJlrVvPKTJZMnlhpoWH4hM8qbGaE/PEJb9IVyqupHg+6hclCgJQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR13MB1244 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201021_105028_557467_2AFB4F1D X-CRM114-Status: GOOD ( 18.58 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.244.58 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.244.58 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@lunn.ch, peter@korsgaard.com, aou@eecs.berkeley.edu, palmer@dabbelt.com, linux-i2c@vger.kernel.org, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org, Sagar Shrikant Kadam Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org The FU540-C000 has a broken IRQ and support was added earlier so that it will operate in polling mode, but seems to work only in case interrupts property is missing from the i2c0 dt-node. This should not be the case and the driver should handle polling mode with the interrupt property present in i2c0 node of the device tree. So check if it's the FU540-C000 soc and enable polling mode master xfers, as the IRQ for this chip is broken. Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround for Sifive FU540-C000 SoC") Signed-off-by: Sagar Shrikant Kadam Acked-by: Peter Korsgaard --- drivers/i2c/busses/i2c-ocores.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index f5fc75b..a97cbaa 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -83,7 +83,6 @@ struct ocores_i2c { #define TYPE_OCORES 0 #define TYPE_GRLIB 1 -#define TYPE_SIFIVE_REV0 2 #define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */ @@ -476,11 +475,9 @@ static const struct of_device_id ocores_i2c_match[] = { }, { .compatible = "sifive,fu540-c000-i2c", - .data = (void *)TYPE_SIFIVE_REV0, }, { .compatible = "sifive,i2c0", - .data = (void *)TYPE_SIFIVE_REV0, }, {}, }; @@ -606,7 +603,6 @@ static int ocores_i2c_probe(struct platform_device *pdev) { struct ocores_i2c *i2c; struct ocores_i2c_platform_data *pdata; - const struct of_device_id *match; struct resource *res; int irq; int ret; @@ -687,16 +683,19 @@ static int ocores_i2c_probe(struct platform_device *pdev) init_waitqueue_head(&i2c->wait); irq = platform_get_irq(pdev, 0); + /* + * Since the SoC does have an interrupt, its DT has an interrupt + * property - But this should be bypassed as the IRQ logic in this + * SoC is broken. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "sifive,fu540-c000-i2c")) { + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; + irq = -ENXIO; + } + if (irq == -ENXIO) { ocores_algorithm.master_xfer = ocores_xfer_polling; - - /* - * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for - * FU540-C000 SoC in polling mode. - */ - match = of_match_node(ocores_i2c_match, pdev->dev.of_node); - if (match && (long)match->data == TYPE_SIFIVE_REV0) - i2c->flags |= OCORES_FLAG_BROKEN_IRQ; } else { if (irq < 0) return irq;