From patchwork Tue Oct 27 07:23:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Ding X-Patchwork-Id: 11859533 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9DB431130 for ; Tue, 27 Oct 2020 07:24:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 763BB2224E for ; Tue, 27 Oct 2020 07:24:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="rii6pL/Z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730065AbgJ0HYX (ORCPT ); Tue, 27 Oct 2020 03:24:23 -0400 Received: from mail-qv1-f74.google.com ([209.85.219.74]:56405 "EHLO mail-qv1-f74.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2507536AbgJ0HYW (ORCPT ); Tue, 27 Oct 2020 03:24:22 -0400 Received: by mail-qv1-f74.google.com with SMTP id d41so288441qvc.23 for ; Tue, 27 Oct 2020 00:24:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=zIO7niUYC/KRwu/Yy0fHD/fKcjuWTyDimZWs21v1xms=; b=rii6pL/ZW3X7SRia9dL+5oIwTUDwLafe/m8Bl0zQyh8BcIJgeANx3n1+NkZCyMMyGP TfaOQ0cmlsUafcDJ1ajTho+HbAN0OfOQER2LiBojEl50BPgKZPXBx6RFzYcEC+9V5LIi TngMJT4lcf+r5jchE6S+/Gn3XV+flW6kv+0YfwfAtexZT8i0XhdhGFzACcQk1rzx4+SC YHLI2xH1lwhKkzQoBDkPAglAWdgMTcStv56fanULsvUH4i/M4DZB9N2tk1/Sem1jzDm4 WFNpwLgdNbJSK+q/kSOTOpDbECAcfGee1V7DUqRvMiTd07hTI3vaZHbDo+dH4WLu3fWH Zj9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=zIO7niUYC/KRwu/Yy0fHD/fKcjuWTyDimZWs21v1xms=; b=HYihNBd3NBdfnALr8aU/LwLRiGWlqb7NX+Fe5h91i/jQ6hCIPFmJp7Yxf+YaLFmP2s WeoEjnhiKxVZBAbLM4hohpDXWMQPZQ8HWWXmPuHdRxwJOLp1hrkMxrY7Abyv+l5O+xqx 8vgOvQctfYYFzsRj+GMOCyw4AoDB5S8lZxABq1rHT5pSXQJMk1PS2jNVgl8DzdLEBt3b gIRND6Vv1mTkKrTROk+6eJQ3TXIuv4czbK00C7Y7Lij/Oy39cFmjSIbA/WDRHhXHuzrR nTei5w9yUVxO1b0ePQGbTjfPT8Ruk6A5O5Q90mNX+SAgsAKuSXjqwF/Zz5BWQNcGpAiv v8+g== X-Gm-Message-State: AOAM531ZxniD+ebN+oL11+25JylG9pJPzfPIso3EA3CfFZybj4C29Elx /+6w+xandvq2N/uuDnFIkJ3VxG1CIEcHOXf4 X-Google-Smtp-Source: ABdhPJwwIkaWrdZNJQaEvW9lS058OgOLNutaoICzsq0KQZxy+oeWhUGboP1xRE4vMis04pryJ/+bx6gaADy/UylI Sender: "victording via sendgmr" X-Received: from victording.syd.corp.google.com ([2401:fa00:9:14:f693:9fff:fef4:fa73]) (user=victording job=sendgmr) by 2002:ad4:59cf:: with SMTP id el15mr1184065qvb.17.1603783459621; Tue, 27 Oct 2020 00:24:19 -0700 (PDT) Date: Tue, 27 Oct 2020 07:23:54 +0000 In-Reply-To: <20201027072358.13725-1-victording@google.com> Message-Id: <20201027072358.13725-2-victording@google.com> Mime-Version: 1.0 References: <20201027072358.13725-1-victording@google.com> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog Subject: [PATCH v3 1/4] x86/msr-index: sort AMD RAPL MSRs by address From: Victor Ding To: linux-kernel@vger.kernel.org Cc: Daniel Lezcano , Kim Phillips , Zhang Rui , linux-pm@vger.kernel.org, Victor Ding , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Joerg Roedel , Kan Liang , Pawan Gupta , "Peter Zijlstra (Intel)" , Sean Christopherson , Srinivas Pandruvada , Thomas Gleixner , Tony Luck , Vineela Tummalapalli , x86@kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org MSRs in the rest of this file are sorted by their addresses; fixing the two outliers. No functional changes. Signed-off-by: Victor Ding Acked-by: Kim Phillips --- (no changes since v2) Changes in v2: By Kim Phillips : - Added Kim's Acked-by. - Added Daniel Lezcano to Cc. - (No code changes). arch/x86/include/asm/msr-index.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 972a34d93505..21917e134ad4 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -326,8 +326,8 @@ #define MSR_PP1_ENERGY_STATUS 0x00000641 #define MSR_PP1_POLICY 0x00000642 -#define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b #define MSR_AMD_RAPL_POWER_UNIT 0xc0010299 +#define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b /* Config TDP MSRs */ #define MSR_CONFIG_TDP_NOMINAL 0x00000648 From patchwork Tue Oct 27 07:23:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Ding X-Patchwork-Id: 11859535 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EEC6B1130 for ; Tue, 27 Oct 2020 07:24:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D047C21D24 for ; Tue, 27 Oct 2020 07:24:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="oynU9DwR" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729550AbgJ0HYu (ORCPT ); Tue, 27 Oct 2020 03:24:50 -0400 Received: from mail-qk1-f202.google.com ([209.85.222.202]:44251 "EHLO mail-qk1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2507575AbgJ0HYt (ORCPT ); Tue, 27 Oct 2020 03:24:49 -0400 Received: by mail-qk1-f202.google.com with SMTP id v186so228341qkb.11 for ; Tue, 27 Oct 2020 00:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=v17o19+YnU8WUH8fPM9zqxvAIBUHHC5coCCN3OqBEHM=; b=oynU9DwRJ9SluUXFN93bnlTTy4ymlqK0CqOE1YOo3JTPeszIdnlN6uROW3ufaGCZWp t9Gk06jLjG2UyVr/TdJ3Kui3cu1OJ6pQpf4Q8wr6KFj7YCsTpAoYh9WGaVyZcbQP3v1+ soecEoocP15De+14llSRA/Ilgt/ZVhzXvHigbuSbkgaHcMYoXwo3EZMCZD95mQJMHmer Wt4/6/p9EJWH/JBRCi9L9jJFUxkYOEahKwaaiXqTNQxizwMiApYXFIOopzh8ENW6iVaE tQu6zzA3vQ97fwbNNvaouMtH20xsxs4izoXn0b8MQjzvp/NygQvytF4n9223/pI0oWir jSCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=v17o19+YnU8WUH8fPM9zqxvAIBUHHC5coCCN3OqBEHM=; b=H+VuiFdQwiOOlrQhHnI1upmsayueFibEI4sEOV3oFeUuXcoeH2eQ4GG4+t5AaQzbkT MR7ooyYbEcgNVV2Z1PAJD4Va1r7OuhRl3W0by0CNp8EpwQQMcz3VtbBqhSiNKZUHIq2v r8eoylJ38B2CEzKvIqdGfZlJBRrJ+Gtk8RNYn7LcJWOaqWR47J0T73Xag76dY5tl7QUV Wtggn0uUy7q9qRvbdJWVrDF2mHta7NZBQ8PQ/3zS8i7Q6hGq5qOWgwRGQg7dqVg9L3Nw /1y5VWQ7WjsvjO5urpeumDpOcSTSLwL5zv6utyHrRnc0EDt0pDYvV2fNO1I4VjE/Nu48 waUQ== X-Gm-Message-State: AOAM530DT43cuiisiuwLvGttm8+xT+T4J5S4zyEa+OJxU2iMF/9ROV1w J8eNq34XTB5aDiAfczwRjGqa62TrKEZyAHdi X-Google-Smtp-Source: ABdhPJyF+hUvH4GmtPOfeUj659ZHaxF7w2Z2JhfKgSbpggQryH0vXyTKRJHrl7GCPDq2BzhskMUe3bCjnwhF/BHn Sender: "victording via sendgmr" X-Received: from victording.syd.corp.google.com ([2401:fa00:9:14:f693:9fff:fef4:fa73]) (user=victording job=sendgmr) by 2002:a0c:e054:: with SMTP id y20mr1204435qvk.30.1603783487096; Tue, 27 Oct 2020 00:24:47 -0700 (PDT) Date: Tue, 27 Oct 2020 07:23:55 +0000 In-Reply-To: <20201027072358.13725-1-victording@google.com> Message-Id: <20201027072358.13725-3-victording@google.com> Mime-Version: 1.0 References: <20201027072358.13725-1-victording@google.com> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog Subject: [PATCH v3 2/4] powercap/intel_rapl_msr: Convert rapl_msr_priv into pointer From: Victor Ding To: linux-kernel@vger.kernel.org Cc: Daniel Lezcano , Kim Phillips , Zhang Rui , linux-pm@vger.kernel.org, Victor Ding , "Rafael J. Wysocki" Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch changes the static struct rapl_msr_priv to a pointer to allow using a different set of RAPL MSR interface, preparing for supporting AMD's RAPL MSR interface. No functional changes. Signed-off-by: Victor Ding Acked-by: Kim Phillips --- (no changes since v2) Changes in v2: By Kim Phillips : - Added Kim's Acked-by. - Added Daniel Lezcano to Cc. - (No code changes). drivers/powercap/intel_rapl_msr.c | 33 +++++++++++++++++-------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c index 1646808d354c..a819b3b89b2f 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -31,7 +31,9 @@ #define MSR_VR_CURRENT_CONFIG 0x00000601 /* private data for RAPL MSR Interface */ -static struct rapl_if_priv rapl_msr_priv = { +static struct rapl_if_priv *rapl_msr_priv; + +static struct rapl_if_priv rapl_msr_priv_intel = { .reg_unit = MSR_RAPL_POWER_UNIT, .regs[RAPL_DOMAIN_PACKAGE] = { MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO }, @@ -58,9 +60,9 @@ static int rapl_cpu_online(unsigned int cpu) { struct rapl_package *rp; - rp = rapl_find_package_domain(cpu, &rapl_msr_priv); + rp = rapl_find_package_domain(cpu, rapl_msr_priv); if (!rp) { - rp = rapl_add_package(cpu, &rapl_msr_priv); + rp = rapl_add_package(cpu, rapl_msr_priv); if (IS_ERR(rp)) return PTR_ERR(rp); } @@ -73,7 +75,7 @@ static int rapl_cpu_down_prep(unsigned int cpu) struct rapl_package *rp; int lead_cpu; - rp = rapl_find_package_domain(cpu, &rapl_msr_priv); + rp = rapl_find_package_domain(cpu, rapl_msr_priv); if (!rp) return 0; @@ -136,40 +138,41 @@ static int rapl_msr_probe(struct platform_device *pdev) const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids); int ret; - rapl_msr_priv.read_raw = rapl_msr_read_raw; - rapl_msr_priv.write_raw = rapl_msr_write_raw; + rapl_msr_priv = &rapl_msr_priv_intel; + rapl_msr_priv->read_raw = rapl_msr_read_raw; + rapl_msr_priv->write_raw = rapl_msr_write_raw; if (id) { - rapl_msr_priv.limits[RAPL_DOMAIN_PACKAGE] = 3; - rapl_msr_priv.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] = + rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] = 3; + rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] = MSR_VR_CURRENT_CONFIG; pr_info("PL4 support detected.\n"); } - rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); - if (IS_ERR(rapl_msr_priv.control_type)) { + rapl_msr_priv->control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); + if (IS_ERR(rapl_msr_priv->control_type)) { pr_debug("failed to register powercap control_type.\n"); - return PTR_ERR(rapl_msr_priv.control_type); + return PTR_ERR(rapl_msr_priv->control_type); } ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online", rapl_cpu_online, rapl_cpu_down_prep); if (ret < 0) goto out; - rapl_msr_priv.pcap_rapl_online = ret; + rapl_msr_priv->pcap_rapl_online = ret; return 0; out: if (ret) - powercap_unregister_control_type(rapl_msr_priv.control_type); + powercap_unregister_control_type(rapl_msr_priv->control_type); return ret; } static int rapl_msr_remove(struct platform_device *pdev) { - cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online); - powercap_unregister_control_type(rapl_msr_priv.control_type); + cpuhp_remove_state(rapl_msr_priv->pcap_rapl_online); + powercap_unregister_control_type(rapl_msr_priv->control_type); return 0; } From patchwork Tue Oct 27 07:23:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Ding X-Patchwork-Id: 11859537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E383A1130 for ; Tue, 27 Oct 2020 07:25:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6FDE22263 for ; Tue, 27 Oct 2020 07:25:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="QrX7cXKr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2507592AbgJ0HZG (ORCPT ); Tue, 27 Oct 2020 03:25:06 -0400 Received: from mail-yb1-f202.google.com ([209.85.219.202]:41056 "EHLO mail-yb1-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2507589AbgJ0HZF (ORCPT ); Tue, 27 Oct 2020 03:25:05 -0400 Received: by mail-yb1-f202.google.com with SMTP id c9so480927ybs.8 for ; Tue, 27 Oct 2020 00:25:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=6rOIjCU41RmBcOLQKBev/ecK/YxKmDMIy5ABsxdSYCE=; b=QrX7cXKrWwhToRwCILi0aJLfIUraRa7nc85z1nt+jfZWEBJ05TVAqrwtwoFfuEbTzJ dHEJIAmqmW0vI1ezGGRXxmwgUTJSvxLj3EG7JgaCHzu3ryA/vG60/geB33kNOakoipyL FcrN9CPKwRJzXRCM2O/rIUaF0kX4viQCXDhCQ5ZhPo4CSuDvjMZ1hkR6c9eGhCO48VO6 43qaZAn0QnNGDCBBzDl3jlGZ3C8q44/yripuJIqcXI2/2Ezy6qvG1gJEoYNqpbtwICLa wFWZNt9Xe7w5p1CuCEYX3MOfE9FAWII7fhepQTeDIYTiv5ja6Z86obJJxCZZZcf+kVGB dvGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=6rOIjCU41RmBcOLQKBev/ecK/YxKmDMIy5ABsxdSYCE=; b=KG6rEes8v8NNn6RUg26qYPAicgF2753/cy5vNnfQL0BR9pJjHkgxM/x5+TMZ18HaxQ vU3INc9J4UZ7JnjZire9QeHNVVoXgGZNtDwY7e1nRK2sufBqErxtB2xbyY8LnsXXNJBF rplmjgwv3EN+g3rB67BlF5JD7JEEnAg2x1FugJm/ko/rA1YC7hdwN/THpC3vp6KqIUvt GBM65sC/cyl741VZfblO8O+TdP27gDqz+LrnOxEBdOuS1cO7gwihHmsQVz1dvmV3Oroh RYXivxXlKPjo+MPudZSgiLI6xa06Mh8vW8cKRYleLNDJjs39j2CvRwioe6q9XQnHJq9X eVVA== X-Gm-Message-State: AOAM531fOoSPecqRzlXMGKQHTwr+EJ19AhZL4+D+CTyZ1JX9ZgL3YCaO pWcJYvE3hKFJQ4OefzaG9GJ5imU/Ey7kuw+U X-Google-Smtp-Source: ABdhPJxGQbOMLGXGj3UgCL6+1wWQWGlw+40OKZUZ688ahZtZZ3L7CpQeNb49i6nF0XZafiTvD/wCOxoPjxL/x+9A Sender: "victording via sendgmr" X-Received: from victording.syd.corp.google.com ([2401:fa00:9:14:f693:9fff:fef4:fa73]) (user=victording job=sendgmr) by 2002:a25:bd0c:: with SMTP id f12mr1215275ybk.3.1603783504108; Tue, 27 Oct 2020 00:25:04 -0700 (PDT) Date: Tue, 27 Oct 2020 07:23:56 +0000 In-Reply-To: <20201027072358.13725-1-victording@google.com> Message-Id: <20201027072358.13725-4-victording@google.com> Mime-Version: 1.0 References: <20201027072358.13725-1-victording@google.com> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog Subject: [PATCH v3 3/4] powercap: Add AMD Fam17h RAPL support From: Victor Ding To: linux-kernel@vger.kernel.org Cc: Daniel Lezcano , Kim Phillips , Zhang Rui , linux-pm@vger.kernel.org, Victor Ding , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Joerg Roedel , Kan Liang , Pawan Gupta , "Peter Zijlstra (Intel)" , "Rafael J. Wysocki" , Sean Christopherson , Srinivas Pandruvada , Thomas Gleixner , Tony Luck , Vineela Tummalapalli , x86@kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This patch enables AMD Fam17h RAPL support for the power capping framework. The support is as per AMD Fam17h Model31h (Zen2) and model 00-ffh (Zen1) PPR. Tested by comparing the results of following two sysfs entries and the values directly read from corresponding MSRs via /dev/cpu/[x]/msr: /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj Signed-off-by: Victor Ding Acked-by: Kim Phillips --- Changes in v3: By Victor Ding - Rebased to the latest code. - Created a new rapl_defaults for AMD CPUs. - Removed redundant setting to zeros. - Stopped using the fake power limit domain 1. Changes in v2: By Kim Phillips : - Added Kim's Acked-by. - Added Daniel Lezcano to Cc. - (No code change). arch/x86/include/asm/msr-index.h | 1 + drivers/powercap/intel_rapl_common.c | 6 ++++++ drivers/powercap/intel_rapl_msr.c | 20 +++++++++++++++++++- 3 files changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 21917e134ad4..c36a083c8ec0 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -327,6 +327,7 @@ #define MSR_PP1_POLICY 0x00000642 #define MSR_AMD_RAPL_POWER_UNIT 0xc0010299 +#define MSR_AMD_CORE_ENERGY_STATUS 0xc001029a #define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b /* Config TDP MSRs */ diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c index 0b2830efc574..bedd780bed12 100644 --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -1011,6 +1011,10 @@ static const struct rapl_defaults rapl_defaults_cht = { .compute_time_window = rapl_compute_time_window_atom, }; +static const struct rapl_defaults rapl_defaults_amd = { + .check_unit = rapl_check_unit_core, +}; + static const struct x86_cpu_id rapl_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core), X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core), @@ -1061,6 +1065,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server), X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server), + + X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd), {} }; MODULE_DEVICE_TABLE(x86cpu, rapl_ids); diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c index a819b3b89b2f..78213d4b5b16 100644 --- a/drivers/powercap/intel_rapl_msr.c +++ b/drivers/powercap/intel_rapl_msr.c @@ -49,6 +49,14 @@ static struct rapl_if_priv rapl_msr_priv_intel = { .limits[RAPL_DOMAIN_PLATFORM] = 2, }; +static struct rapl_if_priv rapl_msr_priv_amd = { + .reg_unit = MSR_AMD_RAPL_POWER_UNIT, + .regs[RAPL_DOMAIN_PACKAGE] = { + 0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 }, + .regs[RAPL_DOMAIN_PP0] = { + 0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 }, +}; + /* Handles CPU hotplug on multi-socket systems. * If a CPU goes online as the first CPU of the physical package * we add the RAPL package to the system. Similarly, when the last @@ -138,7 +146,17 @@ static int rapl_msr_probe(struct platform_device *pdev) const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids); int ret; - rapl_msr_priv = &rapl_msr_priv_intel; + switch (boot_cpu_data.x86_vendor) { + case X86_VENDOR_INTEL: + rapl_msr_priv = &rapl_msr_priv_intel; + break; + case X86_VENDOR_AMD: + rapl_msr_priv = &rapl_msr_priv_amd; + break; + default: + pr_err("intel-rapl does not support CPU vendor %d\n", boot_cpu_data.x86_vendor); + return -ENODEV; + } rapl_msr_priv->read_raw = rapl_msr_read_raw; rapl_msr_priv->write_raw = rapl_msr_write_raw; From patchwork Tue Oct 27 07:23:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Ding X-Patchwork-Id: 11859539 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F35B561C for ; Tue, 27 Oct 2020 07:25:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D459D22265 for ; Tue, 27 Oct 2020 07:25:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Se83opTp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2507590AbgJ0HZd (ORCPT ); Tue, 27 Oct 2020 03:25:33 -0400 Received: from mail-qk1-f201.google.com ([209.85.222.201]:40263 "EHLO mail-qk1-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731322AbgJ0HZc (ORCPT ); Tue, 27 Oct 2020 03:25:32 -0400 Received: by mail-qk1-f201.google.com with SMTP id j20so231575qkl.7 for ; Tue, 27 Oct 2020 00:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:date:in-reply-to:message-id:mime-version:references:subject :from:to:cc; bh=AKI7ibcZP5xCZTEhfHJrDlNXuB2qzdKBd1dimS2sjDc=; b=Se83opTpzVXGBV1/XFoSfX3J6oK3vbbaUAiYYyoJnhe8l2KURQMhH9fBzzWC9eNeZF DywTuUBobQ9zfecLdMsyKsNN1T80DsTr11y8trZdIpKbLYl8kya9qFbjXT7/6nAfWLR7 PDvi4jIl7TnjwCsVBdH4qXeWki1vFHaRjxCZjYNcGbXM9HmVpPYFSD7wJXzDegAKfAZj VHtge5FQ8lM3mTOrVh/M8hcrjuQQePgiL4EyzBNP9k+ICXS3OcAs3oNuAshNdsNY6t7j gwfaM2kCg00RwCuamwQBim6blf1SOR++shPZfm1jKat8xw/C8F9KLPotBMwLGxOheyG5 sn4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=AKI7ibcZP5xCZTEhfHJrDlNXuB2qzdKBd1dimS2sjDc=; b=Jz8zprjnxG9nec8R/Gqd05yKRz0ZJx07yO+KU0MEf/NlB8vYtaxju0M4Ssqm0U48Po 2hPkge5I6Yj9w1McePRg5MSbLRtkQ4+NmCnZmQpUQQMKLI5JkhQVZ3E3Mo/WEcrM01I4 GNxeqs9WPmgWEI8wpLWgYzlzDxPYAxfcA+Zcuer/vQY5K0g+5Zg38lFa7D6v/Ihixq6t LFh80h9dxkbwLGkcCTzokFfCYXa+he6sSwpC2Ls/H63HyAPJr5hXXVIRQwEW3Gn2Sx4B qcHyu8TKd8pLSorcVrK4VKU/aTWUqrd7rqEogRdkneZV7fIjQ8jVhjWyvmUcS2nPZWwI c9Xg== X-Gm-Message-State: AOAM533zv9tT5jQcjLNZuT8M4aH1Ln2TF640KGDYzSYIpU+s2JkinAkH IyUGUYS7WrWZtWauo0Q2Kb8yfCAP9DroRCdj X-Google-Smtp-Source: ABdhPJzDwaMIiidKcK1V16PaYpOyNvVYjrZcx2mW5jTbbX6vYZWVOh15zaI+yzsWyAAEYv7s88HlBGioASjogGyg Sender: "victording via sendgmr" X-Received: from victording.syd.corp.google.com ([2401:fa00:9:14:f693:9fff:fef4:fa73]) (user=victording job=sendgmr) by 2002:a05:6214:b84:: with SMTP id fe4mr1092778qvb.3.1603783531949; Tue, 27 Oct 2020 00:25:31 -0700 (PDT) Date: Tue, 27 Oct 2020 07:23:57 +0000 In-Reply-To: <20201027072358.13725-1-victording@google.com> Message-Id: <20201027072358.13725-5-victording@google.com> Mime-Version: 1.0 References: <20201027072358.13725-1-victording@google.com> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog Subject: [PATCH v3 4/4] powercap: Add AMD Fam19h RAPL support From: Victor Ding To: linux-kernel@vger.kernel.org Cc: Daniel Lezcano , Kim Phillips , Zhang Rui , linux-pm@vger.kernel.org, Victor Ding , "Rafael J. Wysocki" Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Kim Phillips AMD Family 19h's RAPL MSRs are identical to Family 17h's. Extend Family 17h's support to Family 19h. Signed-off-by: Kim Phillips Signed-off-by: Victor Ding --- Changes in v3: By Victor Ding - Rebased to the latest code. - Created a new rapl_defaults for AMD CPUs. - Removed redundant setting to zeros. - Stopped using the fake power limit domain 1. By Victor Ding - Changed it to use rapl_defaults_amd. Changes in v2: By Kim Phillips - Added the Fam19h patch to the end of the series - Added my Acked-by - Added Daniel Lezcano to Cc - (linux-pm was already on Cc) - (No code changes) By Kim Phillips : - Added Daniel Lezcano to Cc. - (No code changes). drivers/powercap/intel_rapl_common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c index bedd780bed12..264872f7f46d 100644 --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c @@ -1067,6 +1067,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server), X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd), + X86_MATCH_VENDOR_FAM(AMD, 0x19, &rapl_defaults_amd), {} }; MODULE_DEVICE_TABLE(x86cpu, rapl_ids);