From patchwork Tue Oct 27 13:36:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 11860423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94E70C388F9 for ; Tue, 27 Oct 2020 13:36:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3051C21556 for ; Tue, 27 Oct 2020 13:36:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3051C21556 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 80E786EB76; Tue, 27 Oct 2020 13:36:05 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6D3606EB76 for ; Tue, 27 Oct 2020 13:36:04 +0000 (UTC) IronPort-SDR: d0NFhU8K25YIdxN0CCnXDaQO2j0nOdWrR9Z50IFCYmqjg0cW8Y2gwRfj1Yx+OvcUWn34/nLniq IRw2jkCkANYg== X-IronPort-AV: E=McAfee;i="6000,8403,9786"; a="155857967" X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="155857967" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2020 06:36:03 -0700 IronPort-SDR: TpWM9frLlmah4djBTfKhmfT5pxmwWv25KNsJkn9NT+WJ3WNluEr2aGx5MVqOiTDKNHuojiBmLA ABxqtbnRF1Mw== X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="303753260" Received: from ideak-desk.fi.intel.com ([10.237.68.141]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2020 06:36:02 -0700 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Tue, 27 Oct 2020 15:36:00 +0200 Message-Id: <20201027133600.3656665-1-imre.deak@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Fix error handling during DPRX link training X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Make sure to propagate the error result from the DPRX link training phase. The lack of this broke the link training fall-back logic if the link training failed during the DPRX phase. Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training") References: https://gitlab.freedesktop.org/drm/intel/-/issues/1378 Reported-by: Jason Andryuk Cc: Ville Syrjälä Signed-off-by: Imre Deak Reviewed-by: Jason Andryuk --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 91d3979902d0..632d0a7d886d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -768,7 +768,7 @@ intel_dp_link_train_all_phys(struct intel_dp *intel_dp, } if (ret) - intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX); + ret = intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX); if (intel_dp->set_idle_link_train) intel_dp->set_idle_link_train(intel_dp, crtc_state);