From patchwork Tue Oct 27 16:45:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 11860895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FA40C388F9 for ; Tue, 27 Oct 2020 16:46:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9C12322202 for ; Tue, 27 Oct 2020 16:46:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="jpUCUhjI" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9C12322202 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CCCBE6E1D2; Tue, 27 Oct 2020 16:46:29 +0000 (UTC) Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) by gabe.freedesktop.org (Postfix) with ESMTPS id 159516E1D2 for ; Tue, 27 Oct 2020 16:46:29 +0000 (UTC) Received: by mail-pf1-x442.google.com with SMTP id 10so1243828pfp.5 for ; Tue, 27 Oct 2020 09:46:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bsZEVeTPuxeWNhyuGo8tUdund/O3OcaD79qUn4oefT8=; b=jpUCUhjI1DzbIPLIhYF0iFV+0AMGhMrCYScsCt6V1q+QGIqVOxiHOO2/cwxW2p/vXi 357pMeH7v+k393kaf0E0crX1Mm3IotUsit7Faw4aj1eiGRJeQkeUNcQWj5HLAVREyHgy m5LkfV9zfgN+hNqjsJYsKE783iPGkc7R5YPh8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bsZEVeTPuxeWNhyuGo8tUdund/O3OcaD79qUn4oefT8=; b=Bs/xHYCcIf1z0ab/l6T3vjVCXBfsjUyCuNWhnQJEnvFByEcwdc9tSsE8GLubGHhCd9 LcJ228fAn/+7M02CCtOq0C90VDnr23+6ni+ZALYnaVKCygNoaDqD3N1nKv5zS2p15zp0 a52hSBueavPo9VEKVn2Z58PfjpV+Sz94Erl9AkRu8iSXAdoKXFGt11dxPjI7ehvH9Iwy liC2gCQtDlF1p5KYsITiIfFnuix9I9Y/wodkydKuHXH8ttEnGbk1JVvxNYhLKPhuPrWV QDdPG5uoD2RafrxqsV4Zs3a5l6iUXvfTwAqPIbv93DSTQxbmCNszNI/Xkk5CDDzuh3Xt 6d8Q== X-Gm-Message-State: AOAM532swsfOnC0O1N4R2gSWdk/rlO8SNSGNVxxBJnVv/aQol9607xWE PLlIjgIClapcpQWrR1txAdGiCg== X-Google-Smtp-Source: ABdhPJy6kI/jv5TbL1WQCyeCthgUrZ18nX4JbLu7XsYrfHw0VtV5ZfSNPYg6/axupJDydAQHOkNGEA== X-Received: by 2002:a63:7408:: with SMTP id p8mr2559660pgc.273.1603817188516; Tue, 27 Oct 2020 09:46:28 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id c12sm3002688pgi.14.2020.10.27.09.46.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Oct 2020 09:46:27 -0700 (PDT) From: Douglas Anderson To: Thierry Reding , Sam Ravnborg Subject: [PATCH 1/3] drm: panel: simple: Allow timing constraints, not fixed delays Date: Tue, 27 Oct 2020 09:45:54 -0700 Message-Id: <20201027094553.1.I31c4f8b111dbef1ab658f206764655ae983bc560@changeid> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robdclark@chromium.org, David Airlie , Douglas Anderson , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Rob Herring Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The simple panel code currently allows panels to define fixed delays at certain stages of initialization. These work OK, but they don't really map all that clearly to the requirements presented in many panel datasheets. Instead of defining a fixed delay, those datasheets provide a timing diagram and specify a minimum amount of time that needs to pass from event A to event B. Because of the way things are currently defined, most panels end up over-delaying. One prime example here is that a number of panels I've looked at define the amount of time that must pass between turning a panel off and turning it back on again. Since there is no way to specify this, many developers have listed this as the "unprepare" delay. However, if nobody ever tried to turn the panel on again in the next 500 ms (or whatever the delay was) then this delay was pointless. It's better to do the delay only in the case that someone tried to turn the panel on too quickly. Let's support specifying delays as constraints. We'll start with the one above and also a second one: the minimum time between prepare being done and doing the enable. On the panel I'm looking at, there's an 80 ms minimum time between HPD being asserted by the panel and setting the backlight enable GPIO. By specifying as a constraint we can enforce this without over-delaying. Specifically the link training is allowed to happen in parallel with this delay so adding a fixed 80 ms delay isn't ideal. Signed-off-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-simple.c | 51 ++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 2be358fb46f7..cbbe71a2a940 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -92,6 +92,19 @@ struct panel_desc { unsigned int unprepare; } delay; + /** + * @prepare_to_enable_ms: If this many milliseconds hasn't passed after + * prepare finished, add a delay to the start + * of enable. + * @unprepare_to_prepare_ms: If this many milliseconds hasn't passed + * unprepare finished, add a delay to the + * start of prepare. + */ + struct { + unsigned int prepare_to_enable_ms; + unsigned int unprepare_to_prepare_ms; + } timing_constraints; + u32 bus_format; u32 bus_flags; int connector_type; @@ -99,10 +112,12 @@ struct panel_desc { struct panel_simple { struct drm_panel base; - bool prepared; bool enabled; bool no_hpd; + ktime_t prepared_time; + ktime_t unprepared_time; + const struct panel_desc *desc; struct regulator *supply; @@ -230,6 +245,21 @@ static int panel_simple_get_non_edid_modes(struct panel_simple *panel, return num; } +static void panel_simple_enforce_constraint(ktime_t start_ktime, + unsigned int min_ms) +{ + ktime_t now_ktime, min_ktime; + + if (!min_ms) + return; + + min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); + now_ktime = ktime_get(); + + if (ktime_before(now_ktime, min_ktime)) + msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); +} + static int panel_simple_disable(struct drm_panel *panel) { struct panel_simple *p = to_panel_simple(panel); @@ -249,18 +279,19 @@ static int panel_simple_unprepare(struct drm_panel *panel) { struct panel_simple *p = to_panel_simple(panel); - if (!p->prepared) + if (!p->prepared_time) return 0; gpiod_set_value_cansleep(p->enable_gpio, 0); regulator_disable(p->supply); + p->prepared_time = 0; + p->unprepared_time = ktime_get(); + if (p->desc->delay.unprepare) msleep(p->desc->delay.unprepare); - p->prepared = false; - return 0; } @@ -296,9 +327,12 @@ static int panel_simple_prepare(struct drm_panel *panel) int err; int hpd_asserted; - if (p->prepared) + if (p->prepared_time) return 0; + panel_simple_enforce_constraint(p->unprepared_time, + p->desc->timing_constraints.unprepare_to_prepare_ms); + err = regulator_enable(p->supply); if (err < 0) { dev_err(panel->dev, "failed to enable supply: %d\n", err); @@ -333,7 +367,7 @@ static int panel_simple_prepare(struct drm_panel *panel) } } - p->prepared = true; + p->prepared_time = ktime_get(); return 0; } @@ -348,6 +382,9 @@ static int panel_simple_enable(struct drm_panel *panel) if (p->desc->delay.enable) msleep(p->desc->delay.enable); + panel_simple_enforce_constraint(p->prepared_time, + p->desc->timing_constraints.prepare_to_enable_ms); + p->enabled = true; return 0; @@ -514,7 +551,7 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc) return -ENOMEM; panel->enabled = false; - panel->prepared = false; + panel->prepared_time = 0; panel->desc = desc; panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); From patchwork Tue Oct 27 16:45:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 11860893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B519DC63798 for ; Tue, 27 Oct 2020 16:46:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4D33F222C8 for ; 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Tue, 27 Oct 2020 09:46:29 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id c12sm3002688pgi.14.2020.10.27.09.46.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Oct 2020 09:46:29 -0700 (PDT) From: Douglas Anderson To: Thierry Reding , Sam Ravnborg Subject: [PATCH 2/3] drm: panel: simple: Add BOE NV110WTM-N61 Date: Tue, 27 Oct 2020 09:45:55 -0700 Message-Id: <20201027094553.2.I71b2118dfc00fd7b43b02d28e7b890081c2acfa2@changeid> X-Mailer: git-send-email 2.29.0.rc2.309.g374f81d7ae-goog In-Reply-To: <20201027094553.1.I31c4f8b111dbef1ab658f206764655ae983bc560@changeid> References: <20201027094553.1.I31c4f8b111dbef1ab658f206764655ae983bc560@changeid> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robdclark@chromium.org, David Airlie , Douglas Anderson , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Rob Herring Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for the BOE NV110WTM-N61 panel. The EDID lists two modes (one for 60 Hz refresh rate and one for 40 Hz), so we'll list both of them here. Note that the panel datasheet requires 80 ms between HPD asserting and the backlight power being turned on. We'll use the new timing constraints structure to do this cleanly. This assumes that the backlight will be enabled _after_ the panel enable finishes. This is how it works today and seems a sane assumption. Signed-off-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-simple.c | 48 ++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index cbbe71a2a940..c17c1203734a 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1353,6 +1353,51 @@ static const struct panel_desc boe_nv101wxmn51 = { }, }; +static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { + { + .clock = 207800, + .hdisplay = 2160, + .hsync_start = 2160 + 48, + .hsync_end = 2160 + 48 + 32, + .htotal = 2160 + 48 + 32 + 100, + .vdisplay = 1440, + .vsync_start = 1440 + 3, + .vsync_end = 1440 + 3 + 6, + .vtotal = 1440 + 3 + 6 + 31, + }, + { + .clock = 138500, + .hdisplay = 2160, + .hsync_start = 2160 + 48, + .hsync_end = 2160 + 48 + 32, + .htotal = 2160 + 48 + 32 + 100, + .vdisplay = 1440, + .vsync_start = 1440 + 3, + .vsync_end = 1440 + 3 + 6, + .vtotal = 1440 + 3 + 6 + 31, + }, +}; + +static const struct panel_desc boe_nv110wtm_n61 = { + .modes = boe_nv110wtm_n61_modes, + .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), + .bpc = 8, + .size = { + .width = 233, + .height = 155, + }, + .delay = { + .hpd_absent_delay = 200, + }, + .timing_constraints = { + .prepare_to_enable_ms = 80, + .unprepare_to_prepare_ms = 500, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DATA_MSB_TO_LSB, + .connector_type = DRM_MODE_CONNECTOR_eDP, +}; + /* Also used for boe_nv133fhm_n62 */ static const struct drm_display_mode boe_nv133fhm_n61_modes = { .clock = 147840, @@ -4015,6 +4060,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "boe,nv101wxmn51", .data = &boe_nv101wxmn51, + }, { + .compatible = "boe,nv110wtm-n61", + .data = &boe_nv110wtm_n61, }, { .compatible = "boe,nv133fhm-n61", .data = &boe_nv133fhm_n61,