From patchwork Thu Oct 29 01:11:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 11865607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70195C5517A for ; Thu, 29 Oct 2020 08:13:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 086BF2071A for ; Thu, 29 Oct 2020 08:13:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Nwd7P2Jq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 086BF2071A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 27D706E89B; Thu, 29 Oct 2020 08:13:01 +0000 (UTC) Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by gabe.freedesktop.org (Postfix) with ESMTPS id DCC836E47A for ; Thu, 29 Oct 2020 01:11:57 +0000 (UTC) Received: by mail-pg1-x541.google.com with SMTP id f38so988766pgm.2 for ; Wed, 28 Oct 2020 18:11:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ET2A4jH+uwVe3UkhuRlAn9izlrJ702A3D9TrDdaU1JA=; b=Nwd7P2JqMxrReBmpZimFwJHiY+/+4Y+8xLTf9/uUlhKZQCkG6eE+3O32ooXaly2nle 96o92s/8s8avx+xtSOg9zNGtr6xkc9HxACzX15Y9vYXbskSMLoIhXsliVwOW5RN3TbQX 8BbpShPOFvPiyuJ1XzMX7uxLV+lB47nDVyX8Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ET2A4jH+uwVe3UkhuRlAn9izlrJ702A3D9TrDdaU1JA=; b=X+tMgnWqilueCNOFJRbkIE+Pq9GNVkCiQrkf/6fGgXVws1lWCiAJzFcl3MA+Sve+t9 G3rGHROpsAkV6R3A++cg32tmafSXH5AgNOr1FgurFbE3Lv4w78BY5Bo7w0gfl5OQGOo6 Mumw4n3+7PqJi/VYpT1C7lzC3suTweCKOmrxNjOf7QArKp6iv6w4twk3mikAIwfOow+v 68AsVYzszdlOP6v7jsImnz0WVc6EtRFSF38Gt4b9n9Sqfgj0eWuRus1ywCzUrRzxOmA/ jUlsQRMxIWpxbJ/K9I+vbWlOe9duTe4xiuNgScLAHsTbMcFOhQ/1FH3Y4guRfwHZH1nJ VTHA== X-Gm-Message-State: AOAM531PBrnlifKJLtaY6fYR7hO4SQ5dwzzHnd80p07lT5UlRpx3RZ3H JMGl1/h5n4JzopNLnfAu6q5NuMetrdP/YQ== X-Google-Smtp-Source: ABdhPJy0r49pxAwM7OzjF2oEcWXoV8VsegRH81o1uqlPlfifg5iNAr6wd7XsBA2Ehe39hG2M8XK2tQ== X-Received: by 2002:a17:90b:3413:: with SMTP id kg19mr1554067pjb.37.1603933917602; Wed, 28 Oct 2020 18:11:57 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:3e52:82ff:fe6c:83ab]) by smtp.gmail.com with ESMTPSA id e6sm781769pfn.190.2020.10.28.18.11.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 18:11:57 -0700 (PDT) From: Stephen Boyd To: Andrzej Hajda , Neil Armstrong Subject: [PATCH 1/4] drm/bridge: ti-sn65dsi86: Combine register accesses in ti_sn_aux_transfer() Date: Wed, 28 Oct 2020 18:11:51 -0700 Message-Id: <20201029011154.1515687-2-swboyd@chromium.org> X-Mailer: git-send-email 2.29.1.341.ge80a0c044ae-goog In-Reply-To: <20201029011154.1515687-1-swboyd@chromium.org> References: <20201029011154.1515687-1-swboyd@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Oct 2020 08:12:48 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , Jonas Karlman , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Sean Paul , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" These register reads and writes are sometimes directly next to each other in the register address space. Let's use regmap bulk read/write APIs to get the data with one transfer instead of multiple i2c transfers. This helps cut down on the number of transfers in the case of something like reading an EDID where we read in blocks of 16 bytes at a time and the last for loop here is sending an i2c transfer for each of those 16 bytes, one at a time. Ouch! Cc: Douglas Anderson Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Sean Paul Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 50 ++++++++++++--------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index ecdf9b01340f..87726b9e446f 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -17,6 +17,8 @@ #include #include +#include + #include #include #include @@ -72,6 +74,7 @@ #define SN_AUX_ADDR_19_16_REG 0x74 #define SN_AUX_ADDR_15_8_REG 0x75 #define SN_AUX_ADDR_7_0_REG 0x76 +#define SN_AUX_ADDR_MASK GENMASK(19, 0) #define SN_AUX_LENGTH_REG 0x77 #define SN_AUX_CMD_REG 0x78 #define AUX_CMD_SEND BIT(0) @@ -841,11 +844,13 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, struct ti_sn_bridge *pdata = aux_to_ti_sn_bridge(aux); u32 request = msg->request & ~DP_AUX_I2C_MOT; u32 request_val = AUX_CMD_REQ(msg->request); - u8 *buf = (u8 *)msg->buffer; + u8 *buf = msg->buffer; + unsigned int len = msg->size; unsigned int val; - int ret, i; + int ret; + u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; - if (msg->size > SN_AUX_MAX_PAYLOAD_BYTES) + if (len > SN_AUX_MAX_PAYLOAD_BYTES) return -EINVAL; switch (request) { @@ -859,19 +864,14 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, return -EINVAL; } - regmap_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, - (msg->address >> 16) & 0xF); - regmap_write(pdata->regmap, SN_AUX_ADDR_15_8_REG, - (msg->address >> 8) & 0xFF); - regmap_write(pdata->regmap, SN_AUX_ADDR_7_0_REG, msg->address & 0xFF); - - regmap_write(pdata->regmap, SN_AUX_LENGTH_REG, msg->size); + BUILD_BUG_ON(sizeof(addr_len) != sizeof(__be32)); + put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, + addr_len); + regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, + ARRAY_SIZE(addr_len)); - if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) { - for (i = 0; i < msg->size; i++) - regmap_write(pdata->regmap, SN_AUX_WDATA_REG(i), - buf[i]); - } + if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) + regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); /* Clear old status bits before start so we don't get confused */ regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, @@ -895,21 +895,15 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, || (val & AUX_IRQ_STATUS_AUX_SHORT)) return -ENXIO; - if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) - return msg->size; + if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE || + len == 0) + return len; - for (i = 0; i < msg->size; i++) { - unsigned int val; - ret = regmap_read(pdata->regmap, SN_AUX_RDATA_REG(i), - &val); - if (ret) - return ret; - - WARN_ON(val & ~0xFF); - buf[i] = (u8)(val & 0xFF); - } + ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); + if (ret) + return ret; - return msg->size; + return len; } static int ti_sn_bridge_parse_dsi_host(struct ti_sn_bridge *pdata) From patchwork Thu Oct 29 01:11:52 2020 Content-Type: text/plain; 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Wed, 28 Oct 2020 18:11:58 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:3e52:82ff:fe6c:83ab]) by smtp.gmail.com with ESMTPSA id e6sm781769pfn.190.2020.10.28.18.11.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 18:11:58 -0700 (PDT) From: Stephen Boyd To: Andrzej Hajda , Neil Armstrong Subject: [PATCH 2/4] drm/bridge: ti-sn65dsi86: Make polling a busy loop Date: Wed, 28 Oct 2020 18:11:52 -0700 Message-Id: <20201029011154.1515687-3-swboyd@chromium.org> X-Mailer: git-send-email 2.29.1.341.ge80a0c044ae-goog In-Reply-To: <20201029011154.1515687-1-swboyd@chromium.org> References: <20201029011154.1515687-1-swboyd@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Oct 2020 08:12:48 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , Jonas Karlman , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Sean Paul , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There's no reason we need to wait here to poll a register over i2c. The i2c bus is inherently slow and delays are practically part of the protocol because we have to wait for the device to respond to any request for a register. Let's rely on the sleeping of the i2c controller instead of adding any sort of delay here in the bridge driver. Cc: Douglas Anderson Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Sean Paul Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 87726b9e446f..8276fa50138f 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -881,9 +881,9 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); + /* Zero delay loop because i2c transactions are slow already */ ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, - !(val & AUX_CMD_SEND), 200, - 50 * 1000); + !(val & AUX_CMD_SEND), 0, 50 * 1000); if (ret) return ret; From patchwork Thu Oct 29 01:11:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 11865583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DD26C56202 for ; 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Wed, 28 Oct 2020 18:11:59 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:3e52:82ff:fe6c:83ab]) by smtp.gmail.com with ESMTPSA id e6sm781769pfn.190.2020.10.28.18.11.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 18:11:59 -0700 (PDT) From: Stephen Boyd To: Andrzej Hajda , Neil Armstrong Subject: [PATCH 3/4] drm/bridge: ti-sn65dsi86: Read EDID blob over DDC Date: Wed, 28 Oct 2020 18:11:53 -0700 Message-Id: <20201029011154.1515687-4-swboyd@chromium.org> X-Mailer: git-send-email 2.29.1.341.ge80a0c044ae-goog In-Reply-To: <20201029011154.1515687-1-swboyd@chromium.org> References: <20201029011154.1515687-1-swboyd@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Oct 2020 08:12:48 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , Jonas Karlman , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Sean Paul , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use the DDC connection to read the EDID from the eDP panel instead of relying on the panel to tell us the modes. Cc: Douglas Anderson Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Sean Paul Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 8276fa50138f..6b6e98ca2881 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -119,6 +119,7 @@ * @debugfs: Used for managing our debugfs. * @host_node: Remote DSI node. * @dsi: Our MIPI DSI source. + * @edid: Detected EDID of eDP panel. * @refclk: Our reference clock. * @panel: Our panel. * @enable_gpio: The GPIO we toggle to enable the bridge. @@ -144,6 +145,7 @@ struct ti_sn_bridge { struct drm_bridge bridge; struct drm_connector connector; struct dentry *debugfs; + struct edid *edid; struct device_node *host_node; struct mipi_dsi_device *dsi; struct clk *refclk; @@ -265,6 +267,23 @@ connector_to_ti_sn_bridge(struct drm_connector *connector) static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector) { struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector); + struct edid *edid = pdata->edid; + int num, ret; + + if (!edid) { + pm_runtime_get_sync(pdata->dev); + edid = pdata->edid = drm_get_edid(connector, &pdata->aux.ddc); + pm_runtime_put(pdata->dev); + } + + if (edid && drm_edid_is_valid(edid)) { + ret = drm_connector_update_edid_property(connector, edid); + if (!ret) { + num = drm_add_edid_modes(connector, edid); + if (num) + return num; + } + } return drm_panel_get_modes(pdata->panel, connector); } @@ -1245,6 +1264,7 @@ static int ti_sn_bridge_remove(struct i2c_client *client) if (!pdata) return -EINVAL; + kfree(pdata->edid); ti_sn_debugfs_remove(pdata); of_node_put(pdata->host_node); From patchwork Thu Oct 29 01:11:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 11865595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B22E0C2D0A3 for ; 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Wed, 28 Oct 2020 18:12:01 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:3e52:82ff:fe6c:83ab]) by smtp.gmail.com with ESMTPSA id e6sm781769pfn.190.2020.10.28.18.12.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2020 18:12:00 -0700 (PDT) From: Stephen Boyd To: Andrzej Hajda , Neil Armstrong Subject: [PATCH 4/4] drm/bridge: ti-sn65dsi86: Update reply on aux failures Date: Wed, 28 Oct 2020 18:11:54 -0700 Message-Id: <20201029011154.1515687-5-swboyd@chromium.org> X-Mailer: git-send-email 2.29.1.341.ge80a0c044ae-goog In-Reply-To: <20201029011154.1515687-1-swboyd@chromium.org> References: <20201029011154.1515687-1-swboyd@chromium.org> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Oct 2020 08:12:48 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , Jonas Karlman , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Sean Paul , Laurent Pinchart Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We should be setting the drm_dp_aux_msg::reply field if a NACK or a SHORT reply happens. Update the error bit handling logic in ti_sn_aux_transfer() to handle these cases and notify upper layers that such errors have happened. This helps the retry logic understand that a timeout has happened, or to shorten the read length if the panel isn't able to handle the longest read possible. Cc: Douglas Anderson Cc: Laurent Pinchart Cc: Jonas Karlman Cc: Jernej Skrabec Cc: Sean Paul Signed-off-by: Stephen Boyd --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 31 +++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 6b6e98ca2881..19737bc01b8f 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -878,6 +878,7 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, case DP_AUX_NATIVE_READ: case DP_AUX_I2C_READ: regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); + msg->reply = 0; /* Assume it's good */ break; default: return -EINVAL; @@ -909,10 +910,32 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux, ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); if (ret) return ret; - else if ((val & AUX_IRQ_STATUS_NAT_I2C_FAIL) - || (val & AUX_IRQ_STATUS_AUX_RPLY_TOUT) - || (val & AUX_IRQ_STATUS_AUX_SHORT)) - return -ENXIO; + + if (val & AUX_IRQ_STATUS_AUX_RPLY_TOUT) { + /* + * The hardware tried the message seven times per the DP spec + * but it hit a timeout. We ignore defers here because they're + * handled in hardware. + */ + return -ETIMEDOUT; + } + if (val & AUX_IRQ_STATUS_AUX_SHORT) { + ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &len); + if (ret) + return ret; + } else if (val & AUX_IRQ_STATUS_NAT_I2C_FAIL) { + switch (request) { + case DP_AUX_I2C_WRITE: + case DP_AUX_I2C_READ: + msg->reply |= DP_AUX_I2C_REPLY_NACK; + break; + case DP_AUX_NATIVE_READ: + case DP_AUX_NATIVE_WRITE: + msg->reply |= DP_AUX_NATIVE_REPLY_NACK; + break; + } + return 0; + } if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE || len == 0)