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Fri, 30 Oct 2020 12:52:56 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 1/6] dt-bindings: devfreq: Add documentation for the interconnect properties Date: Fri, 30 Oct 2020 13:51:44 +0100 Message-Id: <20201030125149.8227-2-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0iTYRTu3Xd1OPmcQidNpVVENy0VeskIK8FFFCZdqChb+qWSTtmcZWho XvLeULw0RU2CmRmaqYhZ1FyNsBxYmaU2UtOUIkrNS6I1v1X+e57zPs85zzm8LCHtpFzYSGUc r1IqomS0mGx5Nmveetu+PGTbwH0PbKlIR/heaT2F306OUrjS2EXh11PfaFzysJHGBRYtic3m Bga/aiun8USeEeFS8yMRvmscYHBfSg2N0x8aGdzx5RqFSwvHaH9O3libRcv7e9ppuSXHJJLn N9Ui+USjexB1UrwrjI+KjOdVXrvPiiNGFg1kbIHs0q2KaSYZ9bpmI5YFzhdGDFuzkZiVcjUI MhfyGIFMIpi5WoYEMoGgskhPZCO7JcfQVIVNpUdwM6WO/md539xHW1U0tx3ynuYjK3bmAiDj UwVpxQQ3KILUyqVOTpwCetI/UVZMcuuhTm9a8kq4nVA0+M42zQPuNDxewnacH2Rn9YoEjSM8 vzFs6+kBqc1lhDUEcGMMzPV/FgnmAPj4os3WyAnGTU2MgFdDZ2EuKRhSEeQ+6GMEokVgMVUh QeUH/V1ztPVMBLcR6tu8hPIe+DndzgjXc4Der45CCAcoaCkhhLIEMjOkgnod/KotscVxgZzh RVKQyOFed6AWrdEt20a3bBvd/7FViKhFK3mNOjqcV3sr+YueakW0WqMM9wyNiW5Ef75Y54Jp shW1zZ8zII5FMnuJv0dZiJRSxKsTog0IWELmLNn7svOMVBKmSLjMq2JCVJooXm1AriwpWynx qR47LeXCFXH8BZ6P5VV/X0WsnUsy4oYuTZgSVySJfI7oR9GPYK278btsH/Stnd9x0NkTH7Ls D7mg32vXcSBtxxU3J2pD60xHpHdo8eGomIvHG0SnkLsk9smT7tlB7y2rzO1zscP5gVPVpfGJ yrhpTY2v+Ktj8BtNd9XgseK0zdJWt8ij57t0SUHV11oKtSfOjJ9H1z/ISHWEYvsmQqVW/AaI e8CKXgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPIsWRmVeSWpSXmKPExsVy+t/xe7oreebEGzyYzW5xf14ro8XGGetZ La5/ec5qMf/IOVaLK1/fs1lM37uJzWLS/QksFufPb2C3uLxrDpvF594jjBYzzu9jslh75C67 xe3GFWwWrXuPsFscftPOajFj8ks2BwGPTas62TzuXNvD5nG/+ziTR9+WVYwenzfJBbBG6dkU 5ZeWpCpk5BeX2CpFG1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GU8+3+IpWCS UsWSed/ZGxhvSHcxcnJICJhIPP46j72LkYtDSGApo0TjjaVADgdQQkpifosSRI2wxJ9rXWwQ NZ8YJQ5Ma2UHSbAJGEr0Hu1jBLFFBDwkTrWuZQUpYhb4wCSx9kEvWEJYIF5iwrN7YDaLgKrE muXH2UBsXgEriamPbjJDbJCXWL3hAJjNKWAt0dV5gwnkCCGgmrcHqiDKBSVOznzCAhJmFlCX WD9PCCTMDNTZvHU28wRGwVlIqmYhVM1CUrWAkXkVo0hqaXFuem6xkV5xYm5xaV66XnJ+7iZG YGRuO/Zzyw7GrnfBhxgFOBiVeHgd5GfHC7EmlhVX5h5ilOBgVhLhdTp7Ok6INyWxsiq1KD++ qDQntfgQoynQZxOZpUST84FJI68k3tDU0NzC0tDc2NzYzEJJnLdD4GCMkEB6YklqdmpqQWoR TB8TB6dUA6PKhWiX/e0m1ziTrKYXHL3RFnSy8NATrm3nV3uqCrOnPcne3vE+2cteoVCg3ELk Xl7wD+3vN4pmME/YY9nSMuHX2UbT/isb43P/it14ruPuOnnrmxNMahemzak9fOrhXWk7g9cH mllkri/1bApgKGHpX/5wR/rvoNNvfbes3/OuaW1Qr3Rl2jUlluKMREMt5qLiRADQU3/74gIA AA== X-CMS-MailID: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 X-Msg-Generator: CA X-RootMTR: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125257eucas1p29c6b018cfcdda337b2b3d2a496f0c830 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add documentation for new optional properties in the exynos bus nodes: interconnects, #interconnect-cells, samsung,data-clock-ratio. These properties allow to specify the SoC interconnect structure which then allows the interconnect consumer devices to request specific bandwidth requirements. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki Acked-by: Krzysztof Kozlowski --- Changes for v7: - bus-width property replaced with samsung,data-clock-ratio, - the interconnect consumer bindings used instead of vendor specific properties Changes for v6: - added dts example of bus hierarchy definition and the interconnect consumer, - added new bus-width property. Changes for v5: - exynos,interconnect-parent-node renamed to samsung,interconnect-parent --- .../devicetree/bindings/devfreq/exynos-bus.txt | 68 +++++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index e71f752..e34175c 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -51,6 +51,16 @@ Optional properties only for parent bus device: - exynos,saturation-ratio: the percentage value which is used to calibrate the performance count against total cycle count. +Optional properties for interconnect functionality (QoS frequency constraints): +- #interconnect-cells: should be 0. +- interconnects: as documented in ../interconnect.txt, describes a path + at the higher level interconnects used by this interconnect provider. + If this interconnect provider is a parent of a top level interconnect + provider the property contains only one phandle. + +- samsung,data-clock-ratio: ratio of the data troughput in B/s to minimum data + clock frequency in Hz, default value is 8 when this property is missing. + Detailed correlation between sub-blocks and power line according to Exynos SoC: - In case of Exynos3250, there are two power line as following: VDD_MIF |--- DMC @@ -135,7 +145,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- PERIC (Fixed clock rate) |--- FSYS (Fixed clock rate) -Example1: +Example 1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to transfer data between DRAM and CPU and uses the VDD_MIF regulator. @@ -184,7 +194,7 @@ Example1: |L5 |200000 |200000 |400000 |300000 | ||1000000 | ---------------------------------------------------------- -Example2 : +Example 2: The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is listed below: @@ -419,3 +429,57 @@ Example2 : devfreq = <&bus_leftbus>; status = "okay"; }; + +Example 3: + An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on + Exynos4412 SoC with video mixer as an interconnect consumer device. + + soc { + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; + }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_dmc>; + }; + + bus_display: bus_display { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_ACLK160>; + clock-names = "bus"; + operating-points-v2 = <&bus_display_opp_table>; + #interconnect-cells = <0>; + interconnects = <&bus_leftbus &bus_dmc>; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + /* ... */ + } + + bus_leftbus_opp_table: opp_table3 { + compatible = "operating-points-v2"; + /* ... */ + }; + + bus_display_opp_table: opp_table4 { + compatible = "operating-points-v2"; + /* .. */ + }; + + &mixer { + compatible = "samsung,exynos4212-mixer"; + interconnects = <&bus_display &bus_dmc>; + /* ... */ + }; + }; From patchwork Fri Oct 30 12:51:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11869529 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 097A161C for ; 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Fri, 30 Oct 2020 12:53:01 +0000 (GMT) X-AuditID: cbfec7f4-677ff7000000176d-f6-5f9c0cad1d79 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id A6.3A.06314.CAC0C9F5; Fri, 30 Oct 2020 12:53:01 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125300eusmtip2c9bfcd9af737a08ec01c63891364e13d~Cxjx6W2yN1609116091eusmtip2E; Fri, 30 Oct 2020 12:53:00 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 2/6] interconnect: Add generic interconnect driver for Exynos SoCs Date: Fri, 30 Oct 2020 13:51:45 +0100 Message-Id: <20201030125149.8227-3-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0hTcRTH+e3uPhQn12l40EhaRVb4yqCLSmn4x/6q0CASSm95U0mnbD4y +kMbs5wPxIkzFRUplJloalIrrebUdKlkPhZqSzN8oBVtGmov51Xyv8855/s9DzgUJu7HPagE WSonl7GJEsJR2N6zNujT6FQZ7d9okjCWKhViHpc14cy4bQ5nqo2DODOy8o1gtB0tBFNsKRIy Q0PNJPNeX0kw1gIjYsqGOgVMo3GKZCay6wlG1WEkma6luzhTplkgQmlpiy6XkE6OvSCklrxe gbSwTYek1pZ95/Eox5BYLjEhnZP7nYpxjP9ap8dSOs/efDduE2ShjTA1cqCAPgEV2lpSjRwp MV2PoG/0DWkviGkbgqWVi3zBimD+40N8x6FU/dx21CHInhsW8MGmo2kgd0tF0AFQ0F2I7OxG h0POlyqhnTF6RgDKakyNKMqVvggDg6w9LaQPwQ9b95ZERAfB6KwG44d5QUPzqy12oINBnWsW 8BoX6Ls/u93SC5RPKjD7DkDPkPDh7eK2ORwGPrdvsyss9raRPO8FkyZfyBuUCPKfT5B8UITA 0luDeFUwTA6uE/ZNMfoINOn97Ah0GAwbvXl0BvOyC7+DMxS3azE+LYJ7OWK+x0HY0GkFPHtA 3uxfIc9SsK5mE0Vof/mua8p3XVP+f2wNwnTInUtTJMVxiuMyLsNXwSYp0mRxvteSk1rQ5oeZ /vTaniL9r6sGRFNI4iQK9aqIFuNsuiIzyYCAwiRuojMDpitiUSybeYuTJ0fL0xI5hQF5UkKJ uyiwduGymI5jU7kbHJfCyXeqAsrBIwtlmIPG/IBYH5XZVAdu2z5FBi7NJXga9EHTPePa7rYH MQEhJTG+lu+P/K35NREeky9LjsHSaTasqzVyQRQFyoLrOvH4s6Yu1aV1vOq3dERTanZLnT9n Tkg3LdYaLkS0LpwMuDM92z+153DGyOsITXTkasNyWLir2mfdm1ybLpUIFfFswFFMrmD/AcMh 8d1dAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7preebEG5w1srg/r5XRYuOM9awW 1788Z7WYf+Qcq8WVr+/ZLKbv3cRmMen+BBaL8+c3sFtc3jWHzeJz7xFGixnn9zFZrD1yl93i duMKNovWvUfYLQ6/aWe1mDH5JZuDgMemVZ1sHneu7WHzuN99nMmjb8sqRo/Pm+QCWKP0bIry S0tSFTLyi0tslaINLYz0DC0t9IxMLPUMjc1jrYxMlfTtbFJSczLLUov07RL0Mt4t38VcsM+v 4uL1L0wNjL8duxg5OSQETCSaW7+zdzFycQgJLGWUaPqwkqmLkQMoISUxv0UJokZY4s+1LjYQ W0jgE6PEmh+uIDabgKFE79E+RhBbRMBD4lTrWlaQOcwCH5gk1j7oBUsIC4RKtN9dCWazCKhK fPpylAXE5hWwkrj6ZDIzxAJ5idUbDoDZnALWEl2dN8BuEAKqeXugCqJcUOLkzCcsIGFmAXWJ 9fOEQMLMQJ3NW2czT2AUnIWkahZC1SwkVQsYmVcxiqSWFuem5xYb6hUn5haX5qXrJefnbmIE RuW2Yz8372C8tDH4EKMAB6MSD6+D/Ox4IdbEsuLK3EOMEhzMSiK8TmdPxwnxpiRWVqUW5ccX leakFh9iNAX6bCKzlGhyPjBh5JXEG5oamltYGpobmxubWSiJ83YIHIwREkhPLEnNTk0tSC2C 6WPi4JRqYMxasLI2wS/LVSzo56WKp3M0QqqWNd7WsVjBvXOy5FGhUw/CXc5Fp5/3vliv+U7n 8QXtlp0N8wLnLdxaoLjYQVo4p5m/YWaEjMEN12//g1UuxnJKKvL8+XTgj09YfO7B2pRpRw03 Nv+tfyv4O2nhKu1fC86LHp1S07+SvTQ7/O2GuicaTyN5o5RYijMSDbWYi4oTAQ1xiYfgAgAA X-CMS-MailID: 20201030125301eucas1p218b0e654cb4c826b05280f28836da8d9 X-Msg-Generator: CA X-RootMTR: 20201030125301eucas1p218b0e654cb4c826b05280f28836da8d9 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125301eucas1p218b0e654cb4c826b05280f28836da8d9 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds a generic interconnect driver for Exynos SoCs in order to provide interconnect functionality for each "samsung,exynos-bus" compatible device. The SoC topology is a graph (or more specifically, a tree) and its edges are specified using the 'samsung,interconnect-parent' in the DT. Due to unspecified relative probing order, -EPROBE_DEFER may be propagated to ensure that the parent is probed before its children. Each bus is now an interconnect provider and an interconnect node as well (cf. Documentation/interconnect/interconnect.rst), i.e. every bus registers itself as a node. Node IDs are not hardcoded but rather assigned dynamically at runtime. This approach allows for using this driver with various Exynos SoCs. Frequencies requested via the interconnect API for a given node are propagated to devfreq using dev_pm_qos_update_request(). Please note that it is not an error when CONFIG_INTERCONNECT is 'n', in which case all interconnect API functions are no-op. The bus-width DT property is to determine the interconnect data width and traslate requested bandwidth to clock frequency for each bus. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki --- Changes for v7: - adjusted to the DT property changes: "interconnects" instead of "samsung,interconnect-parent", "samsung,data-clk-ratio" instead of "bus-width", - adaptation to of_icc_get_from_provider() function changes in v5.10-rc1. Changes for v6: - corrected of_node dereferencing in exynos_icc_get_parent() function, - corrected initialization of icc_node->name so as to avoid direct of_node->name dereferencing, - added parsing of bus-width DT property. Changes for v5: - adjust to renamed exynos,interconnect-parent-node property, - use automatically generated platform device id as the interconect node id instead of a now unavailable devfreq->id field, - add icc_ prefix to some variables to make the code more self-commenting, - use icc_nodes_remove() instead of icc_node_del() + icc_node_destroy(), - adjust to exynos,interconnect-parent-node property rename to samsung,interconnect-parent, - converted to a separate platform driver in drivers/interconnect. --- drivers/interconnect/Kconfig | 1 + drivers/interconnect/Makefile | 1 + drivers/interconnect/exynos/Kconfig | 6 ++ drivers/interconnect/exynos/Makefile | 4 + drivers/interconnect/exynos/exynos.c | 198 +++++++++++++++++++++++++++++++++++ 5 files changed, 210 insertions(+) create mode 100644 drivers/interconnect/exynos/Kconfig create mode 100644 drivers/interconnect/exynos/Makefile create mode 100644 drivers/interconnect/exynos/exynos.c diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig index 5b7204e..eca6eda 100644 --- a/drivers/interconnect/Kconfig +++ b/drivers/interconnect/Kconfig @@ -11,6 +11,7 @@ menuconfig INTERCONNECT if INTERCONNECT +source "drivers/interconnect/exynos/Kconfig" source "drivers/interconnect/imx/Kconfig" source "drivers/interconnect/qcom/Kconfig" diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile index d203520..665538d 100644 --- a/drivers/interconnect/Makefile +++ b/drivers/interconnect/Makefile @@ -4,5 +4,6 @@ CFLAGS_core.o := -I$(src) icc-core-objs := core.o bulk.o obj-$(CONFIG_INTERCONNECT) += icc-core.o +obj-$(CONFIG_INTERCONNECT_EXYNOS) += exynos/ obj-$(CONFIG_INTERCONNECT_IMX) += imx/ obj-$(CONFIG_INTERCONNECT_QCOM) += qcom/ diff --git a/drivers/interconnect/exynos/Kconfig b/drivers/interconnect/exynos/Kconfig new file mode 100644 index 0000000..e51e52e --- /dev/null +++ b/drivers/interconnect/exynos/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only +config INTERCONNECT_EXYNOS + tristate "Exynos generic interconnect driver" + depends on ARCH_EXYNOS || COMPILE_TEST + help + Generic interconnect driver for Exynos SoCs. diff --git a/drivers/interconnect/exynos/Makefile b/drivers/interconnect/exynos/Makefile new file mode 100644 index 0000000..e19d1df --- /dev/null +++ b/drivers/interconnect/exynos/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +exynos-interconnect-objs := exynos.o + +obj-$(CONFIG_INTERCONNECT_EXYNOS) += exynos-interconnect.o diff --git a/drivers/interconnect/exynos/exynos.c b/drivers/interconnect/exynos/exynos.c new file mode 100644 index 0000000..772d1fc --- /dev/null +++ b/drivers/interconnect/exynos/exynos.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Exynos generic interconnect provider driver + * + * Copyright (c) 2020 Samsung Electronics Co., Ltd. + * + * Authors: Artur Świgoń + * Sylwester Nawrocki + */ +#include +#include +#include +#include +#include +#include +#include + +#define EXYNOS_ICC_DEFAULT_BUS_CLK_RATIO 8 + +struct exynos_icc_priv { + struct device *dev; + + /* One interconnect node per provider */ + struct icc_provider provider; + struct icc_node *node; + + struct dev_pm_qos_request qos_req; + u32 bus_clk_ratio; +}; + +static struct icc_node *exynos_icc_get_parent(struct device_node *np) +{ + struct of_phandle_args args; + struct icc_node_data *icc_node_data; + struct icc_node *icc_node; + int num, ret; + + num = of_count_phandle_with_args(np, "interconnects", + "#interconnect-cells"); + if (num < 1) + return NULL; /* parent nodes are optional */ + + /* Get the interconnect target node */ + ret = of_parse_phandle_with_args(np, "interconnects", + "#interconnect-cells", 0, &args); + if (ret < 0) + return ERR_PTR(ret); + + icc_node_data = of_icc_get_from_provider(&args); + of_node_put(args.np); + + if (IS_ERR(icc_node_data)) + return ERR_CAST(icc_node_data); + + icc_node = icc_node_data->node; + kfree(icc_node_data); + + return icc_node; +} + +static int exynos_generic_icc_set(struct icc_node *src, struct icc_node *dst) +{ + struct exynos_icc_priv *src_priv = src->data, *dst_priv = dst->data; + s32 src_freq = max(src->avg_bw, src->peak_bw) / src_priv->bus_clk_ratio; + s32 dst_freq = max(dst->avg_bw, dst->peak_bw) / dst_priv->bus_clk_ratio; + int ret; + + ret = dev_pm_qos_update_request(&src_priv->qos_req, src_freq); + if (ret < 0) { + dev_err(src_priv->dev, "failed to update PM QoS of %s (src)\n", + src->name); + return ret; + } + + ret = dev_pm_qos_update_request(&dst_priv->qos_req, dst_freq); + if (ret < 0) { + dev_err(dst_priv->dev, "failed to update PM QoS of %s (dst)\n", + dst->name); + return ret; + } + + return 0; +} + +static struct icc_node *exynos_generic_icc_xlate(struct of_phandle_args *spec, + void *data) +{ + struct exynos_icc_priv *priv = data; + + if (spec->np != priv->dev->parent->of_node) + return ERR_PTR(-EINVAL); + + return priv->node; +} + +static int exynos_generic_icc_remove(struct platform_device *pdev) +{ + struct exynos_icc_priv *priv = platform_get_drvdata(pdev); + struct icc_node *parent_node, *node = priv->node; + + parent_node = exynos_icc_get_parent(priv->dev->parent->of_node); + if (parent_node && !IS_ERR(parent_node)) + icc_link_destroy(node, parent_node); + + icc_nodes_remove(&priv->provider); + icc_provider_del(&priv->provider); + + return 0; +} + +static int exynos_generic_icc_probe(struct platform_device *pdev) +{ + struct device *bus_dev = pdev->dev.parent; + struct exynos_icc_priv *priv; + struct icc_provider *provider; + struct icc_node *icc_node, *icc_parent_node; + int ret; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + platform_set_drvdata(pdev, priv); + + provider = &priv->provider; + + provider->set = exynos_generic_icc_set; + provider->aggregate = icc_std_aggregate; + provider->xlate = exynos_generic_icc_xlate; + provider->dev = bus_dev; + provider->inter_set = true; + provider->data = priv; + + ret = icc_provider_add(provider); + if (ret < 0) + return ret; + + icc_node = icc_node_create(pdev->id); + if (IS_ERR(icc_node)) { + ret = PTR_ERR(icc_node); + goto err_prov_del; + } + + priv->node = icc_node; + icc_node->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOFn", + bus_dev->of_node); + if (of_property_read_u32(bus_dev->of_node, "samsung,data-clock-ratio", + &priv->bus_clk_ratio)) + priv->bus_clk_ratio = EXYNOS_ICC_DEFAULT_BUS_CLK_RATIO; + + /* + * Register a PM QoS request for the parent (devfreq) device. + */ + ret = dev_pm_qos_add_request(bus_dev, &priv->qos_req, + DEV_PM_QOS_MIN_FREQUENCY, 0); + if (ret < 0) + goto err_node_del; + + icc_node->data = priv; + icc_node_add(icc_node, provider); + + icc_parent_node = exynos_icc_get_parent(bus_dev->of_node); + if (IS_ERR(icc_parent_node)) { + ret = PTR_ERR(icc_parent_node); + goto err_pmqos_del; + } + if (icc_parent_node) { + ret = icc_link_create(icc_node, icc_parent_node->id); + if (ret < 0) + goto err_pmqos_del; + } + + return 0; + +err_pmqos_del: + dev_pm_qos_remove_request(&priv->qos_req); +err_node_del: + icc_nodes_remove(provider); +err_prov_del: + icc_provider_del(provider); + return ret; +} + +static struct platform_driver exynos_generic_icc_driver = { + .driver = { + .name = "exynos-generic-icc", + }, + .probe = exynos_generic_icc_probe, + .remove = exynos_generic_icc_remove, +}; +module_platform_driver(exynos_generic_icc_driver); + +MODULE_DESCRIPTION("Exynos generic interconnect driver"); +MODULE_AUTHOR("Artur Świgoń "); +MODULE_AUTHOR("Sylwester Nawrocki "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:exynos-generic-icc"); From patchwork Fri Oct 30 12:51:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11869523 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 59F5592C for ; Fri, 30 Oct 2020 12:53:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 319EA221FA for ; Fri, 30 Oct 2020 12:53:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="T7v4WRBN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726597AbgJ3MxR (ORCPT ); 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Fri, 30 Oct 2020 12:53:02 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 3/6] PM / devfreq: exynos-bus: Add registration of interconnect child device Date: Fri, 30 Oct 2020 13:51:46 +0100 Message-Id: <20201030125149.8227-4-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRjm2zk7OxMnxyn5YpfpyMhIzezHYUqoKCwsuvwoCHTNPLnKTdmc VkQaeal5wZSaWuk0UluocyyL0iidSc5caaahsZIiNM28LCm7Oc+if8/7XL734eUjMWED1588 rspk1Cp5mpjwwNuffh8IafW8LtuWNxhBO2ryEd1W2cqlRxY/cela6wCXfuWcJWh9p5mgyx1l OG23m3j00IPrBL1QYkV0pf0Rh262vuXRY+ebCDq/08qju6cLuXRlxSQRTUnNxkuEdPx1ByF1 FPVypKUWI5IumDfs4x72iEph0o5nMeqwnUc8FK3TdixjmDrVM3swF/UJdIhPArUDbtlzkQ55 kEKqCcH4vZc4OywisL7/6VYWEDS+MHL+RZZGqnms0Ijgbv/S/0jLExvuchFUOJT0lCIX9qXi oOBjzSqPURMcuFCLubAPJYeZtjcrr5IkTgVBz+cEFy2gJKDTN+PsMhHcMT1etfOpSNBdGnWX MPOgYs6XxXEw9PSL2+8DU70WHovXga2ieLUbUBcQFD8c47FDGQJHrwGxrkgYH/hBuEpgVDC0 Pghj6RjoHnWVIFewF4zOeLP1vaC8XY+xtAAuFghZ90ZYNurd1fyh6MMfd1IK9VUYe51SBB2X G/AyJKr+v8uAkBH5MVqNMpXRhKuY7FCNXKnRqlJDj6YrzWjl99h+987fR87B5C5EkUjsKYgW XZMJufIszWllFwISE/sKYp/bkoSCFPnpM4w6XabWpjGaLrSWxMV+goj6yUQhlSrPZE4yTAaj /qdySL5/LqqLmtkvCT0hQnO6X/vrEhSbtTemLB0bCRlRsz4InJZl3yv920PecRUTOQnpDe3P RjclfeGJdAH48K7G7G+SrfpzwVU5dkmexRRrcIo6Cw95H5v/6r1779U9tthjewPPJvfdPAD6 +NQ1iocxJjywqYW4vSMgPlHCVwkNJSrtRzGuUcjDt2Bqjfwvad9oZjkDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpnkeLIzCtJLcpLzFFi42I5/e/4Pd31PHPiDfZsk7K4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbXN41h83ic+8RRosZ5/cxWaw9cpfd 4nbjCjaL1r1H2C0Ov2lntZgx+SWbg4DHplWdbB53ru1h87jffZzJo2/LKkaPz5vkAlij9GyK 8ktLUhUy8otLbJWiDS2M9AwtLfSMTCz1DI3NY62MTJX07WxSUnMyy1KL9O0S9DLWvznPXHBV oOLo+7AGxlO8XYycHBICJhLfr89i72Lk4hASWMoosfjAAcYuRg6ghJTE/BYliBphiT/Xutgg aj4xSnza3ckIkmATMJToPdoHZosIeEical3LClLELPCBSWLtg16whLBAvET/o20sIENZBFQl jr72BgnzClhJdE1fywKxQF5i9YYDzCA2p4C1RFfnDSaQciGgmrcHqiYw8i1gZFjFKJJaWpyb nltspFecmFtcmpeul5yfu4kRGAnbjv3csoOx613wIUYBDkYlHl4H+dnxQqyJZcWVuYcYJTiY lUR4nc6ejhPiTUmsrEotyo8vKs1JLT7EaAp00kRmKdHkfGCU5pXEG5oamltYGpobmxubWSiJ 83YIHIwREkhPLEnNTk0tSC2C6WPi4JRqYAz+GFvp9Fz3Y/uCLHlJ+aDbKhKpXC7Hvb9yi0qF 6/0VNz+5cnpGQoqLXsbuE4/uu534xb9G8py0b6LnnJTM/MK0NL03T1Pm7/HZ7xdT5Piv7arK x/93bDfIfzqyq/LVg7ppaus23WqJnifFz3Q8ysVdvaSgs0olvV2myubpAsPNDG2TjzsyKbEU ZyQaajEXFScCAI8vPs+aAgAA X-CMS-MailID: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 X-Msg-Generator: CA X-RootMTR: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125303eucas1p14a9de4111ffafc1870527abdea0994c9 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds registration of a child platform device for the exynos interconnect driver. It is assumed that the interconnect provider will only be needed when #interconnect-cells property is present in the bus DT node, hence the child device will be created only when such a property is present. Signed-off-by: Sylwester Nawrocki Acked-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- Changes for v7, v6: - none. Changes for v5: - new patch. --- drivers/devfreq/exynos-bus.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c index 1e684a4..ee300ee 100644 --- a/drivers/devfreq/exynos-bus.c +++ b/drivers/devfreq/exynos-bus.c @@ -24,6 +24,7 @@ struct exynos_bus { struct device *dev; + struct platform_device *icc_pdev; struct devfreq *devfreq; struct devfreq_event_dev **edev; @@ -156,6 +157,8 @@ static void exynos_bus_exit(struct device *dev) if (ret < 0) dev_warn(dev, "failed to disable the devfreq-event devices\n"); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); if (bus->opp_table) { @@ -168,6 +171,8 @@ static void exynos_bus_passive_exit(struct device *dev) { struct exynos_bus *bus = dev_get_drvdata(dev); + platform_device_unregister(bus->icc_pdev); + dev_pm_opp_of_remove_table(dev); clk_disable_unprepare(bus->clk); } @@ -432,6 +437,18 @@ static int exynos_bus_probe(struct platform_device *pdev) if (ret < 0) goto err; + /* Create child platform device for the interconnect provider */ + if (of_get_property(dev->of_node, "#interconnect-cells", NULL)) { + bus->icc_pdev = platform_device_register_data( + dev, "exynos-generic-icc", + PLATFORM_DEVID_AUTO, NULL, 0); + + if (IS_ERR(bus->icc_pdev)) { + ret = PTR_ERR(bus->icc_pdev); + goto err; + } + } + max_state = bus->devfreq->profile->max_state; min_freq = (bus->devfreq->profile->freq_table[0] / 1000); max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000); From patchwork Fri Oct 30 12:51:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11869541 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5155261C for ; Fri, 30 Oct 2020 12:53:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 29BC7221FA for ; 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Fri, 30 Oct 2020 12:53:05 +0000 (GMT) X-AuditID: cbfec7f5-371ff700000018ae-dc-5f9c0cb1d384 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id FA.3A.06314.1BC0C9F5; Fri, 30 Oct 2020 12:53:05 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125304eusmtip2528da988a0f7422cf8f75a53af6e05ba~Cxj1-vJID1609116091eusmtip2H; Fri, 30 Oct 2020 12:53:04 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 4/6] ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes Date: Fri, 30 Oct 2020 13:51:47 +0100 Message-Id: <20201030125149.8227-5-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0iTURjGOfv2XZRmpyn1Ypm1LmThraJOKaFhtIIgqL+iWks/VHImW1Z2 Ec003dRsBtq8rRXlJVGHqZiKOW2K5ahMI41VmGUpFkvCrMz1afnf733O85z3fQ+Ho6RdtCcX HXuKV8cqY2SMq7ju0WSPb82CQkXA06KtxF6cikhNfhVN+r99oElJew9NeifGGZLXbGaI3p4j JjZbNUueNxYyxJHVjki+rUVEKttfs2QguZQhqc3tLLGMXqFJfu4IE4Ll5vIMRj7Y18TI7Tqr SJ5dW47kDvPy/fQh1+AIPib6NK/233HMNarvWT8dl4fPdt4oYJNQpkSLOA7wZriVJtYiV06K SxEYpy20UHxD0J2SwQqFA8HN77dFc4mn9ZSg30Uwda+G+pewVZfNJFw4BgdCVkc2crIHDoO0 98ViJ1P4nQhSSignu2MFGBxvGCeL8RrIudTLOhtI8HbQ9rs7ZcDeUFHd+tfugoNAm/FS5GQJ XgRdN4Zmr/SGlPsFlOAfYWG89bzAYaCzlCGB3eGTtZYVeBl052b+XRlwCoLMBwOsUOQgsFuN s4kgGOz5wTgHorAPVDX6C3IoPLZUssJDuMHLsUXCDG6gr8ujBFkC6WlSwb0apsrzRAJ7gm5o WiywHEymYSoHrTTM28YwbxvD/75GRJWjJXy8RhXJazbF8mf8NEqVJj420i/8pMqMZj5Y92/r RANq+Xm8DWEOyRZIQrwLFFJaeVqToGpDwFEyD8nOJ91HpZIIZcI5Xn1SoY6P4TVtaCknli2R bDKNHJHiSOUp/gTPx/HquVMR5+KZhDoXD392a6vdvXdyeKjk09T1w+u2Ne8LDzJdfrFMX/R1 8uHXLR87Es/oGscuKL0OGO58SWrCXtaE/cVdJHijUT9UZe5Y6X3loP7qqwB9j65+bXqoRXft enJm4uf836vQHm1CyK9nB3ddtG1wwcM+vg0Vib9CPijsneMLV7yOe1sxNpolE2uilIHrKbVG +Qepn62gXAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7obeebEG5zcI2Fxf14ro8XGGetZ La5/ec5qMf/IOVaLK1/fs1lM37uJzWLS/QksFufPb2C3uLxrDpvF594jjBYzzu9jslh75C67 xe3GFWwWrXuPsFscftPOajFj8ks2BwGPTas62TzuXNvD5nG/+ziTR9+WVYwenzfJBbBG6dkU 5ZeWpCpk5BeX2CpFG1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GVcu3SdtWC6 QMWJmbPZGxh7eLsYOTgkBEwkLm5n7mLk4hASWMoocXbzJzaIuJTE/BalLkZOIFNY4s+1LjaI mk9ANT/XMYMk2AQMJXqP9jGC2CICHhKnWteyghQxC3xgklj7oBcsISwQK/G2ewmYzSKgKjGh 6Qo7yAJeASuJruvCEAvkJVZvOAA2k1PAWqKr8wYTSIkQUMnbA1UgYV4BQYmTM5+wgISZBdQl 1s8TAgkzA3U2b53NPIFRcBaSqlkIVbOQVC1gZF7FKJJaWpybnltsqFecmFtcmpeul5yfu4kR GJXbjv3cvIPx0sbgQ4wCHIxKPLwO8rPjhVgTy4orcw8xSnAwK4nwOp09HSfEm5JYWZValB9f VJqTWnyI0RTosYnMUqLJ+cCEkVcSb2hqaG5haWhubG5sZqEkztshcDBGSCA9sSQ1OzW1ILUI po+Jg1OqgbEz48M6/ckxU4SN45MXndu94cIi9qXvo74uaHLZmr3p9J5d9qxZyf1p9dv6eg1Y misufCs1zfdfuGT7jAMK3x7WKb5kYTh342GreZrvY7YPCn0rp9QcyH8VqXPjnqezsNK3PVvM 5a9VZM44HTNnD4veS4trVYvWeVy8ZHTC3/biMze9NRlT9fYqsRRnJBpqMRcVJwIAVBPJbOAC AAA= X-CMS-MailID: 20201030125305eucas1p2d61ba397d77a72e0d1dce8d30b278e16 X-Msg-Generator: CA X-RootMTR: 20201030125305eucas1p2d61ba397d77a72e0d1dce8d30b278e16 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125305eucas1p2d61ba397d77a72e0d1dce8d30b278e16 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds the following properties for Exynos4412 interconnect bus nodes: - interconnects: to declare connections between nodes in order to guarantee PM QoS requirements between nodes, - #interconnect-cells: required by the interconnect framework, - samsung,data-clk-ratio: which allows to specify minimum data clock frequency corresponding to requested bandwidth for each bus. Note that #interconnect-cells is always zero and node IDs are not hardcoded anywhere. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki --- Changes for v7: - adjusted to the DT property changes: "interconnects" instead of "samsung,interconnect-parent", "samsung,data-clk-ratio" instead of "bus-width". Changes for v6: - added bus-width property in bus_dmc node. Changes for v5: - adjust to renamed exynos,interconnect-parent-node property, - add properties in common exynos4412.dtsi file rather than in Odroid specific odroid4412-odroid-common.dtsi. --- arch/arm/boot/dts/exynos4412.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index e76881d..4999e68 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -383,6 +383,8 @@ clocks = <&clock CLK_DIV_DMC>; clock-names = "bus"; operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -452,6 +454,8 @@ clocks = <&clock CLK_DIV_GDL>; clock-names = "bus"; operating-points-v2 = <&bus_leftbus_opp_table>; + interconnects = <&bus_dmc>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -468,6 +472,8 @@ clocks = <&clock CLK_ACLK160>; clock-names = "bus"; operating-points-v2 = <&bus_display_opp_table>; + interconnects = <&bus_leftbus &bus_dmc>; + #interconnect-cells = <0>; status = "disabled"; }; From patchwork Fri Oct 30 12:51:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11869539 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7285A92C for ; Fri, 30 Oct 2020 12:53:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4A82322248 for ; Fri, 30 Oct 2020 12:53:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="qm9htZ2A" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725834AbgJ3Mxj (ORCPT ); Fri, 30 Oct 2020 08:53:39 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:33919 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726634AbgJ3Mx2 (ORCPT ); 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Fri, 30 Oct 2020 12:53:06 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 5/6] ARM: dts: exynos: Add interconnects to Exynos4412 mixer Date: Fri, 30 Oct 2020 13:51:48 +0100 Message-Id: <20201030125149.8227-6-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNKsWRmVeSWpSXmKPExsWy7djPc7qbeebEG/w5KGNxf14ro8XGGetZ La5/ec5qMf/IOVaLK1/fs1lM37uJzWLS/QksFufPb2C3uLxrDpvF594jjBYzzu9jslh75C67 xe3GFWwWrXuPsFscftPOajFj8ks2BwGPTas62TzuXNvD5nG/+ziTR9+WVYwenzfJBbBGcdmk pOZklqUW6dslcGX8fHCSuWAyR8WsDw9ZGxifsnUxcnJICJhIfGmdwNTFyMUhJLCCUaJlw39W COcLo8SOactZIJzPjBJfdq1igWn5fHQ5VNVyoMSnhUxwLac33werYhMwlOg92scIYosIuEi0 PZ0HFmcWeMQk0TyfGcQWFgiUaDq4E6yGRUBV4s7EC2BH8QpYSRw6N4UJYpu8xOoNB8DqOQWs Jbo6bzBB1AhKnJz5BGqmvETz1tnMIEdICLxkl2icCrKYA8hxkZjREQkxR1ji1fEt7BC2jMTp yT0sEPXNjBI9u2+zQzgTGCXuH1/ACFFlLXHn3C82kEHMApoS63fpQ8x0lLgwXxTC5JO48VYQ 4gQ+iUnbpjNDhHklOtqEIGaoSPxeNR3qEymJ7if/oWHoIfFi1XnWCYyKs5A8MwvJM7MQ1i5g ZF7FKJ5aWpybnlpsmJdarlecmFtcmpeul5yfu4kRmMRO/zv+aQfj10tJhxgFOBiVeHgd5GfH C7EmlhVX5h5ilOBgVhLhdTp7Ok6INyWxsiq1KD++qDQntfgQozQHi5I4r/Gil7FCAumJJanZ qakFqUUwWSYOTqkGxpy/qf6hCbvjHHeov3B7arul8WqrMLP08gLTwmUBDTwxT+rWT4059P8i X0jW2kqOZfPu69+121b975rNvcl1ztPrmCJOWM19k253StDUgO33/PsWYfrzFFZWH7Yykbja Lq4n1Dd12/X1Cy8bxq1wl4+3tgzg/LP35ZK7Vgy3Kuvlgk4/auj8qcRSnJFoqMVcVJwIAJt+ ou5eAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsVy+t/xe7qbeObEGxx9bmNxf14ro8XGGetZ La5/ec5qMf/IOVaLK1/fs1lM37uJzWLS/QksFufPb2C3uLxrDpvF594jjBYzzu9jslh75C67 xe3GFWwWrXuPsFscftPOajFj8ks2BwGPTas62TzuXNvD5nG/+ziTR9+WVYwenzfJBbBG6dkU 5ZeWpCpk5BeX2CpFG1oY6RlaWugZmVjqGRqbx1oZmSrp29mkpOZklqUW6dsl6GX8fHCSuWAy R8WsDw9ZGxifsnUxcnJICJhIfD66nBXEFhJYyigx53VxFyMHUFxKYn6LEkSJsMSfa11A5VxA JZ8YJXYu7mUBSbAJGEr0Hu1jBLFFBDwkTrWuZQUpYhb4wCSx9kEvWEJYwF9i/b5vYA0sAqoS dyZeAFvMK2AlcejcFCaIDfISqzccYAaxOQWsJbo6bzCBHCEEVPP2QBVEuaDEyZlPWEDCzALq EuvnCYGEmYE6m7fOZp7AKDgLSdUshKpZSKoWMDKvYhRJLS3OTc8tNtQrTswtLs1L10vOz93E CIzLbcd+bt7BeGlj8CFGAQ5GJR5eB/nZ8UKsiWXFlbmHGCU4mJVEeJ3Ono4T4k1JrKxKLcqP LyrNSS0+xGgK9NlEZinR5HxgysgriTc0NTS3sDQ0NzY3NrNQEuftEDgYIySQnliSmp2aWpBa BNPHxMEp1cBYbXM2em/v1N0qGcdnvniteso04KfhswUl57POXj502/WnY4K7/Mvyqk9KvwXX TzxV53a69EXB+xKJTA3FA2Yl4TYFPxXOdCwL3xMXV8ZXHuo6QXXVHoXAPec2S3cfP2u2onjl tr8P0jiTLbjkJtVMfZy4P+BnzeNjPleSfdPdn6xYPPHyvJz/SizFGYmGWsxFxYkAyWvH7uEC AAA= X-CMS-MailID: 20201030125307eucas1p14afc8cc8828f2bc838e769b77d7e9c95 X-Msg-Generator: CA X-RootMTR: 20201030125307eucas1p14afc8cc8828f2bc838e769b77d7e9c95 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125307eucas1p14afc8cc8828f2bc838e769b77d7e9c95 References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Artur Świgoń This patch adds an 'interconnects' property to Exynos4412 DTS in order to declare the interconnect path used by the mixer. Please note that the 'interconnect-names' property is not needed when there is only one path in 'interconnects', in which case calling of_icc_get() with a NULL name simply returns the right path. Signed-off-by: Artur Świgoń Reviewed-by: Chanwoo Choi --- Changes for v7, v6, v5: - none. --- arch/arm/boot/dts/exynos4412.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 4999e68..d07739e 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -779,6 +779,7 @@ clock-names = "mixer", "hdmi", "sclk_hdmi", "vp"; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>; + interconnects = <&bus_display &bus_dmc>; }; &pmu { From patchwork Fri Oct 30 12:51:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 11869535 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F6E661C for ; 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Fri, 30 Oct 2020 12:53:08 +0000 (GMT) X-AuditID: cbfec7f5-371ff700000018ae-ea-5f9c0cb587b6 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 87.57.06017.4BC0C9F5; Fri, 30 Oct 2020 12:53:08 +0000 (GMT) Received: from AMDC3061.digital.local (unknown [106.120.51.75]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20201030125307eusmtip2765b832a309bff135edf3b1d0790c9c2~Cxj49WQwv1609116091eusmtip2K; Fri, 30 Oct 2020 12:53:07 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, s.nawrocki@samsung.com Subject: [PATCH v7 6/6] drm: exynos: mixer: Add interconnect support Date: Fri, 30 Oct 2020 13:51:49 +0100 Message-Id: <20201030125149.8227-7-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201030125149.8227-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa2yLYRT2fvfOKt+q4qhFaeYHwchE3rgsyEgT4hYRJLSlX2ax1tJuZiIy qdnWbVL8aM0ylxnTkl3iMqMzU+sobcRdRwWLzCUubYVhtPu2bP+e85zneZ9zTl6OlN2jFVyW MVcwGXXZKiaButzxKzD9UmKVZuarqxIcqi5CuNFRT+Onkfc0Pu7x0/hR9AuD7e4mBh8O2Sgc CDSw+GFLFYPDFR6EHYFWAl/wvGRxcF8dg4vcHhbf+lRMY8eRHmYhr25yljLqrifXGXWozEuo D150InW4acIqemPCfL2QnbVTMKWmaxO2HfrkQjkfl+wKntQUolvYiiQc8LOhufMcY0UJnIyv Q+BptdNiEUEQDv4gxCKM4E3kOzVoORl4jsTGWQSFJR1Dlsf1ESKuYvhZUHH7IIpjOZ8BB7qr +90k/4YAy3EyjkfH+EflNf08xU+GM7anbBxL+bnQ57mHxDQluBra+vUSfh5YS58RoiYJ7hx9 N/CmEiyXjpHxIYDvYeGPs4UWzRnQ/dDCiHg0fPBeZEWcDL4j5ZRosCAovxZkxcKGIOQ9MRA9 D7r8vTE3F4uYAvUtqSK9CG6cbmPjNPCj4NnnJHGIUXD4sp0UaSmUHJCJ6hT47bQTIlZA2bt/ A1dUw+3Gn7QNTaoctk7lsHUqh3JPINKJxgp5ZkOmYE4zCvkzzDqDOc+YOWPrDkMTiv0xX583 2oxa/2xpRzyHVInShcpjGhmt22kuMLQj4EiVXLr4vm+zTKrXFewWTDs0prxswdyOxnOUaqw0 7VTPJhmfqcsVtgtCjmAa7BKcRFGINrjXZ+kdrqMbVioejEi5k5vvvvn16+rUtSO1HmvxnFfL a2pfT6XWvF+W8mLdsimJts2OJ30VH3u1Yb9iTO9+/tyD133RBfmBHNfzKr9SXjTxSvOvC9/4 2nEd6zvr9rZJ2go6Ofn5v8kr7nbO7zrT8NYdSf8+bbrfp0/rXqrFe7ZH01WUeZtu1lTSZNb9 B8YNN9ZfAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLIsWRmVeSWpSXmKPExsVy+t/xe7pbeObEG5xuUbG4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbXN41h83ic+8RRosZ5/cxWaw9cpfd 4nbjCjaL1r1H2C0Ov2lntZgx+SWbg4DHplWdbB53ru1h87jffZzJo2/LKkaPz5vkAlij9GyK 8ktLUhUy8otLbJWiDS2M9AwtLfSMTCz1DI3NY62MTJX07WxSUnMyy1KL9O0S9DImvlnNWPDa teL2wvgGxsMWXYycHBICJhILz99k7GLk4hASWMoo8e/2bZYuRg6ghJTE/BYliBphiT/XuthA bCGBT4wS09emg9hsAoYSvUf7GEFsEQEPiVOta1lB5jALfGCSWPugFywhLOAicaVnMQuIzSKg KrFswnV2EJtXwEri35EzjBAL5CVWbzjADGJzClhLdHXeYAK5QQio5u2BKohyQYmTM5+AncYs oC6xfp4QSJgZqLN562zmCYyCs5BUzUKomoWkagEj8ypGkdTS4tz03GIjveLE3OLSvHS95Pzc TYzAqNx27OeWHYxd74IPMQpwMCrx8DrIz44XYk0sK67MPcQowcGsJMLrdPZ0nBBvSmJlVWpR fnxRaU5q8SFGU6DPJjJLiSbnAxNGXkm8oamhuYWlobmxubGZhZI4b4fAwRghgfTEktTs1NSC 1CKYPiYOTqkGRofJ2uuOlyq/9s3e6BtQ6V3cYRL0Y3V8nQhzqM6bJS+KasqulIZvO16gYcLd 0hFmuDZ3Sor+8YjwFRbrfTK7mDL1v/8Wmbplvel0e8aTvPMNHjFw7t5d1t3TYmgcra1w5NZn ngi7T0aqFyZWlcrPTxPaXvVqsdycD4s2r4mb+i+OUfz2e6b7SizFGYmGWsxFxYkA6kFqOOAC AAA= X-CMS-MailID: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e X-Msg-Generator: CA X-RootMTR: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201030125308eucas1p14ae969ae1d5549d422c478aa54d3311e References: <20201030125149.8227-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds interconnect support to exynos-mixer. The mixer works the same as before when CONFIG_INTERCONNECT is 'n'. For proper operation of the video mixer block we need to ensure the interconnect busses like DMC or LEFTBUS provide enough bandwidth so as to avoid DMA buffer underruns in the mixer block. I.e we need to prevent those busses from operating in low perfomance OPPs when the mixer is running. In this patch the bus bandwidth request is done through the interconnect API, the bandwidth value is calculated from selected DRM mode, i.e. video plane width, height, refresh rate and pixel format. The bandwidth setting is synchronized with VSYNC when we are switching to lower bandwidth. This is required to ensure enough bandwidth for the device since new settings are normally being applied in the hardware synchronously with VSYNC. Co-developed-by: Artur Świgoń Signed-off-by: Marek Szyprowski Signed-off-by: Sylwester Nawrocki Acked-by: Krzysztof Kozlowski --- Changes for v7: - fixed incorrect setting of the ICC bandwidth when the mixer is disabled, now the bandwidth is set explicitly to 0 in such case. Changes for v6: - the icc_set_bw() call is now only done when calculated value for a crtc changes, this avoids unnecessary calls per each video frame - added synchronization of the interconnect bandwidth setting with the mixer VSYNC in order to avoid buffer underflow when we lower the interconnect bandwidth when the hardware still operates with previous mode settings that require higher bandwidth. This fixed IOMMU faults observed e.g. during switching from two planes to a single plane operation. Changes for v5: - renamed soc_path variable to icc_path --- drivers/gpu/drm/exynos/exynos_mixer.c | 146 ++++++++++++++++++++++++++++++++-- 1 file changed, 138 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index af192e5..61182cf 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -73,6 +74,7 @@ enum mixer_flag_bits { MXR_BIT_INTERLACE, MXR_BIT_VP_ENABLED, MXR_BIT_HAS_SCLK, + MXR_BIT_REQUEST_BW, }; static const uint32_t mixer_formats[] = { @@ -99,6 +101,13 @@ struct mixer_context { struct exynos_drm_plane planes[MIXER_WIN_NR]; unsigned long flags; + struct icc_path *icc_path; + /* memory bandwidth on the interconnect bus in B/s */ + unsigned long icc_bandwidth; + /* mutex protecting @icc_bandwidth */ + struct mutex icc_lock; + struct work_struct work; + int irq; void __iomem *mixer_regs; void __iomem *vp_regs; @@ -754,6 +763,9 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) val |= MXR_INT_CLEAR_VSYNC; val &= ~MXR_INT_STATUS_VSYNC; + if (test_and_clear_bit(MXR_BIT_REQUEST_BW, &ctx->flags)) + schedule_work(&ctx->work); + /* interlace scan need to check shadow register */ if (test_bit(MXR_BIT_INTERLACE, &ctx->flags) && !mixer_is_synced(ctx)) @@ -934,6 +946,76 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) mixer_reg_writemask(mixer_ctx, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); } +/** + * mixer_get_memory_bandwidth - calculate memory bandwidth for current crtc mode + * @crtc: a crtc with DRM mode to calculate the bandwidth for + * + * Return: memory bandwidth in B/s + * + * This function returns memory bandwidth calculated as a sum of amount of data + * per second for each plane. The calculation is based on maximum possible pixel + * resolution for a plane so as to avoid different bandwidth request per each + * video frame. The formula used for calculation for each plane is: + * + * bw = width * height * frame_rate / interlace / (hor_subs * vert_subs) + * + * where: + * - width, height - (DRM mode) video frame width and height in pixels, + * - frame_rate - DRM mode frame refresh rate, + * - interlace: 1 - in case of progressive and 2 in case of interlaced video, + * - hor_subs, vert_subs - accordingly horizontal and vertical pixel + * subsampling for a plane. + */ +static unsigned int mixer_get_memory_bandwidth(struct exynos_drm_crtc *crtc) +{ + struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; + struct mixer_context *ctx = crtc->ctx; + unsigned long bw, bandwidth = 0; + int i, j, sub; + + for (i = 0; i < MIXER_WIN_NR; i++) { + struct drm_plane *plane = &ctx->planes[i].base; + const struct drm_format_info *format; + + if (plane->state && plane->state->crtc && plane->state->fb) { + format = plane->state->fb->format; + bw = mode->hdisplay * mode->vdisplay * + drm_mode_vrefresh(mode); + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + bw /= 2; + for (j = 0; j < format->num_planes; j++) { + sub = j ? (format->vsub * format->hsub) : 1; + bandwidth += format->cpp[j] * bw / sub; + } + } + } + + return bandwidth; +} + +static void mixer_set_icc_bandwidth(struct mixer_context *ctx, + unsigned long bandwidth) +{ + u32 avg_bw, peak_bw; + + /* add 20% safety margin */ + bandwidth = bandwidth / 4 * 5; + + avg_bw = peak_bw = Bps_to_icc(bandwidth); + icc_set_bw(ctx->icc_path, avg_bw, peak_bw); + + dev_dbg(ctx->dev, "safe bandwidth %lu Bps\n", bandwidth); +} + +static void mixer_icc_request_fn(struct work_struct *work) +{ + struct mixer_context *ctx = container_of(work, struct mixer_context, + work); + mutex_lock(&ctx->icc_lock); + mixer_set_icc_bandwidth(ctx, ctx->icc_bandwidth); + mutex_unlock(&ctx->icc_lock); +} + static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) { struct mixer_context *ctx = crtc->ctx; @@ -980,12 +1062,35 @@ static void mixer_disable_plane(struct exynos_drm_crtc *crtc, static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) { - struct mixer_context *mixer_ctx = crtc->ctx; + struct mixer_context *ctx = crtc->ctx; + int bw, prev_bw; - if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) + if (!test_bit(MXR_BIT_POWERED, &ctx->flags)) return; - mixer_enable_sync(mixer_ctx); + /* + * Request necessary bandwidth on the interconnects. If new + * bandwidth is greater than current value set the new value + * immediately. Otherwise request lower bandwidth only after + * VSYNC, after the HW has actually switched to new video + * frame settings. + */ + if (ctx->icc_path) { + bw = mixer_get_memory_bandwidth(crtc); + + mutex_lock(&ctx->icc_lock); + prev_bw = ctx->icc_bandwidth; + ctx->icc_bandwidth = bw; + + if (bw > prev_bw) + mixer_set_icc_bandwidth(ctx, bw); + else if (bw < prev_bw) + set_bit(MXR_BIT_REQUEST_BW, &ctx->flags); + + mutex_unlock(&ctx->icc_lock); + } + + mixer_enable_sync(ctx); exynos_crtc_handle_event(crtc); } @@ -1036,6 +1141,8 @@ static void mixer_atomic_disable(struct exynos_drm_crtc *crtc) pm_runtime_put(ctx->dev); + mixer_set_icc_bandwidth(ctx, 0); + clear_bit(MXR_BIT_POWERED, &ctx->flags); } @@ -1223,19 +1330,33 @@ static int mixer_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; const struct mixer_drv_data *drv; struct mixer_context *ctx; + struct icc_path *path; int ret; + /* + * Returns NULL if CONFIG_INTERCONNECT is disabled. + * May return ERR_PTR(-EPROBE_DEFER). + */ + path = of_icc_get(dev, NULL); + if (IS_ERR(path)) + return PTR_ERR(path); + ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) { DRM_DEV_ERROR(dev, "failed to alloc mixer context.\n"); - return -ENOMEM; + ret = -ENOMEM; + goto err; } drv = of_device_get_match_data(dev); + INIT_WORK(&ctx->work, mixer_icc_request_fn); + mutex_init(&ctx->icc_lock); + ctx->pdev = pdev; ctx->dev = dev; ctx->mxr_ver = drv->version; + ctx->icc_path = path; if (drv->is_vp_enabled) __set_bit(MXR_BIT_VP_ENABLED, &ctx->flags); @@ -1247,17 +1368,26 @@ static int mixer_probe(struct platform_device *pdev) pm_runtime_enable(dev); ret = component_add(&pdev->dev, &mixer_component_ops); - if (ret) + if (ret) { pm_runtime_disable(dev); - + goto err; + } + return 0; +err: + icc_put(path); return ret; } static int mixer_remove(struct platform_device *pdev) { - pm_runtime_disable(&pdev->dev); + struct device *dev = &pdev->dev; + struct mixer_context *ctx = dev_get_drvdata(dev); + + pm_runtime_disable(dev); + + component_del(dev, &mixer_component_ops); - component_del(&pdev->dev, &mixer_component_ops); + icc_put(ctx->icc_path); return 0; }