From patchwork Thu Nov 5 21:23:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 11885267 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E8AD1744 for ; Thu, 5 Nov 2020 21:25:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A560A20724 for ; Thu, 5 Nov 2020 21:25:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ba9F4Hih" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A560A20724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:38016 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kamlX-0004Xg-Gi for patchwork-qemu-devel@patchwork.kernel.org; Thu, 05 Nov 2020 16:25:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54650) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kamj7-0002nm-Ue for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:25 -0500 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:36715) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kamj5-0005TT-B1 for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:25 -0500 Received: by mail-wr1-x444.google.com with SMTP id x7so3420586wrl.3 for ; Thu, 05 Nov 2020 13:23:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dntSroN4PEJG85PNzlPGrDsZDRwQHf/tT20jV6J3Txc=; b=ba9F4HihJrNDdByQaEdDCrXdFXqY0dJVQ/R1ZShL2TT21yiNIuiGaVxA+IhVgXEwHA X8YQs3P2m7NXSE6TbRZedibAeOiGkZ4fJdBS/HfVJ2F7uHBYYgBLsU94/OLrhRAHb273 f/qvOqwS5pX45wRhneMBGuRqnJhtYu0U644YflOrPeXBKuDv4xUMlMTZPIWm2I4+PkgH xI3cgehPxTut5oETfUbIf4zuw0878hyxyKiNLjHGyDInzf6OLz9X0wl+NKoKLfjenD9Z ourwW6DW44w3TSOj0YTeIBEyErbn1mZ3YbMREDBQI5unj/4OifsrWftEUcLTfADPF+Do Lzag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dntSroN4PEJG85PNzlPGrDsZDRwQHf/tT20jV6J3Txc=; b=I6pjUbDanlgwVUhvjwm1f+A3oi617kPgOHEbExVbhsg/3mKhwOHiIWT+PuS4GWR8K2 e9nFsd/4PY6ZsoBLqS0gvqL+j7WZkFz3cYgsYRGRDJDW/QCLo6ANG7+XunG6Amsfmsdn k3pVVASYqQ4UmcYcsuOFGwGAElzi1sJk3MqsZzJL9iGwzQSbXR42EcPyXDGA7nTN876X uM5K7V4ypuKLYEhZTFnTVVHDx7g+KalSuCiIlbV6YW0uIOaiWp4Xw2cCRysJSdF+/d+B RkU2bni8TGnSMbSQuYiufJQ9tanT2srgcBtTDyYhceI60/C5k1KYI/rLEimbeoDdtMob vTGg== X-Gm-Message-State: AOAM530sGaO04lkJ8gec46GBbH1CDw/yRBiad1SWnjgxWQ6lgXd3NQ/3 hhkkDN1eGARR4nMFLnAOBDHxDyZfduFpOQ== X-Google-Smtp-Source: ABdhPJxJFydpCyakzzlQcL5NDX+lYXAI0MzoCOitLYtiVHN/k0jhitzGmiGv/Xelr3JTaL2Xy2MuEg== X-Received: by 2002:adf:f382:: with SMTP id m2mr5512796wro.342.1604611398424; Thu, 05 Nov 2020 13:23:18 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e25sm4861587wrc.76.2020.11.05.13.23.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 13:23:17 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH for-5.2 1/3] linux-user/sparc: Fix errors in target_ucontext structures Date: Thu, 5 Nov 2020 21:23:12 +0000 Message-Id: <20201105212314.9628-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105212314.9628-1-peter.maydell@linaro.org> References: <20201105212314.9628-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Giuseppe Musacchio , Richard Henderson , Mark Cave-Ayland , Laurent Vivier Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The various structs that make up the SPARC target_ucontext had some errors: * target structures must not include fields which are host pointers, which might be the wrong size. These should be abi_ulong instead * because we don't have the 'long double' part of the mcfpu_fregs union in our version of the target_mc_fpu struct, we need to manually force it to be 16-aligned In particular, the lack of 16-alignment caused sparc64_get_context() and sparc64_set_context() to read and write all the registers at the wrong offset, which triggered a guest glibc stack check in siglongjmp: *** longjmp causes uninitialized stack frame ***: terminated when trying to run bash. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- linux-user/sparc/signal.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index d796f50f665..57ea1593bfc 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -349,10 +349,15 @@ typedef abi_ulong target_mc_greg_t; typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; struct target_mc_fq { - abi_ulong *mcfq_addr; + abi_ulong mcfq_addr; uint32_t mcfq_insn; }; +/* + * Note the manual 16-alignment; the kernel gets this because it + * includes a "long double qregs[16]" in the mcpu_fregs union, + * which we can't do. + */ struct target_mc_fpu { union { uint32_t sregs[32]; @@ -362,11 +367,11 @@ struct target_mc_fpu { abi_ulong mcfpu_fsr; abi_ulong mcfpu_fprs; abi_ulong mcfpu_gsr; - struct target_mc_fq *mcfpu_fq; + abi_ulong mcfpu_fq; unsigned char mcfpu_qcnt; unsigned char mcfpu_qentsz; unsigned char mcfpu_enab; -}; +} __attribute__((aligned(16))); typedef struct target_mc_fpu target_mc_fpu_t; typedef struct { @@ -377,7 +382,7 @@ typedef struct { } target_mcontext_t; struct target_ucontext { - struct target_ucontext *tuc_link; + abi_ulong tuc_link; abi_ulong tuc_flags; target_sigset_t tuc_sigmask; target_mcontext_t tuc_mcontext; From patchwork Thu Nov 5 21:23:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 11885269 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D1133697 for ; Thu, 5 Nov 2020 21:26:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43E1B20724 for ; Thu, 5 Nov 2020 21:26:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="JtUfeBaf" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 43E1B20724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:39596 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kamm8-0005Ck-8I for patchwork-qemu-devel@patchwork.kernel.org; Thu, 05 Nov 2020 16:26:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54652) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kamj8-0002nt-9r for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:26 -0500 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:42560) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kamj5-0005Tf-A6 for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:26 -0500 Received: by mail-wr1-x443.google.com with SMTP id w14so3394714wrs.9 for ; Thu, 05 Nov 2020 13:23:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U8KdOlXXLYO3hwpDlX+ZEhUYjGxzebIeovcN6OjRKh4=; b=JtUfeBafB1Saa9/5UUEgPDrfD2799oLlSmNOMBeYSAz74HfSB8tfhPR04akGHpy7cC PFukcOeLDahImogqLaaFxwdbGS7ySjtdrkuY9s7/JYFqG+pAd6mgZAbDp3tKiUHUphdX qf2FxhFt9kzUoqNLrIg+pRyK5N8svpznlCDCyDU78RCTglAN+3tGhNmQmZ/V22Vic56k 7FtuzxG2pjgQF7UBHBMt0IQBgVRz79vli8KDpS0mHl3pnwlHpK/UepPoyPfeHxDJFFUy RQdPUS7gTWEKXiqq1jHy2txzjV1oUUyERUc3BI9ANAO0KQEgqSWii1oDdLLRMyjzV+x6 VpCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U8KdOlXXLYO3hwpDlX+ZEhUYjGxzebIeovcN6OjRKh4=; b=hYpVzJTlpiSWTWcHECOv4ZNpLc22fVNln/W2B7fxFwMtPt1jXpng4njUVOAeiUUaiC bphX1Fba8aB198DyuQTLlaiSIVzFQDjUEAcLfi3udce4gZWpIeue0e8bJ2PWXzZCz/cz u5wyvFpLGujWblgYVZKakDuTkfO9ph83qaobQEZxqIs3qyYMaqh0JUWCJu0JHEpF+QEY AWzaSu+OnHeEaZ/yvW9nVC6kebhibxpL+bWMkf1HZFiB8OhO3Lav5nx1hQzHA8bO3ZUf m9kEaqK47wV6z1oyM42yLtE7oKgn2vygQLuwbRoKNaCkm0coplyshZoZII3XR3ghhA1p 0HDQ== X-Gm-Message-State: AOAM531kil0Ml302Ihm4vMM93MhHpv6yshe95tdxuLUwIPuir2+dd9tY jGOyGkPXIxgGKCQhPXXQGXP6Q3MMF+53xw== X-Google-Smtp-Source: ABdhPJxYpn23cpDQHJLVI9g4osRK6O5+iMy7YSc6U2tnsvTzpRFi7/CvMXIYzuyO/tn5kbrBpHGnPA== X-Received: by 2002:a5d:4448:: with SMTP id x8mr4613841wrr.364.1604611399675; Thu, 05 Nov 2020 13:23:19 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e25sm4861587wrc.76.2020.11.05.13.23.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 13:23:19 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH for-5.2 2/3] linux-user/sparc: Correct set/get_context handling of fp and i7 Date: Thu, 5 Nov 2020 21:23:13 +0000 Message-Id: <20201105212314.9628-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105212314.9628-1-peter.maydell@linaro.org> References: <20201105212314.9628-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::443; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x443.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Giuseppe Musacchio , Richard Henderson , Mark Cave-Ayland , Laurent Vivier Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Because QEMU's user-mode emulation just directly accesses guest CPU state, for SPARC the guest register window state is not the same in the sparc64_get_context() and sparc64_set_context() functions as it is for the real kernel's versions of those functions. Specifically, for the kernel it has saved the user space state such that the O* registers go into a pt_regs struct as UREG_I*, and the I* registers have been spilled onto the userspace stack. For QEMU, we haven't done that, so the guest's O* registers are still in WREG_O* and the I* registers in WREG_I*. The code was already accessing the O* registers correctly for QEMU, but had copied the kernel code for accessing the I* registers off the userspace stack. Replace this with direct accesses to fp and i7 in the CPU state, and add a comment explaining why we differ from the kernel code here. This fix is sufficient to get bash to a shell prompt. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- I'm really pretty unsure about our handling of SPARC register windows here. This fix works, but should we instead be ensuring that the flush_windows() call cpu_loop() does before handling this trap has written the I* regs to the stack ??? --- linux-user/sparc/signal.c | 47 ++++++++++++++++++--------------------- 1 file changed, 22 insertions(+), 25 deletions(-) diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index 57ea1593bfc..c315704b389 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -403,7 +403,6 @@ void sparc64_set_context(CPUSPARCState *env) struct target_ucontext *ucp; target_mc_gregset_t *grp; abi_ulong pc, npc, tstate; - abi_ulong fp, i7, w_addr; unsigned int i; ucp_addr = env->regwptr[WREG_O0]; @@ -447,6 +446,15 @@ void sparc64_set_context(CPUSPARCState *env) __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); + + /* + * Note that unlike the kernel, we didn't need to mess with the + * guest register window state to save it into a pt_regs to run + * the kernel. So for us the guest's O regs are still in WREG_O* + * (unlike the kernel which has put them in UREG_I* in a pt_regs) + * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't + * need to be written back to userspace memory. + */ __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); @@ -456,18 +464,9 @@ void sparc64_set_context(CPUSPARCState *env) __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); - __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); - __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); + __get_user(env->regwptr[WREG_FP], &(ucp->tuc_mcontext.mc_fp)); + __get_user(env->regwptr[WREG_I7], &(ucp->tuc_mcontext.mc_i7)); - w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; - if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), - abi_ulong) != 0) { - goto do_sigsegv; - } - if (put_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]), - abi_ulong) != 0) { - goto do_sigsegv; - } /* FIXME this does not match how the kernel handles the FPU in * its sparc64_set_context implementation. In particular the FPU * is only restored if fenab is non-zero in: @@ -501,7 +500,6 @@ void sparc64_get_context(CPUSPARCState *env) struct target_ucontext *ucp; target_mc_gregset_t *grp; target_mcontext_t *mcp; - abi_ulong fp, i7, w_addr; int err; unsigned int i; target_sigset_t target_set; @@ -553,6 +551,15 @@ void sparc64_get_context(CPUSPARCState *env) __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); + + /* + * Note that unlike the kernel, we didn't need to mess with the + * guest register window state to save it into a pt_regs to run + * the kernel. So for us the guest's O regs are still in WREG_O* + * (unlike the kernel which has put them in UREG_I* in a pt_regs) + * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't + * need to be fished out of userspace memory. + */ __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); @@ -562,18 +569,8 @@ void sparc64_get_context(CPUSPARCState *env) __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); - w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6]; - fp = i7 = 0; - if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]), - abi_ulong) != 0) { - goto do_sigsegv; - } - if (get_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]), - abi_ulong) != 0) { - goto do_sigsegv; - } - __put_user(fp, &(mcp->mc_fp)); - __put_user(i7, &(mcp->mc_i7)); + __put_user(env->regwptr[WREG_FP], &(mcp->mc_fp)); + __put_user(env->regwptr[WREG_I7], &(mcp->mc_i7)); { uint32_t *dst = ucp->tuc_mcontext.mc_fpregs.mcfpu_fregs.sregs; From patchwork Thu Nov 5 21:23:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 11885271 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0401C697 for ; Thu, 5 Nov 2020 21:28:23 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A4F2E20728 for ; Thu, 5 Nov 2020 21:28:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="HMdI09Xs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A4F2E20728 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:43986 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kamnt-00073r-IL for patchwork-qemu-devel@patchwork.kernel.org; Thu, 05 Nov 2020 16:28:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54656) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kamj9-0002oP-B8 for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:27 -0500 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:40366) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kamj5-0005Tj-B4 for qemu-devel@nongnu.org; Thu, 05 Nov 2020 16:23:27 -0500 Received: by mail-wr1-x441.google.com with SMTP id 33so3397735wrl.7 for ; Thu, 05 Nov 2020 13:23:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MvkEJhOTTURl32F+uN0ekuj0WJYncaqeHJMVTEXiVk4=; b=HMdI09Xs/+trcFkmEhJq0dfdIe8E649T4Ov3fA9K/F5N6HBMQOEEiDs0Qxd8j0TWvs BKG+COYBtztDNpynLfJsFXuL6QflprNjTughelbUxsJWEBPW6FUOWflYM3b4fXyR2sQq mCTMi5+v7YBGbGBm5vuu55Z21buOJ3g2vxFJlY/n2cY3CT27qs9b/0Qrb1NGUTbBdpJN Z3wn/QY0ESNXFejfLIED4469WPjl1fKLYyAGWGGQaULrPAi4AHtZrVtEPQNlJQq6vXLM cjgRzoRnGtkYly5+h/4rr/nXZz476A6mYnxAlSrnZeOz1T1RUZTzmqkVUNwwvdlV7S9G 1W7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MvkEJhOTTURl32F+uN0ekuj0WJYncaqeHJMVTEXiVk4=; b=Aq76iRaUbrPjWhTsyaA6gg8FLkaGiOIzUaxJ+AJsveRXfdg97+7iEkUBfLQ+1XUva0 w+CiMuuf8BuAUacen0729zbmeIq5CSHZLo+fMqoAudRdE1Xh7qbKjVb/jeJQxs9GdvLo FNad/A5EX4qAmkbZqTXopLd4EivbIeELgJ/dSB1qX4i1+ruBOWQ9jbbhisTVLBJ+wt9h t4qnJNAkp78G+0OHm4y48yzIpIkmEyrBItKxZlqCMzVSTEuqiLd+w0/U5/AirflhXhTW gHzSGP3rlhhgqDbzWhVkoI3zf0ofmVni+LHsXcShrjigmrypM3+eYVCHOPBSJXtmTm3K ae8w== X-Gm-Message-State: AOAM530gQPf/nXEEiCvgkFvQ1IuOJUH/J4GHABHqcfIqLEOwVClTDwWG 8CkUWjVZHcAEu61F0MTRVpJfwU14HWy/Lg== X-Google-Smtp-Source: ABdhPJwXqA727fOm6dk3+A5Uvj4hJyAoKDWQPnwY9wfLO5yq2hQFTPbUgSgX4ZYlmzoCpRl0QFRR2Q== X-Received: by 2002:adf:80c8:: with SMTP id 66mr5252857wrl.415.1604611400761; Thu, 05 Nov 2020 13:23:20 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id e25sm4861587wrc.76.2020.11.05.13.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 13:23:20 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH for-5.2 3/3] linux-user/sparc: Don't zero high half of PC, NPC, PSR in sigreturn Date: Thu, 5 Nov 2020 21:23:14 +0000 Message-Id: <20201105212314.9628-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105212314.9628-1-peter.maydell@linaro.org> References: <20201105212314.9628-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Giuseppe Musacchio , Richard Henderson , Mark Cave-Ayland , Laurent Vivier Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The function do_sigreturn() tries to store the PC, NPC and PSR in uint32_t local variables, which implicitly drops the high half of these fields for 64-bit guests. The usual effect was that a guest which used signals would crash on return from a signal unless it was lucky enough to take it while the PC was in the low 4GB of the address space. In particular, Debian /bin/dash and /bin/bash would segfault after executing external commands. Use abi_ulong, which is the type these fields all have in the __siginfo_t struct. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- linux-user/sparc/signal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/sparc/signal.c b/linux-user/sparc/signal.c index c315704b389..d12adc8e6ff 100644 --- a/linux-user/sparc/signal.c +++ b/linux-user/sparc/signal.c @@ -247,7 +247,7 @@ long do_sigreturn(CPUSPARCState *env) { abi_ulong sf_addr; struct target_signal_frame *sf; - uint32_t up_psr, pc, npc; + abi_ulong up_psr, pc, npc; target_sigset_t set; sigset_t host_set; int i;