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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=946 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030171 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds PCI specific glue drivier that creaties and registers in system cdns-usb3 platform device. Thanks to that we will be able to use the cdns-usb3 platform driver for USBSS-DEV controller build on PCI board Signed-off-by: Pawel Laszczak --- drivers/usb/Kconfig | 2 + drivers/usb/Makefile | 2 + drivers/usb/cdns3/Kconfig | 24 +++++ drivers/usb/cdns3/Makefile | 3 + drivers/usb/cdns3/cdns3-pci-wrap.c | 162 +++++++++++++++++++++++++++++ 5 files changed, 193 insertions(+) create mode 100644 drivers/usb/cdns3/Kconfig create mode 100644 drivers/usb/cdns3/Makefile create mode 100644 drivers/usb/cdns3/cdns3-pci-wrap.c diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 987fc5ba6321..5f9334019d04 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -112,6 +112,8 @@ source "drivers/usb/usbip/Kconfig" endif +source "drivers/usb/cdns3/Kconfig" + source "drivers/usb/mtu3/Kconfig" source "drivers/usb/musb/Kconfig" diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index 7d1b8c82b208..82093a60ea2c 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -8,6 +8,8 @@ obj-$(CONFIG_USB) += core/ obj-$(CONFIG_USB_SUPPORT) += phy/ +obj-$(CONFIG_USB_CDNS3) += cdns3/ + obj-$(CONFIG_USB_DWC3) += dwc3/ obj-$(CONFIG_USB_DWC2) += dwc2/ obj-$(CONFIG_USB_ISP1760) += isp1760/ diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig new file mode 100644 index 000000000000..888458372adb --- /dev/null +++ b/drivers/usb/cdns3/Kconfig @@ -0,0 +1,24 @@ +config USB_CDNS3 + tristate "Cadence USB3 Dual-Role Controller" + depends on ((USB_XHCI_HCD && USB_GADGET) || (USB_XHCI_HCD && !USB_GADGET) || (!USB_XHCI_HCD && USB_GADGET)) && HAS_DMA + help + Say Y here if your system has a cadence USB3 dual-role controller. + It supports: dual-role switch Host-only, and Peripheral-only. + + If you choose to build this driver is a dynamically linked + module, the module will be called cdns3.ko. + +if USB_CDNS3 + +config USB_CDNS3_PCI_WRAP + tristate "PCIe-based Platforms" + depends on USB_PCI && ACPI + default USB_CDNS3 + help + If you're using the USBSS Core IP with a PCIe, please say + 'Y' or 'M' here. + + If you choose to build this driver as module it will + be dynamically linked and module will be called cdns3-pci.ko + +endif diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile new file mode 100644 index 000000000000..dcdd62003c6a --- /dev/null +++ b/drivers/usb/cdns3/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o + +cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/cdns3-pci-wrap.c b/drivers/usb/cdns3/cdns3-pci-wrap.c new file mode 100644 index 000000000000..6c229ab6dffb --- /dev/null +++ b/drivers/usb/cdns3/cdns3-pci-wrap.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS PCI Glue driver + * + * Copyright (C) 2018 Cadence. + * + * Author: Pawel Laszczak + */ + +#include +#include +#include +#include +#include +#include + +struct cdns3_wrap { + struct platform_device *plat_dev; + struct pci_dev *hg_dev; + struct resource dev_res[4]; +}; + +struct cdns3_wrap wrap; + +#define RES_IRQ_ID 0 +#define RES_HOST_ID 1 +#define RES_DEV_ID 2 +#define RES_DRD_ID 3 + +#define PCI_BAR_HOST 0 +#define PCI_BAR_DEV 2 +#define PCI_BAR_OTG 4 + +#define PCI_DEV_FN_HOST_DEVICE 0 +#define PCI_DEV_FN_OTG 1 + +#define PCI_DRIVER_NAME "cdns3-pci-usbss" +#define PLAT_DRIVER_NAME "cdns-usb3" + +#define CDNS_VENDOR_ID 0x17cd +#define CDNS_DEVICE_ID 0x0100 + +/** + * cdns3_pci_probe - Probe function for Cadence USB wrapper driver + * @pdev: platform device object + * @id: pci device id + * + * Returns 0 on success otherwise negative errno + */ +static int cdns3_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + struct platform_device_info plat_info; + struct cdns3_wrap *wrap; + struct resource *res; + int err; + + /* + * for GADGET/HOST PCI (devfn) function number is 0, + * for OTG PCI (devfn) function number is 1 + */ + if (!id || pdev->devfn != PCI_DEV_FN_HOST_DEVICE) + return -EINVAL; + + err = pcim_enable_device(pdev); + if (err) { + dev_err(&pdev->dev, "Enabling PCI device has failed %d\n", err); + return err; + } + + pci_set_master(pdev); + wrap = devm_kzalloc(&pdev->dev, sizeof(*wrap), GFP_KERNEL); + if (!wrap) { + dev_err(&pdev->dev, "Failed to load PCI module\n"); + return -ENOMEM; + } + + /* function 0: host(BAR_0) + device(BAR_1) + otg(BAR_2)). */ + memset(wrap->dev_res, 0x00, + sizeof(struct resource) * ARRAY_SIZE(wrap->dev_res)); + dev_info(&pdev->dev, "Initialize Device resources\n"); + res = wrap->dev_res; + +#if IS_ENABLED(CONFIG_USB_CDNS3_GADGET) + res[RES_DEV_ID].start = pci_resource_start(pdev, PCI_BAR_DEV); + res[RES_DEV_ID].end = pci_resource_end(pdev, PCI_BAR_DEV); + res[RES_DEV_ID].name = "cdns3-dev-regs"; + res[RES_DEV_ID].flags = IORESOURCE_MEM; + dev_info(&pdev->dev, "USBSS-DEV physical base addr: %pa\n", + &res[RES_DEV_ID].start); + +#endif + +#if IS_ENABLED(CONFIG_USB_CDNS3_HOST) + res[RES_HOST_ID].start = pci_resource_start(pdev, PCI_BAR_HOST); + res[RES_HOST_ID].end = pci_resource_end(pdev, PCI_BAR_HOST); + res[RES_HOST_ID].name = "cdns3-xhci-regs"; + res[RES_HOST_ID].flags = IORESOURCE_MEM; + dev_info(&pdev->dev, "USBSS-XHCI physical base addr: %pa\n", + &res[RES_HOST_ID].start); +#endif + + res[RES_DRD_ID].start = pci_resource_start(pdev, PCI_BAR_OTG); + res[RES_DRD_ID].end = pci_resource_end(pdev, PCI_BAR_OTG); + res[RES_DRD_ID].name = "cdns3-otg"; + res[RES_DRD_ID].flags = IORESOURCE_MEM; + dev_info(&pdev->dev, "USBSS-DRD physical base addr: %pa\n", + &res[RES_DRD_ID].start); + + /* Interrupt common for both device and XHCI */ + wrap->dev_res[RES_IRQ_ID].start = pdev->irq; + wrap->dev_res[RES_IRQ_ID].name = "cdns3-irq"; + wrap->dev_res[RES_IRQ_ID].flags = IORESOURCE_IRQ; + + /* set up platform device info */ + memset(&plat_info, 0, sizeof(plat_info)); + plat_info.parent = &pdev->dev; + plat_info.fwnode = pdev->dev.fwnode; + plat_info.name = PLAT_DRIVER_NAME; + plat_info.id = pdev->devfn; + plat_info.res = wrap->dev_res; + plat_info.num_res = ARRAY_SIZE(wrap->dev_res); + plat_info.dma_mask = pdev->dma_mask; + + /* register platform device */ + wrap->plat_dev = platform_device_register_full(&plat_info); + if (IS_ERR(wrap->plat_dev)) { + err = PTR_ERR(wrap->plat_dev); + return err; + } + + pci_set_drvdata(pdev, wrap); + + return err; +} + +void cdns3_pci_remove(struct pci_dev *pdev) +{ + struct cdns3_wrap *wrap = (struct cdns3_wrap *)pci_get_drvdata(pdev); + + platform_device_unregister(wrap->plat_dev); +} + +static const struct pci_device_id cdns3_pci_ids[] = { + { PCI_DEVICE(CDNS_VENDOR_ID, CDNS_DEVICE_ID), }, + { 0, } +}; + +static struct pci_driver cdns3_pci_driver = { + .name = PCI_DRIVER_NAME, + .id_table = cdns3_pci_ids, + .probe = cdns3_pci_probe, + .remove = cdns3_pci_remove, +}; + +module_pci_driver(cdns3_pci_driver); +MODULE_DEVICE_TABLE(pci, cdns3_pci_ids); + +MODULE_AUTHOR("Pawel Laszczak "); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Cadence USBSS PCI wrapperr"); + From patchwork Sat Nov 3 17:51:15 2018 Content-Type: text/plain; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch defines macros used by device side of controller, structures holding registers, and some other object used by device controller. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/gadget.h | 1067 ++++++++++++++++++++++++++++++++++++ 1 file changed, 1067 insertions(+) create mode 100644 drivers/usb/cdns3/gadget.h diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h new file mode 100644 index 000000000000..c4b07827aae7 --- /dev/null +++ b/drivers/usb/cdns3/gadget.h @@ -0,0 +1,1067 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * USBSS device controller driver + * + * Copyright (C) 2018 Cadence. + * Copyright (C) 2018 NXP + * + * Author: Pawel Laszczak + * Pawel Jez + * Peter Chen + */ +#ifndef __LINUX_CDNS3_GADGET +#define __LINUX_CDNS3_GADGET +#include + +/* + * USBSS-DEV register interface. + * This corresponds to the USBSS Device Controller Interface + */ + +/** + * struct xhci_cap_regs - xHCI Host Controller Capability Registers. + * @usb_conf: Global Configuration Register. + * @usb_sts: Global Status Register. + * @usb_cmd: Global Command Register. + * @usb_iptn: ITP/SOF number Register. + * @usb_lpm: Global Command Register. + * @usb_ien: USB Interrupt Enable Register. + * @usb_ists: USB Interrupt Status Register. + * @ep_sel: Endpoint Select Register. + * @ep_traddr: Endpoint Transfer Ring Address Register. + * @ep_cfg: Endpoint Configuration Register. + * @ep_cmd: Endpoint Command Register. + * @ep_sts: Endpoint Status Register. + * @ep_sts_sid: Endpoint Status Register. + * @ep_sts_en: Endpoint Status Register Enable. + * @drbl: Doorbell Register. + * @ep_ien: EP Interrupt Enable Register. + * @ep_ists: EP Interrupt Status Register. + * @usb_pwr: Global Power Configuration Register. + * @usb_conf2: Global Configuration Register 2. + * @usb_cap1: Capability Register 1. + * @usb_cap2: Capability Register 2. + * @usb_cap3: Capability Register 3. + * @usb_cap4: Capability Register 4. + * @usb_cap5: Capability Register 5. + * @usb_cap6: Capability Register 6. + * @usb_cpkt1: Custom Packet Register 1. + * @usb_cpkt2: Custom Packet Register 2. + * @usb_cpkt3: Custom Packet Register 3. + * @reserved1: Reserved. + * @cfg_regs: Configuration registers. + * @reserved2: Reserved. + * @dma_axi_ctrl: AXI Control register. + * @dma_axi_id: AXI ID register. + * @dma_axi_cap: AXI Capability register. + * @dma_axi_ctrl0: AXI Control 0 register. + * @dma_axi_ctrl1: AXI Control 1 register. + */ +struct cdns3_usb_regs { + __le32 usb_conf; + __le32 usb_sts; + __le32 usb_cmd; + __le32 usb_iptn; + __le32 usb_lpm; + __le32 usb_ien; + __le32 usb_ists; + __le32 ep_sel; + __le32 ep_traddr; + __le32 ep_cfg; + __le32 ep_cmd; + __le32 ep_sts; + __le32 ep_sts_sid; + __le32 ep_sts_en; + __le32 drbl; + __le32 ep_ien; + __le32 ep_ists; + __le32 usb_pwr; + __le32 usb_conf2; + __le32 usb_cap1; + __le32 usb_cap2; + __le32 usb_cap3; + __le32 usb_cap4; + __le32 usb_cap5; + __le32 usb_cap6; + __le32 usb_cpkt1; + __le32 usb_cpkt2; + __le32 usb_cpkt3; + __le32 reserved1[36]; + __le32 cfg_reg1; + __le32 dbg_link1; + __le32 dbg_link2; + __le32 cfg_regs[74]; + __le32 reserved2[34]; + __le32 dma_axi_ctrl; + __le32 dma_axi_id; + __le32 dma_axi_cap; + __le32 dma_axi_ctrl0; + __le32 dma_axi_ctrl1; +}; + +/* USB_CONF - bitmasks */ +/* Reset USB device configuration. */ +#define USB_CONF_CFGRST BIT(0) +/* Set Configuration. */ +#define USB_CONF_CFGSET BIT(1) +/* Disconnect USB device in SuperSpeed. */ +#define USB_CONF_USB3DIS BIT(3) +/* Disconnect USB device in HS/FS */ +#define USB_CONF_USB2DIS BIT(4) +/* Little Endian access - default */ +#define USB_CONF_LENDIAN BIT(5) +/* + * Big Endian access. Driver assume that byte order for + * SFRs access always is as Little Endian so this bit + * is not used. + */ +#define USB_CONF_BENDIAN BIT(6) +/* Device software reset. */ +#define USB_CONF_SWRST BIT(7) +/* Singular DMA transfer mode. */ +#define USB_CONF_DSING BIT(8) +/* Multiple DMA transfers mode. */ +#define USB_CONF_DMULT BIT(9) +/* DMA clock turn-off enable. */ +#define USB_CONF_DMAOFFEN BIT(10) +/* DMA clock turn-off disable. */ +#define USB_CONF_DMAOFFDS BIT(11) +/* Clear Force Full Speed. */ +#define USB_CONF_CFORCE_FS BIT(12) +/* Set Force Full Speed. */ +#define USB_CONF_SFORCE_FS BIT(13) +/* Device enable. */ +#define USB_CONF_DEVEN BIT(14) +/* Device disable. */ +#define USB_CONF_DEVDS BIT(15) +/* L1 LPM state entry enable (used in HS/FS mode). */ +#define USB_CONF_L1EN BIT(16) +/* L1 LPM state entry disable (used in HS/FS mode). */ +#define USB_CONF_L1DS BIT(17) +/* USB 2.0 clock gate disable. */ +#define USB_CONF_CLK2OFFEN BIT(18) +/* USB 2.0 clock gate enable. */ +#define USB_CONF_CLK2OFFDS BIT(19) +/* L0 LPM state entry request (used in HS/FS mode). */ +#define USB_CONF_LGO_L0 BIT(20) +/* USB 3.0 clock gate disable. */ +#define USB_CONF_CLK3OFFEN BIT(21) +/* USB 3.0 clock gate enable. */ +#define USB_CONF_CLK3OFFDS BIT(22) +/* Bit 23 is reserved*/ +/* U1 state entry enable (used in SS mode). */ +#define USB_CONF_U1EN BIT(24) +/* U1 state entry disable (used in SS mode). */ +#define USB_CONF_U1DS BIT(25) +/* U2 state entry enable (used in SS mode). */ +#define USB_CONF_U2EN BIT(26) +/* U2 state entry disable (used in SS mode). */ +#define USB_CONF_U2DS BIT(27) +/* U0 state entry request (used in SS mode). */ +#define USB_CONF_LGO_U0 BIT(28) +/* U1 state entry request (used in SS mode). */ +#define USB_CONF_LGO_U1 BIT(29) +/* U2 state entry request (used in SS mode). */ +#define USB_CONF_LGO_U2 BIT(30) +/* SS.Inactive state entry request (used in SS mode) */ +#define USB_CONF_LGO_SSINACT BIT(31) + +/* USB_STS - bitmasks */ +/* + * Configuration status. + * 1 - device is in the configured state. + * 0 - device is not configured. + */ +#define USB_STS_CFGSTS_MASK BIT(0) +#define USB_STS_CFGSTS(p) ((p) & USB_STS_CFGSTS_MASK) +/* + * On-chip memory overflow. + * 0 - On-chip memory status OK. + * 1 - On-chip memory overflow. + */ +#define USB_STS_OV_MASK BIT(1) +#define USB_STS_OV(p) ((p) & USB_STS_OV_MASK) +/* + * SuperSpeed connection status. + * 0 - USB in SuperSpeed mode disconnected. + * 1 - USB in SuperSpeed mode connected. + */ +#define USB_STS_USB3CONS_MASK BIT(2) +#define USB_STS_USB3CONS(p) ((p) & USB_STS_USB3CONS_MASK) +/* + * DMA transfer configuration status. + * 0 - single request. + * 1 - multiple TRB chain + */ +#define USB_STS_DTRANS_MASK BIT(3) +#define USB_STS_DTRANS(p) ((p) & USB_STS_DTRANS_MASK) +/* + * Device speed. + * 0 - Undefined (value after reset). + * 1 - Low speed + * 2 - Full speed + * 3 - High speed + * 4 - Super speed + */ +#define USB_STS_USBSPEED_MASK GENMASK(6, 4) +#define USB_STS_USBSPEED(p) (((p) & USB_STS_USBSPEED_MASK) >> 4) +#define USB_STS_LS (0x1 << 4) +#define USB_STS_FS (0x2 << 4) +#define USB_STS_HS (0x3 << 4) +#define USB_STS_SS (0x4 << 4) +#define DEV_UNDEFSPEED(p) (((p) & USB_STS_USBSPEED_MASK) == (0x0 << 4)) +#define DEV_LOWSPEED(p) (((p) & USB_STS_USBSPEED_MASK) == USB_STS_LS) +#define DEV_FULLSPEED(p) (((p) & USB_STS_USBSPEED_MASK) == USB_STS_FS) +#define DEV_HIGHSPEED(p) (((p) & USB_STS_USBSPEED_MASK) == USB_STS_HS) +#define DEV_SUPERSPEED(p) (((p) & USB_STS_USBSPEED_MASK) == USB_STS_SS) +/* + * Endianness for SFR access. + * 0 - Little Endian order (default after hardware reset). + * 1 - Big Endian order + */ +#define USB_STS_ENDIAN_MASK BIT(7) +#define USB_STS_ENDIAN(p) ((p) & USB_STS_ENDIAN_MASK) +/* + * HS/FS clock turn-off status. + * 0 - hsfs clock is always on. + * 1 - hsfs clock turn-off in L2 (HS/FS mode) is enabled + * (default after hardware reset). + */ +#define USB_STS_CLK2OFF_MASK BIT(8) +#define USB_STS_CLK2OFF(p) ((p) & USB_STS_CLK2OFF_MASK) +/* + * PCLK clock turn-off status. + * 0 - pclk clock is always on. + * 1 - pclk clock turn-off in U3 (SS mode) is enabled + * (default after hardware reset). + */ +#define USB_STS_CLK3OFF_MASK BIT(9) +#define USB_STS_CLK3OFF(p) ((p) & USB_STS_CLK3OFF_MASK) +/* + * Controller in reset state. + * 0 - Internal reset is active. + * 1 - Internal reset is not active and controller is fully operational. + */ +#define USB_STS_IN_RST_MASK BIT(10) +#define USB_STS_IN_RST(p) ((p) & USB_STS_IN_RST_MASK) +/* + * Device enable Status. + * 0 - USB device is disabled (VBUS input is disconnected from internal logic). + * 1 - USB device is enabled (VBUS input is connected to the internal logic). + */ +#define USB_STS_DEVS_MASK BIT(14) +#define USB_STS_DEVS(p) ((p) & USB_STS_DEVS_MASK) +/* + * DAddress statuss. + * 0 - USB device is default state. + * 1 - USB device is at least in address state. + */ +#define USB_STS_ADDRESSED_MASK BIT(15) +#define USB_STS_ADDRESSED(p) ((p) & USB_STS_ADDRESSED_MASK) +/* + * L1 LPM state enable status (used in HS/FS mode). + * 0 - Entering to L1 LPM state disabled. + * 1 - Entering to L1 LPM state enabled. + */ +#define USB_STS_L1ENS_MASK BIT(16) +#define USB_STS_L1ENS(p) ((p) & USB_STS_L1ENS_MASK) +/* + * Internal VBUS connection status (used both in HS/FS and SS mode). + * 0 - internal VBUS is not detected. + * 1 - internal VBUS is detected. + */ +#define USB_STS_VBUSS_MASK BIT(17) +#define USB_STS_VBUSS(p) ((p) & USB_STS_VBUSS_MASK) +/* + * HS/FS LPM state (used in FS/HS mode). + * 0 - L0 State + * 1 - L1 State + * 2 - L2 State + * 3 - L3 State + */ +#define USB_STS_LPMST_MASK GENMASK(19, 18) +#define DEV_L0_STATE(p) (((p) & USB_STS_LPMST_MASK) == (0x0 << 18)) +#define DEV_L1_STATE(p) (((p) & USB_STS_LPMST_MASK) == (0x1 << 18)) +#define DEV_L2_STATE(p) (((p) & USB_STS_LPMST_MASK) == (0x2 << 18)) +#define DEV_L3_STATE(p) (((p) & USB_STS_LPMST_MASK) == (0x3 << 18)) +/* + * Disable HS status (used in FS/HS mode). + * 0 - the disconnect bit for HS/FS mode is set . + * 1 - the disconnect bit for HS/FS mode is not set. + */ +#define USB_STS_USB2CONS_MASK BIT(20) +#define USB_STS_USB2CONS(p) ((p) & USB_STS_USB2CONS_MASK) +/* + * HS/FS mode connection status (used in FS/HS mode). + * 0 - High Speed operations in USB2.0 (FS/HS) mode not disabled. + * 1 - High Speed operations in USB2.0 (FS/HS). + */ +#define USB_STS_DISABLE_HS_MASK BIT(21) +#define USB_STS_DISABLE_HS(p) ((p) & USB_STS_DISABLE_HS_MASK) +/* + * U1 state enable status (used in SS mode). + * 0 - Entering to U1 state disabled. + * 1 - Entering to U1 state enabled. + */ +#define USB_STS_U1ENS_MASK BIT(24) +#define USB_STS_U1ENS(p) ((p) & USB_STS_U1ENS_MASK) +/* + * U2 state enable status (used in SS mode). + * 0 - Entering to U2 state disabled. + * 1 - Entering to U2 state enabled. + */ +#define USB_STS_U2ENS_MASK BIT(25) +#define USB_STS_U2ENS(p) ((p) & USB_STS_U2ENS_MASK) +/* + * SuperSpeed Link LTSSM state. This field reflects USBSS-DEV current + * SuperSpeed link state + */ +#define USB_STS_LST_MASK GENMASK(29, 26) +#define DEV_LST_U0 (((p) & USB_STS_LST_MASK) == (0x0 << 26)) +#define DEV_LST_U1 (((p) & USB_STS_LST_MASK) == (0x1 << 26)) +#define DEV_LST_U2 (((p) & USB_STS_LST_MASK) == (0x2 << 26)) +#define DEV_LST_U3 (((p) & USB_STS_LST_MASK) == (0x3 << 26)) +#define DEV_LST_DISABLED (((p) & USB_STS_LST_MASK) == (0x4 << 26)) +#define DEV_LST_RXDETECT (((p) & USB_STS_LST_MASK) == (0x5 << 26)) +#define DEV_LST_INACTIVE (((p) & USB_STS_LST_MASK) == (0x6 << 26)) +#define DEV_LST_POLLING (((p) & USB_STS_LST_MASK) == (0x7 << 26)) +#define DEV_LST_RECOVERY (((p) & USB_STS_LST_MASK) == (0x8 << 26)) +#define DEV_LST_HOT_RESET (((p) & USB_STS_LST_MASK) == (0x9 << 26)) +#define DEV_LST_COMP_MODE (((p) & USB_STS_LST_MASK) == (0xa << 26)) +#define DEV_LST_LB_STATE (((p) & USB_STS_LST_MASK) == (0xb << 26)) +/* + * DMA clock turn-off status. + * 0 - DMA clock is always on (default after hardware reset). + * 1 - DMA clock turn-off in U1, U2 and U3 (SS mode) is enabled. + */ +#define USB_STS_DMAOFF_MASK BIT(30) +#define USB_STS_DMAOFF(p) ((p) & USB_STS_DMAOFF_MASK) +/* + * SFR Endian statuss. + * 0 - Little Endian order (default after hardware reset). + * 1 - Big Endian order. + */ +#define USB_STS_ENDIAN2_MASK BIT(31) +#define USB_STS_ENDIAN2(p) ((p) & USB_STS_ENDIAN2_MASK) + +/* USB_CMD - bitmasks */ +/* Set Function Address */ +#define USB_CMD_SET_ADDR BIT(0) +/* + * Function Address This field is saved to the device only when the field + * SET_ADDR is set '1 ' during write to USB_CMD register. + * Software is responsible for entering the address of the device during + * SET_ADDRESS request service. This field should be set immediately after + * the SETUP packet is decoded, and prior to confirmation of the status phase + */ +#define USB_CMD_FADDR_MASK GENMASK(7, 1) +#define USB_CMD_FADDR(p) (((p) << 1) & USB_CMD_FADDR_MASK) +/* Send Function Wake Device Notification TP (used only in SS mode). */ +#define USB_CMD_SDNFW BIT(8) +/* Set Test Mode (used only in HS/FS mode). */ +#define USB_CMD_STMODE BIT(9) +/* Test mode selector (used only in HS/FS mode) */ +#define USB_STS_TMODE_SEL_MASK GENMASK(11, 10) +#define USB_STS_TMODE_SEL(p) (((p) << 10) & USB_STS_TMODE_SEL_MASK) +/* + * Send Latency Tolerance Message Device Notification TP (used only + * in SS mode). + */ +#define USB_CMD_SDNLTM BIT(12) +/* Send Custom Transaction Packet (used only in SS mode) */ +#define USB_CMD_SPKT BIT(13) +/*Device Notification 'Function Wake' - Interface value (only in SS mode. */ +#define USB_CMD_DNFW_INT_MASK GENMASK(23, 16) +#define USB_STS_DNFW_INT(p) (((p) << 16) & USB_CMD_DNFW_INT_MASK) +/* + * Device Notification 'Latency Tolerance Message' -373 BELT value [7:0] + * (used only in SS mode). + */ +#define USB_CMD_DNLTM_BELT_MASK GENMASK(27, 16) +#define USB_STS_DNLTM_BELT(p) (((p) << 16) & USB_CMD_DNLTM_BELT_MASK) + +/* USB_ITPN - bitmasks */ +/* + * ITP(SS) / SOF (HS/FS) number + * In SS mode this field represent number of last ITP received from host. + * In HS/FS mode this field represent number of last SOF received from host. + */ +#define USB_ITPN_MASK GENMASK(13, 0) +#define USB_ITPN(p) ((p) & USB_ITPN_MASK) + +/* USB_LPM - bitmasks */ +/* Host Initiated Resume Duration. */ +#define USB_LPM_HIRD_MASK GENMASK(3, 0) +#define USB_LPM_HIRD(p) ((p) & USB_LPM_HIRD_MASK) +/* Remote Wakeup Enable (bRemoteWake). */ +#define USB_LPM_BRW BIT(4) + +/* USB_IEN - bitmasks */ +/* SS connection interrupt enable */ +#define USB_IEN_CONIEN BIT(0) +/* SS disconnection interrupt enable. */ +#define USB_IEN_DISIEN BIT(1) +/* USB SS warm reset interrupt enable. */ +#define USB_IEN_UWRESIEN BIT(2) +/* USB SS hot reset interrupt enable */ +#define USB_IEN_UHRESIEN BIT(3) +/* SS link U3 state enter interrupt enable (suspend).*/ +#define USB_IEN_U3ENTIEN BIT(4) +/* SS link U3 state exit interrupt enable (wakeup). */ +#define USB_IEN_U3EXTIEN BIT(5) +/* SS link U2 state enter interrupt enable.*/ +#define USB_IEN_U2ENTIEN BIT(6) +/* SS link U2 state exit interrupt enable.*/ +#define USB_IEN_U2EXTIEN BIT(7) +/* SS link U1 state enter interrupt enable.*/ +#define USB_IEN_U1ENTIEN BIT(8) +/* SS link U1 state exit interrupt enable.*/ +#define USB_IEN_U1EXTIEN BIT(9) +/* ITP/SOF packet detected interrupt enable.*/ +#define USB_IEN_ITPIEN BIT(10) +/* Wakeup interrupt enable.*/ +#define USB_IEN_WAKEIEN BIT(11) +/* Send Custom Packet interrupt enable.*/ +#define USB_IEN_SPKTIEN BIT(12) +/* HS/FS mode connection interrupt enable.*/ +#define USB_IEN_CON2IEN BIT(16) +/* HS/FS mode disconnection interrupt enable.*/ +#define USB_IEN_DIS2IEN BIT(17) +/* USB reset (HS/FS mode) interrupt enable.*/ +#define USB_IEN_U2RESIEN BIT(18) +/* LPM L2 state enter interrupt enable.*/ +#define USB_IEN_L2ENTIEN BIT(20) +/* LPM L2 state exit interrupt enable.*/ +#define USB_IEN_L2EXTIEN BIT(21) +/* LPM L1 state enter interrupt enable.*/ +#define USB_IEN_L1ENTIEN BIT(24) +/* LPM L1 state exit interrupt enable.*/ +#define USB_IEN_L1EXTIEN BIT(25) +/* Configuration reset interrupt enable.*/ +#define USB_IEN_CFGRESIEN BIT(26) +/* Start of the USB SS warm reset interrupt enable.*/ +#define USB_IEN_UWRESSIEN BIT(28) +/* End of the USB SS warm reset interrupt enable.*/ +#define USB_IEN_UWRESEIEN BIT(29) + +#define USB_IEN_INIT (USB_IEN_U2RESIEN | USB_ISTS_DIS2I | USB_IEN_CON2IEN \ + | USB_IEN_UHRESIEN | USB_IEN_UWRESIEN | USB_IEN_DISIEN \ + | USB_IEN_CONIEN | USB_IEN_U3EXTIEN | USB_IEN_L2ENTIEN \ + | USB_IEN_L2EXTIEN) + +/* USB_ISTS - bitmasks */ +/* SS Connection detected. */ +#define USB_ISTS_CONI BIT(0) +/* SS Disconnection detected. */ +#define USB_ISTS_DISI BIT(1) +/* UUSB warm reset detectede. */ +#define USB_ISTS_UWRESI BIT(2) +/* USB hot reset detected. */ +#define USB_ISTS_UHRESI BIT(3) +/* U3 link state enter detected (suspend).*/ +#define USB_ISTS_U3ENTI BIT(4) +/* U3 link state exit detected (wakeup). */ +#define USB_ISTS_U3EXTI BIT(5) +/* U2 link state enter detected.*/ +#define USB_ISTS_U2ENTI BIT(6) +/* U2 link state exit detected.*/ +#define USB_ISTS_U2EXTI BIT(7) +/* U1 link state enter detected.*/ +#define USB_ISTS_U1ENTI BIT(8) +/* U1 link state exit detected.*/ +#define USB_ISTS_U1EXTI BIT(9) +/* ITP/SOF packet detected.*/ +#define USB_ISTS_ITPI BIT(10) +/* Wakeup detected.*/ +#define USB_ISTS_WAKEI BIT(11) +/* Send Custom Packet detected.*/ +#define USB_ISTS_SPKTI BIT(12) +/* HS/FS mode connection detected.*/ +#define USB_ISTS_CON2I BIT(16) +/* HS/FS mode disconnection detected.*/ +#define USB_ISTS_DIS2I BIT(17) +/* USB reset (HS/FS mode) detected.*/ +#define USB_ISTS_U2RESI BIT(18) +/* LPM L2 state enter detected.*/ +#define USB_ISTS_L2ENTI BIT(20) +/* LPM L2 state exit detected.*/ +#define USB_ISTS_L2EXTI BIT(21) +/* LPM L1 state enter detected.*/ +#define USB_ISTS_L1ENTI BIT(24) +/* LPM L1 state exit detected.*/ +#define USB_ISTS_L1EXTI BIT(25) +/* USB configuration reset detected.*/ +#define USB_ISTS_CFGRESI BIT(26) +/* Start of the USB warm reset detected.*/ +#define USB_ISTS_UWRESSI BIT(28) +/* End of the USB warm reset detected.*/ +#define USB_ISTS_UWRESEI BIT(29) + +/* USB_SEL - bitmasks */ +#define EP_SEL_EPNO_MASK GENMASK(3, 0) +/* Endpoint number. */ +#define EP_SEL_EPNO(p) ((p) & EP_SEL_EPNO_MASK) +/* Endpoint direction bit - 0 - OUT, 1 - IN. */ +#define EP_SEL_DIR BIT(7) + +#define select_ep_in(nr) (EP_SEL_EPNO(p) | EP_SEL_DIR) +#define select_ep_out (EP_SEL_EPNO(p)) + +/* EP_TRADDR - bitmasks */ +/* Transfer Ring address. */ +#define EP_TRADDR_TRADDR(p) ((p)) + +/* EP_CFG - bitmasks */ +/* Endpoint enable */ +#define EP_CFG_ENABLE BIT(0) +/* + * Endpoint type. + * 1 - isochronous + * 2 - bulk + * 3 - interrupt + */ +#define EP_CFG_EPTYPE_MASK GENMASK(2, 1) +#define EP_CFG_EPTYPE(p) (((p) << 1) & EP_CFG_EPTYPE_MASK) +/* Stream support enable (only in SS mode). */ +#define EP_CFG_STREAM_EN BIT(3) +/* TDL check (only in SS mode for BULK EP). */ +#define EP_CFG_TDL_CHK BIT(4) +/* SID check (only in SS mode for BULK OUT EP). */ +#define EP_CFG_SID_CHK BIT(5) +/* DMA transfer endianness. */ +#define EP_CFG_EPENDIAN BIT(7) +/* Max burst size (used only in SS mode). */ +#define EP_CFG_MAXBURST_MASK GENMASK(11, 8) +#define EP_CFG_MAXBURST(p) (((p) << 8) & EP_CFG_MAXBURST_MASK) +/* ISO max burst. */ +#define EP_CFG_MULT_MASK GENMASK(15, 14) +#define EP_CFG_MULT(p) (((p) << 14) & EP_CFG_MULT) +/* ISO max burst. */ +#define EP_CFG_MAXPKTSIZE_MASK GENMASK(26, 16) +#define EP_CFG_MAXPKTSIZE(p) (((p) << 16) & EP_CFG_MAXPKTSIZE_MASK) +/* Max number of buffered packets. */ +#define EP_CFG_BUFFERING_MASK GENMASK(31, 27) +#define EP_CFG_BUFFERING(p) (((p) << 27) & EP_CFG_BUFFERING_MASK) + +/* EP_CMD - bitmasks */ +/* Endpoint reset. */ +#define EP_CMD_EPRST BIT(0) +/* Endpoint STALL set. */ +#define EP_CMD_SSTALL BIT(1) +/* Endpoint STALL clear. */ +#define EP_CMD_CSTALL BIT(2) +/* Send ERDY TP. */ +#define EP_CMD_ERDY BIT(3) +/* Request complete. */ +#define EP_CMD_REQ_CMPL BIT(5) +/* Transfer descriptor ready. */ +#define EP_CMD_DRDY BIT(6) +/* Data flush. */ +#define EP_CMD_DFLUSH BIT(7) +/* + * Transfer Descriptor Length write (used only for Bulk Stream capable + * endpoints in SS mode). + */ +#define EP_CMD_STDL BIT(8) +/* Transfer Descriptor Length (used only in SS mode for bulk endpoints). */ +#define EP_CMD_TDL_MASK GENMASK(15, 9) +#define EP_CMD_TDL(p) (((p) << 9) & EP_CMD_TDL_MASK) +/* ERDY Stream ID value (used in SS mode). */ +#define EP_CMD_ERDY_SID_MASK GENMASK(31, 16) +#define EP_CMD_ERDY_SID(p) (((p) << 16) & EP_CMD_SID_MASK) + +/* EP_STS - bitmasks */ +/* Setup transfer complete. */ +#define EP_STS_SETUP BIT(0) +/* Endpoint STALL status. */ +#define EP_STS_STALL(p) ((p) & BIT(1)) +/* Interrupt On Complete. */ +#define EP_STS_IOC BIT(2) +/* Interrupt on Short Packet. */ +#define EP_STS_ISP BIT(3) +/* Transfer descriptor missing. */ +#define EP_STS_DESCMIS BIT(4) +/* Stream Rejected (used only in SS mode) */ +#define EP_STS_STREAMR BIT(5) +/* EXIT from MOVE DATA State (used only for stream transfers in SS mode). */ +#define EP_STS_MD_EXIT BIT(6) +/* TRB error. */ +#define EP_STS_TRBERR BIT(7) +/* Not ready (used only in SS mode). */ +#define EP_STS_NRDY BIT(8) +/* DMA busy. */ +#define EP_STS_DBUSY(p) ((p) & BIT(9)) +/* Endpoint Buffer Empty */ +#define EP_STS_BUFFEMPTY(p) ((p) & BIT(10)) +/* Current Cycle Status */ +#define EP_STS_CCS(p) ((p) & BIT(11)) +/* Prime (used only in SS mode. */ +#define EP_STS_PRIME BIT(12) +/* Stream error (used only in SS mode). */ +#define EP_STS_SIDERR BIT(13) +/* OUT size mismatch. */ +#define EP_STS_OUTSMM BIT(14) +/* ISO transmission error. */ +#define EP_STS_ISOERR BIT(15) +/* Host Packet Pending (only for SS mode). */ +#define EP_STS_HOSTPP(p) ((p) & BIT(16)) +/* Stream Protocol State Machine State (only for Bulk stream endpoints). */ +#define EP_STS_SPSMST_MASK GENMASK(18, 17) +#define EP_STS_SPSMST_DISABLED(p) (((p) & EP_STS_SPSMST_MASK) >> 17) +#define EP_STS_SPSMST_IDLE(p) (((p) & EP_STS_SPSMST_MASK) >> 17) +#define EP_STS_SPSMST_START_STREAM(p) (((p) & EP_STS_SPSMST_MASK) >> 17) +#define EP_STS_SPSMST_MOVE_DATA(p) (((p) & EP_STS_SPSMST_MASK) >> 17) +/* Interrupt On Transfer complete. */ +#define EP_STS_IOT BIT(19) +/* OUT queue endpoint number. */ +#define EP_STS_OUTQ_NO_MASK GENMASK(27, 24) +#define EP_STS_OUTQ_NO(p) (((p) & EP_STS_OUTQ_NO_MASK) >> 24) +/* OUT queue valid flag. */ +#define EP_STS_OUTQ_VAL_MASK BIT(28) +#define EP_STS_OUTQ_VAL(p) ((p) & EP_STS_OUTQ_VAL_MASK) +/* SETUP WAIT. */ +#define EP_STS_STPWAIT BIT(31) + +/* EP_STS_SID - bitmasks */ +/* Stream ID (used only in SS mode). */ +#define EP_STS_SID_MASK GENMASK(15, 0) +#define EP_STS_SID(p) ((p) & EP_STS_SID_MASK) + +/* EP_STS_EN - bitmasks */ +/* SETUP interrupt enable. */ +#define EP_STS_EN_SETUPEN BIT(0) +/* OUT transfer missing descriptor enable. */ +#define EP_STS_EN_DESCMISEN BIT(4) +/* Stream Rejected enable. */ +#define EP_STS_EN_STREAMREN BIT(5) +/* Move Data Exit enable.*/ +#define EP_STS_EN_MD_EXITEN BIT(6) +/* TRB enable. */ +#define EP_STS_EN_TRBERREN BIT(7) +/* NRDY enable. */ +#define EP_STS_EN_NRDYEN BIT(8) +/* Prime enable. */ +#define EP_STS_EN_PRIMEEEN BIT(12) +/* Stream error enable. */ +#define EP_STS_EN_SIDERREN BIT(13) +/* OUT size mismatch enable. */ +#define EP_STS_EN_OUTSMMEN BIT(14) +/* ISO transmission error enable. */ +#define EP_STS_EN_ISOERREN BIT(15) +/* Interrupt on Transmission complete enable. */ +#define EP_STS_EN_IOTEN BIT(19) +/* Setup Wait interrupt enable. */ +#define EP_STS_EN_STPWAITEN BIT(31) + +/* DRBL- bitmasks */ +#define DB_VALUE_BY_INDEX(index) (1 << (index)) +#define DB_VALUE_EP0_OUT BIT(0) +#define DB_VALUE_EP0_IN BIT(16) + +/* EP_IEN - bitmasks */ +#define EP_IEN(index) (1 << (index)) +#define EP_IEN_EP_OUT0 BIT(0) +#define EP_IEN_EP_IN0 BIT(16) + +/* EP_ISTS - bitmasks */ +#define EP_ISTS(index) (1 << (index)) +#define EP_ISTS_EP_OUT0 BIT(0) +#define EP_ISTS_EP_IN0 BIT(16) + +/* EP_PWR- bitmasks */ +/*Power Shut Off capability enable*/ +#define PUSB_PWR_PSO_EN BIT(0) +/*Power Shut Off capability disable*/ +#define PUSB_PWR_PSO_DS BIT(1) +/* + * Enables turning-off Reference Clock. + * This bit is optional and implemented only when support for OTG is + * implemented (indicated by OTG_READY bit set to '1'). + */ +#define PUSB_PWR_STB_CLK_SWITCH_EN BIT(8) +/* + * Status bit indicating that operation required by STB_CLK_SWITCH_EN write + * is completed + */ +#define PUSB_PWR_STB_CLK_SWITCH_DONE BIT(9) +/* This bit informs if Fast Registers Access is enabled. */ +#define PUSB_PWR_FST_REG_ACCESS_STAT BIT(30) +/* Fast Registers Access Enable. */ +#define PUSB_PWR_FST_REG_ACCESS BIT(31) + +/* USB_CAP1- bitmasks */ +/* + * SFR Interface type + * These field reflects type of SFR interface implemented: + * 0x0 - OCP + * 0x1 - AHB, + * 0x2 - PLB + * 0x3 - AXI + * 0x4-0xF - reserved + */ +#define USB_CAP1_SFR_TYPE_MASK GENMASK(3, 0) +#define DEV_SFR_TYPE_OCP(p) (((p) & USB_CAP1_SFR_TYPE_MASK) == 0x0) +#define DEV_SFR_TYPE_AHB(p) (((p) & USB_CAP1_SFR_TYPE_MASK) == 0x1) +#define DEV_SFR_TYPE_PLB(p) (((p) & USB_CAP1_SFR_TYPE_MASK) == 0x2) +#define DEV_SFR_TYPE_AXI(p) (((p) & USB_CAP1_SFR_TYPE_MASK) == 0x3) +/* + * SFR Interface width + * These field reflects width of SFR interface implemented: + * 0x0 - 8 bit interface, + * 0x1 - 16 bit interface, + * 0x2 - 32 bit interface + * 0x3 - 64 bit interface + * 0x4-0xF - reserved + */ +#define USB_CAP1_SFR_WIDTH_MASK GENMASK(7, 4) +#define DEV_SFR_WIDTH_8(p) (((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x0 << 4)) +#define DEV_SFR_WIDTH_16(p) (((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x1 << 4)) +#define DEV_SFR_WIDTH_32(p) (((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x2 << 4)) +#define DEV_SFR_WIDTH_64(p) (((p) & USB_CAP1_SFR_WIDTH_MASK) == (0x3 << 4)) +/* + * DMA Interface type + * These field reflects type of DMA interface implemented: + * 0x0 - OCP + * 0x1 - AHB, + * 0x2 - PLB + * 0x3 - AXI + * 0x4-0xF - reserved + */ +#define USB_CAP1_DMA_TYPE_MASK GENMASK(11, 8) +#define DEV_DMA_TYPE_OCP(p) (((p) & USB_CAP1_DMA_TYPE_MASK) == (0x0 << 8)) +#define DEV_DMA_TYPE_AHB(p) (((p) & USB_CAP1_DMA_TYPE_MASK) == (0x1 << 8)) +#define DEV_DMA_TYPE_PLB(p) (((p) & USB_CAP1_DMA_TYPE_MASK) == (0x2 << 8)) +#define DEV_DMA_TYPE_AXI(p) (((p) & USB_CAP1_DMA_TYPE_MASK) == (0x3 << 8)) +/* + * DMA Interface width + * These field reflects width of DMA interface implemented: + * 0x0 - reserved, + * 0x1 - reserved, + * 0x2 - 32 bit interface + * 0x3 - 64 bit interface + * 0x4-0xF - reserved + */ +#define USB_CAP1_DMA_WIDTH_MASK GENMASK(15, 12) +#define DEV_DMA_WIDTH_32(p) (((p) & USB_CAP1_DMA_WIDTH_MASK) == (0x2 << 12)) +#define DEV_DMA_WIDTH_64(p) (((p) & USB_CAP1_DMA_WIDTH_MASK) == (0x3 << 12)) +/* + * USB3 PHY Interface type + * These field reflects type of USB3 PHY interface implemented: + * 0x0 - USB PIPE, + * 0x1 - RMMI, + * 0x2-0xF - reserved + */ +#define USB_CAP1_U3PHY_TYPE_MASK GENMASK(19, 16) +#define DEV_U3PHY_PIPE(p) (((p) & USB_CAP1_U3PHY_TYPE_MASK) == (0x0 << 16)) +#define DEV_U3PHY_RMMI(p) (((p) & USB_CAP1_U3PHY_TYPE_MASK) == (0x1 << 16)) +/* + * USB3 PHY Interface width + * These field reflects width of USB3 PHY interface implemented: + * 0x0 - 8 bit PIPE interface, + * 0x1 - 16 bit PIPE interface, + * 0x2 - 32 bit PIPE interface, + * 0x3 - 64 bit PIPE interface + * 0x4-0xF - reserved + * Note: When SSIC interface is implemented this field shows the width of + * internal PIPE interface. The RMMI interface is always 20bit wide. + */ +#define USB_CAP1_U3PHY_WIDTH_MASK GENMASK(23, 20) +#define DEV_U3PHY_WIDTH_8(p) \ + (((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x0 << 20)) +#define DEV_U3PHY_WIDTH_16(p) \ + (((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x1 << 16)) +#define DEV_U3PHY_WIDTH_32(p) \ + (((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x2 << 20)) +#define DEV_U3PHY_WIDTH_64(p) \ + (((p) & USB_CAP1_U3PHY_WIDTH_MASK) == (0x3 << 16)) + +/* + * USB2 PHY Interface enable + * These field informs if USB2 PHY interface is implemented: + * 0x0 - interface NOT implemented, + * 0x1 - interface implemented + */ +#define USB_CAP1_U2PHY_EN(p) ((p) & BIT(24)) +/* + * USB2 PHY Interface type + * These field reflects type of USB2 PHY interface implemented: + * 0x0 - UTMI, + * 0x1 - ULPI + */ +#define DEV_U2PHY_ULPI(p) ((p) & BIT(25)) +/* + * USB2 PHY Interface width + * These field reflects width of USB2 PHY interface implemented: + * 0x0 - 8 bit interface, + * 0x1 - 16 bit interface, + * Note: The ULPI interface is always 8bit wide. + */ +#define DEV_U2PHY_WIDTH_16(p) ((p) & BIT(26)) +/* + * OTG Ready + * 0x0 - pure device mode + * 0x1 - some features and ports for CDNS USB OTG controller are implemented. + */ +#define USB_CAP1_OTG_READY(p) ((p) & BIT(27)) + +/* USB_CAP2- bitmasks */ +/* + * The actual size of the connected On-chip RAM memory in kB: + * - 0 means 256 kB (max supported mem size) + * - value other than 0 reflects the mem size in kB + */ +#define USB_CAP2_ACTUAL_MEM_SIZE(p) ((p) & GENMASK(7, 0)) +/* + * Max supported mem size + * These field reflects width of on-chip RAM address bus width, + * which determines max supported mem size: + * 0x0-0x7 - reserved, + * 0x8 - support for 4kB mem, + * 0x9 - support for 8kB mem, + * 0xA - support for 16kB mem, + * 0xB - support for 32kB mem, + * 0xC - support for 64kB mem, + * 0xD - support for 128kB mem, + * 0xE - support for 256kB mem, + * 0xF - reserved + */ +#define USB_CAP2_MAX_MEM_SIZE(p) ((p) & GENMASK(11, 8)) + +/* USB_CAP3- bitmasks */ +#define EP_IS_IMPLEMENTED(reg, index) ((reg) & (1 << (index))) + +/* USB_CAP4- bitmasks */ +#define EP_SUPPORT_ISO(reg, index) ((reg) & (1 << (index))) + +/* USB_CAP5- bitmasks */ +#define EP_SUPPORT_STREAM(reg, index) ((reg) & (1 << (index))) + +/* USB_CAP6- bitmasks */ +/* The USBSS-DEV Controller Internal build number. */ +#define GET_DEV_VERSION__INTERNAL_NUMBER(p) ((p) & GENMASK(7, 0)) +/* The USBSS-DEV Controller version number. */ +#define GET_DEV_VERSION(p) ((p) & GENMASK(31, 8)) + +/* DBG_LINK1- bitmasks */ +/* + * LFPS_MIN_DET_U1_EXIT value This parameter configures the minimum + * time required for decoding the received LFPS as an LFPS.U1_Exit. + */ +#define DBG_LINK1_LFPS_MIN_DET_U1_EXIT(p) ((p) & GENMASK(7, 0)) +/* + * LFPS_MIN_GEN_U1_EXIT value This parameter configures the minimum time for + * phytxelecidle deassertion when LFPS.U1_Exit + */ +#define DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(p) (((p) << 8) & GENMASK(15, 8)) +/* + * RXDET_BREAK_DIS value This parameter configures terminating the Far-end + * Receiver termination detection sequence: + * 0: it is possible that USBSS_DEV will terminate Farend receiver + * termination detection sequence + * 1: USBSS_DEV will not terminate Far-end receiver termination + * detection sequence + */ +#define DBG_LINK1_RXDET_BREAK_DIS BIT(16) +/* LFPS_GEN_PING value This parameter configures the LFPS.Ping generation */ +#define DBG_LINK1_LFPS_GEN_PING(p) (((p) << 17) & GENMASK(21, 17)) +/* + * Set the LFPS_MIN_DET_U1_EXIT value Writing '1' to this bit writes the + * LFPS_MIN_DET_U1_EXIT field value to the device. This bit is automatically + * cleared. Writing '0' has no effect + */ +#define DBG_LINK1_LFPS_MIN_DET_U1_EXIT_SET BIT(24) +/* + * Set the LFPS_MIN_GEN_U1_EXIT value. Writing '1' to this bit writes the + * LFPS_MIN_GEN_U1_EXIT field value to the device. This bit is automatically + * cleared. Writing '0' has no effect + */ +#define DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET BIT(25) +/* + * Set the RXDET_BREAK_DIS value Writing '1' to this bit writes + * the RXDET_BREAK_DIS field value to the device. This bit is automatically + * cleared. Writing '0' has no effect + */ +#define DBG_LINK1_RXDET_BREAK_DIS_SET BIT(26) +/* + * Set the LFPS_GEN_PING_SET value Writing '1' to this bit writes + * the LFPS_GEN_PING field value to the device. This bit is automatically + * cleared. Writing '0' has no effect." + */ +#define DBG_LINK1_LFPS_GEN_PING_SET BIT(27) + +#define gadget_to_cdns3_device(g) (container_of(g, struct cdns3_device, gadget)) + +#define ep_to_cdns3_ep(ep) (container_of(ep, struct cdns3_endpoint, endpoint)) + +/*-------------------------------------------------------------------------*/ +/* + * USBSS-DEV DMA interface . + */ +#define TRBS_PER_SEGMENT 32 + +struct cdns3_trb { + __le32 buffer; + __le32 length; + __le32 control; +}; + +#define TRB_SIZE (sizeof(struct cdns3_trb)) + +/* TRB bit mask */ +#define TRB_TYPE_BITMASK GENMASK(15, 10) +#define TRB_TYPE(p) ((p) << 10) +#define TRB_FIELD_TO_TYPE(p) (((p) & TRB_TYPE_BITMASK) >> 10) + +/* TRB type IDs */ +/* bulk, interrupt, isoc , and control data stage */ +#define TRB_NORMAL 1 +/* TRB for linking ring segments */ +#define TRB_LINK 6 + +/* Cycle bit - indicates TRB ownership by driver or hw*/ +#define TRB_CYCLE BIT(0) +/* + * When set to '1', the device will toggle its interpretation of the Cycle bit + */ +#define TRB_TOGGLE BIT(1) + +/* Interrupt on short packet*/ +#define TRB_ISP BIT(2) +/*Setting this bit enables FIFO DMA operation mode*/ +#define TRB_FIFO_MODE BIT(3) +/* Set PCIe no snoop attribute */ +#define TRB_CHAIN BIT(4) +/* Interrupt on completion */ +#define TRB_IOC BIT(5) + +/* stream ID bitmasks. */ +#define TRB_STREAM_ID(p) ((p) & GENMASK(31, 16)) + +/* transfer_len bitmasks. */ +#define TRB_LEN(p) ((p) & GENMASK(16, 0)) + +/* transfer_len bitmasks - bits 31:24 */ +#define TRB_BURST_LEN(p) ((p) & GENMASK(31, 24)) + +/* Data buffer pointer bitmasks*/ +#define TRB_BUFFER(p) ((p) & GENMASK(31, 0)) + +/*-------------------------------------------------------------------------*/ +/* Driver numeric constants */ + +#define DEVICE_ADDRESS_MAX 127 + +/* Endpoint init values */ +#define ENDPOINT_MAX_PACKET_LIMIT 1024 +#define ENDPOINT_MAX_STREAMS 15 + +#define ENDPOINT0_MAX_PACKET_LIMIT 512 + +/* All endpoints except EP0 */ +#define USB_SS_ENDPOINTS_MAX_COUNT 30 + +#define ADDR_MODULO_8 8 + +#define ENDPOINT_ZLP_BUF_SIZE 1024 + +/*-------------------------------------------------------------------------*/ +/* 18KB is the total size, and 2KB is used for EP0 and configuration */ +#define CDNS3_ONCHIP_BUF_SIZE 16 /* KB */ +#define CDNS3_EP_BUF_SIZE 2 /* KB */ +#define CDNS3_UNALIGNED_BUF_SIZE 16384 /* Bytes */ +/*-------------------------------------------------------------------------*/ +/* Used structs */ + +struct cdns3_device; + +struct cdns3_endpoint { + struct usb_ep endpoint; + struct list_head request_list; + struct list_head ep_match_pending_list; + + struct cdns3_trb *trb_pool; + dma_addr_t trb_pool_dma; + + struct cdns3_device *cdns3_dev; + char name[20]; + +#define EP_ENABLED BIT(0) +#define EP_STALL BIT(1) +#define EP_WEDGE BIT(2) +#define EP_TRANSFER_STARTED BIT(3) +#define EP_UPDATE_EP_TRBADDR BIT(4) +#define EP_PENDING_REQUEST BIT(5) +#define EP_USED BIT(5) + u32 flags; + + void *aligned_buff; + dma_addr_t aligned_dma_addr; + u8 dir; + u8 num; + u8 type; + + int free_trbs; + u8 pcs; + u8 ccs; + int enqueue; + int dequeue; +}; + +struct cdns3_request { + struct usb_request request; + struct cdns3_trb *trb; + int start_trb; + int end_trb; + int on_ring:1; +}; + +#define to_cdns3_request(r) (container_of(r, struct cdns3_request, request)) + +struct cdns3_device { + struct device dev; + struct cdns3_usb_regs __iomem *regs; + + struct usb_gadget gadget; + struct usb_gadget_driver *gadget_driver; + + struct usb_ctrlrequest *setup; + dma_addr_t setup_dma; + dma_addr_t trb_ep0_dma; + struct cdns3_trb *trb_ep0; + void *zlp_buf; + + struct cdns3_endpoint *eps[USB_SS_ENDPOINTS_MAX_COUNT]; + int ep_nums; + /* + * field used for improving performance. It holds the last + * selected endpoint number + */ + u32 selected_ep; + struct usb_request *ep0_request; + int ep0_data_dir; + int hw_configured_flag; + int wake_up_flag; + u16 isoch_delay; + /* generic spin-lock for drivers */ + spinlock_t lock; + + unsigned is_connected:1; + unsigned in_standby_mode:1; + unsigned status_completion_no_call:1; + + u32 usb_ien; + u32 ep_ien; + int setup_pending; + struct device *sysdev; + /* The device mode is enabled */ + int start_gadget; + struct list_head ep_match_list; + /* KB */ + int onchip_mem_allocated_size; + /* Memory is allocated for OUT */ + int out_mem_is_allocated:1; + struct work_struct pending_status_wq; + struct usb_request *pending_status_request; +}; + +#endif /* __LINUX_CDNS3_GADGET */ From patchwork Sat Nov 3 17:51:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 319F914BD for ; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds core.c and core.h file that implements initialization of platform driver and adds function responsible for selecting, switching and running appropriate Device/Host mode. Patch also adds gadget.c, host.c, gadget-export.h, host-export.h. These files contains templates functions used during initialization. The implementation will be added in next patches. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/Kconfig | 20 ++ drivers/usb/cdns3/Makefile | 4 + drivers/usb/cdns3/core.c | 373 ++++++++++++++++++++++++++++++ drivers/usb/cdns3/core.h | 88 +++++++ drivers/usb/cdns3/gadget-export.h | 27 +++ drivers/usb/cdns3/gadget.c | 36 +++ drivers/usb/cdns3/host-export.h | 30 +++ drivers/usb/cdns3/host.c | 28 +++ 8 files changed, 606 insertions(+) create mode 100644 drivers/usb/cdns3/core.c create mode 100644 drivers/usb/cdns3/core.h create mode 100644 drivers/usb/cdns3/gadget-export.h create mode 100644 drivers/usb/cdns3/gadget.c create mode 100644 drivers/usb/cdns3/host-export.h create mode 100644 drivers/usb/cdns3/host.c diff --git a/drivers/usb/cdns3/Kconfig b/drivers/usb/cdns3/Kconfig index 888458372adb..5f88a4932e58 100644 --- a/drivers/usb/cdns3/Kconfig +++ b/drivers/usb/cdns3/Kconfig @@ -10,6 +10,26 @@ config USB_CDNS3 if USB_CDNS3 +config USB_CDNS3_GADGET + bool "Cadence USB3 device controller" + depends on USB_GADGET + help + Say Y here to enable device controller functionality of the + cadence USBSS-DEV driver. + + This controller support FF, HS and SS mode. It doeasn't support + LS and SSP mode + +config USB_CDNS3_HOST + bool "Cadence USB3 host controller" + depends on USB_XHCI_HCD + help + Say Y here to enable host controller functionality of the + cadence driver. + + Host controller is compliance with XHCI so it will use + standard XHCI driver. + config USB_CDNS3_PCI_WRAP tristate "PCIe-based Platforms" depends on USB_PCI && ACPI diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile index dcdd62003c6a..083676c7748f 100644 --- a/drivers/usb/cdns3/Makefile +++ b/drivers/usb/cdns3/Makefile @@ -1,3 +1,7 @@ +obj-$(CONFIG_USB_CDNS3) += cdns3.o obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o +cdns3-y := core.o +cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o +cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c new file mode 100644 index 000000000000..727136235957 --- /dev/null +++ b/drivers/usb/cdns3/core.c @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver. + * + * Copyright (C) 2018 Cadence. + * + * Author: Peter Chen + * Pawel Laszczak + */ + +#include +#include +#include +#include +#include + +#include "gadget.h" +#include "core.h" +#include "host-export.h" +#include "gadget-export.h" + +static inline struct cdns3_role_driver *cdns3_role(struct cdns3 *cdns) +{ + WARN_ON(cdns->role >= CDNS3_ROLE_END || !cdns->roles[cdns->role]); + return cdns->roles[cdns->role]; +} + +static inline int cdns3_role_start(struct cdns3 *cdns, enum cdns3_roles role) +{ + int ret; + + if (role >= CDNS3_ROLE_END) + return 0; + + if (!cdns->roles[role]) + return -ENXIO; + + mutex_lock(&cdns->mutex); + cdns->role = role; + ret = cdns->roles[role]->start(cdns); + mutex_unlock(&cdns->mutex); + return ret; +} + +static inline void cdns3_role_stop(struct cdns3 *cdns) +{ + enum cdns3_roles role = cdns->role; + + if (role == CDNS3_ROLE_END) + return; + + mutex_lock(&cdns->mutex); + cdns->roles[role]->stop(cdns); + cdns->role = CDNS3_ROLE_END; + mutex_unlock(&cdns->mutex); +} + +static void cdns3_set_role(struct cdns3 *cdns, enum cdns3_roles role) +{ + if (role == CDNS3_ROLE_END) + return; + + if (role == CDNS3_ROLE_HOST) { + //TODO: set host role + } else { /* gadget mode */ + //TODO: set device role + } +} + +static enum cdns3_roles cdns3_get_role(struct cdns3 *cdns) +{ + if (cdns->roles[CDNS3_ROLE_HOST] && cdns->roles[CDNS3_ROLE_GADGET]) { + //TODO: implements selecting device/host mode + return CDNS3_ROLE_HOST; + } + return cdns->roles[CDNS3_ROLE_HOST] + ? CDNS3_ROLE_HOST + : CDNS3_ROLE_GADGET; +} + +/** + * cdns3_core_init_role - initialize role of operation + * @cdns: Pointer to cdns3 structure + * + * Returns 0 on success otherwise negative errno + */ +static int cdns3_core_init_role(struct cdns3 *cdns) +{ + struct device *dev = cdns->dev; + enum usb_dr_mode dr_mode; + + dr_mode = usb_get_dr_mode(dev); + cdns->role = CDNS3_ROLE_END; + + if (dr_mode == USB_DR_MODE_UNKNOWN) { + if (IS_ENABLED(CONFIG_USB_CDNS3_HOST) && + IS_ENABLED(CONFIG_USB_CDNS3_GADGET)) + dr_mode = USB_DR_MODE_OTG; + else if (IS_ENABLED(CONFIG_USB_CDNS3_HOST)) + dr_mode = USB_DR_MODE_HOST; + else if (IS_ENABLED(CONFIG_USB_CDNS3_DEVICE)) + dr_mode = USB_DR_MODE_PERIPHERAL; + } + + if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) { + if (cdns3_host_init(cdns)) + dev_info(dev, "doesn't support host\n"); + } + + if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) { + if (cdns3_gadget_init(cdns)) + dev_info(dev, "doesn't support gadget\n"); + } + + if (!cdns->roles[CDNS3_ROLE_HOST] && !cdns->roles[CDNS3_ROLE_GADGET]) { + dev_err(dev, "no supported roles\n"); + return -ENODEV; + } + + cdns->dr_mode = dr_mode; + return 0; +} + +/** + * cdns3_irq - interrupt handler for cdns3 core device + * + * @irq: irq number for cdns3 core device + * @data: structure of cdns3 + * + * Returns IRQ_HANDLED or IRQ_NONE + */ +static irqreturn_t cdns3_irq(int irq, void *data) +{ + struct cdns3 *cdns = data; + irqreturn_t ret = IRQ_NONE; + + if (cdns->in_lpm) { + disable_irq_nosync(cdns->irq); + cdns->wakeup_int = true; + pm_runtime_get(cdns->dev); + return IRQ_HANDLED; + } + + /* Handle device/host interrupt */ + if (cdns->role != CDNS3_ROLE_END) + ret = cdns3_role(cdns)->irq(cdns); + + return ret; +} + +static void cdns3_remove_roles(struct cdns3 *cdns) +{ + cdns3_gadget_remove(cdns); + cdns3_host_remove(cdns); +} + +static int cdns3_do_role_switch(struct cdns3 *cdns, enum cdns3_roles role) +{ + enum cdns3_roles current_role; + int ret = 0; + + if (cdns->role == role) + return 0; + + pm_runtime_get_sync(cdns->dev); + current_role = cdns->role; + cdns3_role_stop(cdns); + + if (role == CDNS3_ROLE_END) { + pm_runtime_put_sync(cdns->dev); + return 0; + } + + dev_dbg(cdns->dev, "Switching role"); + + cdns3_set_role(cdns, role); + ret = cdns3_role_start(cdns, role); + if (ret) { + /* Back to current role */ + dev_err(cdns->dev, "set %d has failed, back to %d\n", + role, current_role); + cdns3_set_role(cdns, current_role); + ret = cdns3_role_start(cdns, current_role); + } + + pm_runtime_put_sync(cdns->dev); + return ret; +} + +/** + * cdns3_role_switch - work queue handler for role switch + * + * @work: work queue item structure + * + * Handles below events: + * - Role switch for dual-role devices + * - CDNS3_ROLE_GADGET <--> CDNS3_ROLE_END for peripheral-only devices + */ +static void cdns3_role_switch(struct work_struct *work) +{ + struct cdns3 *cdns; + bool device, host; + + cdns = container_of(work, struct cdns3, role_switch_wq); + + //TODO: implements this functions. + //host = cdns3_is_host(cdns); + //device = cdns3_is_device(cdns); + host = 1; + device = 0; + + if (host) { + if (cdns->roles[CDNS3_ROLE_HOST]) + cdns3_do_role_switch(cdns, CDNS3_ROLE_HOST); + return; + } + + if (device) + cdns3_do_role_switch(cdns, CDNS3_ROLE_GADGET); + else + cdns3_do_role_switch(cdns, CDNS3_ROLE_END); +} + +/** + * cdns3_probe - probe for cdns3 core device + * @pdev: Pointer to cdns3 core platform device + * + * Returns 0 on success otherwise negative errno + */ +static int cdns3_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct resource *res; + struct cdns3 *cdns; + void __iomem *regs; + int ret; + + cdns = devm_kzalloc(dev, sizeof(*cdns), GFP_KERNEL); + if (!cdns) + return -ENOMEM; + + cdns->dev = dev; + + platform_set_drvdata(pdev, cdns); + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(dev, "missing IRQ\n"); + return -ENODEV; + } + cdns->irq = res->start; + + /* + * Request memory region + * region-0: xHCI + * region-1: Peripheral + * region-2: OTG registers + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + regs = devm_ioremap_resource(dev, res); + + if (IS_ERR(regs)) + return PTR_ERR(regs); + cdns->xhci_regs = regs; + cdns->xhci_res = res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + regs = devm_ioremap_resource(dev, res); + if (IS_ERR(regs)) + return PTR_ERR(regs); + cdns->dev_regs = regs; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + regs = devm_ioremap_resource(dev, res); + if (IS_ERR(regs)) + return PTR_ERR(regs); + cdns->otg_regs = regs; + + mutex_init(&cdns->mutex); + + ret = cdns3_core_init_role(cdns); + if (ret) + goto err2; + + INIT_WORK(&cdns->role_switch_wq, cdns3_role_switch); + if (ret) + goto err3; + + if (ret) + goto err3; + + cdns->role = cdns3_get_role(cdns); + cdns3_set_role(cdns, cdns->role); + ret = cdns3_role_start(cdns, cdns->role); + if (ret) { + dev_err(dev, "can't start %s role\n", cdns3_role(cdns)->name); + goto err3; + } + + ret = devm_request_irq(dev, cdns->irq, cdns3_irq, IRQF_SHARED, + dev_name(dev), cdns); + + if (ret) + goto err4; + + device_set_wakeup_capable(dev, true); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + /* + * The controller needs less time between bus and controller suspend, + * and we also needs a small delay to avoid frequently entering low + * power mode. + */ + pm_runtime_set_autosuspend_delay(dev, 20); + pm_runtime_mark_last_busy(dev); + pm_runtime_use_autosuspend(dev); + dev_dbg(dev, "Cadence USB3 core: probe succeed\n"); + + return 0; + +err4: + cdns3_role_stop(cdns); +err3: + cdns3_remove_roles(cdns); +err2: + return ret; +} + +/** + * cdns3_remove - unbind drd driver and clean up + * @pdev: Pointer to Linux platform device + * + * Returns 0 on success otherwise negative errno + */ +static int cdns3_remove(struct platform_device *pdev) +{ + struct cdns3 *cdns = platform_get_drvdata(pdev); + + pm_runtime_get_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); + cdns3_remove_roles(cdns); + usb_phy_shutdown(cdns->usbphy); + + return 0; +} + +static struct platform_driver cdns3_driver = { + .probe = cdns3_probe, + .remove = cdns3_remove, + .driver = { + .name = "cdns-usb3", + }, +}; + +static int __init cdns3_driver_platform_register(void) +{ + cdns3_host_driver_init(); + return platform_driver_register(&cdns3_driver); +} +module_init(cdns3_driver_platform_register); + +static void __exit cdns3_driver_platform_unregister(void) +{ + platform_driver_unregister(&cdns3_driver); +} +module_exit(cdns3_driver_platform_unregister); + +MODULE_ALIAS("platform:cdns3"); +MODULE_AUTHOR("Pawel Laszczak "); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Cadence USB3 DRD Controller Driver"); diff --git a/drivers/usb/cdns3/core.h b/drivers/usb/cdns3/core.h new file mode 100644 index 000000000000..e7159c474308 --- /dev/null +++ b/drivers/usb/cdns3/core.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Cadence USBSS DRD Driver. + * + * Copyright (C) 2017 NXP + * Copyright (C) 2018 Cadence. + * + * Authors: Peter Chen + * Pawel Laszczak + */ +#include + +#ifndef __LINUX_CDNS3_CORE_H +#define __LINUX_CDNS3_CORE_H + +struct cdns3; +enum cdns3_roles { + CDNS3_ROLE_HOST = 0, + CDNS3_ROLE_GADGET, + CDNS3_ROLE_END, + CDNS3_ROLE_OTG, +}; + +/** + * struct cdns3_role_driver - host/gadget role driver + * @start: start this role + * @stop: stop this role + * @suspend: suspend callback for this role + * @resume: resume callback for this role + * @irq: irq handler for this role + * @name: role name string (host/gadget) + */ +struct cdns3_role_driver { + int (*start)(struct cdns3 *cdns); + void (*stop)(struct cdns3 *cdns); + int (*suspend)(struct cdns3 *cdns, bool do_wakeup); + int (*resume)(struct cdns3 *cdns, bool hibernated); + irqreturn_t (*irq)(struct cdns3 *cdns); + const char *name; +}; + +#define CDNS3_NUM_OF_CLKS 5 +/** + * struct cdns3 - Representation of Cadence USB3 DRD controller. + * @dev: pointer to Cadence device struct + * @xhci_regs: pointer to base of xhci registers + * @xhci_res: the resource for xhci + * @dev_regs: pointer to base of dev registers + * @otg_regs: pointer to base of otg registers + * @irq: irq number for controller + * @roles: array of supported roles for this controller + * @role: current role + * @host_dev: the child host device pointer for cdns3 core + * @gadget_dev: the child gadget device pointer for cdns3 core + * @usbphy: usbphy for this controller + * @role_switch_wq: work queue item for role switch + * @in_lpm: the controller in low power mode + * @wakeup_int: the wakeup interrupt + * @mutex: the mutex for concurrent code at driver + * @dr_mode: requested mode of operation + * @current_dr_role: current role of operation when in dual-role mode + * @desired_dr_role: desired role of operation when in dual-role mode + * @root: debugfs root folder pointer + */ +struct cdns3 { + struct device *dev; + void __iomem *xhci_regs; + struct resource *xhci_res; + struct cdns3_usb_regs __iomem *dev_regs; + struct cdns3_otg_regs *otg_regs; + int irq; + struct cdns3_role_driver *roles[CDNS3_ROLE_END]; + enum cdns3_roles role; + struct device *host_dev; + struct device *gadget_dev; + struct usb_phy *usbphy; + struct work_struct role_switch_wq; + int in_lpm:1; + int wakeup_int:1; + /* mutext used in workqueue*/ + struct mutex mutex; + enum usb_dr_mode dr_mode; + enum usb_dr_mode current_dr_mode; + enum usb_dr_mode desired_role; + struct dentry *root; +}; + +#endif /* __LINUX_CDNS3_CORE_H */ diff --git a/drivers/usb/cdns3/gadget-export.h b/drivers/usb/cdns3/gadget-export.h new file mode 100644 index 000000000000..257e5e0eef31 --- /dev/null +++ b/drivers/usb/cdns3/gadget-export.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Cadence USBSS DRD Driver -Gadget Export APIs + * + * Copyright (C) 2017 NXP + * + * Authors: Peter Chen + */ +#ifndef __LINUX_CDNS3_GADGET_EXPORT +#define __LINUX_CDNS3_GADGET_EXPORT + +#ifdef CONFIG_USB_CDNS3_GADGET + +int cdns3_gadget_init(struct cdns3 *cdns); +void cdns3_gadget_remove(struct cdns3 *cdns); +#else + +static inline int cdns3_gadget_init(struct cdns3 *cdns) +{ + return -ENXIO; +} + +static inline void cdns3_gadget_remove(struct cdns3 *cdns) { } + +#endif + +#endif /* __LINUX_CDNS3_GADGET_EXPORT */ diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c new file mode 100644 index 000000000000..41ce696719d7 --- /dev/null +++ b/drivers/usb/cdns3/gadget.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver - gadget side. + * + * Copyright (C) 2018 Cadence Design Systems. + * Copyright (C) 2017 NXP + * + * Authors: Pawel Jez , + * Pawel Laszczak + * Peter Chen + */ + +#include "core.h" + +/** + * cdns3_gadget_remove: parent must call this to remove UDC + * + * cdns: cdns3 instance + */ +void cdns3_gadget_remove(struct cdns3 *cdns) +{ + //TODO: implements this function +} + +/** + * cdns3_gadget_init - initialize device structure + * + * cdns: cdns3 instance + * + * This function initializes the gadget. + */ +int cdns3_gadget_init(struct cdns3 *cdns) +{ + //TODO: implements this function + return 0; +} diff --git a/drivers/usb/cdns3/host-export.h b/drivers/usb/cdns3/host-export.h new file mode 100644 index 000000000000..f8f3b230b472 --- /dev/null +++ b/drivers/usb/cdns3/host-export.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Cadence USBSS DRD Driver -Host Export APIs + * + * Copyright (C) 2017 NXP + * + * Authors: Peter Chen + */ +#ifndef __LINUX_CDNS3_HOST_EXPORT +#define __LINUX_CDNS3_HOST_EXPORT + +#ifdef CONFIG_USB_CDNS3_HOST + +int cdns3_host_init(struct cdns3 *cdns); +void cdns3_host_remove(struct cdns3 *cdns); +void cdns3_host_driver_init(void); + +#else + +static inline int cdns3_host_init(struct cdns3 *cdns) +{ + return -ENXIO; +} + +static inline void cdns3_host_remove(struct cdns3 *cdns) { } +static inline void cdns3_host_driver_init(void) {} + +#endif /* CONFIG_USB_CDNS3_HOST */ + +#endif /* __LINUX_CDNS3_HOST_EXPORT */ diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c new file mode 100644 index 000000000000..37300985e2d6 --- /dev/null +++ b/drivers/usb/cdns3/host.c @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver - host side + * + * Copyright (C) 2018 Cadence Design Systems. + * Copyright (C) 2018 NXP + * + * Authors: Peter Chen + * Pawel Laszczak + */ + +#include "core.h" + +int cdns3_host_init(struct cdns3 *cdns) +{ + //TODO: implements this function + return 0; +} + +void cdns3_host_remove(struct cdns3 *cdns) +{ + //TODO: implements this function +} + +void __init cdns3_host_driver_init(void) +{ + //TODO: implements this function +} From patchwork Sat Nov 3 17:51:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds supports for detecting Host/Device mode. Controller has additional OTG register that allow implement even whole OTG functionality. At this moment patch adds support only for detecting the appropriate mode based on strap pins and ID pin. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/Makefile | 2 +- drivers/usb/cdns3/core.c | 22 ++-- drivers/usb/cdns3/drd.c | 219 +++++++++++++++++++++++++++++++++++++ drivers/usb/cdns3/drd.h | 122 +++++++++++++++++++++ 4 files changed, 356 insertions(+), 9 deletions(-) create mode 100644 drivers/usb/cdns3/drd.c create mode 100644 drivers/usb/cdns3/drd.h diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile index 083676c7748f..d4ccfb49d844 100644 --- a/drivers/usb/cdns3/Makefile +++ b/drivers/usb/cdns3/Makefile @@ -1,7 +1,7 @@ obj-$(CONFIG_USB_CDNS3) += cdns3.o obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o -cdns3-y := core.o +cdns3-y := core.o drd.o cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index 727136235957..20ae9e76940e 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -18,6 +18,7 @@ #include "core.h" #include "host-export.h" #include "gadget-export.h" +#include "drd.h" static inline struct cdns3_role_driver *cdns3_role(struct cdns3 *cdns) { @@ -70,8 +71,10 @@ static void cdns3_set_role(struct cdns3 *cdns, enum cdns3_roles role) static enum cdns3_roles cdns3_get_role(struct cdns3 *cdns) { if (cdns->roles[CDNS3_ROLE_HOST] && cdns->roles[CDNS3_ROLE_GADGET]) { - //TODO: implements selecting device/host mode - return CDNS3_ROLE_HOST; + if (cdns3_is_host(cdns)) + return CDNS3_ROLE_HOST; + if (cdns3_is_device(cdns)) + return CDNS3_ROLE_GADGET; } return cdns->roles[CDNS3_ROLE_HOST] ? CDNS3_ROLE_HOST @@ -141,6 +144,12 @@ static irqreturn_t cdns3_irq(int irq, void *data) return IRQ_HANDLED; } + if (cdns->dr_mode == USB_DR_MODE_OTG) { + ret = cdns3_drd_irq(cdns); + if (ret == IRQ_HANDLED) + return ret; + } + /* Handle device/host interrupt */ if (cdns->role != CDNS3_ROLE_END) ret = cdns3_role(cdns)->irq(cdns); @@ -202,12 +211,8 @@ static void cdns3_role_switch(struct work_struct *work) bool device, host; cdns = container_of(work, struct cdns3, role_switch_wq); - - //TODO: implements this functions. - //host = cdns3_is_host(cdns); - //device = cdns3_is_device(cdns); - host = 1; - device = 0; + host = cdns3_is_host(cdns); + device = cdns3_is_device(cdns); if (host) { if (cdns->roles[CDNS3_ROLE_HOST]) @@ -286,6 +291,7 @@ static int cdns3_probe(struct platform_device *pdev) if (ret) goto err3; + ret = cdns3_drd_probe(cdns); if (ret) goto err3; diff --git a/drivers/usb/cdns3/drd.c b/drivers/usb/cdns3/drd.c new file mode 100644 index 000000000000..5d988432edb8 --- /dev/null +++ b/drivers/usb/cdns3/drd.c @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver. + * + * Copyright (C) 2018 Cadence. + * + * Author: Pawel Laszczak +#include +#include +#include + +#include "gadget.h" +#include "drd.h" + +/** + * cdns3_set_mode - change mode of OTG Core + * @cdns: pointer to context structure + * @mode: selected mode from cdns_role + */ +void cdns3_set_mode(struct cdns3 *cdns, u32 mode) +{ + u32 reg; + + switch (mode) { + case CDNS3_ROLE_GADGET: + dev_info(cdns->dev, "Set controller to Gadget mode\n"); + writel(OTGCMD_DEV_BUS_REQ | OTGCMD_OTG_DIS, + &cdns->otg_regs->cmd); + break; + case CDNS3_ROLE_HOST: + dev_info(cdns->dev, "Set controller to Host mode\n"); + writel(OTGCMD_HOST_BUS_REQ | OTGCMD_OTG_DIS, + &cdns->otg_regs->cmd); + break; + case CDNS3_ROLE_OTG: + dev_info(cdns->dev, "Set controller to OTG mode\n"); + reg = readl(&cdns->otg_regs->ctrl1); + reg |= OTGCTRL1_IDPULLUP; + writel(reg, &cdns->otg_regs->ctrl1); + + /* wait until valid ID (ID_VALUE) can be sampled (50ms). */ + mdelay(50); + break; + default: + dev_err(cdns->dev, "Unsupported mode of operation %d\n", mode); + return; + } +} + +static int cdns3_otg_get_id(struct cdns3 *cdns) +{ + int id; + + id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE; + dev_dbg(cdns->dev, "OTG ID: %d", id); + return id; +} + +int cdns3_is_host(struct cdns3 *cdns) +{ + if (cdns->dr_mode == USB_DR_MODE_HOST) + return 1; + + return 0; +} + +int cdns3_is_device(struct cdns3 *cdns) +{ + if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL) + return 1; + + return 0; +} + +/** + * cdns3_otg_disable_irq - Disable all OTG interrupts + * @cdns: Pointer to controller context structure + */ +static void cdns3_otg_disable_irq(struct cdns3 *cdns) +{ + writel(0, &cdns->otg_regs->ien); +} + +/** + * cdns3_otg_enable_irq - enable id and sess_valid interrupts + * @cdns: Pointer to controller context structure + */ +static void cdns3_otg_enable_irq(struct cdns3 *cdns) +{ + writel(OTGIEN_ID_CHANGE_INT | OTGIEN_VBUSVALID_RISE_INT | + OTGIEN_VBUSVALID_FALL_INT, &cdns->otg_regs->ien); +} + +/** + * cdns3_drd_init - initialize drd controller + * @cdns: Pointer to controller context structure + * + * Returns 0 on success otherwise negative errno + */ +static void cdns3_drd_init(struct cdns3 *cdns) +{ + cdns3_otg_disable_irq(cdns); + /* clear all interrupts */ + writel(~0, &cdns->otg_regs->ivect); + + cdns3_set_mode(cdns, CDNS3_ROLE_OTG); + + cdns3_otg_enable_irq(cdns); +} + +/** + * cdns3_core_init_mode - initialize mode of operation + * @cdns: Pointer to controller context structure + * + * Returns 0 on success otherwise negative errno + */ +static int cdns3_core_init_mode(struct cdns3 *cdns) +{ + int ret = 0; + + switch (cdns->dr_mode) { + case USB_DR_MODE_PERIPHERAL: + cdns3_set_mode(cdns, CDNS3_ROLE_GADGET); + break; + case USB_DR_MODE_HOST: + cdns3_set_mode(cdns, CDNS3_ROLE_HOST); + break; + case USB_DR_MODE_OTG: + cdns3_drd_init(cdns); + break; + default: + dev_err(cdns->dev, "Unsupported mode of operation %d\n", + cdns->dr_mode); + return -EINVAL; + } + + return ret; +} + +irqreturn_t cdns3_drd_irq(struct cdns3 *cdns) +{ + irqreturn_t ret = IRQ_NONE; + u32 reg; + + if (cdns->dr_mode != USB_DR_MODE_OTG) + return ret; + + reg = readl(&cdns->otg_regs->ivect); + if (!reg) + return ret; + + if (reg & OTGIEN_ID_CHANGE_INT) { + int id = cdns3_otg_get_id(cdns); + + dev_dbg(cdns->dev, "OTG IRQ: new ID: %d\n", + cdns3_otg_get_id(cdns)); + + if (id) + cdns->desired_role = CDNS3_ROLE_GADGET; + else + cdns->desired_role = CDNS3_ROLE_GADGET; + + queue_work(system_freezable_wq, &cdns->role_switch_wq); + + ret = IRQ_HANDLED; + } + + writel(~0, &cdns->otg_regs->ivect); + return IRQ_HANDLED; +} + +int cdns3_drd_probe(struct cdns3 *cdns) +{ + enum usb_dr_mode dr_mode; + int ret = 0; + u32 state; + + state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts)); + + dr_mode = cdns->dr_mode; + if (state == OTGSTS_STRAP_HOST) { + dev_info(cdns->dev, "Controller strapped to HOST\n"); + dr_mode = USB_DR_MODE_HOST; + if (cdns->dr_mode != USB_DR_MODE_HOST && + cdns->dr_mode != USB_DR_MODE_OTG) + ret = -EINVAL; + } else if (state == OTGSTS_STRAP_GADGET) { + dev_info(cdns->dev, "Controller strapped to HOST\n"); + dr_mode = USB_DR_MODE_PERIPHERAL; + if (cdns->dr_mode != USB_DR_MODE_PERIPHERAL && + cdns->dr_mode != USB_DR_MODE_OTG) + ret = -EINVAL; + } + + if (ret) { + dev_err(cdns->dev, "Incorrect DRD configuration\n"); + return ret; + } + + //Updating DR mode according to strap. + cdns->dr_mode = dr_mode; + + dev_info(cdns->dev, "Controller Device ID: %08lx, Revision ID: %08lx\n", + CDNS_RID(readl(&cdns->otg_regs->rid)), + CDNS_DID(readl(&cdns->otg_regs->did))); + + state = readl(&cdns->otg_regs->sts); + if (OTGSTS_OTG_NRDY(state) != 0) { + dev_err(cdns->dev, "Cadence USB3 OTG device not ready\n"); + return -ENODEV; + } + + ret = cdns3_core_init_mode(cdns); + + return ret; +} diff --git a/drivers/usb/cdns3/drd.h b/drivers/usb/cdns3/drd.h new file mode 100644 index 000000000000..85731f3b693c --- /dev/null +++ b/drivers/usb/cdns3/drd.h @@ -0,0 +1,122 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Cadence USB3 DRD part of USBSS driver + * + * Copyright (C) 2018 Cadence. + * + * Author: Pawel Laszczak + */ +#ifndef __LINUX_CDNS3_DRD +#define __LINUX_CDNS3_DRD + +#include +#include +#include "core.h" + +/* DRD register interface. */ +struct cdns3_otg_regs { + __le32 did; + __le32 rid; + __le32 capabilities; + __le32 reserved1; + __le32 cmd; + __le32 sts; + __le32 state; + __le32 reserved2; + __le32 ien; + __le32 ivect; + __le32 refclk; + __le32 tmr; + __le32 reserved3[4]; + __le32 simulate; + __le32 override; + __le32 susp_ctrl; + __le32 reserved4; + __le32 anasts; + __le32 adp_ramp_time; + __le32 ctrl1; + __le32 ctrl2; +}; + +/* CDNS_RID - bitmasks */ +#define CDNS_RID(p) ((p) & GENMASK(15, 0)) + +/* CDNS_VID - bitmasks */ +#define CDNS_DID(p) ((p) & GENMASK(31, 0)) + +/* OTGCMD - bitmasks */ +/* "Request the bus for Device mode. */ +#define OTGCMD_DEV_BUS_REQ BIT(0) +/* Request the bus for Host mode */ +#define OTGCMD_HOST_BUS_REQ BIT(1) +/* Enable OTG mode. */ +#define OTGCMD_OTG_EN BIT(2) +/* Disable OTG mode */ +#define OTGCMD_OTG_DIS BIT(3) +/*"Configure OTG as A-Device. */ +#define OTGCMD_A_DEV_EN BIT(4) +/*"Configure OTG as A-Device. */ +#define OTGCMD_A_DEV_DIS BIT(5) +/* Drop the bus for Device mod e. */ +#define OTGCMD_DEV_BUS_DROP BIT(8) +/* Drop the bus for Host mode*/ +#define OTGCMD_HOST_BUS_DROP BIT(9) +/* Power Down USBSS-DEV. */ +#define OTGCMD_DEV_POWER_OFF BIT(11) +/* Power Down CDNSXHCI. */ +#define OTGCMD_HOST_POWER_OFF BIT(12) + +/* OTGIEN - bitmasks */ +/* ID change interrupt enable */ +#define OTGIEN_ID_CHANGE_INT BIT(0) +/* Vbusvalid fall detected interrupt enable.*/ +#define OTGIEN_VBUSVALID_RISE_INT BIT(4) +/* Vbusvalid fall detected interrupt enable */ +#define OTGIEN_VBUSVALID_FALL_INT BIT(5) + +/* OTGSTS - bitmasks */ +/* + * Current value of the ID pin. It is only valid when idpullup in + * OTGCTRL1_TYPE register is set to '1'. + */ +#define OTGSTS_ID_VALUE BIT(0) +/* Current value of the vbus_valid */ +#define OTGSTS_VBUS_VALID BIT(1) +/* Current value of the b_sess_vld */ +#define OTGSTS_SESSION_VALID BIT(2) +/*Device mode is active*/ +#define OTGSTS_DEV_ACTIVE BIT(3) +/* Host mode is active. */ +#define OTGSTS_HOST_ACTIVE BIT(4) +/* OTG Controller not ready. */ +#define OTGSTS_OTG_NRDY_MASK BIT(11) +#define OTGSTS_OTG_NRDY(p) ((p) & OTGSTS_OTG_NRDY_MASK) +/* + * Value of the strap pins. + * 000 - no default configuration + * 010 - Controller initiall configured as Host + * 100 - Controller initially configured as Device + */ +#define OTGSTS_STRAP(p) (((p) & GENMASK(14, 12)) >> 12) +#define OTGSTS_STRAP_NO_DEFAULT_CFG 0x00 +#define OTGSTS_STRAP_HOST_OTG 0x01 +#define OTGSTS_STRAP_HOST 0x02 +#define OTGSTS_STRAP_GADGET 0x04 +/* Host mode is turned on. */ +#define OTGSTSE_XHCI_READYF BIT(26) +/* "Device mode is turned on .*/ +#define OTGSTS_DEV_READY BIT(27) + +/* OTGREFCLK - bitmasks */ +#define OTGREFCLK_STB_CLK_SWITCH_EN BIT(31) + +/* OTGCTRL1 - bitmasks */ +#define OTGCTRL1_IDPULLUP BIT(24) + +int cdns3_is_host(struct cdns3 *cdns); +int cdns3_is_device(struct cdns3 *cdns); +int cdns3_drd_probe(struct cdns3 *cdns); +void cdns3_set_hw_mode(struct cdns3 *cdns, u32 mode); +irqreturn_t cdns3_drd_irq(struct cdns3 *cdns); + +#endif /* __LINUX_CDNS3_DRD */ From patchwork Sat Nov 3 17:51:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666747 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6DA1217D5 for ; Sat, 3 Nov 2018 17:53:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C35F28787 for ; Sat, 3 Nov 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=619 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements functions that allow to initialize, start and stop XHCI host driver. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/host.c | 230 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 227 insertions(+), 3 deletions(-) diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c index 37300985e2d6..f3b100a27cd6 100644 --- a/drivers/usb/cdns3/host.c +++ b/drivers/usb/cdns3/host.c @@ -9,20 +9,244 @@ * Pawel Laszczak */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../host/xhci.h" #include "core.h" +#include "host-export.h" + +static struct hc_driver __read_mostly xhci_cdns3_hc_driver; + +static void xhci_cdns3_quirks(struct device *dev, struct xhci_hcd *xhci) +{ + /* + * As of now platform drivers don't provide MSI support so we ensure + * here that the generic code does not try to make a pci_dev from our + * dev struct in order to setup MSI + */ + xhci->quirks |= XHCI_PLAT; +} + +static int xhci_cdns3_setup(struct usb_hcd *hcd) +{ + struct xhci_hcd *xhci = hcd_to_xhci(hcd); + u32 command; + int ret; + + ret = xhci_gen_setup(hcd, xhci_cdns3_quirks); + if (ret) + return ret; + + /* set usbcmd.EU3S */ + command = readl(&xhci->op_regs->command); + command |= CMD_PM_INDEX; + writel(command, &xhci->op_regs->command); + + return 0; +} + +static const struct xhci_driver_overrides xhci_cdns3_overrides __initconst = { + .extra_priv_size = sizeof(struct xhci_hcd), + .reset = xhci_cdns3_setup, +}; + +struct cdns3_host { + struct device dev; + struct usb_hcd *hcd; +}; + +static irqreturn_t cdns3_host_irq(struct cdns3 *cdns) +{ + struct device *dev = cdns->host_dev; + struct usb_hcd *hcd; + + if (dev) + hcd = dev_get_drvdata(dev); + else + return IRQ_NONE; + + if (hcd) + return usb_hcd_irq(cdns->irq, hcd); + else + return IRQ_NONE; +} + +static void cdns3_host_release(struct device *dev) +{ + struct cdns3_host *host = container_of(dev, struct cdns3_host, dev); + + kfree(host); +} + +static int cdns3_host_start(struct cdns3 *cdns) +{ + struct cdns3_host *host; + struct device *dev; + struct device *sysdev; + struct xhci_hcd *xhci; + int ret; + + host = kzalloc(sizeof(*host), GFP_KERNEL); + if (!host) + return -ENOMEM; + + dev = &host->dev; + dev->release = cdns3_host_release; + dev->parent = cdns->dev; + dev_set_name(dev, "xhci-cdns3"); + cdns->host_dev = dev; + ret = device_register(dev); + if (ret) + goto err1; + + sysdev = cdns->dev; + /* Try to set 64-bit DMA first */ + if (WARN_ON(!sysdev->dma_mask)) + /* Platform did not initialize dma_mask */ + ret = dma_coerce_mask_and_coherent(sysdev, + DMA_BIT_MASK(64)); + else + ret = dma_set_mask_and_coherent(sysdev, DMA_BIT_MASK(64)); + + /* If setting 64-bit DMA mask fails, fall back to 32-bit DMA mask */ + if (ret) { + ret = dma_set_mask_and_coherent(sysdev, DMA_BIT_MASK(32)); + if (ret) + return ret; + } + + pm_runtime_set_active(dev); + pm_runtime_no_callbacks(dev); + pm_runtime_enable(dev); + host->hcd = __usb_create_hcd(&xhci_cdns3_hc_driver, sysdev, dev, + dev_name(dev), NULL); + if (!host->hcd) { + ret = -ENOMEM; + goto err2; + } + + host->hcd->regs = cdns->xhci_regs; + host->hcd->rsrc_start = cdns->xhci_res->start; + host->hcd->rsrc_len = resource_size(cdns->xhci_res); + + device_wakeup_enable(host->hcd->self.controller); + xhci = hcd_to_xhci(host->hcd); + + xhci->main_hcd = host->hcd; + xhci->shared_hcd = __usb_create_hcd(&xhci_cdns3_hc_driver, sysdev, dev, + dev_name(dev), host->hcd); + if (!xhci->shared_hcd) { + ret = -ENOMEM; + goto err3; + } + + host->hcd->tpl_support = of_usb_host_tpl_support(sysdev->of_node); + xhci->shared_hcd->tpl_support = host->hcd->tpl_support; + ret = usb_add_hcd(host->hcd, 0, IRQF_SHARED); + if (ret) + goto err4; + + ret = usb_add_hcd(xhci->shared_hcd, 0, IRQF_SHARED); + if (ret) + goto err5; + + device_set_wakeup_capable(dev, true); + + return 0; + +err5: + usb_remove_hcd(host->hcd); +err4: + usb_put_hcd(xhci->shared_hcd); +err3: + usb_put_hcd(host->hcd); +err2: + device_del(dev); +err1: + put_device(dev); + cdns->host_dev = NULL; + return ret; +} + +static void cdns3_host_stop(struct cdns3 *cdns) +{ + struct device *dev = cdns->host_dev; + struct xhci_hcd *xhci; + struct usb_hcd *hcd; + + if (dev) { + hcd = dev_get_drvdata(dev); + xhci = hcd_to_xhci(hcd); + usb_remove_hcd(xhci->shared_hcd); + usb_remove_hcd(hcd); + synchronize_irq(cdns->irq); + usb_put_hcd(xhci->shared_hcd); + usb_put_hcd(hcd); + cdns->host_dev = NULL; + pm_runtime_set_suspended(dev); + pm_runtime_disable(dev); + device_del(dev); + put_device(dev); + } +} + +static int cdns3_host_suspend(struct cdns3 *cdns, bool do_wakeup) +{ + struct device *dev = cdns->host_dev; + struct xhci_hcd *xhci; + + if (!dev) + return 0; + + xhci = hcd_to_xhci(dev_get_drvdata(dev)); + return xhci_suspend(xhci, do_wakeup); +} + +static int cdns3_host_resume(struct cdns3 *cdns, bool hibernated) +{ + struct device *dev = cdns->host_dev; + struct xhci_hcd *xhci; + + if (!dev) + return 0; + + xhci = hcd_to_xhci(dev_get_drvdata(dev)); + return xhci_resume(xhci, hibernated); +} int cdns3_host_init(struct cdns3 *cdns) { - //TODO: implements this function + struct cdns3_role_driver *rdrv; + + rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL); + if (!rdrv) + return -ENOMEM; + + rdrv->start = cdns3_host_start; + rdrv->stop = cdns3_host_stop; + rdrv->irq = cdns3_host_irq; + rdrv->suspend = cdns3_host_suspend; + rdrv->resume = cdns3_host_resume; + rdrv->name = "host"; + cdns->roles[CDNS3_ROLE_HOST] = rdrv; + return 0; } void cdns3_host_remove(struct cdns3 *cdns) { - //TODO: implements this function + cdns3_host_stop(cdns); } void __init cdns3_host_driver_init(void) { - //TODO: implements this function + xhci_init_driver(&xhci_cdns3_hc_driver, &xhci_cdns3_overrides); } From patchwork Sat Nov 3 17:51:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666739 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=883 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements a set of functions responsible for initialization, configuration, starting and stopping device mode. This patch also adds new ep0.c that holds all functions related to endpoint 0. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/Makefile | 2 +- drivers/usb/cdns3/ep0.c | 105 +++++++++++ drivers/usb/cdns3/gadget.c | 361 ++++++++++++++++++++++++++++++++++++- drivers/usb/cdns3/gadget.h | 4 + 4 files changed, 468 insertions(+), 4 deletions(-) create mode 100644 drivers/usb/cdns3/ep0.c diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile index d4ccfb49d844..f4cfc978626f 100644 --- a/drivers/usb/cdns3/Makefile +++ b/drivers/usb/cdns3/Makefile @@ -2,6 +2,6 @@ obj-$(CONFIG_USB_CDNS3) += cdns3.o obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o cdns3-y := core.o drd.o -cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o +cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o ep0.o cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c new file mode 100644 index 000000000000..c08d02665f9d --- /dev/null +++ b/drivers/usb/cdns3/ep0.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver - gadget side. + * + * Copyright (C) 2018 Cadence Design Systems. + * Copyright (C) 2017 NXP + * + * Authors: Pawel Jez , + * Pawel Laszczak + * Peter Chen + */ + +#include "gadget.h" + +static struct usb_endpoint_descriptor cdns3_gadget_ep0_desc = { + .bLength = USB_DT_ENDPOINT_SIZE, + .bDescriptorType = USB_DT_ENDPOINT, + .bmAttributes = USB_ENDPOINT_XFER_CONTROL, +}; + +static void cdns3_prepare_setup_packet(struct cdns3_device *priv_dev) +{ + //TODO: Implements this function +} + +/** + * cdns3_ep0_config - Configures default endpoint + * @priv_dev: extended gadget object + * + * Functions sets parameters: maximal packet size and enables interrupts + */ +void cdns3_ep0_config(struct cdns3_device *priv_dev) +{ + struct cdns3_usb_regs __iomem *regs; + u32 max_packet_size = 64; + + regs = priv_dev->regs; + + if (priv_dev->gadget.speed == USB_SPEED_SUPER) + max_packet_size = 512; + + if (priv_dev->ep0_request) { + list_del_init(&priv_dev->ep0_request->list); + priv_dev->ep0_request = NULL; + } + + priv_dev->gadget.ep0->maxpacket = max_packet_size; + cdns3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(max_packet_size); + + /* init ep out */ + cdns3_select_ep(priv_dev, USB_DIR_OUT); + + writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size), + ®s->ep_cfg); + + writel(EP_STS_EN_SETUPEN | EP_STS_EN_DESCMISEN | EP_STS_EN_TRBERREN, + ®s->ep_sts_en); + + /* init ep in */ + cdns3_select_ep(priv_dev, USB_DIR_IN); + + writel(EP_CFG_ENABLE | EP_CFG_MAXPKTSIZE(max_packet_size), + ®s->ep_cfg); + + writel(EP_STS_EN_SETUPEN | EP_STS_EN_TRBERREN, ®s->ep_sts_en); + + cdns3_set_register_bit(®s->usb_conf, USB_CONF_U1DS | USB_CONF_U2DS); + cdns3_prepare_setup_packet(priv_dev); +} + +/** + * cdns3_init_ep0 Initializes software endpoint 0 of gadget + * @cdns3: extended gadget object + * + * Returns 0 on success, error code elsewhere + */ +int cdns3_init_ep0(struct cdns3_device *priv_dev) +{ + struct cdns3_endpoint *ep0; + + ep0 = devm_kzalloc(&priv_dev->dev, sizeof(struct cdns3_endpoint), + GFP_KERNEL); + + if (!ep0) + return -ENOMEM; + + ep0->cdns3_dev = priv_dev; + sprintf(ep0->name, "ep0"); + + /* fill linux fields */ + //TODO: implements cdns3_gadget_ep0_ops object + //ep0->endpoint.ops = &cdns3_gadget_ep0_ops; + ep0->endpoint.maxburst = 1; + usb_ep_set_maxpacket_limit(&ep0->endpoint, ENDPOINT0_MAX_PACKET_LIMIT); + ep0->endpoint.address = 0; + ep0->endpoint.caps.type_control = 1; + ep0->endpoint.caps.dir_in = 1; + ep0->endpoint.caps.dir_out = 1; + ep0->endpoint.name = ep0->name; + ep0->endpoint.desc = &cdns3_gadget_ep0_desc; + priv_dev->gadget.ep0 = &ep0->endpoint; + INIT_LIST_HEAD(&ep0->request_list); + + return 0; +} diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index 41ce696719d7..e7975b00b21a 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -10,7 +10,261 @@ * Peter Chen */ +#include +#include + #include "core.h" +#include "gadget-export.h" +#include "gadget.h" + +/** + * cdns3_set_register_bit - set bit in given register. + * @ptr: address of device controller register to be read and changed + * @mask: bits requested to set + */ +void cdns3_set_register_bit(void __iomem *ptr, u32 mask) +{ + mask = readl(ptr) | mask; + writel(mask, ptr); +} + +/** + * select_ep - selects endpoint + * @priv_dev: extended gadget object + * @ep: endpoint address + */ +void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep) +{ + if (priv_dev->selected_ep == ep) + return; + + dev_dbg(&priv_dev->dev, "Ep sel: 0x%02x\n", ep); + priv_dev->selected_ep = ep; + writel(ep, &priv_dev->regs->ep_sel); + /* memory barrier for selecting endpoint. */ + wmb(); +} + +/** + * cdns3_irq_handler - irq line interrupt handler + * @cdns: cdns3 instance + * + * Returns IRQ_HANDLED when interrupt raised by USBSS_DEV, + * IRQ_NONE when interrupt raised by other device connected + * to the irq line + */ +static irqreturn_t cdns3_irq_handler_thread(struct cdns3 *cdns) +{ + irqreturn_t ret = IRQ_NONE; + //TODO: implements this function + return ret; +} + +static void cdns3_gadget_config(struct cdns3_device *priv_dev) +{ + struct cdns3_usb_regs __iomem *regs = priv_dev->regs; + + cdns3_ep0_config(priv_dev); + + /* enable interrupts for endpoint 0 (in and out) */ + writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, ®s->ep_ien); + + /* enable generic interrupt*/ + writel(USB_IEN_INIT, ®s->usb_ien); + writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf); + writel(USB_CONF_U1DS | USB_CONF_U2DS, ®s->usb_conf); + writel(USB_CONF_DMULT, ®s->usb_conf); + writel(USB_CONF_DEVEN, ®s->usb_conf); +} + +/** + * cdns3_init_ep Initializes software endpoints of gadget + * @cdns3: extended gadget object + * + * Returns 0 on success, error code elsewhere + */ +static int cdns3_init_ep(struct cdns3_device *priv_dev) +{ + u32 ep_enabled_reg, iso_ep_reg; + struct cdns3_endpoint *priv_ep; + int found_endpoints = 0; + int ep_dir, ep_number; + u32 ep_mask; + int i; + + /* Read it from USB_CAP3 to USB_CAP5 */ + ep_enabled_reg = readl(&priv_dev->regs->usb_cap3); + iso_ep_reg = readl(&priv_dev->regs->usb_cap4); + + dev_dbg(&priv_dev->dev, "Initializing non-zero endpoints\n"); + + for (i = 0; i < USB_SS_ENDPOINTS_MAX_COUNT; i++) { + ep_number = (i / 2) + 1; + ep_dir = i % 2; + ep_mask = BIT((16 * ep_dir) + ep_number); + + if (!(ep_enabled_reg & ep_mask)) + continue; + + priv_ep = devm_kzalloc(&priv_dev->dev, sizeof(*priv_ep), + GFP_KERNEL); + if (!priv_ep) + return -ENOMEM; + + /* set parent of endpoint object */ + priv_ep->cdns3_dev = priv_dev; + priv_dev->eps[found_endpoints++] = priv_ep; + + snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s", + ep_number, !!ep_dir ? "in" : "out"); + priv_ep->endpoint.name = priv_ep->name; + + usb_ep_set_maxpacket_limit(&priv_ep->endpoint, + ENDPOINT_MAX_PACKET_LIMIT); + priv_ep->endpoint.max_streams = ENDPOINT_MAX_STREAMS; + //TODO: Add implementation of cdns3_gadget_ep_ops + //priv_ep->endpoint.ops = &cdns3_gadget_ep_ops; + if (ep_dir) + priv_ep->endpoint.caps.dir_in = 1; + else + priv_ep->endpoint.caps.dir_out = 1; + + if (iso_ep_reg & ep_mask) + priv_ep->endpoint.caps.type_iso = 1; + + priv_ep->endpoint.caps.type_bulk = 1; + priv_ep->endpoint.caps.type_int = 1; + priv_ep->endpoint.maxburst = CDNS3_EP_BUF_SIZE - 1; + + dev_info(&priv_dev->dev, "Initialized %s support: %s %s\n", + priv_ep->name, + priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "", + priv_ep->endpoint.caps.type_iso ? "ISO" : ""); + + list_add_tail(&priv_ep->endpoint.ep_list, + &priv_dev->gadget.ep_list); + INIT_LIST_HEAD(&priv_ep->request_list); + INIT_LIST_HEAD(&priv_ep->ep_match_pending_list); + } + + priv_dev->ep_nums = found_endpoints; + return 0; +} + +static void cdns3_gadget_release(struct device *dev) +{ + struct cdns3_device *priv_dev; + + priv_dev = container_of(dev, struct cdns3_device, dev); + kfree(priv_dev); +} + +static int __cdns3_gadget_init(struct cdns3 *cdns) +{ + struct cdns3_device *priv_dev; + struct device *dev; + int ret; + + priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL); + if (!priv_dev) + return -ENOMEM; + + dev = &priv_dev->dev; + dev->release = cdns3_gadget_release; + dev->parent = cdns->dev; + dev_set_name(dev, "gadget-cdns3"); + cdns->gadget_dev = dev; + + priv_dev->sysdev = cdns->dev; + ret = device_register(dev); + if (ret) + goto err1; + + priv_dev->regs = cdns->dev_regs; + + /* fill gadget fields */ + priv_dev->gadget.max_speed = USB_SPEED_SUPER; + priv_dev->gadget.speed = USB_SPEED_UNKNOWN; + //TODO: Add implementation of cdns3_gadget_ops + //priv_dev->gadget.ops = &cdns3_gadget_ops; + priv_dev->gadget.name = "usb-ss-gadget"; + priv_dev->gadget.sg_supported = 1; + priv_dev->is_connected = 0; + + spin_lock_init(&priv_dev->lock); + + priv_dev->in_standby_mode = 1; + + /* initialize endpoint container */ + INIT_LIST_HEAD(&priv_dev->gadget.ep_list); + INIT_LIST_HEAD(&priv_dev->ep_match_list); + + ret = cdns3_init_ep0(priv_dev); + if (ret) { + dev_err(dev, "Failed to create endpoint 0\n"); + ret = -ENOMEM; + goto err2; + } + + ret = cdns3_init_ep(priv_dev); + if (ret) { + dev_err(dev, "Failed to create non zero endpoints\n"); + ret = -ENOMEM; + goto err2; + } + + /* allocate memory for default endpoint TRB */ + priv_dev->trb_ep0 = dma_alloc_coherent(priv_dev->sysdev, 24, + &priv_dev->trb_ep0_dma, GFP_DMA); + if (!priv_dev->trb_ep0) { + dev_err(dev, "Failed to allocate memory for ep0 TRB\n"); + ret = -ENOMEM; + goto err2; + } + + /* allocate memory for setup packet buffer */ + priv_dev->setup = dma_alloc_coherent(priv_dev->sysdev, 8, + &priv_dev->setup_dma, GFP_DMA); + if (!priv_dev->setup) { + dev_err(dev, "Failed to allocate memory for SETUP buffer\n"); + ret = -ENOMEM; + goto err3; + } + + dev_dbg(dev, "Device Controller version: %08x\n", + readl(&priv_dev->regs->usb_cap6)); + dev_dbg(dev, "USB Capabilities:: %08x\n", + readl(&priv_dev->regs->usb_cap1)); + dev_dbg(dev, "On-Chip memory cnfiguration: %08x\n", + readl(&priv_dev->regs->usb_cap2)); + + /* add USB gadget device */ + ret = usb_add_gadget_udc(&priv_dev->dev, &priv_dev->gadget); + if (ret < 0) { + dev_err(dev, "Failed to register USB device controller\n"); + goto err4; + } + + priv_dev->zlp_buf = kzalloc(ENDPOINT_ZLP_BUF_SIZE, GFP_KERNEL); + if (!priv_dev->zlp_buf) { + ret = -ENOMEM; + goto err4; + } + + return 0; +err4: + dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup, + priv_dev->setup_dma); +err3: + dma_free_coherent(priv_dev->sysdev, 20, priv_dev->trb_ep0, + priv_dev->trb_ep0_dma); +err2: + device_del(dev); +err1: + put_device(dev); + cdns->gadget_dev = NULL; + return ret; +} /** * cdns3_gadget_remove: parent must call this to remove UDC @@ -19,7 +273,96 @@ */ void cdns3_gadget_remove(struct cdns3 *cdns) { - //TODO: implements this function + struct cdns3_device *priv_dev; + + if (!cdns->roles[CDNS3_ROLE_GADGET]) + return; + + priv_dev = container_of(cdns->gadget_dev, struct cdns3_device, dev); + usb_del_gadget_udc(&priv_dev->gadget); + dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup, + priv_dev->setup_dma); + dma_free_coherent(priv_dev->sysdev, 20, priv_dev->trb_ep0, + priv_dev->trb_ep0_dma); + device_unregister(cdns->gadget_dev); + cdns->gadget_dev = NULL; + kfree(priv_dev->zlp_buf); +} + +static int cdns3_gadget_start(struct cdns3 *cdns) +{ + struct cdns3_device *priv_dev = container_of(cdns->gadget_dev, + struct cdns3_device, dev); + unsigned long flags; + + pm_runtime_get_sync(cdns->dev); + spin_lock_irqsave(&priv_dev->lock, flags); + priv_dev->start_gadget = 1; + + if (!priv_dev->gadget_driver) { + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; + } + + cdns3_gadget_config(priv_dev); + priv_dev->in_standby_mode = 0; + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; +} + +static void __cdns3_gadget_stop(struct cdns3 *cdns) +{ + struct cdns3_device *priv_dev; + unsigned long flags; + + priv_dev = container_of(cdns->gadget_dev, struct cdns3_device, dev); + + if (priv_dev->gadget_driver) + priv_dev->gadget_driver->disconnect(&priv_dev->gadget); + + usb_gadget_disconnect(&priv_dev->gadget); + spin_lock_irqsave(&priv_dev->lock, flags); + priv_dev->gadget.speed = USB_SPEED_UNKNOWN; + + /* disable interrupt for device */ + writel(0, &priv_dev->regs->usb_ien); + writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf); + priv_dev->start_gadget = 0; + spin_unlock_irqrestore(&priv_dev->lock, flags); +} + +static void cdns3_gadget_stop(struct cdns3 *cdns) +{ + if (cdns->role == CDNS3_ROLE_GADGET) + __cdns3_gadget_stop(cdns); + + pm_runtime_mark_last_busy(cdns->dev); + pm_runtime_put_autosuspend(cdns->dev); +} + +static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup) +{ + __cdns3_gadget_stop(cdns); + return 0; +} + +static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated) +{ + struct cdns3_device *priv_dev; + unsigned long flags; + + priv_dev = container_of(cdns->gadget_dev, struct cdns3_device, dev); + spin_lock_irqsave(&priv_dev->lock, flags); + priv_dev->start_gadget = 1; + if (!priv_dev->gadget_driver) { + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; + } + + cdns3_gadget_config(priv_dev); + priv_dev->in_standby_mode = 0; + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; } /** @@ -31,6 +374,18 @@ void cdns3_gadget_remove(struct cdns3 *cdns) */ int cdns3_gadget_init(struct cdns3 *cdns) { - //TODO: implements this function - return 0; + struct cdns3_role_driver *rdrv; + + rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL); + if (!rdrv) + return -ENOMEM; + + rdrv->start = cdns3_gadget_start; + rdrv->stop = cdns3_gadget_stop; + rdrv->suspend = cdns3_gadget_suspend; + rdrv->resume = cdns3_gadget_resume; + rdrv->irq = cdns3_irq_handler_thread; + rdrv->name = "gadget"; + cdns->roles[CDNS3_ROLE_GADGET] = rdrv; + return __cdns3_gadget_init(cdns); } diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index c4b07827aae7..b57e863017b0 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1064,4 +1064,8 @@ struct cdns3_device { struct usb_request *pending_status_request; }; +void cdns3_set_register_bit(void __iomem *ptr, u32 mask); +int cdns3_init_ep0(struct cdns3_device *priv_dev); +void cdns3_ep0_config(struct cdns3_device *priv_dev); +void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep); #endif /* __LINUX_CDNS3_GADGET */ From patchwork Sat Nov 3 17:51:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds implementation callback function defined in usb_gadget_ops object. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/gadget.c | 244 ++++++++++++++++++++++++++++++++++++- 1 file changed, 242 insertions(+), 2 deletions(-) diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index e7975b00b21a..ff8306ac070e 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -17,6 +17,36 @@ #include "gadget-export.h" #include "gadget.h" +/** + * cdns3_handshake - spin reading until handshake completes or fails + * @ptr: address of device controller register to be read + * @mask: bits to look at in result of read + * @done: value of those bits when handshake succeeds + * @usec: timeout in microseconds + * + * Returns negative errno, or zero on success + * + * Success happens when the "mask" bits have the specified value (hardware + * handshake done). There are two failure modes: "usec" have passed (major + * hardware flakeout), or the register reads as all-ones (hardware removed). + */ +int cdns3_handshake(void __iomem *ptr, u32 mask, u32 done, int usec) +{ + u32 result; + + do { + result = readl(ptr); + if (result == ~(u32)0) /* card removed */ + return -ENODEV; + result &= mask; + if (result == done) + return 0; + udelay(1); + usec--; + } while (usec > 0); + return -ETIMEDOUT; +} + /** * cdns3_set_register_bit - set bit in given register. * @ptr: address of device controller register to be read and changed @@ -45,6 +75,20 @@ void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep) wmb(); } +static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + dma_free_coherent(priv_dev->sysdev, + TRB_SIZE * TRBS_PER_SEGMENT, + priv_ep->trb_pool, priv_ep->trb_pool_dma); + priv_ep->trb_pool = NULL; + + dma_free_coherent(priv_dev->sysdev, CDNS3_UNALIGNED_BUF_SIZE, + priv_ep->aligned_buff, priv_ep->aligned_dma_addr); + priv_ep->aligned_buff = NULL; +} + /** * cdns3_irq_handler - irq line interrupt handler * @cdns: cdns3 instance @@ -60,6 +104,114 @@ static irqreturn_t cdns3_irq_handler_thread(struct cdns3 *cdns) return ret; } +/* Find correct direction for HW endpoint according to description */ +static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc, + struct cdns3_endpoint *priv_ep) +{ + return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) || + (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc)); +} + +static struct cdns3_endpoint *cdns3_find_available_ss_ep(struct cdns3_device *priv_dev, + struct usb_endpoint_descriptor *desc) +{ + struct usb_ep *ep; + struct cdns3_endpoint *priv_ep; + + list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) { + unsigned long num; + int ret; + /* ep name pattern likes epXin or epXout */ + char c[2] = {ep->name[2], '\0'}; + + ret = kstrtoul(c, 10, &num); + if (ret) + return ERR_PTR(ret); + + priv_ep = ep_to_cdns3_ep(ep); + if (cdns3_ep_dir_is_correct(desc, priv_ep)) { + if (!(priv_ep->flags & EP_USED)) { + priv_ep->num = num; + priv_ep->flags |= EP_USED; + return priv_ep; + } + } + } + return ERR_PTR(-ENOENT); +} + +static struct usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget, + struct usb_endpoint_descriptor *desc, + struct usb_ss_ep_comp_descriptor *comp_desc) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + struct cdns3_endpoint *priv_ep; + unsigned long flags; + + priv_ep = cdns3_find_available_ss_ep(priv_dev, desc); + if (IS_ERR(priv_ep)) { + dev_err(&priv_dev->dev, "no available ep\n"); + return NULL; + } + + dev_dbg(&priv_dev->dev, "match endpoint: %s\n", priv_ep->name); + + spin_lock_irqsave(&priv_dev->lock, flags); + priv_ep->endpoint.desc = desc; + priv_ep->dir = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT; + priv_ep->type = usb_endpoint_type(desc); + + list_add_tail(&priv_ep->ep_match_pending_list, + &priv_dev->ep_match_list); + spin_unlock_irqrestore(&priv_dev->lock, flags); + return &priv_ep->endpoint; +} + +/** + * cdns3_gadget_get_frame Returns number of actual ITP frame + * @gadget: gadget object + * + * Returns number of actual ITP frame + */ +static int cdns3_gadget_get_frame(struct usb_gadget *gadget) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + + return readl(&priv_dev->regs->usb_iptn); +} + +static int cdns3_gadget_wakeup(struct usb_gadget *gadget) +{ + return 0; +} + +static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget, + int is_selfpowered) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + unsigned long flags; + + spin_lock_irqsave(&priv_dev->lock, flags); + gadget->is_selfpowered = !!is_selfpowered; + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; +} + +static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + + if (!priv_dev->start_gadget) + return 0; + + if (is_on) + writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf); + else + writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf); + + return 0; +} + static void cdns3_gadget_config(struct cdns3_device *priv_dev) { struct cdns3_usb_regs __iomem *regs = priv_dev->regs; @@ -77,6 +229,95 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev) writel(USB_CONF_DEVEN, ®s->usb_conf); } +/** + * cdns3_gadget_udc_start Gadget start + * @gadget: gadget object + * @driver: driver which operates on this gadget + * + * Returns 0 on success, error code elsewhere + */ +static int cdns3_gadget_udc_start(struct usb_gadget *gadget, + struct usb_gadget_driver *driver) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + unsigned long flags; + + if (priv_dev->gadget_driver) { + dev_err(&priv_dev->dev, "%s is already bound to %s\n", + priv_dev->gadget.name, + priv_dev->gadget_driver->driver.name); + return -EBUSY; + } + + spin_lock_irqsave(&priv_dev->lock, flags); + priv_dev->gadget_driver = driver; + if (!priv_dev->start_gadget) + goto unlock; + + cdns3_gadget_config(priv_dev); +unlock: + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; +} + +/** + * cdns3_gadget_udc_stop Stops gadget + * @gadget: gadget object + * + * Returns 0 + */ +static int cdns3_gadget_udc_stop(struct usb_gadget *gadget) +{ + struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget); + struct cdns3_endpoint *priv_ep, *temp_ep; + u32 bEndpointAddress; + struct usb_ep *ep; + int ret = 0; + int i; + + priv_dev->gadget_driver = NULL; + list_for_each_entry_safe(priv_ep, temp_ep, &priv_dev->ep_match_list, + ep_match_pending_list) { + list_del(&priv_ep->ep_match_pending_list); + priv_ep->flags &= ~EP_USED; + } + + priv_dev->onchip_mem_allocated_size = 0; + priv_dev->out_mem_is_allocated = 0; + priv_dev->gadget.speed = USB_SPEED_UNKNOWN; + + for (i = 0; i < priv_dev->ep_nums ; i++) + cdns3_free_trb_pool(priv_dev->eps[i]); + + if (!priv_dev->start_gadget) + return 0; + + list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) { + priv_ep = ep_to_cdns3_ep(ep); + bEndpointAddress = priv_ep->num | priv_ep->dir; + cdns3_select_ep(priv_dev, bEndpointAddress); + writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd); + ret = cdns3_handshake(&priv_dev->regs->ep_cmd, + EP_CMD_EPRST, 0, 100); + } + + /* disable interrupt for device */ + writel(0, &priv_dev->regs->usb_ien); + writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf); + + return ret; +} + +static const struct usb_gadget_ops cdns3_gadget_ops = { + .get_frame = cdns3_gadget_get_frame, + .wakeup = cdns3_gadget_wakeup, + .set_selfpowered = cdns3_gadget_set_selfpowered, + .pullup = cdns3_gadget_pullup, + .udc_start = cdns3_gadget_udc_start, + .udc_stop = cdns3_gadget_udc_stop, + .match_ep = cdns3_gadget_match_ep, +}; + /** * cdns3_init_ep Initializes software endpoints of gadget * @cdns3: extended gadget object @@ -185,8 +426,7 @@ static int __cdns3_gadget_init(struct cdns3 *cdns) /* fill gadget fields */ priv_dev->gadget.max_speed = USB_SPEED_SUPER; priv_dev->gadget.speed = USB_SPEED_UNKNOWN; - //TODO: Add implementation of cdns3_gadget_ops - //priv_dev->gadget.ops = &cdns3_gadget_ops; + priv_dev->gadget.ops = &cdns3_gadget_ops; priv_dev->gadget.name = "usb-ss-gadget"; priv_dev->gadget.sg_supported = 1; priv_dev->is_connected = 0; From patchwork Sat Nov 3 17:51:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666745 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7FEAD14BD for ; Sat, 3 Nov 2018 17:53:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=740 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements callback functions for non-default endpoints defined in usb_ep_ops object. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/ep0.c | 18 ++ drivers/usb/cdns3/gadget.c | 430 ++++++++++++++++++++++++++++++++++++- drivers/usb/cdns3/gadget.h | 3 + 3 files changed, 449 insertions(+), 2 deletions(-) diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index c08d02665f9d..ca1795467155 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -23,6 +23,24 @@ static void cdns3_prepare_setup_packet(struct cdns3_device *priv_dev) //TODO: Implements this function } +/** + * cdns3_gadget_ep_set_wedge Set wedge on selected endpoint + * @ep: endpoint object + * + * Returns 0 + */ +int cdns3_gadget_ep_set_wedge(struct usb_ep *ep) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + dev_dbg(&priv_dev->dev, "Wedge for %s\n", ep->name); + cdns3_gadget_ep_set_halt(ep, 1); + priv_ep->flags |= EP_WEDGE; + + return 0; +} + /** * cdns3_ep0_config - Configures default endpoint * @priv_dev: extended gadget object diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index ff8306ac070e..b08e0836f9a5 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -58,6 +58,19 @@ void cdns3_set_register_bit(void __iomem *ptr, u32 mask) writel(mask, ptr); } +/** + * cdns3_next_request - returns next request from list + * @list: list containing requests + * + * Returns request or NULL if no requests in list + */ +struct usb_request *cdns3_next_request(struct list_head *list) +{ + if (list_empty(list)) + return NULL; + return list_first_entry(list, struct usb_request, list); +} + /** * select_ep - selects endpoint * @priv_dev: extended gadget object @@ -75,6 +88,46 @@ void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep) wmb(); } +/** + * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint + * @priv_ep: endpoint object + * + * Function will return 0 on success or -ENOMEM on allocation error + */ +static int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct cdns3_trb *link_trb; + + priv_ep->trb_pool = dma_zalloc_coherent(priv_dev->sysdev, + TRB_SIZE * TRBS_PER_SEGMENT, + &priv_ep->trb_pool_dma, + GFP_DMA); + if (!priv_ep->trb_pool) + return -ENOMEM; + + priv_ep->aligned_buff = dma_alloc_coherent(priv_dev->sysdev, + CDNS3_UNALIGNED_BUF_SIZE, + &priv_ep->aligned_dma_addr, + GFP_DMA); + if (!priv_ep->aligned_buff) { + dma_free_coherent(priv_dev->sysdev, + TRB_SIZE * TRBS_PER_SEGMENT, + priv_ep->trb_pool, priv_ep->trb_pool_dma); + priv_ep->trb_pool = NULL; + + return -ENOMEM; + } + + /* Initialize the last TRB as Link TRB */ + link_trb = (priv_ep->trb_pool + TRBS_PER_SEGMENT - 1); + link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma); + link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | + TRB_CHAIN | TRB_TOGGLE; + + return 0; +} + static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep) { struct cdns3_device *priv_dev = priv_ep->cdns3_dev; @@ -89,6 +142,73 @@ static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep) priv_ep->aligned_buff = NULL; } +/** + * cdns3_data_flush - flush data at onchip buffer + * @priv_ep: endpoint object + * + * Endpoint must be selected before call to this function + * + * Returns zero on success or negative value on failure + */ +static int cdns3_data_flush(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + writel(EP_CMD_DFLUSH, &priv_dev->regs->ep_cmd); + + /* wait for DFLUSH cleared */ + return cdns3_handshake(&priv_dev->regs->ep_cmd, EP_CMD_DFLUSH, 0, 100); +} + +/** + * cdns3_ep_stall_flush - Stalls and flushes selected endpoint + * @priv_ep: endpoint object + * + * Endpoint must be selected before call to this function + */ +static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL, + &priv_dev->regs->ep_cmd); + + /* wait for DFLUSH cleared */ + cdns3_handshake(&priv_dev->regs->ep_cmd, EP_CMD_DFLUSH, 0, 100); + priv_ep->flags |= EP_STALL; +} + +/** + * cdns3_gadget_giveback - call struct usb_request's ->complete callback + * @priv_ep: The endpoint to whom the request belongs to + * @priv_req: The request we're giving back + * @status: completion code for the request + * + * Must be called with controller's lock held and interrupts disabled. This + * function will unmap @req and call its ->complete() callback to notify upper + * layers that it has completed. + */ +void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep, + struct cdns3_request *priv_req, + int status) +{ + //TODO: Implements this function. +} + +/** + * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware + * @priv_ep: endpoint object + * + * Returns zero on success or negative value on failure + */ +int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request) +{ + //TODO: Implements this function. + + return 0; +} + /** * cdns3_irq_handler - irq line interrupt handler * @cdns: cdns3 instance @@ -167,6 +287,313 @@ static struct usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget, return &priv_ep->endpoint; } +/** + * cdns3_gadget_ep_enable Enable endpoint + * @ep: endpoint object + * @desc: endpoint descriptor + * + * Returns 0 on success, error code elsewhere + */ +static int cdns3_gadget_ep_enable(struct usb_ep *ep, + const struct usb_endpoint_descriptor *desc) +{ + struct cdns3_endpoint *priv_ep; + struct cdns3_device *priv_dev; + unsigned long flags; + int ret; + + priv_ep = ep_to_cdns3_ep(ep); + priv_dev = priv_ep->cdns3_dev; + + if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) { + dev_err(&priv_dev->dev, "usbss: invalid parameters\n"); + return -EINVAL; + } + + if (!desc->wMaxPacketSize) { + dev_err(&priv_dev->dev, "usbss: missing wMaxPacketSize\n"); + return -EINVAL; + } + + if (dev_WARN_ONCE(&priv_dev->dev, priv_ep->flags & EP_ENABLED, + "%s is already enabled\n", priv_ep->name)) + return 0; + + ret = cdns3_allocate_trb_pool(priv_ep); + if (ret) + return ret; + + dev_dbg(&priv_dev->dev, "Enabling endpoint: %s\n", ep->name); + spin_lock_irqsave(&priv_dev->lock, flags); + cdns3_select_ep(priv_dev, desc->bEndpointAddress); + writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd); + + ret = cdns3_handshake(&priv_dev->regs->ep_cmd, + EP_CMD_EPRST, 0, 100); + + cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE); + + ep->desc = desc; + priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALL); + priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR; + priv_ep->enqueue = 0; + priv_ep->dequeue = 0; + priv_ep->pcs = 1; + priv_ep->ccs = 1; + /* one TRB is reserved for link TRB used in DMULT mode*/ + priv_ep->free_trbs = TRBS_PER_SEGMENT - 1; + + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; +} + +/** + * cdns3_gadget_ep_disable Disable endpoint + * @ep: endpoint object + * + * Returns 0 on success, error code elsewhere + */ +static int cdns3_gadget_ep_disable(struct usb_ep *ep) +{ + struct cdns3_endpoint *priv_ep; + struct cdns3_device *priv_dev; + unsigned long flags; + int ret = 0; + struct usb_request *request; + u32 ep_cfg; + + if (!ep) { + pr_debug("usbss: invalid parameters\n"); + return -EINVAL; + } + + priv_ep = ep_to_cdns3_ep(ep); + priv_dev = priv_ep->cdns3_dev; + + if (dev_WARN_ONCE(&priv_dev->dev, !(priv_ep->flags & EP_ENABLED), + "%s is already disabled\n", priv_ep->name)) + return 0; + + spin_lock_irqsave(&priv_dev->lock, flags); + if (!priv_dev->start_gadget) { + dev_dbg(&priv_dev->dev, + "Disabling endpoint at disconnection: %s\n", ep->name); + spin_unlock_irqrestore(&priv_dev->lock, flags); + return 0; + } + + dev_dbg(&priv_dev->dev, "Disabling endpoint: %s\n", ep->name); + + cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress); + ret = cdns3_data_flush(priv_ep); + while (!list_empty(&priv_ep->request_list)) { + request = cdns3_next_request(&priv_ep->request_list); + + cdns3_gadget_giveback(priv_ep, to_cdns3_request(request), + -ESHUTDOWN); + } + + ep_cfg = readl(&priv_dev->regs->ep_cfg); + ep_cfg &= ~EP_CFG_ENABLE; + writel(ep_cfg, &priv_dev->regs->ep_cfg); + ep->desc = NULL; + priv_ep->flags &= ~EP_ENABLED; + + spin_unlock_irqrestore(&priv_dev->lock, flags); + + return ret; +} + +/** + * cdns3_gadget_ep_alloc_request Allocates request + * @ep: endpoint object associated with request + * @gfp_flags: gfp flags + * + * Returns allocated request address, NULL on allocation error + */ +struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep, + gfp_t gfp_flags) +{ + struct cdns3_request *priv_req; + + priv_req = kzalloc(sizeof(*priv_req), gfp_flags); + if (!priv_req) + return NULL; + + return &priv_req->request; +} + +/** + * cdns3_gadget_ep_free_request Free memory occupied by request + * @ep: endpoint object associated with request + * @request: request to free memory + */ +void cdns3_gadget_ep_free_request(struct usb_ep *ep, + struct usb_request *request) +{ + struct cdns3_request *priv_req = to_cdns3_request(request); + + kfree(priv_req); +} + +/** + * cdns3_gadget_ep_queue Transfer data on endpoint + * @ep: endpoint object + * @request: request object + * @gfp_flags: gfp flags + * + * Returns 0 on success, error code elsewhere + */ +static int __cdns3_gadget_ep_queue(struct usb_ep *ep, + struct usb_request *request, + gfp_t gfp_flags) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + int ret = 0; + + request->actual = 0; + request->status = -EINPROGRESS; + + dev_dbg(&priv_dev->dev, "Queuing to endpoint: %s\n", priv_ep->name); + + ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request, + usb_endpoint_dir_in(ep->desc)); + + if (ret) + return ret; + + if (!cdns3_ep_run_transfer(priv_ep, request)) + list_add_tail(&request->list, &priv_ep->request_list); + + return ret; +} + +static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request, + gfp_t gfp_flags) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct usb_request *zlp_request; + unsigned long flags; + int ret; + + spin_lock_irqsave(&priv_dev->lock, flags); + ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags); + + if (ret == 0 && request->zero && request->length && + (request->length % ep->maxpacket == 0)) { + zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC); + zlp_request->buf = priv_dev->zlp_buf; + zlp_request->length = 0; + + dev_dbg(&priv_dev->dev, "Queuing ZLP for endpoint: %s\n", + priv_ep->name); + ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags); + } + + spin_unlock_irqrestore(&priv_dev->lock, flags); + return ret; +} + +/** + * cdns3_gadget_ep_dequeue Remove request from transfer queue + * @ep: endpoint object associated with request + * @request: request object + * + * Returns 0 on success, error code elsewhere + */ +int cdns3_gadget_ep_dequeue(struct usb_ep *ep, + struct usb_request *request) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct usb_request *req, *req_temp; + unsigned long flags; + int ret = 0; + + if (!ep || !request || !ep->desc) + return -EINVAL; + + spin_lock_irqsave(&priv_dev->lock, flags); + dev_dbg(&priv_dev->dev, "Dequeue from %s\n", ep->name); + + cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress); + if (priv_dev->start_gadget) + ret = cdns3_data_flush(priv_ep); + + list_for_each_entry_safe(req, req_temp, &priv_ep->request_list, list) { + if (request == req) { + cdns3_gadget_giveback(priv_ep, + to_cdns3_request(request), + -ECONNRESET); + break; + } + } + + spin_unlock_irqrestore(&priv_dev->lock, flags); + return ret; +} + +/** + * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint + * @ep: endpoint object to set/clear stall on + * @value: 1 for set stall, 0 for clear stall + * + * Returns 0 on success, error code elsewhere + */ +int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + unsigned long flags; + int ret = 0; + + if (!(priv_ep->flags & EP_ENABLED)) + return -EPERM; + + /* if actual transfer is pending defer setting stall on this endpoint */ + if ((priv_ep->flags & EP_PENDING_REQUEST) && value) { + priv_ep->flags |= EP_STALL; + return 0; + } + + dev_dbg(&priv_dev->dev, "Halt endpoint %s\n", priv_ep->name); + + spin_lock_irqsave(&priv_dev->lock, flags); + + cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress); + if (value) { + cdns3_ep_stall_flush(priv_ep); + } else { + priv_ep->flags &= ~EP_WEDGE; + writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd); + + /* wait for EPRST cleared */ + ret = cdns3_handshake(&priv_dev->regs->ep_cmd, + EP_CMD_EPRST, 0, 100); + priv_ep->flags &= ~EP_STALL; + } + + priv_ep->flags &= ~EP_PENDING_REQUEST; + spin_unlock_irqrestore(&priv_dev->lock, flags); + + return ret; +} + +extern const struct usb_ep_ops cdns3_gadget_ep0_ops; + +static const struct usb_ep_ops cdns3_gadget_ep_ops = { + .enable = cdns3_gadget_ep_enable, + .disable = cdns3_gadget_ep_disable, + .alloc_request = cdns3_gadget_ep_alloc_request, + .free_request = cdns3_gadget_ep_free_request, + .queue = cdns3_gadget_ep_queue, + .dequeue = cdns3_gadget_ep_dequeue, + .set_halt = cdns3_gadget_ep_set_halt, + .set_wedge = cdns3_gadget_ep_set_wedge, +}; + /** * cdns3_gadget_get_frame Returns number of actual ITP frame * @gadget: gadget object @@ -363,8 +790,7 @@ static int cdns3_init_ep(struct cdns3_device *priv_dev) usb_ep_set_maxpacket_limit(&priv_ep->endpoint, ENDPOINT_MAX_PACKET_LIMIT); priv_ep->endpoint.max_streams = ENDPOINT_MAX_STREAMS; - //TODO: Add implementation of cdns3_gadget_ep_ops - //priv_ep->endpoint.ops = &cdns3_gadget_ep_ops; + priv_ep->endpoint.ops = &cdns3_gadget_ep_ops; if (ep_dir) priv_ep->endpoint.caps.dir_in = 1; else diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index b57e863017b0..3930613aadda 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1068,4 +1068,7 @@ void cdns3_set_register_bit(void __iomem *ptr, u32 mask); int cdns3_init_ep0(struct cdns3_device *priv_dev); void cdns3_ep0_config(struct cdns3_device *priv_dev); void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep); +int cdns3_gadget_ep_set_wedge(struct usb_ep *ep); +int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value); + #endif /* __LINUX_CDNS3_GADGET */ From patchwork Sat Nov 3 17:51:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666743 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C0D4F14BD for ; Sat, 3 Nov 2018 17:53:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ADDA52877F for ; Sat, 3 Nov 2018 17:53:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A08BA287C2; Sat, 3 Nov 2018 17:53:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements related to default endpoint callback functions defined in usb_ep_ops object Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/ep0.c | 188 ++++++++++++++++++++++++++++++++++++- drivers/usb/cdns3/gadget.c | 8 ++ drivers/usb/cdns3/gadget.h | 10 ++ 3 files changed, 204 insertions(+), 2 deletions(-) diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index ca1795467155..f838e1e71183 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -18,11 +18,185 @@ static struct usb_endpoint_descriptor cdns3_gadget_ep0_desc = { .bmAttributes = USB_ENDPOINT_XFER_CONTROL, }; +/** + * cdns3_ep0_run_transfer - Do transfer on default endpoint hardware + * @priv_dev: extended gadget object + * @dma_addr: physical address where data is/will be stored + * @length: data length + * @erdy: set it to 1 when ERDY packet should be sent - + * exit from flow control state + */ +static void cdns3_ep0_run_transfer(struct cdns3_device *priv_dev, + dma_addr_t dma_addr, + unsigned int length, int erdy) +{ + struct cdns3_usb_regs __iomem *regs = priv_dev->regs; + + priv_dev->trb_ep0->buffer = TRB_BUFFER(dma_addr); + priv_dev->trb_ep0->length = TRB_LEN(length); + priv_dev->trb_ep0->control = TRB_CYCLE | TRB_IOC | TRB_TYPE(TRB_NORMAL); + + cdns3_select_ep(priv_dev, + priv_dev->ep0_data_dir ? USB_DIR_IN : USB_DIR_OUT); + + writel(EP_TRADDR_TRADDR(priv_dev->trb_ep0_dma), ®s->ep_traddr); + + dev_dbg(&priv_dev->dev, "//Ding Dong ep0%s\n", + priv_dev->ep0_data_dir ? "IN" : "OUT"); + + /* TRB should be prepared before starting transfer */ + wmb(); + writel(EP_CMD_DRDY, ®s->ep_cmd); + + if (erdy) + writel(EP_CMD_ERDY, &priv_dev->regs->ep_cmd); +} + static void cdns3_prepare_setup_packet(struct cdns3_device *priv_dev) { //TODO: Implements this function } +static void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) +{ + struct cdns3_endpoint *priv_ep; + struct usb_request *request; + struct usb_ep *ep; + int result = 0; + + if (priv_dev->hw_configured_flag) + return; + + writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf); + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); + + cdns3_set_register_bit(&priv_dev->regs->usb_conf, + USB_CONF_U1EN | USB_CONF_U2EN); + + /* wait until configuration set */ + result = cdns3_handshake(&priv_dev->regs->usb_sts, + USB_STS_CFGSTS_MASK, 1, 100); + + priv_dev->hw_configured_flag = 1; + cdns3_enable_l1(priv_dev, 1); + + list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) { + if (ep->enabled) { + priv_ep = ep_to_cdns3_ep(ep); + request = cdns3_next_request(&priv_ep->request_list); + if (request) + cdns3_ep_run_transfer(priv_ep, request); + } + } +} + +/** + * cdns3_gadget_ep0_enable + * Function shouldn't be called by gadget driver, + * endpoint 0 is allways active + */ +static int cdns3_gadget_ep0_enable(struct usb_ep *ep, + const struct usb_endpoint_descriptor *desc) +{ + return -EINVAL; +} + +/** + * cdns3_gadget_ep0_disable + * Function shouldn't be called by gadget driver, + * endpoint 0 is allways active + */ +static int cdns3_gadget_ep0_disable(struct usb_ep *ep) +{ + return -EINVAL; +} + +/** + * cdns3_gadget_ep0_set_halt + * @ep: pointer to endpoint zero object + * @value: 1 for set stall, 0 for clear stall + * + * Returns 0 + */ +static int cdns3_gadget_ep0_set_halt(struct usb_ep *ep, int value) +{ + /* TODO */ + return 0; +} + +/** + * cdns3_gadget_ep0_queue Transfer data on endpoint zero + * @ep: pointer to endpoint zero object + * @request: pointer to request object + * @gfp_flags: gfp flags + * + * Returns 0 on success, error code elsewhere + */ +static int cdns3_gadget_ep0_queue(struct usb_ep *ep, + struct usb_request *request, + gfp_t gfp_flags) +{ + struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + unsigned long flags; + int erdy_sent = 0; + int ret = 0; + + dev_dbg(&priv_dev->dev, "Queue to Ep0%s L: %d\n", + priv_dev->ep0_data_dir ? "IN" : "OUT", + request->length); + + /* send STATUS stage */ + if (request->length == 0 && request->zero == 0) { + spin_lock_irqsave(&priv_dev->lock, flags); + cdns3_select_ep(priv_dev, 0x00); + + erdy_sent = !priv_dev->hw_configured_flag; + cdns3_set_hw_configuration(priv_dev); + + if (!erdy_sent) + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, + &priv_dev->regs->ep_cmd); + + cdns3_prepare_setup_packet(priv_dev); + request->actual = 0; + priv_dev->status_completion_no_call = true; + priv_dev->pending_status_request = request; + spin_unlock_irqrestore(&priv_dev->lock, flags); + + /* + * Since there is no completion interrupt for status stage, + * it needs to call ->completion in software after + * ep0_queue is back. + */ + queue_work(system_freezable_wq, &priv_dev->pending_status_wq); + return 0; + } + + spin_lock_irqsave(&priv_dev->lock, flags); + if (!list_empty(&priv_ep->request_list)) { + dev_err(&priv_dev->dev, + "can't handle multiple requests for ep0\n"); + spin_unlock_irqrestore(&priv_dev->lock, flags); + return -EOPNOTSUPP; + } + + ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request, + priv_dev->ep0_data_dir); + if (ret) { + spin_unlock_irqrestore(&priv_dev->lock, flags); + dev_err(&priv_dev->dev, "failed to map request\n"); + return -EINVAL; + } + + priv_dev->ep0_request = request; + list_add_tail(&request->list, &priv_ep->request_list); + cdns3_ep0_run_transfer(priv_dev, request->dma, request->length, 1); + spin_unlock_irqrestore(&priv_dev->lock, flags); + + return ret; +} + /** * cdns3_gadget_ep_set_wedge Set wedge on selected endpoint * @ep: endpoint object @@ -41,6 +215,17 @@ int cdns3_gadget_ep_set_wedge(struct usb_ep *ep) return 0; } +const struct usb_ep_ops cdns3_gadget_ep0_ops = { + .enable = cdns3_gadget_ep0_enable, + .disable = cdns3_gadget_ep0_disable, + .alloc_request = cdns3_gadget_ep_alloc_request, + .free_request = cdns3_gadget_ep_free_request, + .queue = cdns3_gadget_ep0_queue, + .dequeue = cdns3_gadget_ep_dequeue, + .set_halt = cdns3_gadget_ep0_set_halt, + .set_wedge = cdns3_gadget_ep_set_wedge, +}; + /** * cdns3_ep0_config - Configures default endpoint * @priv_dev: extended gadget object @@ -106,8 +291,7 @@ int cdns3_init_ep0(struct cdns3_device *priv_dev) sprintf(ep0->name, "ep0"); /* fill linux fields */ - //TODO: implements cdns3_gadget_ep0_ops object - //ep0->endpoint.ops = &cdns3_gadget_ep0_ops; + ep0->endpoint.ops = &cdns3_gadget_ep0_ops; ep0->endpoint.maxburst = 1; usb_ep_set_maxpacket_limit(&ep0->endpoint, ENDPOINT0_MAX_PACKET_LIMIT); ep0->endpoint.address = 0; diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index b08e0836f9a5..cd6023c04be9 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -178,6 +178,14 @@ static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep) priv_ep->flags |= EP_STALL; } +void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable) +{ + if (enable) + writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf); + else + writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf); +} + /** * cdns3_gadget_giveback - call struct usb_request's ->complete callback * @priv_ep: The endpoint to whom the request belongs to diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index 3930613aadda..9732273f1b32 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1064,11 +1064,21 @@ struct cdns3_device { struct usb_request *pending_status_request; }; +int cdns3_handshake(void __iomem *ptr, u32 mask, u32 done, int usec); void cdns3_set_register_bit(void __iomem *ptr, u32 mask); int cdns3_init_ep0(struct cdns3_device *priv_dev); void cdns3_ep0_config(struct cdns3_device *priv_dev); void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep); +void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable); +struct usb_request *cdns3_next_request(struct list_head *list); +int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, + struct usb_request *request); int cdns3_gadget_ep_set_wedge(struct usb_ep *ep); int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value); +struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep, + gfp_t gfp_flags); +void cdns3_gadget_ep_free_request(struct usb_ep *ep, + struct usb_request *request); +int cdns3_gadget_ep_dequeue(struct usb_ep *ep, struct usb_request *request); #endif /* __LINUX_CDNS3_GADGET */ From patchwork Sat Nov 3 17:51:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666741 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2C5F717D5 for ; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds set of generic functions used for handling interrupts generated by controller. Interrupt related functions are divided into three groups. The first is related to ep0 and is placed in ep0.c. The second is responsible for non-default endpoints and is implemented in gadget.c file. The last group is not related to endpoints interrupts and is placed in gadget.c. All groups have common entry point in cdns3_irq_handler_thread function. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/ep0.c | 63 +++++++++++ drivers/usb/cdns3/gadget.c | 224 ++++++++++++++++++++++++++++++++++++- drivers/usb/cdns3/gadget.h | 1 + 3 files changed, 287 insertions(+), 1 deletion(-) diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index f838e1e71183..369bd6748416 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -90,6 +90,69 @@ static void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) } } +static void __pending_setup_status_handler(struct cdns3_device *priv_dev) +{ + //TODO: Implements this function +} + +/** + * cdns3_ep0_setup_phase - Handling setup USB requests + * @priv_dev: extended gadget object + */ +static void cdns3_ep0_setup_phase(struct cdns3_device *priv_dev) +{ + //TODO: Implements this function. +} + +static void cdns3_transfer_completed(struct cdns3_device *priv_dev) +{ + //TODO: Implements this function +} + +/** + * cdns3_check_ep0_interrupt_proceed - Processes interrupt related to endpoint 0 + * @priv_dev: extended gadget object + * @dir: 1 for IN direction, 0 for OUT direction + */ +void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir) +{ + struct cdns3_usb_regs __iomem *regs = priv_dev->regs; + u32 ep_sts_reg; + + cdns3_select_ep(priv_dev, 0 | (dir ? USB_DIR_IN : USB_DIR_OUT)); + ep_sts_reg = readl(®s->ep_sts); + + __pending_setup_status_handler(priv_dev); + + if ((ep_sts_reg & EP_STS_SETUP) && dir == 0) { + struct usb_ctrlrequest *setup = priv_dev->setup; + + writel(EP_STS_SETUP | EP_STS_IOC | EP_STS_ISP, ®s->ep_sts); + + priv_dev->ep0_data_dir = setup->bRequestType & USB_DIR_IN; + cdns3_ep0_setup_phase(priv_dev); + ep_sts_reg &= ~(EP_STS_SETUP | EP_STS_IOC | EP_STS_ISP); + } + + if (ep_sts_reg & EP_STS_TRBERR) + writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts); + + if (ep_sts_reg & EP_STS_DESCMIS) { + writel(EP_STS_DESCMIS, &priv_dev->regs->ep_sts); + + if (dir == 0 && !priv_dev->setup_pending) { + priv_dev->ep0_data_dir = 0; + cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma, + 8, 0); + } + } + + if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) { + writel(EP_STS_IOC, &priv_dev->regs->ep_sts); + cdns3_transfer_completed(priv_dev); + } +} + /** * cdns3_gadget_ep0_enable * Function shouldn't be called by gadget driver, diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index cd6023c04be9..cb8a3473449b 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -58,6 +58,18 @@ void cdns3_set_register_bit(void __iomem *ptr, u32 mask) writel(mask, ptr); } +/** + * cdns3_ep_reg_pos_to_index - Macro converts bit position of ep_ists register + * to index of endpoint object in cdns3_device.eps[] container + * @i: bit position of endpoint for which endpoint object is required + * + * Remember that endpoint container doesn't contain default endpoint + */ +static u8 cdns3_ep_reg_pos_to_index(int i) +{ + return ((i / 16) + (((i % 16) - 2) * 2)); +} + /** * cdns3_next_request - returns next request from list * @list: list containing requests @@ -178,6 +190,21 @@ static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep) priv_ep->flags |= EP_STALL; } +/** + * cdns3_gadget_unconfig - reset device configuration + * @priv_dev: extended gadget object + */ +void cdns3_gadget_unconfig(struct cdns3_device *priv_dev) +{ + /* RESET CONFIGURATION */ + writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf); + + cdns3_enable_l1(priv_dev, 0); + priv_dev->hw_configured_flag = 0; + priv_dev->onchip_mem_allocated_size = 0; + priv_dev->out_mem_is_allocated = 0; +} + void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable) { if (enable) @@ -186,6 +213,23 @@ void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable) writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf); } +static enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev) +{ + u32 reg; + + reg = readl(&priv_dev->regs->usb_sts); + + if (DEV_SUPERSPEED(reg)) + return USB_SPEED_SUPER; + else if (DEV_HIGHSPEED(reg)) + return USB_SPEED_HIGH; + else if (DEV_FULLSPEED(reg)) + return USB_SPEED_FULL; + else if (DEV_LOWSPEED(reg)) + return USB_SPEED_LOW; + return USB_SPEED_UNKNOWN; +} + /** * cdns3_gadget_giveback - call struct usb_request's ->complete callback * @priv_ep: The endpoint to whom the request belongs to @@ -211,12 +255,136 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep, */ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, struct usb_request *request) +{ + return 0; +} + +static void cdns3_transfer_completed(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep) { //TODO: Implements this function. +} + +/** + * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint + * @priv_ep: endpoint object + * + * Returns 0 + */ +static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct cdns3_usb_regs __iomem *regs; + u32 ep_sts_reg; + + regs = priv_dev->regs; + + cdns3_select_ep(priv_dev, priv_ep->endpoint.address); + ep_sts_reg = readl(®s->ep_sts); + + if (ep_sts_reg & EP_STS_TRBERR) + writel(EP_STS_TRBERR, ®s->ep_sts); + + if (ep_sts_reg & EP_STS_ISOERR) + writel(EP_STS_ISOERR, ®s->ep_sts); + + if (ep_sts_reg & EP_STS_OUTSMM) + writel(EP_STS_OUTSMM, ®s->ep_sts); + + if (ep_sts_reg & EP_STS_NRDY) + writel(EP_STS_NRDY, ®s->ep_sts); + + if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) { + writel(EP_STS_IOC | EP_STS_ISP, ®s->ep_sts); + cdns3_transfer_completed(priv_dev, priv_ep); + } + + if (ep_sts_reg & EP_STS_DESCMIS) + writel(EP_STS_DESCMIS, ®s->ep_sts); return 0; } +/** + * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device + * @priv_dev: extended gadget object + * @usb_ists: bitmap representation of device's reported interrupts + * (usb_ists register value) + */ +static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev, + u32 usb_ists) +{ + struct cdns3_usb_regs __iomem *regs; + int speed = 0; + + regs = priv_dev->regs; + + /* Connection detected */ + if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) { + writel(USB_ISTS_CON2I | USB_ISTS_CONI, ®s->usb_ists); + speed = cdns3_get_speed(priv_dev); + + dev_dbg(&priv_dev->dev, "Connection detected at speed: %s %d\n", + usb_speed_string(speed), speed); + + priv_dev->gadget.speed = speed; + priv_dev->is_connected = 1; + usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED); + cdns3_ep0_config(priv_dev); + } + + /* SS Disconnection detected */ + if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) { + dev_dbg(&priv_dev->dev, "Disconnection detected\n"); + + writel(USB_ISTS_DIS2I | USB_ISTS_DISI, ®s->usb_ists); + if (priv_dev->gadget_driver && + priv_dev->gadget_driver->disconnect) { + spin_unlock(&priv_dev->lock); + priv_dev->gadget_driver->disconnect(&priv_dev->gadget); + spin_lock(&priv_dev->lock); + } + priv_dev->gadget.speed = USB_SPEED_UNKNOWN; + usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED); + priv_dev->is_connected = 0; + cdns3_gadget_unconfig(priv_dev); + } + + if (usb_ists & USB_ISTS_L2ENTI) { + dev_dbg(&priv_dev->dev, "Device suspended\n"); + writel(USB_ISTS_L2ENTI, ®s->usb_ists); + } + + /* Exit from standby mode on L2 exit (Suspend in HS/FS or SS) */ + if (usb_ists & USB_ISTS_L2EXTI) { + dev_dbg(&priv_dev->dev, "[Interrupt] L2 exit detected\n"); + writel(USB_ISTS_L2EXTI, ®s->usb_ists); + } + + /* Exit from standby mode on U3 exit (Suspend in HS/FS or SS). */ + if (usb_ists & USB_ISTS_U3EXTI) { + dev_dbg(&priv_dev->dev, "U3 exit detected\n"); + writel(USB_ISTS_U3EXTI, ®s->usb_ists); + } + + /* resets cases */ + if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) { + writel(USB_ISTS_U2RESI | USB_ISTS_UWRESI | USB_ISTS_UHRESI, + ®s->usb_ists); + + /*read again to check the actuall speed*/ + speed = cdns3_get_speed(priv_dev); + + dev_dbg(&priv_dev->dev, "Reset detected at speed: %s %d\n", + usb_speed_string(speed), speed); + + usb_gadget_set_state(&priv_dev->gadget, USB_STATE_DEFAULT); + priv_dev->gadget.speed = speed; + cdns3_gadget_unconfig(priv_dev); + cdns3_ep0_config(priv_dev); + } +} + /** * cdns3_irq_handler - irq line interrupt handler * @cdns: cdns3 instance @@ -227,8 +395,62 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, */ static irqreturn_t cdns3_irq_handler_thread(struct cdns3 *cdns) { + struct cdns3_device *priv_dev; irqreturn_t ret = IRQ_NONE; - //TODO: implements this function + unsigned long flags; + u32 reg; + + priv_dev = container_of(cdns->gadget_dev, struct cdns3_device, dev); + spin_lock_irqsave(&priv_dev->lock, flags); + + /* check USB device interrupt */ + reg = readl(&priv_dev->regs->usb_ists); + if (reg) { + dev_dbg(&priv_dev->dev, "IRQ: usb_ists: %08X\n", reg); + cdns3_check_usb_interrupt_proceed(priv_dev, reg); + ret = IRQ_HANDLED; + } + + /* check endpoint interrupt */ + reg = readl(&priv_dev->regs->ep_ists); + if (reg != 0) { + dev_dbg(&priv_dev->dev, "IRQ ep_ists: %08X\n", reg); + } else { + if (USB_STS_CFGSTS(readl(&priv_dev->regs->usb_sts))) + ret = IRQ_HANDLED; + goto irqend; + } + + /* handle default endpoint OUT */ + if (reg & EP_ISTS_EP_OUT0) { + cdns3_check_ep0_interrupt_proceed(priv_dev, 0); + ret = IRQ_HANDLED; + } + + /* handle default endpoint IN */ + if (reg & EP_ISTS_EP_IN0) { + cdns3_check_ep0_interrupt_proceed(priv_dev, 1); + ret = IRQ_HANDLED; + } + + /* check if interrupt from non default endpoint, if no exit */ + reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0); + if (!reg) + goto irqend; + + do { + unsigned int bit_pos = ffs(reg); + u32 bit_mask = 1 << (bit_pos - 1); + int index; + + index = cdns3_ep_reg_pos_to_index(bit_pos); + cdns3_check_ep_interrupt_proceed(priv_dev->eps[index]); + reg &= ~bit_mask; + ret = IRQ_HANDLED; + } while (reg); + +irqend: + spin_unlock_irqrestore(&priv_dev->lock, flags); return ret; } diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index 9732273f1b32..2ad3addf8bd7 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1068,6 +1068,7 @@ int cdns3_handshake(void __iomem *ptr, u32 mask, u32 done, int usec); void cdns3_set_register_bit(void __iomem *ptr, u32 mask); int cdns3_init_ep0(struct cdns3_device *priv_dev); void cdns3_ep0_config(struct cdns3_device *priv_dev); +void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir); void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep); void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable); struct usb_request *cdns3_next_request(struct list_head *list); From patchwork Sat Nov 3 17:51:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2405A14BD for ; Sat, 3 Nov 2018 17:53:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1062329C44 for ; Sat, 3 Nov 2018 17:53:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 043BB29C69; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements a set of function related to enumeration process. Some standard requests are handled on controller driver level and other are delegated to gadget core driver. All class requests are delegated to gadget core driver. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/ep0.c | 490 ++++++++++++++++++++++++++++++++++++- drivers/usb/cdns3/gadget.c | 119 +++++++++ drivers/usb/cdns3/gadget.h | 4 + 3 files changed, 609 insertions(+), 4 deletions(-) diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index 369bd6748416..555ac7f6842e 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -10,6 +10,7 @@ * Peter Chen */ +#include #include "gadget.h" static struct usb_endpoint_descriptor cdns3_gadget_ep0_desc = { @@ -52,9 +53,31 @@ static void cdns3_ep0_run_transfer(struct cdns3_device *priv_dev, writel(EP_CMD_ERDY, &priv_dev->regs->ep_cmd); } +/** + * cdns3_ep0_delegate_req - Returns status of handling setup packet + * Setup is handled by gadget driver + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns zero on success or negative value on failure + */ +static int cdns3_ep0_delegate_req(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + int ret; + + spin_unlock(&priv_dev->lock); + priv_dev->setup_pending = 1; + ret = priv_dev->gadget_driver->setup(&priv_dev->gadget, ctrl_req); + priv_dev->setup_pending = 0; + spin_lock(&priv_dev->lock); + return ret; +} + static void cdns3_prepare_setup_packet(struct cdns3_device *priv_dev) { - //TODO: Implements this function + priv_dev->ep0_data_dir = 0; + cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma, 8, 0); } static void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) @@ -90,9 +113,430 @@ static void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) } } +/** + * cdns3_req_ep0_set_configuration - Handling of SET_CONFIG standard USB request + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, 0x7FFF on deferred status stage, error code on error + */ +static int cdns3_req_ep0_set_configuration(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + enum usb_device_state device_state = priv_dev->gadget.state; + struct cdns3_endpoint *priv_ep, *temp_ep; + u32 config = le16_to_cpu(ctrl_req->wValue); + int result = 0; + + switch (device_state) { + case USB_STATE_ADDRESS: + /* Configure non-control EPs */ + list_for_each_entry_safe(priv_ep, temp_ep, + &priv_dev->ep_match_list, + ep_match_pending_list) + cdns3_ep_config(priv_ep); + + result = cdns3_ep0_delegate_req(priv_dev, ctrl_req); + + if (result) + return result; + + if (config) { + cdns3_set_hw_configuration(priv_dev); + } else { + cdns3_gadget_unconfig(priv_dev); + usb_gadget_set_state(&priv_dev->gadget, + USB_STATE_ADDRESS); + } + break; + case USB_STATE_CONFIGURED: + result = cdns3_ep0_delegate_req(priv_dev, ctrl_req); + + if (!config && !result) { + cdns3_gadget_unconfig(priv_dev); + usb_gadget_set_state(&priv_dev->gadget, + USB_STATE_ADDRESS); + } + break; + default: + result = -EINVAL; + } + + return result; +} + +/** + * cdns3_req_ep0_set_address - Handling of SET_ADDRESS standard USB request + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, error code on error + */ +static int cdns3_req_ep0_set_address(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + enum usb_device_state device_state = priv_dev->gadget.state; + u32 reg; + u32 addr; + + addr = le16_to_cpu(ctrl_req->wValue); + + if (addr > DEVICE_ADDRESS_MAX) { + dev_err(&priv_dev->dev, + "Device address (%d) cannot be greater than %d\n", + addr, DEVICE_ADDRESS_MAX); + return -EINVAL; + } + + if (device_state == USB_STATE_CONFIGURED) { + dev_err(&priv_dev->dev, "USB device already configured\n"); + return -EINVAL; + } + + reg = readl(&priv_dev->regs->usb_cmd); + + writel(reg | USB_CMD_FADDR(addr) | USB_CMD_SET_ADDR, + &priv_dev->regs->usb_cmd); + + usb_gadget_set_state(&priv_dev->gadget, + (addr ? USB_STATE_ADDRESS : USB_STATE_DEFAULT)); + + cdns3_prepare_setup_packet(priv_dev); + + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); + + return 0; +} + +/** + * cdns3_req_ep0_get_status - Handling of GET_STATUS standard USB request + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, error code on error + */ +static int cdns3_req_ep0_get_status(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl) +{ + __le16 *response_pkt; + u16 usb_status = 0; + u32 recip; + u32 reg; + + recip = ctrl->bRequestType & USB_RECIP_MASK; + + switch (recip) { + case USB_RECIP_DEVICE: + /* self powered */ + usb_status |= priv_dev->gadget.is_selfpowered; + + if (priv_dev->gadget.speed != USB_SPEED_SUPER) + break; + + reg = readl(&priv_dev->regs->usb_sts); + + if (USB_STS_U2ENS(reg)) + usb_status |= BIT(USB_DEV_STAT_U1_ENABLED); + + if (USB_STS_U2ENS(reg)) + usb_status |= BIT(USB_DEV_STAT_U2_ENABLED); + + if (priv_dev->wake_up_flag) + usb_status |= BIT(USB_DEVICE_REMOTE_WAKEUP); + break; + case USB_RECIP_INTERFACE: + return cdns3_ep0_delegate_req(priv_dev, ctrl); + case USB_RECIP_ENDPOINT: + /* check if endpoint is stalled */ + cdns3_select_ep(priv_dev, ctrl->wIndex); + if (EP_STS_STALL(readl(&priv_dev->regs->ep_sts))) + usb_status = BIT(USB_ENDPOINT_HALT); + break; + default: + return -EINVAL; + } + + response_pkt = (__le16 *)priv_dev->setup; + *response_pkt = cpu_to_le16(usb_status); + + cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma, + sizeof(*response_pkt), 1); + return 0; +} + +static int cdns3_ep0_feature_handle_device(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl, + int set) +{ + enum usb_device_state state; + enum usb_device_speed speed; + int ret = 0; + u32 wValue; + u32 wIndex; + u16 tmode; + + wValue = le16_to_cpu(ctrl->wValue); + wIndex = le16_to_cpu(ctrl->wIndex); + state = priv_dev->gadget.state; + speed = priv_dev->gadget.speed; + + switch (ctrl->wValue) { + case USB_DEVICE_REMOTE_WAKEUP: + priv_dev->wake_up_flag = !!set; + break; + case USB_DEVICE_U1_ENABLE: + if (state != USB_STATE_CONFIGURED || speed != USB_SPEED_SUPER) + return -EINVAL; + + cdns3_set_register_bit(&priv_dev->regs->usb_conf, + (set) ? USB_CONF_U1EN : USB_CONF_U1DS); + break; + case USB_DEVICE_U2_ENABLE: + if (state != USB_STATE_CONFIGURED || speed != USB_SPEED_SUPER) + return -EINVAL; + + cdns3_set_register_bit(&priv_dev->regs->usb_conf, + (set) ? USB_CONF_U2EN : USB_CONF_U2DS); + break; + case USB_DEVICE_LTM_ENABLE: + ret = -EINVAL; + break; + case USB_DEVICE_TEST_MODE: + if (state != USB_STATE_CONFIGURED || speed > USB_SPEED_HIGH) + return -EINVAL; + + tmode = le16_to_cpu(ctrl->wIndex); + + if (!set || (tmode & 0xff) != 0) + return -EINVAL; + + switch (tmode >> 8) { + case TEST_J: + case TEST_K: + case TEST_SE0_NAK: + case TEST_PACKET: + cdns3_set_register_bit(&priv_dev->regs->usb_cmd, + USB_CMD_STMODE | + USB_STS_TMODE_SEL(tmode - 1)); + break; + default: + ret = -EINVAL; + } + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int cdns3_ep0_feature_handle_intf(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl, + int set) +{ + u32 wValue; + int ret = 0; + + wValue = le16_to_cpu(ctrl->wValue); + + switch (wValue) { + case USB_INTRF_FUNC_SUSPEND: + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int cdns3_ep0_feature_handle_endpoint(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl, + int set) +{ + struct cdns3_endpoint *priv_ep; + int ret = 0; + u8 index; + + index = cdns3_ep_addr_to_index(ctrl->wIndex); + priv_ep = priv_dev->eps[index]; + + cdns3_select_ep(priv_dev, ctrl->wIndex); + + if (le16_to_cpu(ctrl->wValue) != USB_ENDPOINT_HALT) + return -EINVAL; + + if (set) { + writel(EP_CMD_SSTALL, &priv_dev->regs->ep_cmd); + priv_ep->flags |= EP_STALL; + } else { + struct usb_request *request; + + if (priv_dev->eps[index]->flags & EP_WEDGE) { + cdns3_select_ep(priv_dev, 0x00); + return 0; + } + + writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd); + + /* wait for EPRST cleared */ + ret = cdns3_handshake(&priv_dev->regs->ep_cmd, + EP_CMD_EPRST, 0, 100); + if (ret) + return -EINVAL; + + priv_ep->flags &= ~EP_STALL; + + request = cdns3_next_request(&priv_ep->request_list); + if (request) + cdns3_ep_run_transfer(priv_ep, request); + } + return ret; +} + +/** + * cdns3_req_ep0_handle_feature - + * Handling of GET/SET_FEATURE standard USB request + * + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * @set: must be set to 1 for SET_FEATURE request + * + * Returns 0 if success, error code on error + */ +static int cdns3_req_ep0_handle_feature(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl, + int set) +{ + int ret = 0; + u32 recip; + + recip = ctrl->bRequestType & USB_RECIP_MASK; + + switch (recip) { + case USB_RECIP_DEVICE: + ret = cdns3_ep0_feature_handle_device(priv_dev, ctrl, set); + break; + case USB_RECIP_INTERFACE: + ret = cdns3_ep0_feature_handle_intf(priv_dev, ctrl, set); + break; + case USB_RECIP_ENDPOINT: + ret = cdns3_ep0_feature_handle_endpoint(priv_dev, ctrl, set); + break; + default: + return -EINVAL; + } + + if (!ret) + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); + + return ret; +} + +/** + * cdns3_req_ep0_set_sel - Handling of SET_SEL standard USB request + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, error code on error + */ +static int cdns3_req_ep0_set_sel(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + if (priv_dev->gadget.state < USB_STATE_ADDRESS) + return -EINVAL; + + if (ctrl_req->wLength != 6) { + dev_err(&priv_dev->dev, "Set SEL should be 6 bytes, got %d\n", + ctrl_req->wLength); + return -EINVAL; + } + + priv_dev->ep0_data_dir = 0; + cdns3_ep0_run_transfer(priv_dev, priv_dev->setup_dma, 6, 1); + return 0; +} + +/** + * cdns3_req_ep0_set_isoch_delay - + * Handling of GET_ISOCH_DELAY standard USB request + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, error code on error + */ +static int cdns3_req_ep0_set_isoch_delay(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + if (ctrl_req->wIndex || ctrl_req->wLength) + return -EINVAL; + + priv_dev->isoch_delay = ctrl_req->wValue; + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); + return 0; +} + +/** + * cdns3_ep0_standard_request - Handling standard USB requests + * @priv_dev: extended gadget object + * @ctrl_req: pointer to received setup packet + * + * Returns 0 if success, error code on error + */ +static int cdns3_ep0_standard_request(struct cdns3_device *priv_dev, + struct usb_ctrlrequest *ctrl_req) +{ + int ret; + + switch (ctrl_req->bRequest) { + case USB_REQ_SET_ADDRESS: + ret = cdns3_req_ep0_set_address(priv_dev, ctrl_req); + break; + case USB_REQ_SET_CONFIGURATION: + ret = cdns3_req_ep0_set_configuration(priv_dev, ctrl_req); + break; + case USB_REQ_GET_STATUS: + ret = cdns3_req_ep0_get_status(priv_dev, ctrl_req); + break; + case USB_REQ_CLEAR_FEATURE: + ret = cdns3_req_ep0_handle_feature(priv_dev, ctrl_req, 0); + break; + case USB_REQ_SET_FEATURE: + ret = cdns3_req_ep0_handle_feature(priv_dev, ctrl_req, 1); + break; + case USB_REQ_SET_SEL: + ret = cdns3_req_ep0_set_sel(priv_dev, ctrl_req); + break; + case USB_REQ_SET_ISOCH_DELAY: + ret = cdns3_req_ep0_set_isoch_delay(priv_dev, ctrl_req); + break; + default: + ret = cdns3_ep0_delegate_req(priv_dev, ctrl_req); + break; + } + + return ret; +} + static void __pending_setup_status_handler(struct cdns3_device *priv_dev) { - //TODO: Implements this function + struct usb_request *request = priv_dev->pending_status_request; + + if (priv_dev->status_completion_no_call && request && + request->complete) { + request->complete(priv_dev->gadget.ep0, request); + priv_dev->status_completion_no_call = 0; + } +} + +void cdns3_pending_setup_status_handler(struct work_struct *work) +{ + struct cdns3_device *priv_dev = container_of(work, struct cdns3_device, + pending_status_wq); + unsigned long flags; + + spin_lock_irqsave(&priv_dev->lock, flags); + __pending_setup_status_handler(priv_dev); + spin_unlock_irqrestore(&priv_dev->lock, flags); } /** @@ -101,12 +545,50 @@ static void __pending_setup_status_handler(struct cdns3_device *priv_dev) */ static void cdns3_ep0_setup_phase(struct cdns3_device *priv_dev) { - //TODO: Implements this function. + struct usb_ctrlrequest *ctrl = priv_dev->setup; + int result; + + if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) + result = cdns3_ep0_standard_request(priv_dev, ctrl); + else + result = cdns3_ep0_delegate_req(priv_dev, ctrl); + + if (result != 0 && result != USB_GADGET_DELAYED_STATUS) { + dev_dbg(&priv_dev->dev, "STALL(00) %d\n", result); + /* set_stall on ep0 */ + cdns3_select_ep(priv_dev, 0x00); + writel(EP_CMD_SSTALL, &priv_dev->regs->ep_cmd); + writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); + } } static void cdns3_transfer_completed(struct cdns3_device *priv_dev) { - //TODO: Implements this function + if (priv_dev->ep0_request) { + usb_gadget_unmap_request_by_dev(priv_dev->sysdev, + priv_dev->ep0_request, + priv_dev->ep0_data_dir); + + priv_dev->ep0_request->actual = + TRB_LEN(le32_to_cpu(priv_dev->trb_ep0->length)); + + dev_dbg(&priv_dev->dev, "Ep0 completion length %d\n", + priv_dev->ep0_request->actual); + list_del_init(&priv_dev->ep0_request->list); + } + + if (priv_dev->ep0_request && + priv_dev->ep0_request->complete) { + spin_unlock(&priv_dev->lock); + priv_dev->ep0_request->complete(priv_dev->gadget.ep0, + priv_dev->ep0_request); + + priv_dev->ep0_request = NULL; + spin_lock(&priv_dev->lock); + } + + cdns3_prepare_setup_packet(priv_dev); + writel(EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd); } /** diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index cb8a3473449b..e5c4d9236f07 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -70,6 +70,30 @@ static u8 cdns3_ep_reg_pos_to_index(int i) return ((i / 16) + (((i % 16) - 2) * 2)); } +/** + * cdns3_ep_addr_to_index - Macro converts endpoint address to + * index of endpoint object in cdns3_device.eps[] container + * @ep_addr: endpoint address for which endpoint object is required + * + * Remember that endpoint container doesn't contain default endpoint + */ +u8 cdns3_ep_addr_to_index(u8 ep_addr) +{ + return (((ep_addr & 0x7F) - 1) + ((ep_addr & USB_DIR_IN) ? 1 : 0)); +} + +/** + * cdns3_ep_addr_to_bit_pos - Macro converts endpoint address to + * bit position in ep_ists register + * @ep_addr: endpoint address for which bit position is required + * + * Remember that endpoint container doesn't contain default endpoint + */ +static u32 cdns3_ep_addr_to_bit_pos(u8 ep_addr) +{ + return (1 << (ep_addr & 0x7F)) << ((ep_addr & 0x80) ? 16 : 0); +} + /** * cdns3_next_request - returns next request from list * @list: list containing requests @@ -454,6 +478,99 @@ static irqreturn_t cdns3_irq_handler_thread(struct cdns3 *cdns) return ret; } +/** + * cdns3_ep_onchip_buffer_alloc - Try to allocate onchip buf for EP + * + * The real allocation will occur during write to EP_CFG register, + * this function is used to check if the 'size' allocation is allowed. + * + * @priv_dev: extended gadget object + * @size: the size (KB) for EP would like to allocate + * @is_in: the direction for EP + * + * Return 0 if the later allocation is allowed or negative value on failure + */ +static int cdns3_ep_onchip_buffer_alloc(struct cdns3_device *priv_dev, + int size, int is_in) +{ + if (is_in) { + priv_dev->onchip_mem_allocated_size += size; + } else if (!priv_dev->out_mem_is_allocated) { + /* ALL OUT EPs are shared the same chunk onchip memory */ + priv_dev->onchip_mem_allocated_size += size; + priv_dev->out_mem_is_allocated = 1; + } + + if (priv_dev->onchip_mem_allocated_size > CDNS3_ONCHIP_BUF_SIZE) { + priv_dev->onchip_mem_allocated_size -= size; + return -EPERM; + } else { + return 0; + } +} + +/** + * cdns3_ep_config Configure hardware endpoint + * @priv_ep: extended endpoint object + */ +void cdns3_ep_config(struct cdns3_endpoint *priv_ep) +{ + bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC); + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + u32 bEndpointAddress = priv_ep->num | priv_ep->dir; + u32 interrupt_mask = EP_STS_EN_TRBERREN; + u32 max_packet_size = 0; + u32 ep_cfg = 0; + int ret; + + if (priv_ep->type == USB_ENDPOINT_XFER_INT) { + ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT); + } else if (priv_ep->type == USB_ENDPOINT_XFER_BULK) { + ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK); + } else { + ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC); + interrupt_mask = 0xFFFFFFFF; + } + + switch (priv_dev->gadget.speed) { + case USB_SPEED_FULL: + max_packet_size = is_iso_ep ? 1023 : 64; + break; + case USB_SPEED_HIGH: + max_packet_size = is_iso_ep ? 1024 : 512; + break; + case USB_SPEED_SUPER: + max_packet_size = 1024; + break; + default: + //all other speed are not supported + return; + } + + ret = cdns3_ep_onchip_buffer_alloc(priv_dev, CDNS3_EP_BUF_SIZE, + priv_ep->dir); + if (ret) { + dev_err(&priv_dev->dev, "onchip mem is full, ep is invalid\n"); + return; + } + + ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) | + EP_CFG_BUFFERING(CDNS3_EP_BUF_SIZE - 1) | + EP_CFG_MAXBURST(priv_ep->endpoint.maxburst); + + cdns3_select_ep(priv_dev, bEndpointAddress); + + writel(ep_cfg, &priv_dev->regs->ep_cfg); + writel(interrupt_mask, &priv_dev->regs->ep_sts_en); + + dev_dbg(&priv_dev->dev, "Configure %s: with val %08x\n", + priv_ep->name, ep_cfg); + + /* enable interrupt for selected endpoint */ + cdns3_set_register_bit(&priv_dev->regs->ep_ien, + cdns3_ep_addr_to_bit_pos(bEndpointAddress)); +} + /* Find correct direction for HW endpoint according to description */ static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc, struct cdns3_endpoint *priv_ep) @@ -1088,6 +1205,8 @@ static int __cdns3_gadget_init(struct cdns3 *cdns) priv_dev->is_connected = 0; spin_lock_init(&priv_dev->lock); + INIT_WORK(&priv_dev->pending_status_wq, + cdns3_pending_setup_status_handler); priv_dev->in_standby_mode = 1; diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index 2ad3addf8bd7..3f67ef1e5cda 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1066,14 +1066,18 @@ struct cdns3_device { int cdns3_handshake(void __iomem *ptr, u32 mask, u32 done, int usec); void cdns3_set_register_bit(void __iomem *ptr, u32 mask); +void cdns3_pending_setup_status_handler(struct work_struct *work); int cdns3_init_ep0(struct cdns3_device *priv_dev); void cdns3_ep0_config(struct cdns3_device *priv_dev); +void cdns3_ep_config(struct cdns3_endpoint *priv_ep); void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir); void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep); void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable); struct usb_request *cdns3_next_request(struct list_head *list); +void cdns3_gadget_unconfig(struct cdns3_device *priv_dev); int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, struct usb_request *request); +u8 cdns3_ep_addr_to_index(u8 ep_addr); int cdns3_gadget_ep_set_wedge(struct usb_ep *ep); int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value); struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep, From patchwork Sat Nov 3 17:51:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666735 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1BEF817D5 for ; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=792 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements a set of function handling transfer on none-default endpoints. For handling transfer controller use cdns3_trb structure. Each transfer request block (TRB) contains data buffer address, length and some control bits. Each transfer can consist of many trbs. Such group of trbs is called transfer descriptors (TD). Each endpoint has own array of trbs that make up a transfer ring. The last element on ring is reserved and is set as Link TRB that point to the first TRB. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/gadget.c | 235 ++++++++++++++++++++++++++++++++++++- 1 file changed, 233 insertions(+), 2 deletions(-) diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index e5c4d9236f07..905cad1a8229 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -229,6 +229,45 @@ void cdns3_gadget_unconfig(struct cdns3_device *priv_dev) priv_dev->out_mem_is_allocated = 0; } +/** + * cdns3_ep_inc_trb - increment a trb index. + * @index: Pointer to the TRB index to increment. + * @cs: Cycle state + * + * The index should never point to the link TRB. After incrementing, + * if it is point to the link TRB, wrap around to the beginning and revert + * cycle state bit The + * link TRB is always at the last TRB entry. + */ +static void cdns3_ep_inc_trb(int *index, u8 *cs) +{ + (*index)++; + if (*index == (TRBS_PER_SEGMENT - 1)) { + *index = 0; + *cs ^= 1; + } +} + +/** + * cdns3_ep_inc_enq - increment endpoint's enqueue pointer + * @priv_ep: The endpoint whose enqueue pointer we're incrementing + */ +static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep) +{ + priv_ep->free_trbs--; + cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs); +} + +/** + * cdns3_ep_inc_deq - increment endpoint's dequeue pointer + * @priv_ep: The endpoint whose dequeue pointer we're incrementing + */ +static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep) +{ + priv_ep->free_trbs++; + cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs); +} + void cdns3_enable_l1(struct cdns3_device *priv_dev, int enable) { if (enable) @@ -268,7 +307,27 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep, struct cdns3_request *priv_req, int status) { - //TODO: Implements this function. + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct usb_request *request = &priv_req->request; + + list_del_init(&request->list); + if (request->status == -EINPROGRESS) + request->status = status; + + usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request, + priv_ep->dir); + + priv_req->on_ring = 0; + + if (request->complete) { + spin_unlock(&priv_dev->lock); + usb_gadget_giveback_request(&priv_ep->endpoint, + request); + spin_lock(&priv_dev->lock); + } + + if (request->buf == priv_dev->zlp_buf) + cdns3_gadget_ep_free_request(&priv_ep->endpoint, request); } /** @@ -280,13 +339,185 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep, int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, struct usb_request *request) { + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct cdns3_request *priv_req; + struct cdns3_trb *trb; + dma_addr_t trb_dma; + int sg_iter = 0; + u32 first_pcs; + int num_trb; + int address; + int pcs; + + if (!request) + return -EINVAL; + + num_trb = request->num_sgs ? request->num_sgs : 1; + + if (num_trb > priv_ep->free_trbs) + return -EINVAL; + + priv_req = to_cdns3_request(request); + address = priv_ep->endpoint.desc->bEndpointAddress; + + if (priv_req->on_ring) + goto arm; + + priv_ep->flags |= EP_PENDING_REQUEST; + trb_dma = request->dma; + + /* must allocate buffer aligned to 8 */ + if ((request->dma % ADDR_MODULO_8)) { + if (request->length <= CDNS3_UNALIGNED_BUF_SIZE) { + memcpy(priv_ep->aligned_buff, request->buf, + request->length); + trb_dma = priv_ep->aligned_dma_addr; + } else { + return -ENOMEM; + } + } + + trb = priv_ep->trb_pool + priv_ep->enqueue; + priv_req->trb = trb; + priv_req->start_trb = priv_ep->enqueue; + + //prepare ring + if ((priv_ep->enqueue + num_trb) >= (TRBS_PER_SEGMENT - 1)) { + /*updating C bt in Link TRB before starting DMA*/ + struct cdns3_trb *link_trb = priv_ep->trb_pool + + (TRBS_PER_SEGMENT - 1); + link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) | + TRB_TYPE(TRB_LINK) | TRB_CHAIN | + TRB_TOGGLE; + } + + first_pcs = priv_ep->pcs ? TRB_CYCLE : 0; + + do { + /* fill TRB */ + trb->buffer = TRB_BUFFER(request->num_sgs == 0 + ? trb_dma : request->sg[sg_iter].dma_address); + + trb->length = TRB_BURST_LEN(16) | + TRB_LEN(request->num_sgs == 0 ? + request->length : request->sg[sg_iter].length); + + trb->control = TRB_TYPE(TRB_NORMAL); + pcs = priv_ep->pcs ? TRB_CYCLE : 0; + + /* + * first trb should be prepared as last to avoid processing + * transfer to early + */ + if (sg_iter == request->num_sgs && sg_iter != 0) + trb->control |= pcs | TRB_IOC | TRB_ISP; + else if (sg_iter != 0) + trb->control |= pcs; + + ++sg_iter; + ++trb; + cdns3_ep_inc_enq(priv_ep); + } while (sg_iter < request->num_sgs); + + trb = priv_req->trb; + + /* give the TD to the consumer*/ + if (sg_iter == 1) + trb->control |= first_pcs | TRB_IOC | TRB_ISP; + else + trb->control |= first_pcs; + + priv_req->on_ring = 1; +arm: + /* arm transfer on selected endpoint */ + cdns3_select_ep(priv_ep->cdns3_dev, address); + + /* + * For DMULT mode we can set address to transfer ring only once after + * enabling endpoint. + */ + if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) { + writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma), + &priv_dev->regs->ep_traddr); + priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR; + } + + if (priv_dev->hw_configured_flag) { + /*clearing TRBERR before seting DRDY*/ + writel(EP_STS_TRBERR, &priv_dev->regs->ep_sts); + /* memory barrier*/ + wmb(); + dev_dbg(&priv_dev->dev, "//Ding Dong %s ep_trbaddr %08x\n", + priv_ep->name, readl(&priv_dev->regs->ep_traddr)); + writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd); + } + return 0; } +static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep, + struct cdns3_request *ss_request) +{ + int current_index; + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + struct cdns3_trb *trb = ss_request->trb; + + cdns3_select_ep(priv_dev, priv_ep->endpoint.desc->bEndpointAddress); + current_index = (readl(&priv_dev->regs->ep_traddr) - + priv_ep->trb_pool_dma) / TRB_SIZE; + + trb = &priv_ep->trb_pool[ss_request->start_trb]; + + if ((trb->control & TRB_CYCLE) != priv_ep->ccs) + return false; + + /** + * case where ep_traddr point to last trb in ring (link trb) + * and dequeue pointer already has been changed to first trb + */ + if ((current_index == (TRBS_PER_SEGMENT - 1)) && !priv_ep->dequeue) + return false; + + if (ss_request->start_trb != current_index) + return true; + + return false; +} + static void cdns3_transfer_completed(struct cdns3_device *priv_dev, struct cdns3_endpoint *priv_ep) { - //TODO: Implements this function. + struct usb_request *request, *request_temp; + struct cdns3_request *priv_req; + struct cdns3_trb *trb; + + list_for_each_entry_safe(request, request_temp, + &priv_ep->request_list, list) { + priv_req = to_cdns3_request(request); + + if (!cdns3_request_handled(priv_ep, priv_req)) + return; + + if (request->dma % ADDR_MODULO_8 && + priv_ep->dir == USB_DIR_OUT) + memcpy(request->buf, priv_ep->aligned_buff, + request->length); + + trb = priv_ep->trb_pool + priv_ep->dequeue; + + if (trb != priv_req->trb) + dev_warn(&priv_dev->dev, "request_trb=0x%p, queue_trb=0x%p\n", + priv_req->trb, trb); + + request->actual = TRB_LEN(le32_to_cpu(trb->length)); + + priv_ep->free_trbs++; + cdns3_ep_inc_deq(priv_ep); + + priv_ep->flags |= EP_PENDING_REQUEST; + + cdns3_gadget_giveback(priv_ep, priv_req, 0); + } } /** From patchwork Sat Nov 3 17:51:26 2018 Content-Type: text/plain; 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=947 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch implements some function used for debugging driver. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/Makefile | 2 +- drivers/usb/cdns3/debug.c | 128 +++++++++++++++++++++++++++++++++++++ drivers/usb/cdns3/ep0.c | 3 + drivers/usb/cdns3/gadget.c | 12 ++++ drivers/usb/cdns3/gadget.h | 13 +++- 5 files changed, 156 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/cdns3/debug.c diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile index f4cfc978626f..34e60d03c4ec 100644 --- a/drivers/usb/cdns3/Makefile +++ b/drivers/usb/cdns3/Makefile @@ -2,6 +2,6 @@ obj-$(CONFIG_USB_CDNS3) += cdns3.o obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o cdns3-y := core.o drd.o -cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o ep0.o +cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o ep0.o debug.o cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/debug.c b/drivers/usb/cdns3/debug.c new file mode 100644 index 000000000000..bebf22c4d18e --- /dev/null +++ b/drivers/usb/cdns3/debug.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Driver. + * + * Copyright (C) 2018 Cadence. + * + * Author: Pawel Laszczak + */ + +#include "gadget.h" + +static inline char *cdns3_decode_ep_irq(u32 ep_sts, const char *ep_name) +{ + static char str[256]; + int ret; + + ret = sprintf(str, "IRQ for %s: %08x ", ep_name, ep_sts); + + if (ep_sts & EP_STS_SETUP) + ret += sprintf(str + ret, "SETUP "); + if (ep_sts & EP_STS_IOC) + ret += sprintf(str + ret, "IOC "); + if (ep_sts & EP_STS_ISP) + ret += sprintf(str + ret, "ISP "); + if (ep_sts & EP_STS_DESCMIS) + ret += sprintf(str + ret, "DESCMIS "); + if (ep_sts & EP_STS_STREAMR) + ret += sprintf(str + ret, "STREAMR "); + if (ep_sts & EP_STS_MD_EXIT) + ret += sprintf(str + ret, "MD_EXIT "); + if (ep_sts & EP_STS_TRBERR) + ret += sprintf(str + ret, "TRBERR "); + if (ep_sts & EP_STS_NRDY) + ret += sprintf(str + ret, "NRDY "); + if (ep_sts & EP_STS_PRIME) + ret += sprintf(str + ret, "PRIME "); + if (ep_sts & EP_STS_SIDERR) + ret += sprintf(str + ret, "SIDERRT "); + if (ep_sts & EP_STS_OUTSMM) + ret += sprintf(str + ret, "OUTSMM "); + if (ep_sts & EP_STS_ISOERR) + ret += sprintf(str + ret, "ISOERR "); + if (ep_sts & EP_STS_IOT) + ret += sprintf(str + ret, "IOT "); + + return str; +} + +char *cdns3_decode_epx_irq(struct cdns3_endpoint *priv_ep) +{ + struct cdns3_device *priv_dev = priv_ep->cdns3_dev; + + return cdns3_decode_ep_irq(readl(&priv_dev->regs->ep_sts), + priv_ep->name); +} + +char *cdns3_decode_ep0_irq(struct cdns3_device *priv_dev, int dir) +{ + if (dir) + return cdns3_decode_ep_irq(readl(&priv_dev->regs->ep_sts), + "ep0IN"); + else + return cdns3_decode_ep_irq(readl(&priv_dev->regs->ep_sts), + "ep0OUT"); +} + +void cdns3_dbg_setup(struct cdns3_device *priv_dev) +{ + struct usb_ctrlrequest *setup = priv_dev->setup; + + dev_dbg(&priv_dev->dev, + "SETUP BRT: %02x BR: %02x V: %04x I: %04x L: %04x\n", + setup->bRequestType, + setup->bRequest, + le16_to_cpu(setup->wValue), + le16_to_cpu(setup->wIndex), + le16_to_cpu(setup->wLength)); +} + +/** + * Debug a transfer ring. + * + * Prints out all TRBs in the endpoint ring, even those after the Link TRB. + *. + */ +void cdns3_dbg_ring(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep) +{ + u64 addr = priv_ep->trb_pool_dma; + struct cdns3_trb *trb; + int i; + + for (i = 0; i < TRBS_PER_SEGMENT; ++i) { + trb = &priv_ep->trb_pool[i]; + dev_dbg(&priv_dev->dev, "@%016llx %08x %08x %08x\n", addr, + le32_to_cpu(trb->buffer), + le32_to_cpu(trb->length), + le32_to_cpu(trb->control)); + addr += sizeof(*trb); + } +} + +void cdns3_dbg_ring_ptrs(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep) +{ + struct cdns3_trb *trb; + + trb = &priv_ep->trb_pool[priv_ep->dequeue]; + dev_dbg(&priv_dev->dev, + "Ring deq index: %d, trb: %p (virt), 0x%llx (dma)\n", + priv_ep->dequeue, trb, + cdns3_trb_virt_to_dma(priv_ep, trb)); + + trb = &priv_ep->trb_pool[priv_ep->enqueue]; + dev_dbg(&priv_dev->dev, + "Ring enq index: %d, trb: %p (virt), 0x%llx (dma)\n", + priv_ep->enqueue, trb, + cdns3_trb_virt_to_dma(priv_ep, trb)); +} + +void cdns3_dbg_ep_rings(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep) +{ + dev_dbg(&priv_dev->dev, "Endpoint ring %s:\n", priv_ep->name); + + cdns3_dbg_ring_ptrs(priv_dev, priv_ep); + cdns3_dbg_ring(priv_dev, priv_ep); +} diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c index 555ac7f6842e..46c943a74f77 100644 --- a/drivers/usb/cdns3/ep0.c +++ b/drivers/usb/cdns3/ep0.c @@ -604,12 +604,15 @@ void cdns3_check_ep0_interrupt_proceed(struct cdns3_device *priv_dev, int dir) cdns3_select_ep(priv_dev, 0 | (dir ? USB_DIR_IN : USB_DIR_OUT)); ep_sts_reg = readl(®s->ep_sts); + dev_dbg(&priv_dev->dev, "%s\n", cdns3_decode_ep0_irq(priv_dev, dir)); + __pending_setup_status_handler(priv_dev); if ((ep_sts_reg & EP_STS_SETUP) && dir == 0) { struct usb_ctrlrequest *setup = priv_dev->setup; writel(EP_STS_SETUP | EP_STS_IOC | EP_STS_ISP, ®s->ep_sts); + cdns3_dbg_setup(priv_dev); priv_dev->ep0_data_dir = setup->bRequestType & USB_DIR_IN; cdns3_ep0_setup_phase(priv_dev); diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c index 905cad1a8229..ba4a36ce6e9a 100644 --- a/drivers/usb/cdns3/gadget.c +++ b/drivers/usb/cdns3/gadget.c @@ -124,6 +124,14 @@ void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep) wmb(); } +dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep, + struct cdns3_trb *trb) +{ + u32 offset = (char *)trb - (char *)priv_ep->trb_pool; + + return priv_ep->trb_pool_dma + offset; +} + /** * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint * @priv_ep: endpoint object @@ -428,6 +436,8 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, trb->control |= first_pcs; priv_req->on_ring = 1; + + cdns3_dbg_ep_rings(priv_dev, priv_ep); arm: /* arm transfer on selected endpoint */ cdns3_select_ep(priv_ep->cdns3_dev, address); @@ -537,6 +547,8 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep) cdns3_select_ep(priv_dev, priv_ep->endpoint.address); ep_sts_reg = readl(®s->ep_sts); + dev_dbg(&priv_dev->dev, "%s\n", cdns3_decode_epx_irq(priv_ep)); + if (ep_sts_reg & EP_STS_TRBERR) writel(EP_STS_TRBERR, ®s->ep_sts); diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h index 3f67ef1e5cda..3b2c01ff655b 100644 --- a/drivers/usb/cdns3/gadget.h +++ b/drivers/usb/cdns3/gadget.h @@ -1085,5 +1085,16 @@ struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep, void cdns3_gadget_ep_free_request(struct usb_ep *ep, struct usb_request *request); int cdns3_gadget_ep_dequeue(struct usb_ep *ep, struct usb_request *request); - +dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep, + struct cdns3_trb *trb); + +char *cdns3_decode_epx_irq(struct cdns3_endpoint *priv_ep); +char *cdns3_decode_ep0_irq(struct cdns3_device *priv_dev, int dir); +void cdns3_dbg_ring(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep); +void cdns3_dbg_ring_ptrs(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep); +void cdns3_dbg_ep_rings(struct cdns3_device *priv_dev, + struct cdns3_endpoint *priv_ep); +void cdns3_dbg_setup(struct cdns3_device *priv_dev); #endif /* __LINUX_CDNS3_GADGET */ From patchwork Sat Nov 3 17:51:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Laszczak X-Patchwork-Id: 10666731 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C8D3314BD for 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include:spf-0014ca01.pphosted.com include:spf.protection.outlook.com include:auth.msgapp.com include:spf.mandrillapp.com ~all X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-03_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=933 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1811030169 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Patch adds feature that allow to change role from user space. Signed-off-by: Pawel Laszczak --- drivers/usb/cdns3/Makefile | 2 +- drivers/usb/cdns3/core.c | 2 + drivers/usb/cdns3/debugfs.c | 94 +++++++++++++++++++++++++++++++++++++ drivers/usb/cdns3/drd.h | 3 ++ 4 files changed, 100 insertions(+), 1 deletion(-) create mode 100644 drivers/usb/cdns3/debugfs.c diff --git a/drivers/usb/cdns3/Makefile b/drivers/usb/cdns3/Makefile index 34e60d03c4ec..08e6cdbebd46 100644 --- a/drivers/usb/cdns3/Makefile +++ b/drivers/usb/cdns3/Makefile @@ -1,7 +1,7 @@ obj-$(CONFIG_USB_CDNS3) += cdns3.o obj-$(CONFIG_USB_CDNS3_PCI_WRAP) += cdns3-pci.o -cdns3-y := core.o drd.o +cdns3-y := core.o drd.o debugfs.o cdns3-$(CONFIG_USB_CDNS3_GADGET) += gadget.o ep0.o debug.o cdns3-$(CONFIG_USB_CDNS3_HOST) += host.o cdns3-pci-y := cdns3-pci-wrap.o diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c index 20ae9e76940e..4012f1007da9 100644 --- a/drivers/usb/cdns3/core.c +++ b/drivers/usb/cdns3/core.c @@ -309,6 +309,7 @@ static int cdns3_probe(struct platform_device *pdev) if (ret) goto err4; + cdns3_debugfs_init(cdns); device_set_wakeup_capable(dev, true); pm_runtime_set_active(dev); pm_runtime_enable(dev); @@ -346,6 +347,7 @@ static int cdns3_remove(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); + cdns3_debugfs_exit(cdns); cdns3_remove_roles(cdns); usb_phy_shutdown(cdns->usbphy); diff --git a/drivers/usb/cdns3/debugfs.c b/drivers/usb/cdns3/debugfs.c new file mode 100644 index 000000000000..d4871bc1a69d --- /dev/null +++ b/drivers/usb/cdns3/debugfs.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Cadence USBSS DRD Controller DebugFS filer. + * + * Copyright (C) 2018 Cadence. + * + * Author: Pawel Laszczak + */ + +#include +#include +#include +#include + +#include "core.h" +#include "gadget.h" + +static int cdns3_mode_show(struct seq_file *s, void *unused) +{ + struct cdns3 *cdns = s->private; + + switch (cdns->role) { + case CDNS3_ROLE_HOST: + seq_puts(s, "host\n"); + break; + case CDNS3_ROLE_GADGET: + seq_puts(s, "device\n"); + break; + case CDNS3_ROLE_OTG: + case CDNS3_ROLE_END: + seq_puts(s, "otg\n"); + break; + default: + seq_puts(s, "UNKNOWN mode\n"); + } + + return 0; +} + +static int cdns3_mode_open(struct inode *inode, struct file *file) +{ + return single_open(file, cdns3_mode_show, inode->i_private); +} + +static ssize_t cdns3_mode_write(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct cdns3 *cdns = s->private; + u32 mode = 0; + char buf[32]; + + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + + if (!strncmp(buf, "host", 4)) + mode = USB_DR_MODE_HOST; + + if (!strncmp(buf, "device", 6)) + mode = USB_DR_MODE_PERIPHERAL; + + if (!strncmp(buf, "otg", 3)) + mode = USB_DR_MODE_OTG; + + cdns->desired_role = mode; + queue_work(system_freezable_wq, &cdns->role_switch_wq); + return count; +} + +static const struct file_operations cdns3_mode_fops = { + .open = cdns3_mode_open, + .write = cdns3_mode_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +void cdns3_debugfs_init(struct cdns3 *cdns) +{ + struct dentry *root; + + root = debugfs_create_dir(dev_name(cdns->dev), NULL); + cdns->root = root; + if (IS_ENABLED(CONFIG_USB_CDNS3_GADGET) && + IS_ENABLED(CONFIG_USB_CDNS3_HOST)) + debugfs_create_file("mode", 0644, root, cdns, + &cdns3_mode_fops); +} + +void cdns3_debugfs_exit(struct cdns3 *cdns) +{ + debugfs_remove_recursive(cdns->root); +} diff --git a/drivers/usb/cdns3/drd.h b/drivers/usb/cdns3/drd.h index 85731f3b693c..5344290c76f2 100644 --- a/drivers/usb/cdns3/drd.h +++ b/drivers/usb/cdns3/drd.h @@ -119,4 +119,7 @@ int cdns3_drd_probe(struct cdns3 *cdns); void cdns3_set_hw_mode(struct cdns3 *cdns, u32 mode); irqreturn_t cdns3_drd_irq(struct cdns3 *cdns); +void cdns3_debugfs_init(struct cdns3 *cdns); +void cdns3_debugfs_exit(struct cdns3 *cdns); + #endif /* __LINUX_CDNS3_DRD */