From patchwork Tue Nov 10 18:43:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11895051 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F8BE921 for ; Tue, 10 Nov 2020 18:42:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1B35420797 for ; Tue, 10 Nov 2020 18:42:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NBgSVBr7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730164AbgKJSmT (ORCPT ); Tue, 10 Nov 2020 13:42:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725862AbgKJSmT (ORCPT ); Tue, 10 Nov 2020 13:42:19 -0500 Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D078C0613D1; Tue, 10 Nov 2020 10:42:19 -0800 (PST) Received: by mail-pg1-x541.google.com with SMTP id m13so2837424pgl.7; Tue, 10 Nov 2020 10:42:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=GYJulMYVVz3km1hFr9j5auoGSm9etW+t+ZZhfvbAr78=; b=NBgSVBr7E6iqdcZ5ZI31StoYKlB3mK/JVERnjq5aL/8oPKM3j8L0WDogOlo6y3duB2 cVMUlPi2/n/xq5sEZDlOn2ASEcWMLsA2bBJGGSTvRtQtKEdRpDGIRMHfJWEb7zz5pwA7 Lj6BVaTbZeANF2kArNMILM4yaOPP6vOVaKsoxoY7leiECEmVqyyHzgfLUHR5B/xOXHcR M+4aDTWKpINU3XAE0O/ok+fx7yHAlXNngsg2vZIer56kG8r0csesG6Y+TJ9kgq0LXdgD c0B1WDMWuup5ZUYYH4ZK+6npvNA0F/KeH+5hQQ81Aru6jBBNKNJhIfQskp4Iq8Dml1Bb CczA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=GYJulMYVVz3km1hFr9j5auoGSm9etW+t+ZZhfvbAr78=; b=BDRIo92wH2z2S0a7ZJNCdcXbFhvYVvz8BHTDzDNYYWOPqbtvlU3ERDfpIyCVCzEl3n duHP4tl28Jmsq+mPGGfsxE1GDeyHe3OB6bPLDLssSagVCy+fb/2WJ7b8GU1ApgIYBPYx lzKaODWnWDFieGEViMJ/CsxQeUWqpb7Y0fr5nyDzTxC8iv3YvrG6ygeRFiYfhKq22aPU pW015WXWnhH7tgx07IwU5OS6O7ZfjAucZ2ErlXIS6qnmkR8kp9Vu7NNU7raQ/3RHwfhk gG67vSEuDGFcn5xZ5Nre0Jeszq/Oa8h06DMaZeOyTsjHoI1603MCSM4JqUL8bv6uf7uf uvZQ== X-Gm-Message-State: AOAM531hR2N0V+r10STvx9La230eT01o/mUmugQs4dHai/yNcysmd3ol wH3Gv8s+wvXzY8ofTLxA+fE= X-Google-Smtp-Source: ABdhPJzkbAsbqdioecTbOedIn1DwNSC5H1j1b+kriaAsHiKjO3ha2VT8efFZwnlwZcjr19zv/Z0zaQ== X-Received: by 2002:a17:90b:19d6:: with SMTP id nm22mr480088pjb.159.1605033738605; Tue, 10 Nov 2020 10:42:18 -0800 (PST) Received: from localhost ([2601:1c0:5200:a6:307:a401:7b76:c6e5]) by smtp.gmail.com with ESMTPSA id y19sm14357276pfn.147.2020.11.10.10.42.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2020 10:42:17 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Jordan Crouse , Jonathan Marek , Sharat Masetty , Eric Anholt , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/2] drm/msm/a6xx: Clear shadow on suspend Date: Tue, 10 Nov 2020 10:43:59 -0800 Message-Id: <20201110184401.282982-1-robdclark@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Clear the shadow rptr on suspend. Otherwise, when we resume, we can have a stale value until CP_WHERE_AM_I executes. If we suspend near the ringbuffer wraparound point, this can lead to a chicken/egg situation where we are waiting for ringbuffer space to write the CP_WHERE_AM_I (or CP_INIT) packet, because we mistakenly believe that the ringbuffer is full (due to stale rptr value in the shadow). Fixes errors like: [drm:adreno_wait_ring [msm]] *ERROR* timeout waiting for space in ringbuffer 0 in the resume path. Fixes: d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets") Signed-off-by: Rob Clark Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 2f236aadfa9c..fcb0aabbc985 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1043,12 +1043,21 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); + int i, ret; trace_msm_gpu_suspend(0); devfreq_suspend_device(gpu->devfreq.devfreq); - return a6xx_gmu_stop(a6xx_gpu); + ret = a6xx_gmu_stop(a6xx_gpu); + if (ret) + return ret; + + if (adreno_gpu->base.hw_apriv || a6xx_gpu->has_whereami) + for (i = 0; i < gpu->nr_rings; i++) + a6xx_gpu->shadow[i] = 0; + + return 0; } static int a6xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) From patchwork Tue Nov 10 18:44:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11895053 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 87907139F for ; Tue, 10 Nov 2020 18:42:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6322720797 for ; Tue, 10 Nov 2020 18:42:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UH+Sdgv4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731403AbgKJSmY (ORCPT ); Tue, 10 Nov 2020 13:42:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725862AbgKJSmX (ORCPT ); Tue, 10 Nov 2020 13:42:23 -0500 Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0844C0613D1; Tue, 10 Nov 2020 10:42:22 -0800 (PST) Received: by mail-pl1-x641.google.com with SMTP id k7so6931032plk.3; Tue, 10 Nov 2020 10:42:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Aoj89WmcaMMxtRZJCP7ES6axMtLpeMz4nvf536ZBRdM=; b=UH+Sdgv4Jw0IYY6nICZUclvd441VpcOTKJSRDbN2UxfCyy+R6yhqyAdPsiy/FlEkef OdR6BJNAjslO9MjXZJPMmiRDyFOZ72i5feFG/pUUBogLQMLme2unL1+XgcHy/Edxk7I6 Lf6sxh7MBZkKk9yrwrW07/Gkyqaf3fE4Emg/rw2GrqTAYtW9JoyTa8QZm+/Q+Kd7qoOm FAUBRJnVOLjAFHmyW/Sin8w8aGtqtabyBYCxKRh6BoarUTWarV3zccmWPzSCxQ0nyX7c 2mm8NhVaBMdIlB3eGius33oxaVdcqhcN+Lu4ba79GcyZPXC3xLj5u0Ie/nlSX7ex2HEq e7hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Aoj89WmcaMMxtRZJCP7ES6axMtLpeMz4nvf536ZBRdM=; b=PLRBegAbCta273rzFS6pnvbCJkS+dpCb0s8eVi60zsep/qILo5KwXIwz6HApOGazRW oh/AI3ztMLuGp/fFknMONWAlMQARBC9w3jCzOajRWXhVWbAsnba4q2HkA2GL8ZpU8+5o VLlJR1S48ei/7LM4VQDWCc6Zf0tB3ee4xEnigKywbG6kv8HXsUT9L5fP/MJxXvGKtNnG vkSs80Mu/BxhhnuXEdukmJt+220m8H8yGhoJYM80u1g2rZKySzigLqPpEP+cS4wXwwty 9Tk1/zFfVOkla9jwdi/NKTFIsKrVyTb95BO+3xYY1BQJmHSkxTg1gWmJw3rigKw20MqF ujHw== X-Gm-Message-State: AOAM531WQy1Oc4cnpQDC5O3iEWWhDxOxNkI8cMZN0JpWqp5zp6Fw2m/1 i3BFpP4M0X3LkEd88tI3HkQ= X-Google-Smtp-Source: ABdhPJwLq87EjJQigjjYbupc+fu/mpLvm2voU3nXL/VLwi8dNJibezorLF7yq2pa5oiLPbrVCfu5EQ== X-Received: by 2002:a17:902:bb8c:b029:d2:2503:e458 with SMTP id m12-20020a170902bb8cb02900d22503e458mr17786908pls.18.1605033742518; Tue, 10 Nov 2020 10:42:22 -0800 (PST) Received: from localhost ([2601:1c0:5200:a6:307:a401:7b76:c6e5]) by smtp.gmail.com with ESMTPSA id cv4sm4051283pjb.1.2020.11.10.10.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Nov 2020 10:42:21 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Jordan Crouse , "Kristian H. Kristensen" , Eric Anholt , "Gustavo A. R. Silva" , Emil Velikov , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), freedreno@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/2] drm/msm/a5xx: Clear shadow on suspend Date: Tue, 10 Nov 2020 10:44:00 -0800 Message-Id: <20201110184401.282982-2-robdclark@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201110184401.282982-1-robdclark@gmail.com> References: <20201110184401.282982-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Similar to the previous patch, clear shadow on suspend to avoid timeouts waiting for ringbuffer space. Fixes: 8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged") Signed-off-by: Rob Clark Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index b0005ccd81c6..8fa5c917d017 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1206,7 +1206,9 @@ static int a5xx_pm_resume(struct msm_gpu *gpu) static int a5xx_pm_suspend(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); + struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); u32 mask = 0xf; + int i, ret; /* A510 has 3 XIN ports in VBIF */ if (adreno_is_a510(adreno_gpu)) @@ -1226,7 +1228,15 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu) gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000); gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000); - return msm_gpu_pm_suspend(gpu); + ret = msm_gpu_pm_suspend(gpu); + if (ret) + return ret; + + if (a5xx_gpu->has_whereami) + for (i = 0; i < gpu->nr_rings; i++) + a5xx_gpu->shadow[i] = 0; + + return 0; } static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)