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SFS:(6029001)(346002)(376002)(396003)(39850400004)(136003)(366004)(8936002)(42882007)(478600001)(5660300002)(66556008)(66476007)(6666004)(6506007)(316002)(36756003)(66946007)(6512007)(44832011)(26005)(16526019)(52116002)(107886003)(2906002)(6486002)(7416002)(966005)(83170400001)(8676002)(4326008)(956004)(186003)(2616005); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: q1Tuz6UKRXsjDl41N0LkOGU3VTrexliKfZhTxo5KCfe/c6OiIDZQelz3b6sFG53RRhEciGgUoOph2/EXia03uH/Nw/ul4ajOCyVGytxMHaPvZN2Mlkaibmdjcv5mzhdVmi5ZyHHzHj7WOQZqnUUay3WDb+J3TjV2SIqH+IJSuNCeUTyVNRnL2Uhtp47BkWqKtdyvlE6N34hPfPJGgIrqcTtdqeIOlbG8P3/eg0eSOfIXpFNzKSawzfBOE6Mn1jpbXdwfRS22PwADy+rHv5h14dNkYAJ1g0U7GLIvP2UNWIGdXGX5eB8EZKYNtur/PtYNR4P863DWhXXPABFWr7QWF28PIkXPetXvW+C5lmd53n01nz3qQYWCUTz0DZboTKZjOmhBeEoLAcmPI+gxdJSzSvyvX2lQfFHpYsLpKItB7YWV3IhrMIwUVUIVjgMNwEHO1DQ7oKs2T2oE3imG9WHrhPlDETB7wUGGOXuldHOh+dUytYI3P/k8a/47elv08Qz9m9npttCQ7M+9sOfCBzUx5UfSI7ioQZfivT4BmdDvvUdJyuhyw56sfwhgI6G2mnHNkoXy46iV/nx8yn4XOoyofa2DaNxYQPBrHe2EbP+9Fb5THe4KEWzBnWZqg8L2F+t7ziiyU+vZDKbMegeBay/8/GqDqtj4+aHwukjbLKKeLjMkt/SjeQVPyOrTa2RHSlVikakdJCQYxDdkT/uloUt4E0UbRHeiJ8POxN9Q1X1ZeWMeAHaNXAmt7/AdDw9YTC3qV4Pk4WpH8K8EcfIHqGIW0t3k/CB9QE/iz7x7tXGFf8A2GL3Z1X0IBG/ZNp7lB51BYeSmFk+philiCWHKnE5PhZtU+iPUb9CKK70wS+OEc/dqON2lP5hGjbuCTeLAT58fvHpZsstROrx1yxkOEodBPA== X-OriginatorOrg: sifive.com X-MS-Exchange-CrossTenant-Network-Message-Id: 09f871de-310b-428a-11ce-08d88702ad64 X-MS-Exchange-CrossTenant-AuthSource: BY5PR13MB4453.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2020 12:01:24.4164 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NcsfSmLahV7XscyHJqm0HsRm8uEvcXKfnQxchID0esNG8Pc27r4SytC6BkBd/6l9na5uaBXgHUUlFqL9inkUvA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR13MB2392 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201112_070130_846046_31F523BB X-CRM114-Status: GOOD ( 12.50 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.236.40 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.236.40 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, aou@eecs.berkeley.edu, linux-kernel@vger.kernel.org, sachin.ghadi@sifive.com, Yash Shah , linux-riscv@lists.infradead.org, linux-edac@vger.kernel.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org Add DT json-schema for SiFive Bus Error unit present in FU740-C000 chip Signed-off-by: Yash Shah Reviewed-by: Rob Herring --- .../devicetree/bindings/riscv/sifive-beu.yaml | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/sifive-beu.yaml diff --git a/Documentation/devicetree/bindings/riscv/sifive-beu.yaml b/Documentation/devicetree/bindings/riscv/sifive-beu.yaml new file mode 100644 index 0000000..4697787 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/sifive-beu.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/sifive-beu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive BUS Error Unit + +maintainers: + - Yash Shah + - Paul Walmsley + +description: + The Bus-Error Unit (BEU) is a per-processor device that records erroneous + events and reports them using platform-level and hart-local interrupts. The + BEU can be configured to generate interrupts on correctable memory errors, + uncorrectable memory errors, and/or TileLink bus errors. + All the properties in ePAPR/DeviceTree specification applies for this platform. + +properties: + compatible: + items: + - const: sifive,fu740-c000-beu + - const: sifive,beu0 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - interrupts + - reg + +examples: + - | + bus-error-unit@1700000 { + compatible = "sifive,fu740-c000-beu", "sifive,beu0"; + reg = <0x1700000 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <65>; + }; From patchwork Thu Nov 12 12:00:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yash Shah X-Patchwork-Id: 11899859 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 11B0114C0 for ; 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Thu, 12 Nov 2020 12:01:29 +0000 From: Yash Shah To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, bp@alien8.de, mchehab@kernel.org, tony.luck@intel.com, james.morse@arm.com, rric@kernel.org Subject: [PATCH 2/3] soc: sifive: beu: Add support for SiFive Bus Error Unit Date: Thu, 12 Nov 2020 17:30:56 +0530 Message-Id: <1605182457-86046-2-git-send-email-yash.shah@sifive.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605182457-86046-1-git-send-email-yash.shah@sifive.com> References: <1605182457-86046-1-git-send-email-yash.shah@sifive.com> X-Originating-IP: [159.117.144.156] X-ClientProxiedBy: BMXPR01CA0024.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:d::34) To BY5PR13MB4453.namprd13.prod.outlook.com (2603:10b6:a03:1d1::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from osubuntu003.open-silicon.com (159.117.144.156) by BMXPR01CA0024.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:d::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3541.21 via Frontend Transport; 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Currently the driver reports erroneous events only using Platform-level interrupts. The support for reporting events using hart-local interrupts can be added in future. Signed-off-by: Yash Shah --- drivers/soc/sifive/Kconfig | 5 + drivers/soc/sifive/Makefile | 1 + drivers/soc/sifive/sifive_beu.c | 197 ++++++++++++++++++++++++++++++++++++++++ include/soc/sifive/sifive_beu.h | 16 ++++ 4 files changed, 219 insertions(+) create mode 100644 drivers/soc/sifive/sifive_beu.c create mode 100644 include/soc/sifive/sifive_beu.h diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig index 58cf8c4..d575fc1 100644 --- a/drivers/soc/sifive/Kconfig +++ b/drivers/soc/sifive/Kconfig @@ -7,4 +7,9 @@ config SIFIVE_L2 help Support for the L2 cache controller on SiFive platforms. +config SIFIVE_BEU + bool "Sifive Bus Error Unit" + help + Support for the Bus Error Unit on SiFive platforms. + endif diff --git a/drivers/soc/sifive/Makefile b/drivers/soc/sifive/Makefile index b5caff7..1b43ecd 100644 --- a/drivers/soc/sifive/Makefile +++ b/drivers/soc/sifive/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_SIFIVE_L2) += sifive_l2_cache.o +obj-$(CONFIG_SIFIVE_BEU) += sifive_beu.o diff --git a/drivers/soc/sifive/sifive_beu.c b/drivers/soc/sifive/sifive_beu.c new file mode 100644 index 0000000..87b69ba --- /dev/null +++ b/drivers/soc/sifive/sifive_beu.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SiFive Bus Error Unit driver + * Copyright (C) 2020 SiFive + * Author: Yash Shah + * + */ + +#include +#include +#include +#include +#include +#include + +#define SIFIVE_BEU_CAUSE 0x00 +#define SIFIVE_BEU_VALUE 0x08 +#define SIFIVE_BEU_ENABLE 0x10 +#define SIFIVE_BEU_PLIC_INTR 0x18 +#define SIFIVE_BEU_ACCRUED 0x20 +#define SIFIVE_BEU_LOCAL_INTR 0x28 + +#define LOCAL_INTERRUPT 0 +#define PLIC_INTERRUPT 1 +#define MAX_ERR_EVENTS 5 + +enum beu_err_events { + RESERVED = -1, + NO_ERR, + ITIM_CORR_ECC = 2, + ITIM_UNCORR_ECC, + TILINKBUS_ERR = 5, + DCACHE_CORR_ECC, + DCACHE_UNCORR_ECC +}; + +static +int err_events[MAX_ERR_EVENTS] = {ITIM_CORR_ECC, ITIM_UNCORR_ECC, TILINKBUS_ERR, + DCACHE_CORR_ECC, DCACHE_UNCORR_ECC}; + +struct beu_sifive_ddata { + void __iomem *regs; + int irq; +}; + +static int beu_enable_event(struct beu_sifive_ddata *ddata, + int event, int intr_type) +{ + unsigned char event_mask = BIT(event), val; + + val = readb(ddata->regs + SIFIVE_BEU_ENABLE); + val |= event_mask; + writeb(val, ddata->regs + SIFIVE_BEU_ENABLE); + + if (intr_type == PLIC_INTERRUPT) { + val = readb(ddata->regs + SIFIVE_BEU_PLIC_INTR); + val |= event_mask; + writeb(val, ddata->regs + SIFIVE_BEU_PLIC_INTR); + } else if (intr_type == LOCAL_INTERRUPT) { + val = readb(ddata->regs + SIFIVE_BEU_LOCAL_INTR); + val |= event_mask; + writeb(event_mask, ddata->regs + SIFIVE_BEU_LOCAL_INTR); + } + + return 0; +} + +static ATOMIC_NOTIFIER_HEAD(beu_chain); + +int register_sifive_beu_error_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_register(&beu_chain, nb); +} + +int unregister_sifive_beu_error_notifier(struct notifier_block *nb) +{ + return atomic_notifier_chain_unregister(&beu_chain, nb); +} + +static irqreturn_t beu_sifive_irq(int irq, void *data) +{ + struct beu_sifive_ddata *ddata = data; + unsigned char cause, addr; + + addr = readb(ddata->regs + SIFIVE_BEU_VALUE); + cause = readb(ddata->regs + SIFIVE_BEU_CAUSE); + switch (cause) { + case NO_ERR: + break; + case ITIM_CORR_ECC: + pr_err("BEU: ITIM ECCFIX @ %d\n", addr); + atomic_notifier_call_chain(&beu_chain, SIFIVE_BEU_ERR_TYPE_CE, + "ITIM ECCFIX"); + break; + case ITIM_UNCORR_ECC: + pr_err("BEU: ITIM ECCFAIL @ %d\n", addr); + atomic_notifier_call_chain(&beu_chain, SIFIVE_BEU_ERR_TYPE_UE, + "ITIM ECCFAIL"); + break; + case TILINKBUS_ERR: + pr_err("BEU: Load or Store TILINK BUS ERR occurred\n"); + break; + case DCACHE_CORR_ECC: + pr_err("BEU: DATACACHE ECCFIX @ %d\n", addr); + atomic_notifier_call_chain(&beu_chain, SIFIVE_BEU_ERR_TYPE_CE, + "DCACHE ECCFIX"); + break; + case DCACHE_UNCORR_ECC: + pr_err("BEU: DATACACHE ECCFAIL @ %d\n", addr); + atomic_notifier_call_chain(&beu_chain, SIFIVE_BEU_ERR_TYPE_UE, + "DCACHE ECCFAIL"); + break; + default: + pr_err("BEU: Unidentified cause\n"); + break; + } + writeb(0, ddata->regs + SIFIVE_BEU_CAUSE); + writeb(0, ddata->regs + SIFIVE_BEU_ACCRUED); + + return IRQ_HANDLED; +} + +static int beu_sifive_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct beu_sifive_ddata *ddata; + struct resource *res; + int ret, i; + + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ddata->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(ddata->regs)) { + dev_err(dev, "Unable to map IO resources\n"); + return PTR_ERR(ddata->regs); + } + + ddata->irq = platform_get_irq(pdev, 0); + if (ddata->irq < 0) { + dev_err(dev, "Unable to find interrupt\n"); + ret = ddata->irq; + return ret; + } + + ret = devm_request_irq(dev, ddata->irq, beu_sifive_irq, 0, + dev_name(dev), ddata); + if (ret) { + dev_err(dev, "Unable to request IRQ\n"); + return ret; + } + + for (i = 0; i < MAX_ERR_EVENTS; i++) { + ret = beu_enable_event(ddata, err_events[i], PLIC_INTERRUPT); + if (ret) { + dev_err(dev, "Unable to register PLIC interrupt\n"); + return ret; + } + } + + platform_set_drvdata(pdev, ddata); + + return 0; +} + +static int beu_sifive_remove(struct platform_device *pdev) +{ + struct beu_sifive_ddata *ddata = platform_get_drvdata(pdev); + + /* Mask all error events */ + writeb(0, ddata->regs + SIFIVE_BEU_ENABLE); + writeb(0, ddata->regs + SIFIVE_BEU_PLIC_INTR); + writeb(0, ddata->regs + SIFIVE_BEU_LOCAL_INTR); + + return 0; +} + +static const struct of_device_id beu_sifive_of_match[] = { + { .compatible = "sifive,beu0" }, + {}, +}; +MODULE_DEVICE_TABLE(of, beu_sifive_of_match); + +static struct platform_driver beu_sifive_driver = { + .probe = beu_sifive_probe, + .remove = beu_sifive_remove, + .driver = { + .name = "beu-sifive", + .of_match_table = beu_sifive_of_match, + }, +}; +module_platform_driver(beu_sifive_driver); + +MODULE_DESCRIPTION("SiFive BEU driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/soc/sifive/sifive_beu.h b/include/soc/sifive/sifive_beu.h new file mode 100644 index 0000000..c2ab688 --- /dev/null +++ b/include/soc/sifive/sifive_beu.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * SiFive Bus Error unit header file + * + */ + +#ifndef __SOC_SIFIVE_BEU_H +#define __SOC_SIFIVE_BEU_H + +extern int register_sifive_beu_error_notifier(struct notifier_block *nb); +extern int unregister_sifive_beu_error_notifier(struct notifier_block *nb); + +#define SIFIVE_BEU_ERR_TYPE_CE 0 +#define SIFIVE_BEU_ERR_TYPE_UE 1 + +#endif /* __SOC_SIFIVE_BEU_H */ From patchwork Thu Nov 12 12:00:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yash Shah X-Patchwork-Id: 11899861 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C809016C1 for ; Thu, 12 Nov 2020 12:02:00 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C8CA22243 for ; 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Signed-off-by: Yash Shah Acked-by: Borislav Petkov --- drivers/edac/Kconfig | 2 +- drivers/edac/sifive_edac.c | 13 +++++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 7a47680..8f662ff 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -469,7 +469,7 @@ config EDAC_ALTERA_SDMMC config EDAC_SIFIVE bool "Sifive platform EDAC driver" - depends on EDAC=y && SIFIVE_L2 + depends on EDAC=y && (SIFIVE_L2 || SIFIVE_BEU) help Support for error detection and correction on the SiFive SoCs. diff --git a/drivers/edac/sifive_edac.c b/drivers/edac/sifive_edac.c index 3a3dcb1..0f6d457 100644 --- a/drivers/edac/sifive_edac.c +++ b/drivers/edac/sifive_edac.c @@ -11,6 +11,7 @@ #include #include "edac_module.h" #include +#include #define DRVNAME "sifive_edac" @@ -67,7 +68,11 @@ static int ecc_register(struct platform_device *pdev) goto err; } - register_sifive_l2_error_notifier(&p->notifier); + if (IS_ENABLED(CONFIG_SIFIVE_L2)) + register_sifive_l2_error_notifier(&p->notifier); + + if (IS_ENABLED(CONFIG_SIFIVE_BEU)) + register_sifive_beu_error_notifier(&p->notifier); return 0; @@ -81,7 +86,11 @@ static int ecc_unregister(struct platform_device *pdev) { struct sifive_edac_priv *p = platform_get_drvdata(pdev); - unregister_sifive_l2_error_notifier(&p->notifier); + if (IS_ENABLED(CONFIG_SIFIVE_L2)) + unregister_sifive_l2_error_notifier(&p->notifier); + if (IS_ENABLED(CONFIG_SIFIVE_BEU)) + unregister_sifive_beu_error_notifier(&p->notifier); + edac_device_del_device(&pdev->dev); edac_device_free_ctl_info(p->dci);