From patchwork Wed Nov 18 20:30:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915803 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7E0DC56201 for ; Wed, 18 Nov 2020 20:33:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7547D221EB for ; Wed, 18 Nov 2020 20:33:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727108AbgKRUdL (ORCPT ); Wed, 18 Nov 2020 15:33:11 -0500 Received: from mailout04.rmx.de ([94.199.90.94]:43334 "EHLO mailout04.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726297AbgKRUdK (ORCPT ); Wed, 18 Nov 2020 15:33:10 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout04.rmx.de (Postfix) with ESMTPS id 4CbvdX1qn8z3qt4X; Wed, 18 Nov 2020 21:33:04 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvbz2rcSz2xCX; Wed, 18 Nov 2020 21:31:43 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:31:02 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 01/12] dt-bindings: net: dsa: convert ksz bindings document to yaml Date: Wed, 18 Nov 2020 21:30:02 +0100 Message-ID: <20201118203013.5077-2-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213149-4Cbvbz2rcSz2xCX-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Convert the bindings document for Microchip KSZ Series Ethernet switches from txt to yaml. Signed-off-by: Christian Eggers --- .../devicetree/bindings/net/dsa/ksz.txt | 125 -------------- .../bindings/net/dsa/microchip,ksz.yaml | 152 ++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 153 insertions(+), 126 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/dsa/ksz.txt create mode 100644 Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt deleted file mode 100644 index 95e91e84151c..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/ksz.txt +++ /dev/null @@ -1,125 +0,0 @@ -Microchip KSZ Series Ethernet switches -================================== - -Required properties: - -- compatible: For external switch chips, compatible string must be exactly one - of the following: - - "microchip,ksz8765" - - "microchip,ksz8794" - - "microchip,ksz8795" - - "microchip,ksz9477" - - "microchip,ksz9897" - - "microchip,ksz9896" - - "microchip,ksz9567" - - "microchip,ksz8565" - - "microchip,ksz9893" - - "microchip,ksz9563" - - "microchip,ksz8563" - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- microchip,synclko-125 : Set if the output SYNCLKO frequency should be set to - 125MHz instead of 25MHz. - -See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional -required and optional properties. - -Examples: - -Ethernet switch connected via SPI to the host, CPU port wired to eth0: - - eth0: ethernet@10001000 { - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - spi1: spi@f8008000 { - pinctrl-0 = <&pinctrl_spi_ksz>; - cs-gpios = <&pioC 25 0>; - id = <1>; - - ksz9477: ksz9477@0 { - compatible = "microchip,ksz9477"; - reg = <0>; - - spi-max-frequency = <44000000>; - spi-cpha; - spi-cpol; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan1"; - }; - port@1 { - reg = <1>; - label = "lan2"; - }; - port@2 { - reg = <2>; - label = "lan3"; - }; - port@3 { - reg = <3>; - label = "lan4"; - }; - port@4 { - reg = <4>; - label = "lan5"; - }; - port@5 { - reg = <5>; - label = "cpu"; - ethernet = <ð0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - ksz8565: ksz8565@0 { - compatible = "microchip,ksz8565"; - reg = <0>; - - spi-max-frequency = <44000000>; - spi-cpha; - spi-cpol; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - label = "lan1"; - }; - port@1 { - reg = <1>; - label = "lan2"; - }; - port@2 { - reg = <2>; - label = "lan3"; - }; - port@3 { - reg = <3>; - label = "lan4"; - }; - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <ð0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml new file mode 100644 index 000000000000..010adb09a68f --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip KSZ Series Ethernet switches + +allOf: + - $ref: dsa.yaml# + +maintainers: + - Marek Vasut + - Woojung Huh + +properties: + # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional + # required and optional properties. + compatible: + enum: + - microchip,ksz8765 + - microchip,ksz8794 + - microchip,ksz8795 + - microchip,ksz9477 + - microchip,ksz9897 + - microchip,ksz9896 + - microchip,ksz9567 + - microchip,ksz8565 + - microchip,ksz9893 + - microchip,ksz9563 + - microchip,ksz8563 + + reset-gpios: + description: + Should be a gpio specifier for a reset line. + maxItems: 1 + + microchip,synclko-125: + $ref: /schemas/types.yaml#/definitions/flag + description: + Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + // Ethernet switch connected via SPI to the host, CPU port wired to eth0: + eth0 { + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-0 = <&pinctrl_spi_ksz>; + cs-gpios = <&pioC 25 0>; + id = <1>; + + ksz9477: switch@0 { + compatible = "microchip,ksz9477"; + reg = <0>; + reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + + spi-max-frequency = <44000000>; + spi-cpha; + spi-cpol; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "lan5"; + }; + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + + ksz8565: switch@1 { + compatible = "microchip,ksz8565"; + reg = <1>; + + spi-max-frequency = <44000000>; + spi-cpha; + spi-cpol; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <ð0>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 18b5b7896af8..d1003033412f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11508,7 +11508,7 @@ M: Woojung Huh M: Microchip Linux Driver Support L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/ksz.txt +F: Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml F: drivers/net/dsa/microchip/* F: include/linux/platform_data/microchip-ksz.h F: net/dsa/tag_ksz.c From patchwork Wed Nov 18 20:30:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915805 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28837C63697 for ; Wed, 18 Nov 2020 20:34:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF6BB246A6 for ; Wed, 18 Nov 2020 20:34:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727019AbgKRUea (ORCPT ); Wed, 18 Nov 2020 15:34:30 -0500 Received: from mailout01.rmx.de ([94.199.90.91]:47160 "EHLO mailout01.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726268AbgKRUea (ORCPT ); Wed, 18 Nov 2020 15:34:30 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout01.rmx.de (Postfix) with ESMTPS id 4Cbvg50sVxz2SVdJ; Wed, 18 Nov 2020 21:34:25 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4CbvdX1kKvz2xD8; Wed, 18 Nov 2020 21:33:04 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:31:32 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 02/12] net: dsa: microchip: support for "ethernet-ports" node Date: Wed, 18 Nov 2020 21:30:03 +0100 Message-ID: <20201118203013.5077-3-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213308-4CbvdX1kKvz2xD8-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The dsa.yaml device tree binding allows "ethernet-ports" (preferred) and "ports". Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz_common.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 71cd1828e25d..a135fd5a9264 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -427,7 +427,9 @@ int ksz_switch_register(struct ksz_device *dev, ret = of_get_phy_mode(dev->dev->of_node, &interface); if (ret == 0) dev->compat_interface = interface; - ports = of_get_child_by_name(dev->dev->of_node, "ports"); + ports = of_get_child_by_name(dev->dev->of_node, "ethernet-ports"); + if (!ports) + ports = of_get_child_by_name(dev->dev->of_node, "ports"); if (ports) for_each_available_child_of_node(ports, port) { if (of_property_read_u32(port, "reg", From patchwork Wed Nov 18 20:30:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915807 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B1D0C6379D for ; Wed, 18 Nov 2020 20:35:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F918246A6 for ; Wed, 18 Nov 2020 20:35:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727194AbgKRUfv (ORCPT ); Wed, 18 Nov 2020 15:35:51 -0500 Received: from mailout10.rmx.de ([94.199.88.75]:56172 "EHLO mailout10.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726902AbgKRUfu (ORCPT ); Wed, 18 Nov 2020 15:35:50 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout10.rmx.de (Postfix) with ESMTPS id 4Cbvhf1WYhz30lC; Wed, 18 Nov 2020 21:35:46 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvg50mbYz2xDp; Wed, 18 Nov 2020 21:34:25 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:32:07 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 03/12] net: dsa: microchip: rename ksz9477.c to ksz9477_main.c Date: Wed, 18 Nov 2020 21:30:04 +0100 Message-ID: <20201118203013.5077-4-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213427-4Cbvg50mbYz2xDp-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org PTP functionality will be built into a separate source file (ksz9477_ptp.c). Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/Makefile | 1 + drivers/net/dsa/microchip/{ksz9477.c => ksz9477_main.c} | 0 2 files changed, 1 insertion(+) rename drivers/net/dsa/microchip/{ksz9477.c => ksz9477_main.c} (100%) diff --git a/drivers/net/dsa/microchip/Makefile b/drivers/net/dsa/microchip/Makefile index 929caa81e782..c5cc1d5dea06 100644 --- a/drivers/net/dsa/microchip/Makefile +++ b/drivers/net/dsa/microchip/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON) += ksz_common.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477) += ksz9477.o +ksz9477-objs := ksz9477_main.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C) += ksz9477_i2c.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI) += ksz9477_spi.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ8795) += ksz8795.o diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477_main.c similarity index 100% rename from drivers/net/dsa/microchip/ksz9477.c rename to drivers/net/dsa/microchip/ksz9477_main.c From patchwork Wed Nov 18 20:30:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915809 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DEC2C63798 for ; Wed, 18 Nov 2020 20:37:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0F806246E0 for ; Wed, 18 Nov 2020 20:37:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727255AbgKRUhN (ORCPT ); Wed, 18 Nov 2020 15:37:13 -0500 Received: from mailout12.rmx.de ([94.199.88.78]:43175 "EHLO mailout12.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726184AbgKRUhM (ORCPT ); Wed, 18 Nov 2020 15:37:12 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout12.rmx.de (Postfix) with ESMTPS id 4CbvkC0bFWzRpHq; Wed, 18 Nov 2020 21:37:07 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvhf1M2cz2xZs; Wed, 18 Nov 2020 21:35:46 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:32:42 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 04/12] dt-bindings: net: dsa: microchip,ksz: add interrupt property Date: Wed, 18 Nov 2020 21:30:05 +0100 Message-ID: <20201118203013.5077-5-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213546-4Cbvhf1M2cz2xZs-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The devices have an optional interrupt line. Signed-off-by: Christian Eggers --- .../devicetree/bindings/net/dsa/microchip,ksz.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml index 010adb09a68f..74d42dee310f 100644 --- a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +++ b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml @@ -35,6 +35,11 @@ properties: Should be a gpio specifier for a reset line. maxItems: 1 + interrupts: + description: + Interrupt specifier for the INTRP_N line from the device. + maxItems: 1 + microchip,synclko-125: $ref: /schemas/types.yaml#/definitions/flag description: @@ -49,6 +54,7 @@ additionalProperties: false examples: - | #include + #include // Ethernet switch connected via SPI to the host, CPU port wired to eth0: eth0 { @@ -70,6 +76,7 @@ examples: compatible = "microchip,ksz9477"; reg = <0>; reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + interrupts-extended = <&gpio5 1 IRQ_TYPE_LEVEL_LOW>; /* INTRP_N line */ spi-max-frequency = <44000000>; spi-cpha; From patchwork Wed Nov 18 20:30:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915815 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA418C6379F for ; Wed, 18 Nov 2020 20:38:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 84A12246CD for ; Wed, 18 Nov 2020 20:38:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727217AbgKRUie (ORCPT ); Wed, 18 Nov 2020 15:38:34 -0500 Received: from mailout02.rmx.de ([62.245.148.41]:46406 "EHLO mailout02.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725710AbgKRUid (ORCPT ); Wed, 18 Nov 2020 15:38:33 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout02.rmx.de (Postfix) with ESMTPS id 4Cbvll6pCgzNljV; Wed, 18 Nov 2020 21:38:27 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4CbvkC0SJxz2xDh; Wed, 18 Nov 2020 21:37:07 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:33:17 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 05/12] net: dsa: microchip: ksz9477: move chip reset to ksz9477_switch_init() Date: Wed, 18 Nov 2020 21:30:06 +0100 Message-ID: <20201118203013.5077-6-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213715-4CbvkC0SJxz2xDh-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The next patch will add basic interrupt support. Chip reset must be performed before requesting the IRQ, so move this from ksz9477_setup() to ksz9477_init(). Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz9477_main.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz9477_main.c b/drivers/net/dsa/microchip/ksz9477_main.c index abfd3802bb51..c0b4cf66c904 100644 --- a/drivers/net/dsa/microchip/ksz9477_main.c +++ b/drivers/net/dsa/microchip/ksz9477_main.c @@ -1345,19 +1345,12 @@ static void ksz9477_config_cpu_port(struct dsa_switch *ds) static int ksz9477_setup(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; - int ret = 0; dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table), dev->num_vlans, GFP_KERNEL); if (!dev->vlan_cache) return -ENOMEM; - ret = ksz9477_reset_switch(dev); - if (ret) { - dev_err(ds->dev, "failed to reset switch\n"); - return ret; - } - /* Required for port partitioning. */ ksz9477_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY, true); @@ -1537,10 +1530,16 @@ static const struct ksz_chip_data ksz9477_switch_chips[] = { static int ksz9477_switch_init(struct ksz_device *dev) { - int i; + int i, ret; dev->ds->ops = &ksz9477_switch_ops; + ret = ksz9477_reset_switch(dev); + if (ret) { + dev_err(dev->dev, "failed to reset switch\n"); + return ret; + } + for (i = 0; i < ARRAY_SIZE(ksz9477_switch_chips); i++) { const struct ksz_chip_data *chip = &ksz9477_switch_chips[i]; From patchwork Wed Nov 18 20:30:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915817 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16FC1C5519F for ; Wed, 18 Nov 2020 20:40:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A032B246C8 for ; Wed, 18 Nov 2020 20:40:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727317AbgKRUjz (ORCPT ); Wed, 18 Nov 2020 15:39:55 -0500 Received: from mailout07.rmx.de ([94.199.90.95]:41858 "EHLO mailout07.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726494AbgKRUjz (ORCPT ); Wed, 18 Nov 2020 15:39:55 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout07.rmx.de (Postfix) with ESMTPS id 4CbvnJ5kbPzBwnn; Wed, 18 Nov 2020 21:39:48 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvll6hsVz2xDw; Wed, 18 Nov 2020 21:38:27 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:33:52 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 06/12] net: dsa: microchip: ksz9477: basic interrupt support Date: Wed, 18 Nov 2020 21:30:07 +0100 Message-ID: <20201118203013.5077-7-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213833-4Cbvll6hsVz2xDw-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Interrupts are required for TX time stamping. Probably they could also be used for PHY connection status. This patch only adds the basic infrastructure for interrupts, no interrupts are finally enabled nor handled. Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz9477_i2c.c | 2 + drivers/net/dsa/microchip/ksz9477_main.c | 68 ++++++++++++++++++++++++ drivers/net/dsa/microchip/ksz9477_spi.c | 2 + drivers/net/dsa/microchip/ksz_common.h | 1 + 4 files changed, 73 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz9477_i2c.c b/drivers/net/dsa/microchip/ksz9477_i2c.c index 4e053a25d077..4ed1f503044a 100644 --- a/drivers/net/dsa/microchip/ksz9477_i2c.c +++ b/drivers/net/dsa/microchip/ksz9477_i2c.c @@ -41,6 +41,8 @@ static int ksz9477_i2c_probe(struct i2c_client *i2c, if (i2c->dev.platform_data) dev->pdata = i2c->dev.platform_data; + dev->irq = i2c->irq; + ret = ksz9477_switch_register(dev); /* Main DSA driver may not be started yet. */ diff --git a/drivers/net/dsa/microchip/ksz9477_main.c b/drivers/net/dsa/microchip/ksz9477_main.c index c0b4cf66c904..34964f6bf354 100644 --- a/drivers/net/dsa/microchip/ksz9477_main.c +++ b/drivers/net/dsa/microchip/ksz9477_main.c @@ -5,9 +5,12 @@ * Copyright (C) 2017-2019 Microchip Technology Inc. */ +#include #include #include +#include #include +#include #include #include #include @@ -1528,6 +1531,54 @@ static const struct ksz_chip_data ksz9477_switch_chips[] = { }, }; +static irqreturn_t ksz9477_switch_irq_thread(int irq, void *dev_id) +{ + struct ksz_device *dev = dev_id; + u32 data; + int port; + int ret; + + /* Read global port interrupt status register */ + ret = ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data); + if (ret) + return IRQ_NONE; + + for (port = 0; port < dev->port_cnt; port++) { + u8 data8; + + if (!(data & BIT(port))) + continue; + + /* Read port interrupt status register */ + ret = ksz_read8(dev, PORT_CTRL_ADDR(port, REG_PORT_INT_STATUS), + &data8); + if (ret) + return IRQ_NONE; + + /* ToDo: Add specific handling of port interrupts */ + } + + return IRQ_NONE; +} + +static int ksz9477_enable_port_interrupts(struct ksz_device *dev, bool enable) +{ + u32 data, mask = GENMASK(dev->port_cnt - 1, 0); + int ret; + + ret = ksz_read32(dev, REG_SW_PORT_INT_MASK__4, &data); + if (ret) + return ret; + + /* bits in REG_SW_PORT_INT_MASK__4 are low active */ + if (enable) + data &= ~mask; + else + data |= mask; + + return ksz_write32(dev, REG_SW_PORT_INT_MASK__4, data); +} + static int ksz9477_switch_init(struct ksz_device *dev) { int i, ret; @@ -1583,12 +1634,29 @@ static int ksz9477_switch_init(struct ksz_device *dev) /* set the real number of ports */ dev->ds->num_ports = dev->port_cnt; + if (dev->irq > 0) { + ret = devm_request_threaded_irq(dev->dev, dev->irq, NULL, + ksz9477_switch_irq_thread, + IRQF_ONESHOT | IRQF_SHARED, + dev_name(dev->dev), + dev); + if (ret) { + dev_err(dev->dev, "failed to request IRQ.\n"); + return ret; + } + + ret = ksz9477_enable_port_interrupts(dev, true); + if (ret) + return ret; + } return 0; } static void ksz9477_switch_exit(struct ksz_device *dev) { + if (dev->irq > 0) + ksz9477_enable_port_interrupts(dev, false); ksz9477_reset_switch(dev); } diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c index 1142768969c2..d2eea9596e53 100644 --- a/drivers/net/dsa/microchip/ksz9477_spi.c +++ b/drivers/net/dsa/microchip/ksz9477_spi.c @@ -48,6 +48,8 @@ static int ksz9477_spi_probe(struct spi_device *spi) if (spi->dev.platform_data) dev->pdata = spi->dev.platform_data; + dev->irq = spi->irq; + ret = ksz9477_switch_register(dev); /* Main DSA driver may not be started yet. */ diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index cf866e48ff66..5df4a7f9df02 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -55,6 +55,7 @@ struct ksz_device { struct device *dev; struct regmap *regmap[3]; + int irq; void *priv; From patchwork Wed Nov 18 20:30:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915819 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDD71C63798 for ; Wed, 18 Nov 2020 20:41:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 82F20246D1 for ; Wed, 18 Nov 2020 20:41:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727245AbgKRUlR (ORCPT ); Wed, 18 Nov 2020 15:41:17 -0500 Received: from mailout06.rmx.de ([94.199.90.92]:40233 "EHLO mailout06.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726444AbgKRUlR (ORCPT ); Wed, 18 Nov 2020 15:41:17 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout06.rmx.de (Postfix) with ESMTPS id 4Cbvps4p7qz9wlf; Wed, 18 Nov 2020 21:41:09 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4CbvnJ5cl5z2xFZ; Wed, 18 Nov 2020 21:39:48 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:34:23 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 07/12] net: dsa: microchip: ksz9477: add Posix clock support for chip PTP clock Date: Wed, 18 Nov 2020 21:30:08 +0100 Message-ID: <20201118203013.5077-8-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-213952-4CbvnJ5cl5z2xFZ-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Implement routines (adjfine, adjtime, gettime and settime) for manipulating the chip's PTP clock. Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/Kconfig | 8 + drivers/net/dsa/microchip/Makefile | 1 + drivers/net/dsa/microchip/ksz9477_i2c.c | 2 +- drivers/net/dsa/microchip/ksz9477_main.c | 17 ++ drivers/net/dsa/microchip/ksz9477_ptp.c | 308 +++++++++++++++++++++++ drivers/net/dsa/microchip/ksz9477_ptp.h | 27 ++ drivers/net/dsa/microchip/ksz9477_spi.c | 2 +- drivers/net/dsa/microchip/ksz_common.h | 8 + 8 files changed, 371 insertions(+), 2 deletions(-) create mode 100644 drivers/net/dsa/microchip/ksz9477_ptp.c create mode 100644 drivers/net/dsa/microchip/ksz9477_ptp.h diff --git a/drivers/net/dsa/microchip/Kconfig b/drivers/net/dsa/microchip/Kconfig index 4ec6a47b7f72..7a4e06bab238 100644 --- a/drivers/net/dsa/microchip/Kconfig +++ b/drivers/net/dsa/microchip/Kconfig @@ -24,6 +24,14 @@ config NET_DSA_MICROCHIP_KSZ9477_SPI help Select to enable support for registering switches configured through SPI. +config NET_DSA_MICROCHIP_KSZ9477_PTP + bool "PTP support for Microchip KSZ9477 series" + depends on NET_DSA_MICROCHIP_KSZ9477 + depends on PTP_1588_CLOCK + help + Say Y to enable PTP hardware timestamping on Microchip KSZ switch + chips that support it. + menuconfig NET_DSA_MICROCHIP_KSZ8795 tristate "Microchip KSZ8795 series switch support" depends on NET_DSA diff --git a/drivers/net/dsa/microchip/Makefile b/drivers/net/dsa/microchip/Makefile index c5cc1d5dea06..35c4356bad65 100644 --- a/drivers/net/dsa/microchip/Makefile +++ b/drivers/net/dsa/microchip/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON) += ksz_common.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477) += ksz9477.o ksz9477-objs := ksz9477_main.o +ksz9477-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) += ksz9477_ptp.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C) += ksz9477_i2c.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_SPI) += ksz9477_spi.o obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ8795) += ksz8795.o diff --git a/drivers/net/dsa/microchip/ksz9477_i2c.c b/drivers/net/dsa/microchip/ksz9477_i2c.c index 4ed1f503044a..315eb24c444d 100644 --- a/drivers/net/dsa/microchip/ksz9477_i2c.c +++ b/drivers/net/dsa/microchip/ksz9477_i2c.c @@ -58,7 +58,7 @@ static int ksz9477_i2c_remove(struct i2c_client *i2c) { struct ksz_device *dev = i2c_get_clientdata(i2c); - ksz_switch_remove(dev); + ksz9477_switch_remove(dev); return 0; } diff --git a/drivers/net/dsa/microchip/ksz9477_main.c b/drivers/net/dsa/microchip/ksz9477_main.c index 34964f6bf354..d1a2ad4a34f1 100644 --- a/drivers/net/dsa/microchip/ksz9477_main.c +++ b/drivers/net/dsa/microchip/ksz9477_main.c @@ -19,6 +19,7 @@ #include "ksz9477_reg.h" #include "ksz_common.h" +#include "ksz9477_ptp.h" /* Used with variable features to indicate capabilities. */ #define GBIT_SUPPORT BIT(0) @@ -1699,10 +1700,26 @@ int ksz9477_switch_register(struct ksz_device *dev) phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Full_BIT); } + + ret = ksz9477_ptp_init(dev); + if (ret) + goto error_switch_unregister; + + return 0; + +error_switch_unregister: + ksz_switch_remove(dev); return ret; } EXPORT_SYMBOL(ksz9477_switch_register); +void ksz9477_switch_remove(struct ksz_device *dev) +{ + ksz9477_ptp_deinit(dev); + ksz_switch_remove(dev); +} +EXPORT_SYMBOL(ksz9477_switch_remove); + MODULE_AUTHOR("Woojung Huh "); MODULE_DESCRIPTION("Microchip KSZ9477 Series Switch DSA Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.c b/drivers/net/dsa/microchip/ksz9477_ptp.c new file mode 100644 index 000000000000..0ffc4504a290 --- /dev/null +++ b/drivers/net/dsa/microchip/ksz9477_ptp.c @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Microchip KSZ9477 switch driver PTP routines + * + * Author: Christian Eggers + * + * Copyright (c) 2020 ARRI Lighting + */ + +#include + +#include "ksz_common.h" +#include "ksz9477_reg.h" + +#include "ksz9477_ptp.h" + +#define KSZ_PTP_INC_NS 40 /* HW clock is incremented every 40 ns (by 40) */ +#define KSZ_PTP_SUBNS_BITS 32 /* Number of bits in sub-nanoseconds counter */ + +/* Posix clock support */ + +static int ksz9477_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) +{ + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + u16 data16; + int ret; + + mutex_lock(&dev->ptp_mutex); + + if (scaled_ppm) { + s64 ppb, adj; + u32 data32; + + /* basic calculation: + * s32 ppb = scaled_ppm_to_ppb(scaled_ppm); + * s64 adj = div_s64(((s64)ppb * KSZ_PTP_INC_NS) << KSZ_PTP_SUBNS_BITS, + * NSEC_PER_SEC); + */ + + /* More precise calculation (avoids shifting out precision). + * See scaled_ppm_to_ppb() in ptp_clock.c for details. + */ + ppb = 1 + scaled_ppm; + ppb *= 125; + ppb *= KSZ_PTP_INC_NS; + ppb <<= KSZ_PTP_SUBNS_BITS - 13; + adj = div_s64(ppb, NSEC_PER_SEC); + + data32 = abs(adj); + data32 &= BIT_MASK(30) - 1; + if (adj >= 0) + data32 |= PTP_RATE_DIR; + + ret = ksz_write32(dev, REG_PTP_SUBNANOSEC_RATE, data32); + if (ret) + goto error_return; + } + + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data16); + if (ret) + goto error_return; + + if (scaled_ppm) + data16 |= PTP_CLK_ADJ_ENABLE; + else + data16 &= ~PTP_CLK_ADJ_ENABLE; + + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data16); + if (ret) + goto error_return; + +error_return: + mutex_unlock(&dev->ptp_mutex); + return ret; +} + +static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + s32 sec, nsec; + u16 data16; + int ret; + + mutex_lock(&dev->ptp_mutex); + + /* Do not use ns_to_timespec64(), both sec and nsec are subtracted by + * hardware. + */ + sec = div_s64_rem(delta, NSEC_PER_SEC, &nsec); + + ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, abs(nsec)); + if (ret) + goto error_return; + + /* Contradictory to the data sheet, seconds are also considered. */ + ret = ksz_write32(dev, REG_PTP_RTC_SEC, abs(sec)); + if (ret) + goto error_return; + + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data16); + if (ret) + goto error_return; + + data16 |= PTP_STEP_ADJ; + if (delta < 0) + data16 &= ~PTP_STEP_DIR; /* 0: subtract */ + else + data16 |= PTP_STEP_DIR; /* 1: add */ + + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data16); + if (ret) + goto error_return; + +error_return: + mutex_unlock(&dev->ptp_mutex); + return ret; +} + +static int _ksz9477_ptp_gettime(struct ksz_device *dev, struct timespec64 *ts) +{ + u32 nanoseconds; + u32 seconds; + u16 data16; + u8 phase; + int ret; + + /* Copy current PTP clock into shadow registers */ + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data16); + if (ret) + return ret; + + data16 |= PTP_READ_TIME; + + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data16); + if (ret) + return ret; + + /* Read from shadow registers */ + ret = ksz_read8(dev, REG_PTP_RTC_SUB_NANOSEC__2, &phase); + if (ret) + return ret; + ret = ksz_read32(dev, REG_PTP_RTC_NANOSEC, &nanoseconds); + if (ret) + return ret; + ret = ksz_read32(dev, REG_PTP_RTC_SEC, &seconds); + if (ret) + return ret; + + ts->tv_sec = seconds; + ts->tv_nsec = nanoseconds + phase * 8; + + return 0; +} + +static int ksz9477_ptp_gettime(struct ptp_clock_info *ptp, + struct timespec64 *ts) +{ + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + int ret; + + mutex_lock(&dev->ptp_mutex); + ret = _ksz9477_ptp_gettime(dev, ts); + mutex_unlock(&dev->ptp_mutex); + + return ret; +} + +static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, + struct timespec64 const *ts) +{ + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + u16 data16; + int ret; + + mutex_lock(&dev->ptp_mutex); + + /* Write to shadow registers */ + + /* clock phase */ + ret = ksz_read16(dev, REG_PTP_RTC_SUB_NANOSEC__2, &data16); + if (ret) + goto error_return; + + data16 &= ~PTP_RTC_SUB_NANOSEC_M; + + ret = ksz_write16(dev, REG_PTP_RTC_SUB_NANOSEC__2, data16); + if (ret) + goto error_return; + + /* nanoseconds */ + ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, ts->tv_nsec); + if (ret) + goto error_return; + + /* seconds */ + ret = ksz_write32(dev, REG_PTP_RTC_SEC, ts->tv_sec); + if (ret) + goto error_return; + + /* Load PTP clock from shadow registers */ + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data16); + if (ret) + goto error_return; + + data16 |= PTP_LOAD_TIME; + + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data16); + if (ret) + goto error_return; + +error_return: + mutex_unlock(&dev->ptp_mutex); + return ret; +} + +static int ksz9477_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *req, int on) +{ + return -EOPNOTSUPP; +} + +static int ksz9477_ptp_start_clock(struct ksz_device *dev) +{ + u16 data; + int ret; + + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data); + if (ret) + return ret; + + /* Perform PTP clock reset */ + data |= PTP_CLK_RESET; + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data); + if (ret) + return ret; + data &= ~PTP_CLK_RESET; + + /* Enable PTP clock */ + data |= PTP_CLK_ENABLE; + ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_stop_clock(struct ksz_device *dev) +{ + u16 data; + int ret; + + ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &data); + if (ret) + return ret; + + /* Disable PTP clock */ + data &= ~PTP_CLK_ENABLE; + return ksz_write16(dev, REG_PTP_CLK_CTRL, data); +} + +int ksz9477_ptp_init(struct ksz_device *dev) +{ + int ret; + + mutex_init(&dev->ptp_mutex); + + /* PTP clock properties */ + + dev->ptp_caps.owner = THIS_MODULE; + snprintf(dev->ptp_caps.name, sizeof(dev->ptp_caps.name), + dev_name(dev->dev)); + + /* Sub-nanoseconds-adj,max * sub-nanoseconds / 40ns * 1ns + * = (2^30-1) * (2 ^ 32) / 40 ns * 1 ns = 6249999 + */ + dev->ptp_caps.max_adj = 6249999; + dev->ptp_caps.n_alarm = 0; + dev->ptp_caps.n_ext_ts = 0; /* currently not implemented */ + dev->ptp_caps.n_per_out = 0; + dev->ptp_caps.pps = 0; + dev->ptp_caps.adjfine = ksz9477_ptp_adjfine; + dev->ptp_caps.adjtime = ksz9477_ptp_adjtime; + dev->ptp_caps.gettime64 = ksz9477_ptp_gettime; + dev->ptp_caps.settime64 = ksz9477_ptp_settime; + dev->ptp_caps.enable = ksz9477_ptp_enable; + + /* Start hardware counter (will overflow after 136 years) */ + ret = ksz9477_ptp_start_clock(dev); + if (ret) + return ret; + + dev->ptp_clock = ptp_clock_register(&dev->ptp_caps, dev->dev); + if (IS_ERR(dev->ptp_clock)) { + ret = PTR_ERR(dev->ptp_clock); + goto error_stop_clock; + } + + return 0; + +error_stop_clock: + ksz9477_ptp_stop_clock(dev); + return ret; +} + +void ksz9477_ptp_deinit(struct ksz_device *dev) +{ + ptp_clock_unregister(dev->ptp_clock); + ksz9477_ptp_stop_clock(dev); +} diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.h b/drivers/net/dsa/microchip/ksz9477_ptp.h new file mode 100644 index 000000000000..0076538419fa --- /dev/null +++ b/drivers/net/dsa/microchip/ksz9477_ptp.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Microchip KSZ9477 switch driver PTP routines + * + * Author: Christian Eggers + * + * Copyright (c) 2020 ARRI Lighting + */ + +#ifndef DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ +#define DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ + +#include "ksz_common.h" + +#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) + +int ksz9477_ptp_init(struct ksz_device *dev); +void ksz9477_ptp_deinit(struct ksz_device *dev); + +#else + +static inline int ksz9477_ptp_init(struct ksz_device *dev) { return 0; } +static inline void ksz9477_ptp_deinit(struct ksz_device *dev) {} + +#endif + +#endif /* DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ */ diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c index d2eea9596e53..e49d581547ac 100644 --- a/drivers/net/dsa/microchip/ksz9477_spi.c +++ b/drivers/net/dsa/microchip/ksz9477_spi.c @@ -66,7 +66,7 @@ static int ksz9477_spi_remove(struct spi_device *spi) struct ksz_device *dev = spi_get_drvdata(spi); if (dev) - ksz_switch_remove(dev); + ksz9477_switch_remove(dev); return 0; } diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 5df4a7f9df02..43dd66009482 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -92,6 +93,12 @@ struct ksz_device { u32 overrides; /* chip functions set by user */ u16 host_mask; u16 port_mask; + +#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) + struct ptp_clock *ptp_clock; + struct ptp_clock_info ptp_caps; + struct mutex ptp_mutex; /* protects PTP related hardware */ +#endif }; struct alu_struct { @@ -147,6 +154,7 @@ void ksz_switch_remove(struct ksz_device *dev); int ksz8795_switch_register(struct ksz_device *dev); int ksz9477_switch_register(struct ksz_device *dev); +void ksz9477_switch_remove(struct ksz_device *dev); void ksz_update_port_member(struct ksz_device *dev, int port); void ksz_init_mib_timer(struct ksz_device *dev); From patchwork Wed Nov 18 20:30:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915821 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42F38C6379F for ; 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Wed, 18 Nov 2020 21:41:09 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:34:58 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 08/12] net: ptp: add helper for one-step P2P clocks Date: Wed, 18 Nov 2020 21:30:09 +0100 Message-ID: <20201118203013.5077-9-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-214111-4Cbvps4dDcz2xCx-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org For P2P delay measurement, the ingress time stamp of the PDelay_Req is required for the correction field of the PDelay_Resp. The application echoes back the correction field of the PDelay_Req when sending the PDelay_Resp. Some hardware (like the ZHAW InES PTP time stamping IP core) subtracts the ingress timestamp autonomously from the correction field, so that the hardware only needs to add the egress timestamp on tx. Other hardware (like the Microchip KSZ9563) reports the ingress time stamp via an interrupt and requires that the software provides this time stamp via tail-tag on tx. In order to avoid introducing a further application interface for this, the driver can simply emulate the behavior of the InES device and subtract the ingress time stamp in software from the correction field. On egress, the correction field can either be kept as it is (and the time stamp field in the tail-tag is set to zero) or move the value from the correction field back to the tail-tag. Changing the correction field requires updating the UDP checksum (if UDP is used as transport). Signed-off-by: Christian Eggers --- include/linux/ptp_classify.h | 73 ++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/include/linux/ptp_classify.h b/include/linux/ptp_classify.h index cc0da0b134a4..f19f2f6a9475 100644 --- a/include/linux/ptp_classify.h +++ b/include/linux/ptp_classify.h @@ -10,8 +10,12 @@ #ifndef _PTP_CLASSIFY_H_ #define _PTP_CLASSIFY_H_ +#include #include +#include #include +#include +#include #define PTP_CLASS_NONE 0x00 /* not a PTP event message */ #define PTP_CLASS_V1 0x01 /* protocol version 1 */ @@ -123,6 +127,67 @@ static inline u8 ptp_get_msgtype(const struct ptp_header *hdr, return msgtype; } +/** + * ptp_check_diff8 - Computes new checksum (when altering a 64-bit field) + * @old: old field value + * @new: new field value + * @oldsum: previous checksum + * + * This function can be used to calculate a new checksum when only a single + * field is changed. Similar as ip_vs_check_diff*() in ip_vs.h. + * + * Return: Updated checksum + */ +static inline __wsum ptp_check_diff8(__be64 old, __be64 new, __wsum oldsum) +{ + __be64 diff[2] = { ~old, new }; + + return csum_partial(diff, sizeof(diff), oldsum); +} + +/** + * ptp_header_update_correction - Update PTP header's correction field + * @skb: packet buffer + * @type: type of the packet (see ptp_classify_raw()) + * @hdr: ptp header + * @correction: new correction value + * + * This updates the correction field of a PTP header and updates the UDP + * checksum (if UDP is used as transport). It is needed for hardware capable of + * one-step P2P that does not already modify the correction field of Pdelay_Req + * event messages on ingress. + */ +static inline +void ptp_header_update_correction(struct sk_buff *skb, unsigned int type, + struct ptp_header *hdr, s64 correction) +{ + __be64 correction_old; + struct udphdr *uhdr; + + /* previous correction value is required for checksum update. */ + memcpy(&correction_old, &hdr->correction, sizeof(correction_old)); + + /* write new correction value */ + put_unaligned_be64((u64)correction, &hdr->correction); + + switch (type & PTP_CLASS_PMASK) { + case PTP_CLASS_IPV4: + case PTP_CLASS_IPV6: + /* locate udp header */ + uhdr = (struct udphdr *)((char *)hdr - sizeof(struct udphdr)); + break; + default: + return; + } + + /* update checksum */ + uhdr->check = csum_fold(ptp_check_diff8(correction_old, + hdr->correction, + ~csum_unfold(uhdr->check))); + if (!uhdr->check) + uhdr->check = CSUM_MANGLED_0; +} + void __init ptp_classifier_init(void); #else static inline void ptp_classifier_init(void) @@ -145,5 +210,13 @@ static inline u8 ptp_get_msgtype(const struct ptp_header *hdr, */ return PTP_MSGTYPE_SYNC; } + +static inline +void ptp_onestep_p2p_move_t2_to_correction(struct sk_buff *skb, + unsigned int type, + struct ptp_header *hdr, + ktime_t t2) +{ +} #endif #endif /* _PTP_CLASSIFY_H_ */ From patchwork Wed Nov 18 20:30:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915823 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47E6AC56201 for ; Wed, 18 Nov 2020 20:44:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 087CD246CA for ; Wed, 18 Nov 2020 20:44:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727196AbgKRUn6 (ORCPT ); Wed, 18 Nov 2020 15:43:58 -0500 Received: from mailout11.rmx.de ([94.199.88.76]:44789 "EHLO mailout11.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726574AbgKRUn5 (ORCPT ); Wed, 18 Nov 2020 15:43:57 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout11.rmx.de (Postfix) with ESMTPS id 4Cbvsz4r05z41Yw; Wed, 18 Nov 2020 21:43:51 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4CbvrQ51bSz2xDM; Wed, 18 Nov 2020 21:42:30 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:35:33 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 09/12] net: dsa: microchip: ksz9477: initial hardware time stamping support Date: Wed, 18 Nov 2020 21:30:10 +0100 Message-ID: <20201118203013.5077-10-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-214230-4CbvrQ51bSz2xDM-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add control routines required for TX hardware time stamping. The KSZ9563 only supports one step time stamping (HWTSTAMP_TX_ONESTEP_P2P), which requires linuxptp-2.0 or later. Currently, only P2P delay measurement is supported. See patchwork discussion and comments in ksz9477_ptp_init() for details: https://patchwork.ozlabs.org/project/netdev/patch/20201019172435.4416-8-ceggers@arri.de/ Signed-off-by: Christian Eggers Reviewed-by: Vladimir Oltean --- drivers/net/dsa/microchip/ksz9477_main.c | 6 + drivers/net/dsa/microchip/ksz9477_ptp.c | 187 +++++++++++++++++++++++ drivers/net/dsa/microchip/ksz9477_ptp.h | 22 +++ drivers/net/dsa/microchip/ksz_common.h | 4 + 4 files changed, 219 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz9477_main.c b/drivers/net/dsa/microchip/ksz9477_main.c index d1a2ad4a34f1..830efdaef9dc 100644 --- a/drivers/net/dsa/microchip/ksz9477_main.c +++ b/drivers/net/dsa/microchip/ksz9477_main.c @@ -1389,6 +1389,7 @@ static const struct dsa_switch_ops ksz9477_switch_ops = { .phy_read = ksz9477_phy_read16, .phy_write = ksz9477_phy_write16, .phylink_mac_link_down = ksz_mac_link_down, + .get_ts_info = ksz9477_ptp_get_ts_info, .port_enable = ksz_enable_port, .get_strings = ksz9477_get_strings, .get_ethtool_stats = ksz_get_ethtool_stats, @@ -1409,6 +1410,11 @@ static const struct dsa_switch_ops ksz9477_switch_ops = { .port_mdb_del = ksz9477_port_mdb_del, .port_mirror_add = ksz9477_port_mirror_add, .port_mirror_del = ksz9477_port_mirror_del, + .port_hwtstamp_get = ksz9477_ptp_port_hwtstamp_get, + .port_hwtstamp_set = ksz9477_ptp_port_hwtstamp_set, + .port_txtstamp = NULL, + /* never defer rx delivery, tstamping is done via tail tagging */ + .port_rxtstamp = NULL, }; static u32 ksz9477_get_port_addr(int port, int offset) diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.c b/drivers/net/dsa/microchip/ksz9477_ptp.c index 0ffc4504a290..f411e5cb88a5 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.c +++ b/drivers/net/dsa/microchip/ksz9477_ptp.c @@ -218,6 +218,18 @@ static int ksz9477_ptp_enable(struct ptp_clock_info *ptp, return -EOPNOTSUPP; } +static long ksz9477_ptp_do_aux_work(struct ptp_clock_info *ptp) +{ + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + struct timespec64 ts; + + mutex_lock(&dev->ptp_mutex); + _ksz9477_ptp_gettime(dev, &ts); + mutex_unlock(&dev->ptp_mutex); + + return HZ; /* reschedule in 1 second */ +} + static int ksz9477_ptp_start_clock(struct ksz_device *dev) { u16 data; @@ -257,6 +269,54 @@ static int ksz9477_ptp_stop_clock(struct ksz_device *dev) return ksz_write16(dev, REG_PTP_CLK_CTRL, data); } +/* device attributes */ + +enum ksz9477_ptp_tcmode { + KSZ9477_PTP_TCMODE_E2E, + KSZ9477_PTP_TCMODE_P2P, +}; + +static int ksz9477_ptp_tcmode_set(struct ksz_device *dev, + enum ksz9477_ptp_tcmode tcmode) +{ + u16 data; + int ret; + + ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data); + if (ret) + return ret; + + if (tcmode == KSZ9477_PTP_TCMODE_P2P) + data |= PTP_TC_P2P; + else + data &= ~PTP_TC_P2P; + + return ksz_write16(dev, REG_PTP_MSG_CONF1, data); +} + +enum ksz9477_ptp_ocmode { + KSZ9477_PTP_OCMODE_SLAVE, + KSZ9477_PTP_OCMODE_MASTER, +}; + +static int ksz9477_ptp_ocmode_set(struct ksz_device *dev, + enum ksz9477_ptp_ocmode ocmode) +{ + u16 data; + int ret; + + ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data); + if (ret) + return ret; + + if (ocmode == KSZ9477_PTP_OCMODE_MASTER) + data |= PTP_MASTER; + else + data &= ~PTP_MASTER; + + return ksz_write16(dev, REG_PTP_MSG_CONF1, data); +} + int ksz9477_ptp_init(struct ksz_device *dev) { int ret; @@ -282,6 +342,7 @@ int ksz9477_ptp_init(struct ksz_device *dev) dev->ptp_caps.gettime64 = ksz9477_ptp_gettime; dev->ptp_caps.settime64 = ksz9477_ptp_settime; dev->ptp_caps.enable = ksz9477_ptp_enable; + dev->ptp_caps.do_aux_work = ksz9477_ptp_do_aux_work; /* Start hardware counter (will overflow after 136 years) */ ret = ksz9477_ptp_start_clock(dev); @@ -294,8 +355,31 @@ int ksz9477_ptp_init(struct ksz_device *dev) goto error_stop_clock; } + /* Currently, only P2P delay measurement is supported. Setting ocmode + * to slave will work independently of actually being master or slave. + * For E2E delay measurement, switching between master and slave would + * be required, as the KSZ devices filters out PTP messages depending on + * the ocmode setting: + * - in slave mode, DelayReq messages are filtered out + * - in master mode, Sync messages are filtered out + * Currently (and probably also in future) there is no interface in the + * kernel which allows switching between master and slave mode. For + * this reason, E2E cannot be supported. See patchwork for full + * discussion: + * https://patchwork.ozlabs.org/project/netdev/patch/20201019172435.4416-8-ceggers@arri.de/ + */ + ksz9477_ptp_tcmode_set(dev, KSZ9477_PTP_TCMODE_P2P); + ksz9477_ptp_ocmode_set(dev, KSZ9477_PTP_OCMODE_SLAVE); + + /* Schedule cyclic call of ksz_ptp_do_aux_work() */ + ret = ptp_schedule_worker(dev->ptp_clock, 0); + if (ret) + goto error_unregister_clock; + return 0; +error_unregister_clock: + ptp_clock_unregister(dev->ptp_clock); error_stop_clock: ksz9477_ptp_stop_clock(dev); return ret; @@ -306,3 +390,106 @@ void ksz9477_ptp_deinit(struct ksz_device *dev) ptp_clock_unregister(dev->ptp_clock); ksz9477_ptp_stop_clock(dev); } + +/* DSA PTP operations */ + +int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, + struct ethtool_ts_info *ts) +{ + struct ksz_device *dev = ds->priv; + + ts->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | + SOF_TIMESTAMPING_RX_HARDWARE | + SOF_TIMESTAMPING_RAW_HARDWARE; + + ts->phc_index = ptp_clock_index(dev->ptp_clock); + + ts->tx_types = BIT(HWTSTAMP_TX_OFF) | + BIT(HWTSTAMP_TX_ONESTEP_P2P); + + ts->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | + BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | + BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | + BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); + + return 0; +} + +static int ksz9477_set_hwtstamp_config(struct ksz_device *dev, int port, + struct hwtstamp_config *config) +{ + struct ksz_port *prt = &dev->ports[port]; + + /* reserved for future extensions */ + if (config->flags) + return -EINVAL; + + switch (config->tx_type) { + case HWTSTAMP_TX_OFF: + prt->hwts_tx_en = false; + break; + case HWTSTAMP_TX_ONESTEP_P2P: + prt->hwts_tx_en = true; + break; + default: + return -ERANGE; + } + + switch (config->rx_filter) { + case HWTSTAMP_FILTER_NONE: + break; + case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; + break; + case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: + config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; + break; + case HWTSTAMP_FILTER_PTP_V2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_SYNC: + config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; + break; + case HWTSTAMP_FILTER_ALL: + default: + config->rx_filter = HWTSTAMP_FILTER_NONE; + return -ERANGE; + } + + return 0; +} + +int ksz9477_ptp_port_hwtstamp_get(struct dsa_switch *ds, int port, + struct ifreq *ifr) +{ + struct ksz_device *dev = ds->priv; + unsigned long bytes_copied; + + bytes_copied = copy_to_user(ifr->ifr_data, + &dev->ports[port].tstamp_config, + sizeof(dev->ports[port].tstamp_config)); + + return bytes_copied ? -EFAULT : 0; +} + +int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, + struct ifreq *ifr) +{ + struct ksz_device *dev = ds->priv; + struct hwtstamp_config config; + unsigned long bytes_copied; + int err; + + if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) + return -EFAULT; + + err = ksz9477_set_hwtstamp_config(dev, port, &config); + if (err) + return err; + + /* Save the chosen configuration to be returned later. */ + memcpy(&dev->ports[port].tstamp_config, &config, sizeof(config)); + bytes_copied = copy_to_user(ifr->ifr_data, &config, sizeof(config)); + + return bytes_copied ? -EFAULT : 0; +} diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.h b/drivers/net/dsa/microchip/ksz9477_ptp.h index 0076538419fa..2fd58a981ec5 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.h +++ b/drivers/net/dsa/microchip/ksz9477_ptp.h @@ -10,6 +10,8 @@ #ifndef DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ #define DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ +#include + #include "ksz_common.h" #if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) @@ -17,11 +19,31 @@ int ksz9477_ptp_init(struct ksz_device *dev); void ksz9477_ptp_deinit(struct ksz_device *dev); +int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, + struct ethtool_ts_info *ts); +int ksz9477_ptp_port_hwtstamp_get(struct dsa_switch *ds, int port, + struct ifreq *ifr); +int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, + struct ifreq *ifr); + #else static inline int ksz9477_ptp_init(struct ksz_device *dev) { return 0; } static inline void ksz9477_ptp_deinit(struct ksz_device *dev) {} +static inline int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, + struct ethtool_ts_info *ts) +{ return -EOPNOTSUPP; } + +static inline int ksz9477_ptp_port_hwtstamp_get(struct dsa_switch *ds, int port, + struct ifreq *ifr) +{ return -EOPNOTSUPP; } + +static inline int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, + struct ifreq *ifr) +{ return -EOPNOTSUPP; } + + #endif #endif /* DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ */ diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 43dd66009482..139e9b84290b 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -41,6 +41,10 @@ struct ksz_port { struct ksz_port_mib mib; phy_interface_t interface; +#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) + struct hwtstamp_config tstamp_config; + bool hwts_tx_en; +#endif }; struct ksz_device { From patchwork Wed Nov 18 20:30:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915825 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44B38C63697 for ; Wed, 18 Nov 2020 20:45:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D159F246C7 for ; Wed, 18 Nov 2020 20:45:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726689AbgKRUpV (ORCPT ); Wed, 18 Nov 2020 15:45:21 -0500 Received: from mailout12.rmx.de ([94.199.88.78]:49483 "EHLO mailout12.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725794AbgKRUpU (ORCPT ); Wed, 18 Nov 2020 15:45:20 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout12.rmx.de (Postfix) with ESMTPS id 4CbvvX46JSzRp8b; Wed, 18 Nov 2020 21:45:12 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvsz4kN7z2xDT; Wed, 18 Nov 2020 21:43:51 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:36:08 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 10/12] net: dsa: microchip: ksz9477: remaining hardware time stamping support Date: Wed, 18 Nov 2020 21:30:11 +0100 Message-ID: <20201118203013.5077-11-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-214359-4Cbvsz4kN7z2xDT-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add data path routines required for TX hardware time stamping. PTP mode is permanently enabled (changes tail tag; depends on CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP). TX time stamps are reported via an interrupt / device registers whilst RX time stamps are reported via an additional tail tag. One step TX time stamping of PDelay_Resp requires the RX time stamp from the associated PDelay_Req message. The user space PTP stack assumes that the RX time stamp has already been subtracted from the PDelay_Req correction field (as done by the ZHAW InES PTP time stamping core). It will echo back the value of the correction field in the PDelay_Resp message. In order to be compatible to this already established interface, the KSZ9563 code emulates this behavior. When processing the PDelay_Resp message, the time stamp is moved back from the correction field to the tail tag, as the hardware generates an invalid UDP checksum if this field is negative. Of course, the UDP checksums (if any) have to be corrected after this (for both directions). Everything has been tested on a Microchip KSZ9563 switch. Signed-off-by: Christian Eggers --- drivers/net/dsa/microchip/ksz9477_main.c | 12 +- drivers/net/dsa/microchip/ksz9477_ptp.c | 343 ++++++++++++++++++++++- drivers/net/dsa/microchip/ksz9477_ptp.h | 13 + drivers/net/dsa/microchip/ksz_common.h | 8 + include/linux/dsa/ksz_common.h | 69 +++++ net/dsa/tag_ksz.c | 217 +++++++++++++- 6 files changed, 648 insertions(+), 14 deletions(-) create mode 100644 include/linux/dsa/ksz_common.h diff --git a/drivers/net/dsa/microchip/ksz9477_main.c b/drivers/net/dsa/microchip/ksz9477_main.c index 830efdaef9dc..4d4d44fcec92 100644 --- a/drivers/net/dsa/microchip/ksz9477_main.c +++ b/drivers/net/dsa/microchip/ksz9477_main.c @@ -1412,7 +1412,7 @@ static const struct dsa_switch_ops ksz9477_switch_ops = { .port_mirror_del = ksz9477_port_mirror_del, .port_hwtstamp_get = ksz9477_ptp_port_hwtstamp_get, .port_hwtstamp_set = ksz9477_ptp_port_hwtstamp_set, - .port_txtstamp = NULL, + .port_txtstamp = ksz9477_ptp_port_txtstamp, /* never defer rx delivery, tstamping is done via tail tagging */ .port_rxtstamp = NULL, }; @@ -1541,6 +1541,7 @@ static const struct ksz_chip_data ksz9477_switch_chips[] = { static irqreturn_t ksz9477_switch_irq_thread(int irq, void *dev_id) { struct ksz_device *dev = dev_id; + irqreturn_t result = IRQ_NONE; u32 data; int port; int ret; @@ -1560,12 +1561,15 @@ static irqreturn_t ksz9477_switch_irq_thread(int irq, void *dev_id) ret = ksz_read8(dev, PORT_CTRL_ADDR(port, REG_PORT_INT_STATUS), &data8); if (ret) - return IRQ_NONE; + return result; - /* ToDo: Add specific handling of port interrupts */ + if (data8 & PORT_PTP_INT) { + if (ksz9477_ptp_port_interrupt(dev, port) != IRQ_NONE) + result = IRQ_HANDLED; + } } - return IRQ_NONE; + return result; } static int ksz9477_enable_port_interrupts(struct ksz_device *dev, bool enable) diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.c b/drivers/net/dsa/microchip/ksz9477_ptp.c index f411e5cb88a5..f998eb5d8dc4 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.c +++ b/drivers/net/dsa/microchip/ksz9477_ptp.c @@ -6,7 +6,10 @@ * Copyright (c) 2020 ARRI Lighting */ +#include +#include #include +#include #include "ksz_common.h" #include "ksz9477_reg.h" @@ -76,6 +79,8 @@ static int ksz9477_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + struct ksz_device_ptp_shared *ptp_shared = &dev->ptp_shared; + struct timespec64 delta64 = ns_to_timespec64(delta); s32 sec, nsec; u16 data16; int ret; @@ -110,6 +115,11 @@ static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) if (ret) goto error_return; + spin_lock_bh(&ptp_shared->ptp_clock_lock); + ptp_shared->ptp_clock_time = timespec64_add(ptp_shared->ptp_clock_time, + delta64); + spin_unlock_bh(&ptp_shared->ptp_clock_lock); + error_return: mutex_unlock(&dev->ptp_mutex); return ret; @@ -168,6 +178,7 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, struct timespec64 const *ts) { struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + struct ksz_device_ptp_shared *ptp_shared = &dev->ptp_shared; u16 data16; int ret; @@ -207,6 +218,10 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, if (ret) goto error_return; + spin_lock_bh(&ptp_shared->ptp_clock_lock); + ptp_shared->ptp_clock_time = *ts; + spin_unlock_bh(&ptp_shared->ptp_clock_lock); + error_return: mutex_unlock(&dev->ptp_mutex); return ret; @@ -221,17 +236,23 @@ static int ksz9477_ptp_enable(struct ptp_clock_info *ptp, static long ksz9477_ptp_do_aux_work(struct ptp_clock_info *ptp) { struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + struct ksz_device_ptp_shared *ptp_shared = &dev->ptp_shared; struct timespec64 ts; mutex_lock(&dev->ptp_mutex); _ksz9477_ptp_gettime(dev, &ts); mutex_unlock(&dev->ptp_mutex); + spin_lock_bh(&ptp_shared->ptp_clock_lock); + ptp_shared->ptp_clock_time = ts; + spin_unlock_bh(&ptp_shared->ptp_clock_lock); + return HZ; /* reschedule in 1 second */ } static int ksz9477_ptp_start_clock(struct ksz_device *dev) { + struct ksz_device_ptp_shared *ptp_shared = &dev->ptp_shared; u16 data; int ret; @@ -252,6 +273,11 @@ static int ksz9477_ptp_start_clock(struct ksz_device *dev) if (ret) return ret; + spin_lock_bh(&ptp_shared->ptp_clock_lock); + ptp_shared->ptp_clock_time.tv_sec = 0; + ptp_shared->ptp_clock_time.tv_nsec = 0; + spin_unlock_bh(&ptp_shared->ptp_clock_lock); + return 0; } @@ -269,6 +295,215 @@ static int ksz9477_ptp_stop_clock(struct ksz_device *dev) return ksz_write16(dev, REG_PTP_CLK_CTRL, data); } +/* Time stamping support */ + +static int ksz9477_ptp_enable_mode(struct ksz_device *dev, bool enable) +{ + u16 data; + int ret; + + ret = ksz_read16(dev, REG_PTP_MSG_CONF1, &data); + if (ret) + return ret; + + if (enable) + data |= PTP_ENABLE; + else + data &= ~PTP_ENABLE; + + return ksz_write16(dev, REG_PTP_MSG_CONF1, data); +} + +static int ksz9477_ptp_enable_port_ptp_interrupts(struct ksz_device *dev, + int port, bool enable) +{ + u32 addr = PORT_CTRL_ADDR(port, REG_PORT_INT_MASK); + u8 data; + int ret; + + ret = ksz_read8(dev, addr, &data); + if (ret) + return ret; + + /* PORT_PTP_INT bit is low active */ + if (enable) + data &= ~PORT_PTP_INT; + else + data |= PORT_PTP_INT; + + return ksz_write8(dev, addr, data); +} + +static int ksz9477_ptp_enable_port_egress_interrupts(struct ksz_device *dev, + int port, bool enable) +{ + u32 addr = PORT_CTRL_ADDR(port, REG_PTP_PORT_TX_INT_ENABLE__2); + u16 data; + int ret; + + ret = ksz_read16(dev, addr, &data); + if (ret) + return ret; + + /* PTP_PORT_XDELAY_REQ_INT is high active */ + if (enable) + data |= PTP_PORT_XDELAY_REQ_INT; + else + data &= PTP_PORT_XDELAY_REQ_INT; + + return ksz_write16(dev, addr, data); +} + +static void ksz9477_ptp_txtstamp_skb(struct ksz_device *dev, + struct ksz_port *prt, struct sk_buff *skb) +{ + struct skb_shared_hwtstamps hwtstamps = {}; + int ret; + + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; + + /* timeout must include tstamp latency, IRQ latency and time for + * reading the time stamp via I2C. + */ + ret = wait_for_completion_timeout(&prt->tstamp_completion, + msecs_to_jiffies(100)); + if (!ret) { + dev_err(dev->dev, "timeout waiting for time stamp\n"); + return; + } + hwtstamps.hwtstamp = prt->tstamp_xdelay; + skb_complete_tx_timestamp(skb, &hwtstamps); +} + +#define work_to_port(work) \ + container_of((work), struct ksz_port_ptp_shared, xmit_work) +#define ptp_shared_to_ksz_port(t) \ + container_of((t), struct ksz_port, ptp_shared) +#define ptp_shared_to_ksz_device(t) \ + container_of((t), struct ksz_device, ptp_shared) + +/* Deferred work is necessary for time stamped PDelay_Req messages. This cannot + * be done from atomic context as we have to wait for the hardware interrupt. + */ +static void ksz9477_port_deferred_xmit(struct kthread_work *work) +{ + struct ksz_port_ptp_shared *prt_ptp_shared = work_to_port(work); + struct ksz_port *prt = ptp_shared_to_ksz_port(prt_ptp_shared); + struct ksz_device_ptp_shared *ptp_shared = prt_ptp_shared->dev; + struct ksz_device *dev = ptp_shared_to_ksz_device(ptp_shared); + int port = prt - dev->ports; + struct sk_buff *skb; + + while ((skb = skb_dequeue(&prt_ptp_shared->xmit_queue)) != NULL) { + struct sk_buff *clone = DSA_SKB_CB(skb)->clone; + + reinit_completion(&prt->tstamp_completion); + + /* Transfer skb to the host port. */ + dsa_enqueue_skb(skb, dsa_to_port(dev->ds, port)->slave); + + ksz9477_ptp_txtstamp_skb(dev, prt, clone); + } +} + +static int ksz9477_ptp_port_init(struct ksz_device *dev, int port) +{ + struct ksz_port *prt = &dev->ports[port]; + struct ksz_port_ptp_shared *ptp_shared = &prt->ptp_shared; + struct dsa_port *dp = dsa_to_port(dev->ds, port); + int ret; + + /* Read rx and tx delay from port registers */ + ret = ksz_read16(dev, PORT_CTRL_ADDR(port, REG_PTP_PORT_RX_DELAY__2), + &ptp_shared->tstamp_rx_latency_ns); + if (ret) + return ret; + + ret = ksz_read16(dev, PORT_CTRL_ADDR(port, REG_PTP_PORT_TX_DELAY__2), + &prt->tstamp_tx_latency_ns); + if (ret) + return ret; + + if (port == dev->cpu_port) + return 0; + + ret = ksz9477_ptp_enable_port_ptp_interrupts(dev, port, true); + if (ret) + return ret; + + ret = ksz9477_ptp_enable_port_egress_interrupts(dev, port, true); + if (ret) + goto error_disable_port_ptp_interrupts; + + /* ksz_port::ptp_shared is used in tagging driver */ + ptp_shared->dev = &dev->ptp_shared; + dp->priv = ptp_shared; + + /* PDelay_Req messages require deferred transmit as the time + * stamp unit provides no sequenceId or similar. So we must + * wait for the time stamp interrupt. + */ + init_completion(&prt->tstamp_completion); + kthread_init_work(&ptp_shared->xmit_work, + ksz9477_port_deferred_xmit); + ptp_shared->xmit_worker = kthread_create_worker(0, "%s_xmit", + dp->slave->name); + if (IS_ERR(ptp_shared->xmit_worker)) { + ret = PTR_ERR(ptp_shared->xmit_worker); + dev_err(dev->dev, + "failed to create deferred xmit thread: %d\n", ret); + goto error_disable_port_egress_interrupts; + } + skb_queue_head_init(&ptp_shared->xmit_queue); + + return 0; + +error_disable_port_egress_interrupts: + ksz9477_ptp_enable_port_egress_interrupts(dev, port, false); +error_disable_port_ptp_interrupts: + ksz9477_ptp_enable_port_ptp_interrupts(dev, port, false); + return ret; +} + +static void ksz9477_ptp_port_deinit(struct ksz_device *dev, int port) +{ + struct ksz_port_ptp_shared *ptp_shared = &dev->ports[port].ptp_shared; + + if (port == dev->cpu_port) + return; + + kthread_destroy_worker(ptp_shared->xmit_worker); + ksz9477_ptp_enable_port_egress_interrupts(dev, port, false); + ksz9477_ptp_enable_port_ptp_interrupts(dev, port, false); +} + +static int ksz9477_ptp_ports_init(struct ksz_device *dev) +{ + int port; + int ret; + + for (port = 0; port < dev->port_cnt; port++) { + ret = ksz9477_ptp_port_init(dev, port); + if (ret) + goto error_deinit; + } + + return 0; + +error_deinit: + while (port-- > 0) + ksz9477_ptp_port_deinit(dev, port); + return ret; +} + +static void ksz9477_ptp_ports_deinit(struct ksz_device *dev) +{ + int port; + + for (port = 0; port < dev->port_cnt; port++) + ksz9477_ptp_port_deinit(dev, port); +} + /* device attributes */ enum ksz9477_ptp_tcmode { @@ -322,6 +557,7 @@ int ksz9477_ptp_init(struct ksz_device *dev) int ret; mutex_init(&dev->ptp_mutex); + spin_lock_init(&dev->ptp_shared.ptp_clock_lock); /* PTP clock properties */ @@ -355,6 +591,16 @@ int ksz9477_ptp_init(struct ksz_device *dev) goto error_stop_clock; } + /* Enable PTP mode (will affect tail tagging format) */ + ret = ksz9477_ptp_enable_mode(dev, true); + if (ret) + goto error_unregister_clock; + + /* Init switch ports */ + ret = ksz9477_ptp_ports_init(dev); + if (ret) + goto error_disable_mode; + /* Currently, only P2P delay measurement is supported. Setting ocmode * to slave will work independently of actually being master or slave. * For E2E delay measurement, switching between master and slave would @@ -374,10 +620,14 @@ int ksz9477_ptp_init(struct ksz_device *dev) /* Schedule cyclic call of ksz_ptp_do_aux_work() */ ret = ptp_schedule_worker(dev->ptp_clock, 0); if (ret) - goto error_unregister_clock; + goto error_ports_deinit; return 0; +error_ports_deinit: + ksz9477_ptp_ports_deinit(dev); +error_disable_mode: + ksz9477_ptp_enable_mode(dev, false); error_unregister_clock: ptp_clock_unregister(dev->ptp_clock); error_stop_clock: @@ -387,10 +637,54 @@ int ksz9477_ptp_init(struct ksz_device *dev) void ksz9477_ptp_deinit(struct ksz_device *dev) { + ksz9477_ptp_ports_deinit(dev); + ksz9477_ptp_enable_mode(dev, false); ptp_clock_unregister(dev->ptp_clock); ksz9477_ptp_stop_clock(dev); } +irqreturn_t ksz9477_ptp_port_interrupt(struct ksz_device *dev, int port) +{ + u32 addr = PORT_CTRL_ADDR(port, REG_PTP_PORT_TX_INT_STATUS__2); + struct ksz_port *prt = &dev->ports[port]; + u16 data; + int ret; + + ret = ksz_read16(dev, addr, &data); + if (ret) + return IRQ_NONE; + + if (data & PTP_PORT_XDELAY_REQ_INT) { + /* Timestamp for Pdelay_Req / Delay_Req */ + struct ksz_device_ptp_shared *ptp_shared = &dev->ptp_shared; + u32 tstamp_raw; + ktime_t tstamp; + + /* In contrast to the KSZ9563R data sheet, the format of the + * port time stamp registers is also 2 bit seconds + 30 bit + * nanoseconds (same as in the tail tags). + */ + ret = ksz_read32(dev, + PORT_CTRL_ADDR(port, REG_PTP_PORT_XDELAY_TS), + &tstamp_raw); + if (ret) + return IRQ_NONE; + + tstamp = ksz9477_decode_tstamp(tstamp_raw, + prt->tstamp_tx_latency_ns); + prt->tstamp_xdelay = ksz9477_tstamp_reconstruct(ptp_shared, + tstamp); + complete(&prt->tstamp_completion); + } + + /* Clear interrupt(s) (W1C) */ + ret = ksz_write16(dev, addr, data); + if (ret) + return IRQ_NONE; + + return IRQ_HANDLED; +} + /* DSA PTP operations */ int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, @@ -493,3 +787,50 @@ int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, return bytes_copied ? -EFAULT : 0; } + +bool ksz9477_ptp_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *clone, + unsigned int type) +{ + struct ksz_device *dev = ds->priv; + struct ksz_port *prt = &dev->ports[port]; + struct ptp_header *hdr; + u8 ptp_msg_type; + + /* Should already been tested in dsa_skb_tx_timestamp()? */ + if (!(skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP)) + return false; + + if (!prt->hwts_tx_en) + return false; + + hdr = ptp_parse_header(clone, type); + if (!hdr) + return false; + + ptp_msg_type = ptp_get_msgtype(hdr, type); + switch (ptp_msg_type) { + /* As the KSZ9563 always performs one step time stamping, only the time + * stamp for Pdelay_Req is reported to the application via socket error + * queue. Time stamps for Sync and Pdelay_resp will be applied directly + * to the outgoing message (e.g. correction field), but will NOT be + * reported to the socket. + * Delay_Req is not time stamped as E2E is currently not supported by + * this driver. See ksz9477_ptp_init() for details. + */ + case PTP_MSGTYPE_PDELAY_REQ: + case PTP_MSGTYPE_PDELAY_RESP: + break; + default: + return false; + } + + /* ptp_type will be reused in ksz9477_xmit_timestamp(). ptp_msg_type + * will be reused in ksz9477_defer_xmit(). For PDelay_Resp, the cloned + * skb will not be passed to skb_complete_tx_timestamp() and has to be + * freed manually in ksz9477_defer_xmit(). + */ + KSZ9477_SKB_CB(clone)->ptp_type = type; + KSZ9477_SKB_CB(clone)->ptp_msg_type = ptp_msg_type; + + return true; /* keep cloned skb */ +} diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.h b/drivers/net/dsa/microchip/ksz9477_ptp.h index 2fd58a981ec5..2f7c4fa0753a 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.h +++ b/drivers/net/dsa/microchip/ksz9477_ptp.h @@ -10,6 +10,7 @@ #ifndef DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ #define DRIVERS_NET_DSA_MICROCHIP_KSZ9477_PTP_H_ +#include #include #include "ksz_common.h" @@ -19,18 +20,26 @@ int ksz9477_ptp_init(struct ksz_device *dev); void ksz9477_ptp_deinit(struct ksz_device *dev); +irqreturn_t ksz9477_ptp_port_interrupt(struct ksz_device *dev, int port); + int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, struct ethtool_ts_info *ts); int ksz9477_ptp_port_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr); int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr); +bool ksz9477_ptp_port_txtstamp(struct dsa_switch *ds, int port, + struct sk_buff *clone, unsigned int type); #else static inline int ksz9477_ptp_init(struct ksz_device *dev) { return 0; } static inline void ksz9477_ptp_deinit(struct ksz_device *dev) {} +static inline irqreturn_t ksz9477_ptp_port_interrupt(struct ksz_device *dev, + int port) +{ return IRQ_NONE; } + static inline int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, struct ethtool_ts_info *ts) { return -EOPNOTSUPP; } @@ -43,6 +52,10 @@ static inline int ksz9477_ptp_port_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr) { return -EOPNOTSUPP; } +static inline bool ksz9477_ptp_port_txtstamp(struct dsa_switch *ds, int port, + struct sk_buff *clone, + unsigned int type) +{ return false; } #endif diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 139e9b84290b..868d0cc9d84f 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -7,8 +7,11 @@ #ifndef __KSZ_COMMON_H #define __KSZ_COMMON_H +#include +#include #include #include +#include #include #include #include @@ -42,7 +45,11 @@ struct ksz_port { struct ksz_port_mib mib; phy_interface_t interface; #if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) + struct ksz_port_ptp_shared ptp_shared; + u16 tstamp_tx_latency_ns; /* tx delay from tstamp unit to wire */ struct hwtstamp_config tstamp_config; + ktime_t tstamp_xdelay; + struct completion tstamp_completion; bool hwts_tx_en; #endif }; @@ -102,6 +109,7 @@ struct ksz_device { struct ptp_clock *ptp_clock; struct ptp_clock_info ptp_caps; struct mutex ptp_mutex; /* protects PTP related hardware */ + struct ksz_device_ptp_shared ptp_shared; #endif }; diff --git a/include/linux/dsa/ksz_common.h b/include/linux/dsa/ksz_common.h new file mode 100644 index 000000000000..16634ee3489e --- /dev/null +++ b/include/linux/dsa/ksz_common.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Routines shared between drivers/net/dsa/microchip/ksz9477_ptp.h and + * net/dsa/tag_ksz.c + * + * Copyright (C) 2020 ARRI Lighting + */ + +#ifndef _NET_DSA_KSZ_COMMON_H_ +#define _NET_DSA_KSZ_COMMON_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* All time stamps from the KSZ consist of 2 bits for seconds and 30 bits for + * nanoseconds. This is NOT the same as 32 bits for nanoseconds. + */ +#define KSZ_TSTAMP_SEC_MASK GENMASK(31, 30) +#define KSZ_TSTAMP_NSEC_MASK GENMASK(29, 0) + +struct ksz_device_ptp_shared { + /* protects ptp_clock_time (user space (various syscalls) + * vs. softirq in ksz9477_rcv_timestamp()). + */ + spinlock_t ptp_clock_lock; + /* approximated current time, read once per second from hardware */ + struct timespec64 ptp_clock_time; +}; + +struct ksz_port_ptp_shared { + struct ksz_device_ptp_shared *dev; + u16 tstamp_rx_latency_ns; /* rx delay from wire to tstamp unit */ + struct kthread_worker *xmit_worker; + struct kthread_work xmit_work; + struct sk_buff_head xmit_queue; +}; + +/* net/dsa/tag_ksz.c */ +static inline ktime_t ksz9477_decode_tstamp(u32 tstamp, int offset_ns) +{ + u64 ns = FIELD_GET(KSZ_TSTAMP_SEC_MASK, tstamp) * NSEC_PER_SEC + + FIELD_GET(KSZ_TSTAMP_NSEC_MASK, tstamp); + + /* Add/remove excess delay between wire and time stamp unit */ + return ns_to_ktime(ns + offset_ns); +} + +ktime_t ksz9477_tstamp_reconstruct(struct ksz_device_ptp_shared *ksz, + ktime_t tstamp); + +struct ksz9477_skb_cb { + unsigned int ptp_type; + /* Do not cache pointer to PTP header between ksz9477_ptp_port_txtstamp + * and ksz9xxx_xmit() (will become invalid during dsa_realloc_skb()). + */ + u8 ptp_msg_type; +}; + +#define KSZ9477_SKB_CB(skb) \ + ((struct ksz9477_skb_cb *)DSA_SKB_CB_PRIV(skb)) + +#endif /* _NET_DSA_KSZ_COMMON_H_ */ diff --git a/net/dsa/tag_ksz.c b/net/dsa/tag_ksz.c index 4820dbcedfa2..aa87ceac8c56 100644 --- a/net/dsa/tag_ksz.c +++ b/net/dsa/tag_ksz.c @@ -4,10 +4,14 @@ * Copyright (c) 2017 Microchip Technology */ +#include +#include #include #include +#include #include #include +#include #include "dsa_priv.h" /* Typically only one byte is used for tail tag. */ @@ -87,26 +91,217 @@ MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_KSZ8795); /* * For Ingress (Host -> KSZ9477), 2 bytes are added before FCS. * --------------------------------------------------------------------------- - * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|tag1(1byte)|FCS(4bytes) + * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|ts(4bytes)|tag0(1byte)|tag1(1byte)|FCS(4bytes) * --------------------------------------------------------------------------- + * ts : time stamp (only present if PTP is enabled on the hardware). * tag0 : Prioritization (not used now) * tag1 : each bit represents port (eg, 0x01=port1, 0x02=port2, 0x10=port5) * - * For Egress (KSZ9477 -> Host), 1 byte is added before FCS. + * For Egress (KSZ9477 -> Host), 1/4 bytes are added before FCS. * --------------------------------------------------------------------------- - * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|FCS(4bytes) + * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|ts(4bytes)|tag0(1byte)|FCS(4bytes) * --------------------------------------------------------------------------- + * ts : time stamp (only present of bit 7 in tag0 is set * tag0 : zero-based value represents port * (eg, 0x00=port1, 0x02=port3, 0x06=port7) */ #define KSZ9477_INGRESS_TAG_LEN 2 #define KSZ9477_PTP_TAG_LEN 4 -#define KSZ9477_PTP_TAG_INDICATION 0x80 +#define KSZ9477_PTP_TAG_INDICATION BIT(7) #define KSZ9477_TAIL_TAG_OVERRIDE BIT(9) #define KSZ9477_TAIL_TAG_LOOKUP BIT(10) +#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) +/* Time stamp tag is only inserted if PTP is enabled in hardware. */ +static void ksz9477_xmit_timestamp(struct sk_buff *skb) +{ + struct sk_buff *clone = DSA_SKB_CB(skb)->clone; + struct ptp_header *ptp_hdr; + unsigned int ptp_type; + u32 tstamp_raw = 0; + u8 ptp_msg_type; + s64 correction; + + if (!clone) + goto out_put_tag; + + /* Use cached PTP type from ksz9477_ptp_port_txtstamp(). */ + ptp_type = KSZ9477_SKB_CB(clone)->ptp_type; + if (ptp_type == PTP_CLASS_NONE) + goto out_put_tag; + + ptp_hdr = ptp_parse_header(skb, ptp_type); + if (!ptp_hdr) + goto out_put_tag; + + ptp_msg_type = KSZ9477_SKB_CB(clone)->ptp_msg_type; + if (ptp_msg_type != PTP_MSGTYPE_PDELAY_RESP) + goto out_put_tag; + + correction = (s64)get_unaligned_be64(&ptp_hdr->correction); + + /* For PDelay_Resp messages we will likely have a negative value in the + * correction field (see ksz9477_rcv()). The switch hardware cannot + * correctly update such values (produces an off by one error in the UDP + * checksum), so it must be moved to the time stamp field in the tail + * tag. + */ + if (correction < 0) { + struct timespec64 ts; + + /* Move ingress time stamp from PTP header's correction field to + * tail tag. Format of the correction filed is 48 bit ns + 16 + * bit fractional ns. + */ + ts = ns_to_timespec64(-correction >> 16); + tstamp_raw = ((ts.tv_sec & 3) << 30) | ts.tv_nsec; + + /* Set correction field to 0 and update UDP checksum. */ + ptp_header_update_correction(skb, ptp_type, ptp_hdr, 0); + } + + /* For PDelay_Resp messages, the clone is not required in + * skb_complete_tx_timestamp() and should be freed here. + */ + kfree_skb(clone); + DSA_SKB_CB(skb)->clone = NULL; + +out_put_tag: + put_unaligned_be32(tstamp_raw, skb_put(skb, KSZ9477_PTP_TAG_LEN)); +} + +/* Defer transmit if waiting for egress time stamp is required. */ +static struct sk_buff *ksz9477_defer_xmit(struct dsa_port *dp, + struct sk_buff *skb) +{ + struct ksz_port_ptp_shared *ptp_shared = dp->priv; + struct sk_buff *clone = DSA_SKB_CB(skb)->clone; + u8 ptp_msg_type; + + if (!clone) + return skb; /* no deferred xmit for this packet */ + + /* Use cached PTP msg type from ksz9477_ptp_port_txtstamp(). */ + ptp_msg_type = KSZ9477_SKB_CB(clone)->ptp_msg_type; + if (ptp_msg_type != PTP_MSGTYPE_PDELAY_REQ) + goto out_free_clone; /* only PDelay_Req is deferred */ + + /* Increase refcount so the kfree_skb in dsa_slave_xmit + * won't really free the packet. + */ + skb_queue_tail(&ptp_shared->xmit_queue, skb_get(skb)); + kthread_queue_work(ptp_shared->xmit_worker, &ptp_shared->xmit_work); + + return NULL; + +out_free_clone: + kfree_skb(clone); + DSA_SKB_CB(skb)->clone = NULL; + return skb; +} + +ktime_t ksz9477_tstamp_reconstruct(struct ksz_device_ptp_shared *ksz, + ktime_t tstamp) +{ + struct timespec64 ts = ktime_to_timespec64(tstamp); + struct timespec64 ptp_clock_time; + struct timespec64 diff; + + spin_lock_bh(&ksz->ptp_clock_lock); + ptp_clock_time = ksz->ptp_clock_time; + spin_unlock_bh(&ksz->ptp_clock_lock); + + /* calculate full time from partial time stamp */ + ts.tv_sec = (ptp_clock_time.tv_sec & ~3) | ts.tv_sec; + + /* find nearest possible point in time */ + diff = timespec64_sub(ts, ptp_clock_time); + if (diff.tv_sec > 2) + ts.tv_sec -= 4; + else if (diff.tv_sec < -2) + ts.tv_sec += 4; + + return timespec64_to_ktime(ts); +} +EXPORT_SYMBOL(ksz9477_tstamp_reconstruct); + +static void ksz9477_rcv_timestamp(struct sk_buff *skb, u8 *tag, + struct net_device *dev, unsigned int port) +{ + struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb); + struct dsa_switch *ds = dev->dsa_ptr->ds; + struct ksz_port_ptp_shared *port_ptp_shared; + u8 *tstamp_raw = tag - KSZ9477_PTP_TAG_LEN; + struct ptp_header *ptp_hdr; + unsigned int ptp_type; + u8 ptp_msg_type; + ktime_t tstamp; + s64 correction; + + port_ptp_shared = dsa_to_port(ds, port)->priv; + if (!port_ptp_shared) + return; + + /* convert time stamp and write to skb */ + tstamp = ksz9477_decode_tstamp(get_unaligned_be32(tstamp_raw), + -port_ptp_shared->tstamp_rx_latency_ns); + memset(hwtstamps, 0, sizeof(*hwtstamps)); + hwtstamps->hwtstamp = ksz9477_tstamp_reconstruct(port_ptp_shared->dev, + tstamp); + + /* For PDelay_Req messages, user space (ptp4l) expects that the hardware + * subtracts the ingress time stamp from the correction field. The + * separate hw time stamp from the sk_buff struct will not be used in + * this case. + */ + + if (skb_headroom(skb) < ETH_HLEN) + return; + + __skb_push(skb, ETH_HLEN); + ptp_type = ptp_classify_raw(skb); + __skb_pull(skb, ETH_HLEN); + + if (ptp_type == PTP_CLASS_NONE) + return; + + ptp_hdr = ptp_parse_header(skb, ptp_type); + if (!ptp_hdr) + return; + + ptp_msg_type = ptp_get_msgtype(ptp_hdr, ptp_type); + if (ptp_msg_type != PTP_MSGTYPE_PDELAY_REQ) + return; + + /* Only subtract the partial time stamp from the correction field. When + * the hardware adds the egress time stamp to the correction field of + * the PDelay_Resp message on tx, also only the partial time stamp will + * be added. + */ + correction = (s64)get_unaligned_be64(&ptp_hdr->correction); + correction -= ktime_to_ns(tstamp) << 16; + + ptp_header_update_correction(skb, ptp_type, ptp_hdr, correction); +} +#else /* IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) */ +static void ksz9477_xmit_timestamp(struct sk_buff *skb) +{ +} + +static struct sk_buff *ksz9477_defer_xmit(struct dsa_port *dp, + struct sk_buff *skb) +{ + return skb; /* no deferred xmit */ +} + +static void ksz9477_rcv_timestamp(struct sk_buff *skb, u8 *tag, + struct net_device *dev, unsigned int port) +{ +} +#endif /* IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ9477_PTP) */ + static struct sk_buff *ksz9477_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -116,6 +311,7 @@ static struct sk_buff *ksz9477_xmit(struct sk_buff *skb, u16 val; /* Tag encoding */ + ksz9477_xmit_timestamp(skb); tag = skb_put(skb, KSZ9477_INGRESS_TAG_LEN); addr = skb_mac_header(skb); @@ -126,7 +322,7 @@ static struct sk_buff *ksz9477_xmit(struct sk_buff *skb, *tag = cpu_to_be16(val); - return skb; + return ksz9477_defer_xmit(dp, skb); } static struct sk_buff *ksz9477_rcv(struct sk_buff *skb, struct net_device *dev, @@ -138,8 +334,10 @@ static struct sk_buff *ksz9477_rcv(struct sk_buff *skb, struct net_device *dev, unsigned int len = KSZ_EGRESS_TAG_LEN; /* Extra 4-bytes PTP timestamp */ - if (tag[0] & KSZ9477_PTP_TAG_INDICATION) + if (tag[0] & KSZ9477_PTP_TAG_INDICATION) { + ksz9477_rcv_timestamp(skb, tag, dev, port); len += KSZ9477_PTP_TAG_LEN; + } return ksz_common_rcv(skb, dev, port, len); } @@ -149,7 +347,7 @@ static const struct dsa_device_ops ksz9477_netdev_ops = { .proto = DSA_TAG_PROTO_KSZ9477, .xmit = ksz9477_xmit, .rcv = ksz9477_rcv, - .overhead = KSZ9477_INGRESS_TAG_LEN, + .overhead = KSZ9477_INGRESS_TAG_LEN + KSZ9477_PTP_TAG_LEN, .tail_tag = true, }; @@ -167,6 +365,7 @@ static struct sk_buff *ksz9893_xmit(struct sk_buff *skb, u8 *tag; /* Tag encoding */ + ksz9477_xmit_timestamp(skb); tag = skb_put(skb, KSZ_INGRESS_TAG_LEN); addr = skb_mac_header(skb); @@ -175,7 +374,7 @@ static struct sk_buff *ksz9893_xmit(struct sk_buff *skb, if (is_link_local_ether_addr(addr)) *tag |= KSZ9893_TAIL_TAG_OVERRIDE; - return skb; + return ksz9477_defer_xmit(dp, skb); } static const struct dsa_device_ops ksz9893_netdev_ops = { @@ -183,7 +382,7 @@ static const struct dsa_device_ops ksz9893_netdev_ops = { .proto = DSA_TAG_PROTO_KSZ9893, .xmit = ksz9893_xmit, .rcv = ksz9477_rcv, - .overhead = KSZ_INGRESS_TAG_LEN, + .overhead = KSZ_INGRESS_TAG_LEN + KSZ9477_PTP_TAG_LEN, .tail_tag = true, }; From patchwork Wed Nov 18 20:30:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915841 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FA7FC63697 for ; Wed, 18 Nov 2020 20:46:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 38E8D246DD for ; Wed, 18 Nov 2020 20:46:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727363AbgKRUqj (ORCPT ); Wed, 18 Nov 2020 15:46:39 -0500 Received: from mailout04.rmx.de ([94.199.90.94]:57661 "EHLO mailout04.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727074AbgKRUqj (ORCPT ); Wed, 18 Nov 2020 15:46:39 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout04.rmx.de (Postfix) with ESMTPS id 4Cbvx53DFgz3qjGP; Wed, 18 Nov 2020 21:46:33 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4CbvvX3x9Pz2xFN; Wed, 18 Nov 2020 21:45:12 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:36:43 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 11/12] net: dsa: microchip: ksz9477: add Pulse Per Second (PPS) support Date: Wed, 18 Nov 2020 21:30:12 +0100 Message-ID: <20201118203013.5077-12-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-214518-4CbvvX3x9Pz2xFN-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The KSZ9563 has a Trigger Output Unit (TOU) which can be used to generate periodic signals. After adjusting the PTP clock time, the PPS signal has to be restarted. Tested on a Microchip KSZ9563 switch. Signed-off-by: Christian Eggers --- drivers/net/dsa/microchip/ksz9477_ptp.c | 251 +++++++++++++++++++++++- drivers/net/dsa/microchip/ksz9477_ptp.h | 4 + drivers/net/dsa/microchip/ksz_common.h | 6 + 3 files changed, 259 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.c b/drivers/net/dsa/microchip/ksz9477_ptp.c index f998eb5d8dc4..ce3fdc9a1f9e 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.c +++ b/drivers/net/dsa/microchip/ksz9477_ptp.c @@ -19,6 +19,126 @@ #define KSZ_PTP_INC_NS 40 /* HW clock is incremented every 40 ns (by 40) */ #define KSZ_PTP_SUBNS_BITS 32 /* Number of bits in sub-nanoseconds counter */ +/* Shared register access routines (Trigger Output Unit) */ + +static int ksz9477_ptp_tou_reset(struct ksz_device *dev, unsigned int unit) +{ + u32 ctrl_stat, data; + int ret; + + /* Reset trigger unit (clears TRIGGER_EN, but not GPIOSTATx) */ + ret = ksz_read32(dev, REG_PTP_CTRL_STAT__4, &ctrl_stat); + if (ret) + return ret; + + ctrl_stat |= TRIG_RESET; + + ret = ksz_write32(dev, REG_PTP_CTRL_STAT__4, ctrl_stat); + if (ret) + return ret; + + /* Clear DONE */ + data = 1 << (unit + TRIG_DONE_S); + ret = ksz_write32(dev, REG_PTP_TRIG_STATUS__4, data); + if (ret) + return ret; + + /* Clear IRQ */ + data = 1 << (unit + TRIG_INT_S); + ret = ksz_write32(dev, REG_PTP_INT_STATUS__4, data); + if (ret) + return ret; + + /* Clear reset and set GPIO direction */ + ctrl_stat &= ~TRIG_ENABLE; /* clear cached bit :-) */ + ctrl_stat &= ~TRIG_RESET; + + ret = ksz_write32(dev, REG_PTP_CTRL_STAT__4, ctrl_stat); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_tou_cycle_width_set(struct ksz_device *dev, u32 width_ns) +{ + int ret; + + ret = ksz_write32(dev, REG_TRIG_CYCLE_WIDTH, width_ns); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_tou_cycle_count_set(struct ksz_device *dev, u16 count) +{ + u32 data; + int ret; + + ret = ksz_read32(dev, REG_TRIG_CYCLE_CNT, &data); + if (ret) + return ret; + + data &= ~(TRIG_CYCLE_CNT_M << TRIG_CYCLE_CNT_S); + data |= (count & TRIG_CYCLE_CNT_M) << TRIG_CYCLE_CNT_S; + + ret = ksz_write32(dev, REG_TRIG_CYCLE_CNT, data); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_tou_pulse_set(struct ksz_device *dev, u32 pulse_ns) +{ + u32 data; + + data = (pulse_ns / 8); + + return ksz_write32(dev, REG_TRIG_PULSE_WIDTH__4, data); +} + +static int ksz9477_ptp_tou_target_time_set(struct ksz_device *dev, struct timespec64 const *ts) +{ + int ret; + + /* Hardware has only 32 bit */ + if ((ts->tv_sec & 0xffffffff) != ts->tv_sec) + return -EINVAL; + + ret = ksz_write32(dev, REG_TRIG_TARGET_NANOSEC, ts->tv_nsec); + if (ret) + return ret; + + ret = ksz_write32(dev, REG_TRIG_TARGET_SEC, ts->tv_sec); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_tou_start(struct ksz_device *dev, u32 *ctrl_stat_) +{ + u32 ctrl_stat; + int ret; + + ret = ksz_read32(dev, REG_PTP_CTRL_STAT__4, &ctrl_stat); + if (ret) + return ret; + + ctrl_stat |= TRIG_ENABLE; + + ret = ksz_write32(dev, REG_PTP_CTRL_STAT__4, ctrl_stat); + if (ret) + return ret; + + if (ctrl_stat_) + *ctrl_stat_ = ctrl_stat; + + return 0; +} + /* Posix clock support */ static int ksz9477_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) @@ -76,6 +196,8 @@ static int ksz9477_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) return ret; } +static int ksz9477_ptp_enable_pps(struct ksz_device *dev, int on); + static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); @@ -115,6 +237,20 @@ static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) if (ret) goto error_return; + switch (dev->ptp_tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PPS: + dev_info(dev->dev, "Restarting PPS\n"); + + ret = ksz9477_ptp_enable_pps(dev, 1); + if (ret) + goto error_return; + + break; + } + spin_lock_bh(&ptp_shared->ptp_clock_lock); ptp_shared->ptp_clock_time = timespec64_add(ptp_shared->ptp_clock_time, delta64); @@ -218,6 +354,20 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, if (ret) goto error_return; + switch (dev->ptp_tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PPS: + dev_info(dev->dev, "Restarting PPS\n"); + + ret = ksz9477_ptp_enable_pps(dev, 1); + if (ret) + goto error_return; + + break; + } + spin_lock_bh(&ptp_shared->ptp_clock_lock); ptp_shared->ptp_clock_time = *ts; spin_unlock_bh(&ptp_shared->ptp_clock_lock); @@ -227,10 +377,107 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, return ret; } +#define KSZ9477_PPS_TOU 0 /* currently fixed to trigger output unit 0 */ + +static int ksz9477_ptp_enable_pps(struct ksz_device *dev, int on) +{ + struct timespec64 now, pps_start, diff; + u32 gpio_stat0, trig_ctrl; + int ret; + + if (dev->ptp_tou_mode != KSZ_PTP_TOU_PPS && dev->ptp_tou_mode != KSZ_PTP_TOU_IDLE) + return -EBUSY; + + /* Reset trigger unit 0 */ + ret = ksz9477_ptp_tou_reset(dev, KSZ9477_PPS_TOU); + if (ret) + return ret; + + if (!on) { + dev->ptp_tou_mode = KSZ_PTP_TOU_IDLE; + return 0; /* success */ + } + + /* Enable notify, set rising edge, set periodic pulse pattern */ + trig_ctrl = TRIG_NOTIFY | (TRIG_POS_PERIOD << TRIG_PATTERN_S); + + ret = ksz_write32(dev, REG_TRIG_CTRL__4, trig_ctrl); + if (ret) + return ret; + + /* Set cycle width (1 s) */ + ret = ksz9477_ptp_tou_cycle_width_set(dev, NSEC_PER_SEC); + if (ret) + return ret; + + /* Set cycle count (infinite) */ + ksz9477_ptp_tou_cycle_count_set(dev, 0); + if (ret) + return ret; + + /* Set pulse with (125 ms / 8 ns) */ + ret = ksz9477_ptp_tou_pulse_set(dev, 125000000); + if (ret) + return ret; + + /* Read current time */ + ret = _ksz9477_ptp_gettime(dev, &now); + if (ret) + return ret; + + /* Determine and write start time of PPS */ + pps_start.tv_sec = now.tv_sec + 1; + pps_start.tv_nsec = 0; + diff = timespec64_sub(pps_start, now); + + /* Reserve at least 100 ms for programming and activating */ + if (diff.tv_nsec < 100000000) + pps_start.tv_sec++; + + ret = ksz9477_ptp_tou_target_time_set(dev, &pps_start); + if (ret) + return ret; + + /* Activate trigger unit */ + ret = ksz9477_ptp_tou_start(dev, NULL); + if (ret) + return ret; + + /* Check error flag: + * - the ACTIVE flag is NOT cleared an error! + */ + ret = ksz_read32(dev, REG_PTP_TRIG_STATUS__4, &gpio_stat0); + if (ret) + return ret; + + if (gpio_stat0 & (1 << (KSZ9477_PPS_TOU + TRIG_ERROR_S))) { + dev_err(dev->dev, "%s: Trigger unit error!\n", __func__); + ret = -EIO; + /* Unit will be reset on next access */ + return ret; + } + + dev->ptp_tou_mode = KSZ_PTP_TOU_PPS; + return 0; +} + static int ksz9477_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *req, int on) { - return -EOPNOTSUPP; + struct ksz_device *dev = container_of(ptp, struct ksz_device, ptp_caps); + int ret; + + switch (req->type) { + case PTP_CLK_REQ_PPS: + mutex_lock(&dev->ptp_mutex); + ret = ksz9477_ptp_enable_pps(dev, on); + mutex_unlock(&dev->ptp_mutex); + return ret; + default: + return -EINVAL; + } + + return 0; } static long ksz9477_ptp_do_aux_work(struct ptp_clock_info *ptp) @@ -572,7 +819,7 @@ int ksz9477_ptp_init(struct ksz_device *dev) dev->ptp_caps.n_alarm = 0; dev->ptp_caps.n_ext_ts = 0; /* currently not implemented */ dev->ptp_caps.n_per_out = 0; - dev->ptp_caps.pps = 0; + dev->ptp_caps.pps = 1; dev->ptp_caps.adjfine = ksz9477_ptp_adjfine; dev->ptp_caps.adjtime = ksz9477_ptp_adjtime; dev->ptp_caps.gettime64 = ksz9477_ptp_gettime; diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.h b/drivers/net/dsa/microchip/ksz9477_ptp.h index 2f7c4fa0753a..4d20decf0ad7 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.h +++ b/drivers/net/dsa/microchip/ksz9477_ptp.h @@ -20,6 +20,7 @@ int ksz9477_ptp_init(struct ksz_device *dev); void ksz9477_ptp_deinit(struct ksz_device *dev); +irqreturn_t ksz9477_ptp_interrupt(struct ksz_device *dev); irqreturn_t ksz9477_ptp_port_interrupt(struct ksz_device *dev, int port); int ksz9477_ptp_get_ts_info(struct dsa_switch *ds, int port, @@ -36,6 +37,9 @@ bool ksz9477_ptp_port_txtstamp(struct dsa_switch *ds, int port, static inline int ksz9477_ptp_init(struct ksz_device *dev) { return 0; } static inline void ksz9477_ptp_deinit(struct ksz_device *dev) {} +static inline irqreturn_t ksz9477_ptp_interrupt(struct ksz_device *dev) +{ return IRQ_NONE; } + static inline irqreturn_t ksz9477_ptp_port_interrupt(struct ksz_device *dev, int port) { return IRQ_NONE; } diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 868d0cc9d84f..3481477a62e0 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -54,6 +54,11 @@ struct ksz_port { #endif }; +enum ksz_ptp_tou_mode { + KSZ_PTP_TOU_IDLE, + KSZ_PTP_TOU_PPS, +}; + struct ksz_device { struct dsa_switch *ds; struct ksz_platform_data *pdata; @@ -110,6 +115,7 @@ struct ksz_device { struct ptp_clock_info ptp_caps; struct mutex ptp_mutex; /* protects PTP related hardware */ struct ksz_device_ptp_shared ptp_shared; + enum ksz_ptp_tou_mode ptp_tou_mode; #endif }; From patchwork Wed Nov 18 20:30:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Eggers X-Patchwork-Id: 11915843 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87A19C56201 for ; Wed, 18 Nov 2020 20:48:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3D271246C2 for ; Wed, 18 Nov 2020 20:48:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727386AbgKRUsA (ORCPT ); Wed, 18 Nov 2020 15:48:00 -0500 Received: from mailout01.rmx.de ([94.199.90.91]:57881 "EHLO mailout01.rmx.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726416AbgKRUr7 (ORCPT ); Wed, 18 Nov 2020 15:47:59 -0500 Received: from kdin01.retarus.com (kdin01.dmz1.retloc [172.19.17.48]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout01.rmx.de (Postfix) with ESMTPS id 4Cbvyf245wz2STQb; Wed, 18 Nov 2020 21:47:54 +0100 (CET) Received: from mta.arri.de (unknown [217.111.95.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by kdin01.retarus.com (Postfix) with ESMTPS id 4Cbvx536f6z2xF4; Wed, 18 Nov 2020 21:46:33 +0100 (CET) Received: from N95HX1G2.wgnetz.xx (192.168.54.25) by mta.arri.de (192.168.100.104) with Microsoft SMTP Server (TLS) id 14.3.487.0; Wed, 18 Nov 2020 21:37:13 +0100 From: Christian Eggers To: Vladimir Oltean , Jakub Kicinski , Andrew Lunn , Richard Cochran , "Rob Herring" CC: Vivien Didelot , "David S . Miller" , Kurt Kanzenbach , George McCollister , Marek Vasut , Helmut Grohne , Paul Barker , Codrin Ciubotariu , Tristram Ha , Woojung Huh , Microchip Linux Driver Support , Christian Eggers , , , Subject: [PATCH net-next v3 12/12] net: dsa: microchip: ksz9477: add periodic output support Date: Wed, 18 Nov 2020 21:30:13 +0100 Message-ID: <20201118203013.5077-13-ceggers@arri.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201118203013.5077-1-ceggers@arri.de> References: <20201118203013.5077-1-ceggers@arri.de> MIME-Version: 1.0 X-Originating-IP: [192.168.54.25] X-RMX-ID: 20201118-214637-4Cbvx536f6z2xF4-0@kdin01 X-RMX-SOURCE: 217.111.95.66 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The KSZ9563 has a Trigger Output Unit (TOU) which can be used to generate periodic signals. The pulse length can be altered via a device attribute. Tested on a Microchip KSZ9563 switch. Signed-off-by: Christian Eggers --- drivers/net/dsa/microchip/ksz9477_ptp.c | 197 +++++++++++++++++++++++- drivers/net/dsa/microchip/ksz_common.h | 5 + 2 files changed, 201 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz9477_ptp.c b/drivers/net/dsa/microchip/ksz9477_ptp.c index ce3fdc9a1f9e..3174574d52f6 100644 --- a/drivers/net/dsa/microchip/ksz9477_ptp.c +++ b/drivers/net/dsa/microchip/ksz9477_ptp.c @@ -90,6 +90,20 @@ static int ksz9477_ptp_tou_cycle_count_set(struct ksz_device *dev, u16 count) return 0; } +static int ksz9477_ptp_tou_pulse_verify(u64 pulse_ns) +{ + u32 data; + + if (pulse_ns & 0x3) + return -EINVAL; + + data = (pulse_ns / 8); + if (data != (data & TRIG_PULSE_WIDTH_M)) + return -ERANGE; + + return 0; +} + static int ksz9477_ptp_tou_pulse_set(struct ksz_device *dev, u32 pulse_ns) { u32 data; @@ -196,6 +210,7 @@ static int ksz9477_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) return ret; } +static int ksz9477_ptp_restart_perout(struct ksz_device *dev); static int ksz9477_ptp_enable_pps(struct ksz_device *dev, int on); static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) @@ -241,6 +256,15 @@ static int ksz9477_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) case KSZ_PTP_TOU_IDLE: break; + case KSZ_PTP_TOU_PEROUT: + dev_info(dev->dev, "Restarting periodic output signal\n"); + + ret = ksz9477_ptp_restart_perout(dev); + if (ret) + goto error_return; + + break; + case KSZ_PTP_TOU_PPS: dev_info(dev->dev, "Restarting PPS\n"); @@ -358,6 +382,15 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, case KSZ_PTP_TOU_IDLE: break; + case KSZ_PTP_TOU_PEROUT: + dev_info(dev->dev, "Restarting periodic output signal\n"); + + ret = ksz9477_ptp_restart_perout(dev); + if (ret) + goto error_return; + + break; + case KSZ_PTP_TOU_PPS: dev_info(dev->dev, "Restarting PPS\n"); @@ -377,6 +410,159 @@ static int ksz9477_ptp_settime(struct ptp_clock_info *ptp, return ret; } +static int ksz9477_ptp_configure_perout(struct ksz_device *dev, u32 cycle_width_ns, + u16 cycle_count, u32 pulse_width_ns, + struct timespec64 const *target_time) +{ + int ret; + u32 trig_ctrl; + + /* Enable notify, set rising edge, set periodic pattern */ + trig_ctrl = TRIG_NOTIFY | (TRIG_POS_PERIOD << TRIG_PATTERN_S); + ret = ksz_write32(dev, REG_TRIG_CTRL__4, trig_ctrl); + if (ret) + return ret; + + ret = ksz9477_ptp_tou_cycle_width_set(dev, cycle_width_ns); + if (ret) + return ret; + + ksz9477_ptp_tou_cycle_count_set(dev, cycle_count); + if (ret) + return ret; + + ret = ksz9477_ptp_tou_pulse_set(dev, pulse_width_ns); + if (ret) + return ret; + + ret = ksz9477_ptp_tou_target_time_set(dev, target_time); + if (ret) + return ret; + + return 0; +} + +static int ksz9477_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *perout_request, int on) +{ + u32 gpio_stat0; + u64 cycle_width_ns; + int ret; + + if (dev->ptp_tou_mode != KSZ_PTP_TOU_PEROUT && dev->ptp_tou_mode != KSZ_PTP_TOU_IDLE) + return -EBUSY; + + ret = ksz9477_ptp_tou_reset(dev, 0); + if (ret) + return ret; + + if (!on) { + dev->ptp_tou_mode = KSZ_PTP_TOU_IDLE; + return 0; /* success */ + } + + dev->ptp_perout_target_time_first.tv_sec = perout_request->start.sec; + dev->ptp_perout_target_time_first.tv_nsec = perout_request->start.nsec; + + dev->ptp_perout_period.tv_sec = perout_request->period.sec; + dev->ptp_perout_period.tv_nsec = perout_request->period.nsec; + + cycle_width_ns = timespec64_to_ns(&dev->ptp_perout_period); + if ((cycle_width_ns & GENMASK(31, 0)) != cycle_width_ns) + return -EINVAL; + + if (perout_request->flags & PTP_PEROUT_DUTY_CYCLE) { + u64 value = perout_request->on.sec * NSEC_PER_SEC + + perout_request->on.nsec; + + ret = ksz9477_ptp_tou_pulse_verify(value); + if (ret) + return ret; + + dev->ptp_perout_pulse_width_ns = value; + } + + ret = ksz9477_ptp_configure_perout(dev, cycle_width_ns, + dev->ptp_perout_cycle_count, + dev->ptp_perout_pulse_width_ns, + &dev->ptp_perout_target_time_first); + if (ret) + return ret; + + /* Activate trigger unit */ + ret = ksz9477_ptp_tou_start(dev, NULL); + if (ret) + return ret; + + /* Check error flag: + * - the ACTIVE flag is NOT cleared an error! + */ + ret = ksz_read32(dev, REG_PTP_TRIG_STATUS__4, &gpio_stat0); + if (ret) + return ret; + + if (gpio_stat0 & (1 << (0 + TRIG_ERROR_S))) { + dev_err(dev->dev, "%s: Trigger unit0 error!\n", __func__); + ret = -EIO; + /* Unit will be reset on next access */ + return ret; + } + + dev->ptp_tou_mode = KSZ_PTP_TOU_PEROUT; + return 0; +} + +static int ksz9477_ptp_restart_perout(struct ksz_device *dev) +{ + struct timespec64 now; + s64 now_ns, first_ns, period_ns, next_ns; + unsigned int count; + int ret; + + ret = _ksz9477_ptp_gettime(dev, &now); + if (ret) + return ret; + + now_ns = timespec64_to_ns(&now); + first_ns = timespec64_to_ns(&dev->ptp_perout_target_time_first); + + /* Calculate next perout event based on start time and period */ + period_ns = timespec64_to_ns(&dev->ptp_perout_period); + + if (first_ns < now_ns) { + count = div_u64(now_ns - first_ns, period_ns); + next_ns = first_ns + count * period_ns; + } else { + next_ns = first_ns; + } + + /* Ensure 100 ms guard time prior next event */ + while (next_ns < now_ns + 100000000) + next_ns += period_ns; + + /* Restart periodic output signal */ + { + struct timespec64 next = ns_to_timespec64(next_ns); + struct ptp_perout_request perout_request = { + .start = { + .sec = next.tv_sec, + .nsec = next.tv_nsec + }, + .period = { + .sec = dev->ptp_perout_period.tv_sec, + .nsec = dev->ptp_perout_period.tv_nsec + }, + .index = 0, + .flags = 0, /* keep current values */ + }; + ret = ksz9477_ptp_enable_perout(dev, &perout_request, 1); + if (ret) + return ret; + } + + return 0; +} + #define KSZ9477_PPS_TOU 0 /* currently fixed to trigger output unit 0 */ static int ksz9477_ptp_enable_pps(struct ksz_device *dev, int on) @@ -468,6 +654,15 @@ static int ksz9477_ptp_enable(struct ptp_clock_info *ptp, int ret; switch (req->type) { + case PTP_CLK_REQ_PEROUT: + { + struct ptp_perout_request const *perout_request = &req->perout; + + mutex_lock(&dev->ptp_mutex); + ret = ksz9477_ptp_enable_perout(dev, perout_request, on); + mutex_unlock(&dev->ptp_mutex); + return ret; + } case PTP_CLK_REQ_PPS: mutex_lock(&dev->ptp_mutex); ret = ksz9477_ptp_enable_pps(dev, on); @@ -818,7 +1013,7 @@ int ksz9477_ptp_init(struct ksz_device *dev) dev->ptp_caps.max_adj = 6249999; dev->ptp_caps.n_alarm = 0; dev->ptp_caps.n_ext_ts = 0; /* currently not implemented */ - dev->ptp_caps.n_per_out = 0; + dev->ptp_caps.n_per_out = 1; dev->ptp_caps.pps = 1; dev->ptp_caps.adjfine = ksz9477_ptp_adjfine; dev->ptp_caps.adjtime = ksz9477_ptp_adjtime; diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 3481477a62e0..3b897a6c882d 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -56,6 +56,7 @@ struct ksz_port { enum ksz_ptp_tou_mode { KSZ_PTP_TOU_IDLE, + KSZ_PTP_TOU_PEROUT, KSZ_PTP_TOU_PPS, }; @@ -116,6 +117,10 @@ struct ksz_device { struct mutex ptp_mutex; /* protects PTP related hardware */ struct ksz_device_ptp_shared ptp_shared; enum ksz_ptp_tou_mode ptp_tou_mode; + struct timespec64 ptp_perout_target_time_first; /* start of first perout pulse */ + struct timespec64 ptp_perout_period; + u32 ptp_perout_pulse_width_ns; + u16 ptp_perout_cycle_count; #endif };