From patchwork Sat Nov 21 00:35:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F960C56202 for ; Sat, 21 Nov 2020 00:35:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4C8E23A65 for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B4C8E23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 577106E94F; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 853DB6E93F for ; Sat, 21 Nov 2020 00:35:41 +0000 (UTC) IronPort-SDR: /uYIbHxXdp4UsuYklCCuOtUq6xx9juqxhp7AOxaUcJXIWmv/0Z+cma5icFES4+qz+lzmG0twJK cysTjzQuTBRg== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="235707194" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707194" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:40 -0800 IronPort-SDR: wK8F04qY5KItx6mwtufb1Ht0vdjygGc1V1MA7oaQb1T9PFsdrrJU83gmNf+17pS13zZ1PjH1sa V3HnNBQLJkaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352670" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:15 -0800 Message-Id: <20201121003540.24980-2-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 01/26] drm/i915/pxp: Introduce Intel PXP component X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" PXP (Protected Xe Path) is an i915 componment, that helps user space to establish the hardware protected session and manage the status of each alive software session, as well as the life cycle of each session. By design PXP will expose ioctl so allow user space to create, set, and destroy each session. It will also provide the communication chanel to TEE (Trusted Execution Environment) for the protected hardware session creation. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 4 ++++ drivers/gpu/drm/i915/i915_drv.c | 4 ++++ drivers/gpu/drm/i915/i915_drv.h | 4 ++++ drivers/gpu/drm/i915/pxp/intel_pxp.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 22 ++++++++++++++++++++++ 5 files changed, 52 insertions(+) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e5574e506a5c..8274fea96009 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -254,6 +254,10 @@ i915-y += \ i915-y += i915_perf.o +# Protected execution platform (PXP) support +i915-y += \ + pxp/intel_pxp.o + # Post-mortem debug and GPU hang state capture i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o i915-$(CONFIG_DRM_I915_SELFTEST) += \ diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index f2389ba49c69..c8b9c42fcbd6 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -889,6 +889,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto out_cleanup_gem; + intel_pxp_init(i915); + i915_driver_register(i915); enable_rpm_wakeref_asserts(&i915->runtime_pm); @@ -938,6 +940,8 @@ void i915_driver_remove(struct drm_i915_private *i915) /* Flush any external code that still may be under the RCU lock */ synchronize_rcu(); + intel_pxp_uninit(i915); + i915_gem_suspend(i915); drm_atomic_helper_shutdown(&i915->drm); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 15be8debae54..f34ed07a68ee 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -105,6 +105,8 @@ #include "intel_region_lmem.h" +#include "pxp/intel_pxp.h" + /* General customization: */ @@ -1215,6 +1217,8 @@ struct drm_i915_private { /* Mutex to protect the above hdcp component related values. */ struct mutex hdcp_comp_mutex; + struct intel_pxp pxp; + I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;) /* diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c new file mode 100644 index 000000000000..bc19024e43f0 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020 Intel Corporation. + */ + +#include "i915_drv.h" +#include "intel_pxp.h" + +int intel_pxp_init(struct drm_i915_private *i915) +{ + drm_info(&i915->drm, "i915 PXP is inited with i915=[%p]\n", i915); + + return 0; +} + +void intel_pxp_uninit(struct drm_i915_private *i915) +{ +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h new file mode 100644 index 000000000000..d92b9bbcef2e --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_H__ +#define __INTEL_PXP_H__ + +#include + +struct pxp_context; + +struct intel_pxp { + struct pxp_context *ctx; +}; + +struct drm_i915_private; + +int intel_pxp_init(struct drm_i915_private *i915); +void intel_pxp_uninit(struct drm_i915_private *i915); + +#endif From patchwork Sat Nov 21 00:35:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59E8EC56202 for ; Sat, 21 Nov 2020 00:35:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0DC1D23A65 for ; Sat, 21 Nov 2020 00:35:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0DC1D23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA4596E954; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id BBB9D6E8D0 for ; Sat, 21 Nov 2020 00:35:41 +0000 (UTC) IronPort-SDR: ZLWW5c5OYrvm3VEIXfhylgb9kGLVKlTVKoRdRHriIl7xteu8Y6cT6+c1565pP95nLBra3xaQHX du0qtjm9M7FA== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="235707195" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707195" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:40 -0800 IronPort-SDR: zrvy17eovvJJI0sNVjW7OD6/Zfrj1dD0Mz8qaUgKSMTD4N+lfAXzv5157uncnE05J3aDZt+LDG IB9rZwEMjTnQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352671" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:16 -0800 Message-Id: <20201121003540.24980-3-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 02/26] drm/i915/pxp: Enable PXP irq worker and callback stub X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Create the irq worker that serves as callback handler, those callback stubs should be called while the hardware key teardown occurs. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/gt/intel_gt_irq.c | 4 ++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 87 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 22 +++++++ 4 files changed, 114 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c index 257063a57101..d64013d0afb5 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c @@ -13,6 +13,7 @@ #include "intel_gt_irq.h" #include "intel_uncore.h" #include "intel_rps.h" +#include "pxp/intel_pxp.h" static void guc_irq_handler(struct intel_guc *guc, u16 iir) { @@ -106,6 +107,9 @@ gen11_other_irq_handler(struct intel_gt *gt, const u8 instance, if (instance == OTHER_GTPM_INSTANCE) return gen11_rps_irq_handler(>->rps, iir); + if (instance == OTHER_KCR_INSTANCE) + return intel_pxp_irq_handler(gt, iir); + WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n", instance, iir); } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5375b219cc3b..c3b9ca142539 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7943,6 +7943,7 @@ enum { /* irq instances for OTHER_CLASS */ #define OTHER_GUC_INSTANCE 0 #define OTHER_GTPM_INSTANCE 1 +#define OTHER_KCR_INSTANCE 4 #define GEN11_INTR_IDENTITY_REG(x) _MMIO(0x190060 + ((x) * 4)) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index bc19024e43f0..6ee0814f0d09 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -6,13 +6,100 @@ #include "i915_drv.h" #include "intel_pxp.h" +static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) +{ + WARN_ON(INTEL_GEN(i915) < 11); + + /* crypto mask is in bit31-16 (Engine1 Interrupt Mask) */ + intel_uncore_write(&i915->uncore, GEN11_CRYPTO_RSVD_INTR_MASK, mask << 16); +} + +static void intel_pxp_unmask_irq(struct intel_gt *gt) +{ + lockdep_assert_held(>->irq_lock); + + intel_pxp_write_irq_mask_reg(gt->i915, 0); +} + +static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask) +{ + lockdep_assert_held(>->irq_lock); + + intel_pxp_write_irq_mask_reg(gt->i915, mask); +} + +static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915) +{ + return 0; +} + +static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915) +{ + return 0; +} + +static void intel_pxp_irq_work(struct work_struct *work) +{ + struct intel_pxp *pxp_ptr = container_of(work, typeof(*pxp_ptr), irq_work); + struct drm_i915_private *i915 = container_of(pxp_ptr, typeof(*i915), pxp); + u32 events = 0; + + spin_lock_irq(&i915->gt.irq_lock); + events = fetch_and_zero(&pxp_ptr->current_events); + spin_unlock_irq(&i915->gt.irq_lock); + + if (events & PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED || + events & PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ) + intel_pxp_teardown_required_callback(i915); + + if (events & PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE) + intel_pxp_global_terminate_complete_callback(i915); + + spin_lock_irq(&i915->gt.irq_lock); + intel_pxp_unmask_irq(&i915->gt); + spin_unlock_irq(&i915->gt.irq_lock); +} + int intel_pxp_init(struct drm_i915_private *i915) { drm_info(&i915->drm, "i915 PXP is inited with i915=[%p]\n", i915); + INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work); + + i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED | + PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ | + PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE); + return 0; } void intel_pxp_uninit(struct drm_i915_private *i915) { } + +/** + * intel_pxp_irq_handler - Proxies KCR interrupts to PXP. + * @gt: valid GT instance + * @iir: GT interrupt vector associated with the interrupt + * + * Dispatches each vector element into an IRQ to PXP. + */ +void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir) +{ + struct drm_i915_private *i915 = gt->i915; + const u32 events = iir & i915->pxp.handled_irr; + + lockdep_assert_held(>->irq_lock); + + if (unlikely(!events)) { + drm_err(&i915->drm, "%s returned due to iir=[0x%04x]\n", __func__, iir); + goto end; + } + + intel_pxp_mask_irq(gt, i915->pxp.handled_irr); + + i915->pxp.current_events |= events; + schedule_work(&i915->pxp.irq_work); +end: + return; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index d92b9bbcef2e..b17f4153f470 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -8,14 +8,36 @@ #include +#define PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED BIT(1) +#define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2) +#define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3) + +enum pxp_sm_session_req { + /* Request KMD to allocate session id and move it to IN INIT */ + PXP_SM_REQ_SESSION_ID_INIT = 0x0, + /* Inform KMD that UMD has completed the initialization */ + PXP_SM_REQ_SESSION_IN_PLAY, + /* Request KMD to terminate the session */ + PXP_SM_REQ_SESSION_TERMINATE +}; + struct pxp_context; struct intel_pxp { + struct work_struct irq_work; + u32 handled_irr; + u32 current_events; + struct pxp_context *ctx; }; +struct intel_gt; struct drm_i915_private; +void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir); +int i915_pxp_teardown_required_callback(struct drm_i915_private *i915); +int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915); + int intel_pxp_init(struct drm_i915_private *i915); void intel_pxp_uninit(struct drm_i915_private *i915); From patchwork Sat Nov 21 00:35:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A7D5C2D0E4 for ; Sat, 21 Nov 2020 00:35:54 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E8EDF23A65 for ; Sat, 21 Nov 2020 00:35:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E8EDF23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 471566E95B; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id E72406E94A for ; Sat, 21 Nov 2020 00:35:41 +0000 (UTC) IronPort-SDR: hfBIGeaplfe/G+yh/86SDW64EeEAi/qHX98SwNhCZak2lIiffqvtLcUnYfYrfsvry8dYFWCfTH NJE3OOB0jTtw== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="235707196" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707196" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: ry4ScVOXt/N1NJj3EYWJ2MrqFXKyHfymmIFBp/2iK15It6mXmvtoXvsTflCbd4v86RQfKOwrwz us1qRrwZdHgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352672" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:17 -0800 Message-Id: <20201121003540.24980-4-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 03/26] drm/i915/pxp: Add PXP context for logical hardware states. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add PXP context which represents combined view of driver and logical HW states. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/pxp/intel_pxp.c | 26 ++++++++++- drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 ++ drivers/gpu/drm/i915/pxp/intel_pxp_context.c | 45 ++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_context.h | 44 +++++++++++++++++++ 5 files changed, 119 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_context.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 8274fea96009..831e8ad57560 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -256,7 +256,8 @@ i915-y += i915_perf.o # Protected execution platform (PXP) support i915-y += \ - pxp/intel_pxp.o + pxp/intel_pxp.o \ + pxp/intel_pxp_context.o \ # Post-mortem debug and GPU hang state capture i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 6ee0814f0d09..b6c44b196e9a 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -5,6 +5,7 @@ #include "i915_drv.h" #include "intel_pxp.h" +#include "intel_pxp_context.h" static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) { @@ -30,12 +31,28 @@ static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask) static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915) { + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + i915->pxp.ctx->global_state_attacked = true; + i915->pxp.ctx->flag_display_hm_surface_keys = false; + + mutex_unlock(&i915->pxp.ctx->ctx_mutex); + return 0; } static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915) { - return 0; + int ret = 0; + + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + if (i915->pxp.ctx->global_state_attacked) + i915->pxp.ctx->global_state_attacked = false; + + mutex_unlock(&i915->pxp.ctx->ctx_mutex); + + return ret; } static void intel_pxp_irq_work(struct work_struct *work) @@ -64,6 +81,12 @@ int intel_pxp_init(struct drm_i915_private *i915) { drm_info(&i915->drm, "i915 PXP is inited with i915=[%p]\n", i915); + i915->pxp.ctx = intel_pxp_create_ctx(i915); + if (!i915->pxp.ctx) { + drm_err(&i915->drm, "Failed to create pxp ctx\n"); + return -EFAULT; + } + INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work); i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED | @@ -75,6 +98,7 @@ int intel_pxp_init(struct drm_i915_private *i915) void intel_pxp_uninit(struct drm_i915_private *i915) { + intel_pxp_destroy_ctx(i915); } /** diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index b17f4153f470..9db4bf6fd3f8 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -12,6 +12,9 @@ #define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2) #define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3) +#define MAX_TYPE0_SESSIONS 16 +#define MAX_TYPE1_SESSIONS 6 + enum pxp_sm_session_req { /* Request KMD to allocate session id and move it to IN INIT */ PXP_SM_REQ_SESSION_ID_INIT = 0x0, diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c new file mode 100644 index 000000000000..c340c375daac --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#include "intel_pxp_context.h" + +/** + * intel_pxp_create_ctx - To create a new pxp context. + * @i915: i915 device handle. + * + * Return: pointer to new_ctx, NULL for failure + */ +struct pxp_context *intel_pxp_create_ctx(struct drm_i915_private *i915) +{ + struct pxp_context *new_ctx = NULL; + + new_ctx = kzalloc(sizeof(*new_ctx), GFP_KERNEL); + if (!new_ctx) + return NULL; + + get_random_bytes(&new_ctx->ctx_id, sizeof(new_ctx->ctx_id)); + + new_ctx->global_state_attacked = false; + + mutex_init(&new_ctx->ctx_mutex); + + INIT_LIST_HEAD(&new_ctx->active_pxp_type0_sessions); + INIT_LIST_HEAD(&new_ctx->active_pxp_type1_sessions); + INIT_LIST_HEAD(&new_ctx->user_ctx_list); + + return new_ctx; +} + +/** + * intel_pxp_destroy_ctx - To destroy the pxp context. + * @i915: i915 device handle. + * + * Return: return 0 for success, failure otherwise. + */ +void intel_pxp_destroy_ctx(struct drm_i915_private *i915) +{ + kfree(i915->pxp.ctx); + i915->pxp.ctx = NULL; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h new file mode 100644 index 000000000000..e0794dfb548d --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_CONTEXT_H__ +#define __INTEL_PXP_CONTEXT_H__ + +#include +#include "i915_drv.h" +#include "pxp/intel_pxp.h" + +/* struct pxp_context - Represents combined view of driver and logical HW states. */ +struct pxp_context { + /** @ctx_mutex: mutex to protect the pxp context */ + struct mutex ctx_mutex; + + struct list_head active_pxp_type0_sessions; + struct list_head active_pxp_type1_sessions; + + struct list_head user_ctx_list; + + u32 type0_session_pxp_tag[MAX_TYPE0_SESSIONS]; + u32 type1_session_pxp_tag[MAX_TYPE1_SESSIONS]; + + int ctx_id; + + bool global_state_attacked; + bool global_state_in_suspend; + bool flag_display_hm_surface_keys; +}; + +struct pxp_user_ctx { + /** @listhead: linked list infrastructure, do not change its order. */ + struct list_head listhead; + + /** @user_ctx: user space context id */ + u32 user_ctx; +}; + +struct pxp_context *intel_pxp_create_ctx(struct drm_i915_private *i915); +void intel_pxp_destroy_ctx(struct drm_i915_private *i915); + +#endif /* __INTEL_PXP_CONTEXT_H__ */ From patchwork Sat Nov 21 00:35:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 451A2C5519F for ; Sat, 21 Nov 2020 00:36:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00F5C23A65 for ; Sat, 21 Nov 2020 00:35:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 00F5C23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5CFD56E95D; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 222CA6E943 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: ViukqRdoI8dM77XrMQpdMKCwJ0BMG1nm2bFLPteTyrOeWXcBSq6CX6g7OLmPmRjvXmS+8L6+6O EDG16wZydlNQ== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="235707198" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707198" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: JZguue4Rq++q3FDwQpwPAGO/hClm8zpI3SM3MFUcM5GTSNpxPshzEgayM/1P3DEDdIsRW03IFR +JpW29VImGZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352673" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:18 -0800 Message-Id: <20201121003540.24980-5-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 04/26] drm/i915/pxp: set KCR reg init during the boot time X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Set the KCR init during the boot time, which is required by hardware, to allow us doing further protection operation such as sending commands to GPU or TEE Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.c | 11 ++++++- drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 38 +++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 20 +++++++++++++ 4 files changed, 69 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_sm.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_sm.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 831e8ad57560..81432a9f44d6 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -258,6 +258,7 @@ i915-y += i915_perf.o i915-y += \ pxp/intel_pxp.o \ pxp/intel_pxp_context.o \ + pxp/intel_pxp_sm.o # Post-mortem debug and GPU hang state capture i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index b6c44b196e9a..f6b7297ee045 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -6,6 +6,7 @@ #include "i915_drv.h" #include "intel_pxp.h" #include "intel_pxp_context.h" +#include "intel_pxp_sm.h" static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) { @@ -79,6 +80,8 @@ static void intel_pxp_irq_work(struct work_struct *work) int intel_pxp_init(struct drm_i915_private *i915) { + int ret; + drm_info(&i915->drm, "i915 PXP is inited with i915=[%p]\n", i915); i915->pxp.ctx = intel_pxp_create_ctx(i915); @@ -87,13 +90,19 @@ int intel_pxp_init(struct drm_i915_private *i915) return -EFAULT; } + ret = pxp_sm_set_kcr_init_reg(i915); + if (ret) { + drm_err(&i915->drm, "Failed to set kcr init reg\n"); + return ret; + } + INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work); i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED | PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ | PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE); - return 0; + return ret; } void intel_pxp_uninit(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c new file mode 100644 index 000000000000..a2c9c71d2372 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#include "gt/intel_context.h" +#include "gt/intel_engine_pm.h" + +#include "intel_pxp.h" +#include "intel_pxp_sm.h" +#include "intel_pxp_context.h" + +static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval) +{ + intel_wakeref_t wakeref; + + if (!i915) + return -EINVAL; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + i915_reg_t reg_offset = {offset}; + + intel_uncore_write(&i915->uncore, reg_offset, regval); + } + + return 0; +} + +int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) +{ + int ret; + + ret = pxp_reg_write(i915, KCR_INIT.reg, KCR_INIT_ALLOW_DISPLAY_ME_WRITES); + if (ret) + drm_err(&i915->drm, "Failed to write()\n"); + + return ret; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h new file mode 100644 index 000000000000..d061f395aa16 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_SM_H__ +#define __INTEL_PXP_SM_H__ + +#include "i915_drv.h" +#include "i915_reg.h" + +/* KCR register definitions */ +#define KCR_INIT _MMIO(0x320f0) +#define KCR_INIT_MASK_SHIFT (16) +/* Setting KCR Init bit is required after system boot */ +#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT)) + +int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); + +#endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93297C5519F for ; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3D34A23A65 for ; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3D34A23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F87C6E8D0; Sat, 21 Nov 2020 00:35:45 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D9C36E8D0 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: PSR8L7i/N/7iMWAaAZJ/oNgLpT8+IBReXcDy4znmr7Qx+c6eqWgsB21j1yRNxIBQ0CahhBb9Oy Qo8OPpQw0+2A== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="235707199" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707199" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: Q0uRsaN0nLutM4CoFJGu1rVl5r/qQmgvW+UTF56RwUvKJ4mCRcR9KNSLYnw6E9M/QjB5yD++rY 4bFQu9rQdeKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352674" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:19 -0800 Message-Id: <20201121003540.24980-6-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 05/26] drm/i915/pxp: Implement ioctl action to set the user space context X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement one ioctl action to allow user space driver to set its user space context, so PXP can track the context id through this user space context list. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 56 ++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 21 ++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_context.c | 24 +++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_context.h | 3 ++ 4 files changed, 104 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index f6b7297ee045..34f6db3f8bd6 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -8,6 +8,60 @@ #include "intel_pxp_context.h" #include "intel_pxp_sm.h" +int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile) +{ + int ret; + struct pxp_info pxp_info = {0}; + struct drm_i915_pxp_ops *pxp_ops = data; + struct drm_i915_private *i915 = to_i915(dev); + + if (!i915 || !drmfile || !pxp_ops || pxp_ops->info_size != sizeof(pxp_info)) + return -EINVAL; + + if (copy_from_user(&pxp_info, pxp_ops->info_ptr, sizeof(pxp_info)) != 0) + return -EFAULT; + + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + if (i915->pxp.ctx->global_state_in_suspend) { + drm_err(&i915->drm, "Return failure due to state in suspend\n"); + pxp_info.sm_status = PXP_SM_STATUS_SESSION_NOT_AVAILABLE; + ret = 0; + goto end; + } + + if (i915->pxp.ctx->global_state_attacked) { + drm_err(&i915->drm, "Retry required due to state attacked\n"); + pxp_info.sm_status = PXP_SM_STATUS_RETRY_REQUIRED; + ret = 0; + goto end; + } + + switch (pxp_info.action) { + case PXP_ACTION_SET_USER_CONTEXT: + { + ret = intel_pxp_set_user_ctx(i915, pxp_info.set_user_ctx); + break; + } + default: + drm_err(&i915->drm, "Failed to %s due to bad params\n", __func__); + ret = -EINVAL; + goto end; + } + +end: + mutex_unlock(&i915->pxp.ctx->ctx_mutex); + + if (ret == 0) + if (copy_to_user(pxp_ops->info_ptr, &pxp_info, sizeof(pxp_info)) != 0) + ret = -EFAULT; + + if (ret) + dev_err(&dev->pdev->dev, "pid=%d, ret = %d\n", task_pid_nr(current), ret); + + return ret; +} + static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) { WARN_ON(INTEL_GEN(i915) < 11); @@ -37,6 +91,8 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915) i915->pxp.ctx->global_state_attacked = true; i915->pxp.ctx->flag_display_hm_surface_keys = false; + intel_pxp_destroy_user_ctx_list(i915); + mutex_unlock(&i915->pxp.ctx->ctx_mutex); return 0; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 9db4bf6fd3f8..a1e83bbeafb7 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -24,6 +24,26 @@ enum pxp_sm_session_req { PXP_SM_REQ_SESSION_TERMINATE }; +#define PXP_ACTION_SET_USER_CONTEXT 5 + +enum pxp_sm_status { + PXP_SM_STATUS_SUCCESS, + PXP_SM_STATUS_RETRY_REQUIRED, + PXP_SM_STATUS_SESSION_NOT_AVAILABLE, + PXP_SM_STATUS_ERROR_UNKNOWN +}; + +struct pxp_info { + u32 action; + u32 sm_status; + u32 set_user_ctx; +} __attribute__((packed)); + +struct drm_i915_pxp_ops { + struct pxp_info __user *info_ptr; + __u32 info_size; +}; + struct pxp_context; struct intel_pxp { @@ -37,6 +57,7 @@ struct intel_pxp { struct intel_gt; struct drm_i915_private; +int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile); void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir); int i915_pxp_teardown_required_callback(struct drm_i915_private *i915); int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c index c340c375daac..7fc99567b3ac 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_context.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.c @@ -43,3 +43,27 @@ void intel_pxp_destroy_ctx(struct drm_i915_private *i915) kfree(i915->pxp.ctx); i915->pxp.ctx = NULL; } + +int intel_pxp_set_user_ctx(struct drm_i915_private *i915, u32 user_ctx_in) +{ + struct pxp_user_ctx *user_ctx; + + user_ctx = kzalloc(sizeof(*user_ctx), GFP_KERNEL); + if (!user_ctx) + return -ENOMEM; + + user_ctx->user_ctx = user_ctx_in; + + list_add(&user_ctx->listhead, &i915->pxp.ctx->user_ctx_list); + return 0; +} + +void intel_pxp_destroy_user_ctx_list(struct drm_i915_private *i915) +{ + struct pxp_user_ctx *user_ctx, *n; + + list_for_each_entry_safe(user_ctx, n, &i915->pxp.ctx->user_ctx_list, listhead) { + list_del(&user_ctx->listhead); + kfree(user_ctx); + } +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h index e0794dfb548d..c8b2d89e6548 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_context.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_context.h @@ -41,4 +41,7 @@ struct pxp_user_ctx { struct pxp_context *intel_pxp_create_ctx(struct drm_i915_private *i915); void intel_pxp_destroy_ctx(struct drm_i915_private *i915); +int intel_pxp_set_user_ctx(struct drm_i915_private *i915, u32 user_ctx); +void intel_pxp_destroy_user_ctx_list(struct drm_i915_private *i915); + #endif /* __INTEL_PXP_CONTEXT_H__ */ From patchwork Sat Nov 21 00:35:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE983C2D0E4 for ; Sat, 21 Nov 2020 00:36:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A677C23A65 for ; Sat, 21 Nov 2020 00:36:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A677C23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 633776E95A; Sat, 21 Nov 2020 00:35:48 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 157196E8D0 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: vz2SZFUHpVh+SUbsECOVfWV49PfRzagCNOkGEmAU0prdIIrqvAtBTTA8tRmcpsc0TQRqTpQK5D NknGbW8aw28w== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670515" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670515" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: g5jCyefruZfGegLChDCEOXrCgrhZwKsj5ts7L+EMppk3TWt633K6f3G0AXWAcjYLdgyASOv81U o+v1ywgrc6Ew== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352675" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:20 -0800 Message-Id: <20201121003540.24980-7-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 06/26] drm/i915/pxp: Add PXP-related registers into allowlist X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add several PXP-related reg into allowlist to allow user space driver to read the those register values. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_reg.h | 6 ++++ drivers/gpu/drm/i915/intel_uncore.c | 50 ++++++++++++++++++++--------- 2 files changed, 41 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3b9ca142539..69758935abb8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -12421,4 +12421,10 @@ enum skl_power_gate { #define TGL_ROOT_DEVICE_SKU_ULX 0x2 #define TGL_ROOT_DEVICE_SKU_ULT 0x4 +/* Registers for allowlist check */ +#define PXP_REG_01_LOWERBOUND _MMIO(0x32260) +#define PXP_REG_01_UPPERBOUND _MMIO(0x32268) +#define PXP_REG_02_LOWERBOUND _MMIO(0x32670) +#define PXP_REG_02_UPPERBOUND _MMIO(0x32678) + #endif /* _I915_REG_H_ */ diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 1c14a07eba7d..8206da8c51a9 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1990,16 +1990,34 @@ void intel_uncore_fini_mmio(struct intel_uncore *uncore) } static const struct reg_whitelist { - i915_reg_t offset_ldw; + i915_reg_t offset_ldw_lowerbound; + i915_reg_t offset_ldw_upperbound; i915_reg_t offset_udw; u16 gen_mask; u8 size; -} reg_read_whitelist[] = { { - .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), +} reg_read_whitelist[] = { + { + .offset_ldw_lowerbound = RING_TIMESTAMP(RENDER_RING_BASE), + .offset_ldw_upperbound = RING_TIMESTAMP(RENDER_RING_BASE), .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), .gen_mask = INTEL_GEN_MASK(4, 12), .size = 8 -} }; + }, + { + .offset_ldw_lowerbound = PXP_REG_01_LOWERBOUND, + .offset_ldw_upperbound = PXP_REG_01_UPPERBOUND, + .offset_udw = {0}, + .gen_mask = INTEL_GEN_MASK(4, 12), + .size = 4 + }, + { + .offset_ldw_lowerbound = PXP_REG_02_LOWERBOUND, + .offset_ldw_upperbound = PXP_REG_02_UPPERBOUND, + .offset_udw = {0}, + .gen_mask = INTEL_GEN_MASK(4, 12), + .size = 4 + } +}; int i915_reg_read_ioctl(struct drm_device *dev, void *data, struct drm_file *file) @@ -2012,18 +2030,22 @@ int i915_reg_read_ioctl(struct drm_device *dev, unsigned int flags; int remain; int ret = 0; + i915_reg_t offset_ldw; entry = reg_read_whitelist; remain = ARRAY_SIZE(reg_read_whitelist); while (remain) { - u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw); + u32 entry_offset_lb = i915_mmio_reg_offset(entry->offset_ldw_lowerbound); + u32 entry_offset_ub = i915_mmio_reg_offset(entry->offset_ldw_upperbound); GEM_BUG_ON(!is_power_of_2(entry->size)); GEM_BUG_ON(entry->size > 8); - GEM_BUG_ON(entry_offset & (entry->size - 1)); + GEM_BUG_ON(entry_offset_lb & (entry->size - 1)); + GEM_BUG_ON(entry_offset_ub & (entry->size - 1)); if (INTEL_INFO(i915)->gen_mask & entry->gen_mask && - entry_offset == (reg->offset & -entry->size)) + entry_offset_lb <= (reg->offset & -entry->size) && + (reg->offset & -entry->size) <= entry_offset_ub) break; entry++; remain--; @@ -2033,23 +2055,21 @@ int i915_reg_read_ioctl(struct drm_device *dev, return -EINVAL; flags = reg->offset & (entry->size - 1); + offset_ldw = _MMIO(reg->offset - flags); with_intel_runtime_pm(&i915->runtime_pm, wakeref) { if (entry->size == 8 && flags == I915_REG_READ_8B_WA) reg->val = intel_uncore_read64_2x32(uncore, - entry->offset_ldw, + offset_ldw, entry->offset_udw); else if (entry->size == 8 && flags == 0) - reg->val = intel_uncore_read64(uncore, - entry->offset_ldw); + reg->val = intel_uncore_read64(uncore, offset_ldw); else if (entry->size == 4 && flags == 0) - reg->val = intel_uncore_read(uncore, entry->offset_ldw); + reg->val = intel_uncore_read(uncore, offset_ldw); else if (entry->size == 2 && flags == 0) - reg->val = intel_uncore_read16(uncore, - entry->offset_ldw); + reg->val = intel_uncore_read16(uncore, offset_ldw); else if (entry->size == 1 && flags == 0) - reg->val = intel_uncore_read8(uncore, - entry->offset_ldw); + reg->val = intel_uncore_read8(uncore, offset_ldw); else ret = -EINVAL; } From patchwork Sat Nov 21 00:35:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED0F9C63798 for ; Sat, 21 Nov 2020 00:36:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9AD6323A65 for ; Sat, 21 Nov 2020 00:36:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9AD6323A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C3DEE6E957; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id C09036E943 for ; Sat, 21 Nov 2020 00:35:41 +0000 (UTC) IronPort-SDR: CpissCGf4X0n7Db7tL96srx7PafNN0ERtfkkGjj7UlaCtiuEUMN14S1GWUyQ41RX9ZrOxYWPUI sQ+6uoVaqLtQ== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670516" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670516" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: 6wMx+KelyUZn7cH8PQhk6f7MqlI6gLfgSGHaiIBTVt39tHoNubvorJn9pKK5vQbBj938tfuY5u pYOvskW9zpiQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352676" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:21 -0800 Message-Id: <20201121003540.24980-8-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 07/26] drm/i915/pxp: Read register to check hardware session state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the functions to check the hardware protected session state via reading the hardware register session in play. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 + drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 177 ++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 51 +++++++ 3 files changed, 231 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index a1e83bbeafb7..c9d19d3ee0e7 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -12,6 +12,9 @@ #define PXP_IRQ_VECTOR_DISPLAY_APP_TERM_PER_FW_REQ BIT(2) #define PXP_IRQ_VECTOR_PXP_DISP_STATE_RESET_COMPLETE BIT(3) +#define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \ + &(i915)->pxp.ctx->active_pxp_type0_sessions : &(i915)->pxp.ctx->active_pxp_type1_sessions) + #define MAX_TYPE0_SESSIONS 16 #define MAX_TYPE1_SESSIONS 6 diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index a2c9c71d2372..6413f401d939 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -10,6 +10,21 @@ #include "intel_pxp_sm.h" #include "intel_pxp_context.h" +static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval) +{ + intel_wakeref_t wakeref; + + if (!i915 || !regval) + return -EINVAL; + + with_intel_runtime_pm(&i915->runtime_pm, wakeref) { + i915_reg_t reg_offset = {offset}; + *regval = intel_uncore_read(&i915->uncore, reg_offset); + } + + return 0; +} + static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval) { intel_wakeref_t wakeref; @@ -26,6 +41,168 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval) return 0; } +/** + * is_sw_session_active - Check if the given sw session id is active. + * @i915: i915 device handle. + * @session_type: Specified session type + * @session_index: Numeric session identifier. + * @is_in_play: Set false to return true if the specified session is active. + * Set true to also check if the session is active and in_play. + * @protection_mode: get the protection mode of specified session. + * + * The caller needs to use ctx_mutex lock to protect the session_list + * inside this function. + * + * Return : true if session with the same identifier is active (and in_play). + */ +static bool is_sw_session_active(struct drm_i915_private *i915, int session_type, + int session_index, bool is_in_play, int *protection_mode) +{ + struct pxp_protected_session *current_session; + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + list_for_each_entry(current_session, pxp_session_list(i915, session_type), session_list) { + if (current_session->session_index == session_index) { + if (protection_mode) + *protection_mode = current_session->protection_mode; + + if (is_in_play && !current_session->session_is_in_play) + return false; + + return true; + } + } + + /* session id not found. return false */ + return false; +} + +static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index) +{ + u32 regval_sip = 0; + u32 reg_session_id_mask; + bool hw_session_is_in_play = false; + int ret = 0; + + if (!i915 || session_index < 0 || session_index >= MAX_TYPE0_SESSIONS) + goto end; + + ret = pxp_sm_reg_read(i915, GEN12_KCR_SIP.reg, ®val_sip); + if (ret) { + drm_err(&i915->drm, "Failed to read()\n"); + goto end; + } + + reg_session_id_mask = (1 << session_index); + hw_session_is_in_play = (bool)(regval_sip & reg_session_id_mask); +end: + return hw_session_is_in_play; +} + +static bool is_hw_type1_session_in_play(struct drm_i915_private *i915, int session_index) +{ + int ret = 0; + u32 regval_tsip_low = 0; + u32 regval_tsip_high = 0; + u64 reg_session_id_mask; + u64 regval_tsip; + bool hw_session_is_in_play = false; + + if (!i915 || session_index < 0 || session_index >= MAX_TYPE1_SESSIONS) + goto end; + + ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_LOW.reg, ®val_tsip_low); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_sm_reg_read()\n"); + goto end; + } + + ret = pxp_sm_reg_read(i915, GEN12_KCR_TSIP_HIGH.reg, ®val_tsip_high); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_sm_reg_read()\n"); + goto end; + } + + reg_session_id_mask = (1 << session_index); + regval_tsip = ((u64)regval_tsip_high << 32) | regval_tsip_low; + hw_session_is_in_play = (bool)(regval_tsip & reg_session_id_mask); +end: + return hw_session_is_in_play; +} + +static bool is_hw_session_in_play(struct drm_i915_private *i915, + int session_type, int session_index) +{ + bool is_in_play = false; + + if (session_type == SESSION_TYPE_TYPE0) + is_in_play = is_hw_type0_session_in_play(i915, session_index); + else if (session_type == SESSION_TYPE_TYPE1) + is_in_play = is_hw_type1_session_in_play(i915, session_index); + else + drm_err(&i915->drm, "Failed to %s invalid session_type=[%d]\n", + __func__, session_type); + + return is_in_play; +} + +/* check hw session in play reg if match the current sw state */ +static int sync_hw_sw_state(struct drm_i915_private *i915, int session_index, int session_type) +{ + const int max_retry = 10; + const int ms_delay = 10; + int retry = 0; + int ret; + + if (!i915 || session_type >= SESSION_TYPE_MAX) + return -EINVAL; + + ret = -EINVAL; + for (retry = 0; retry < max_retry; retry++) { + if (is_hw_session_in_play(i915, session_type, session_index) == + is_sw_session_active(i915, session_type, session_index, true, NULL)) { + ret = 0; + break; + } + + msleep(ms_delay); + } + + return ret; +} + +/** + * check_if_protected_type0_sessions_are_attacked - To check if type0 active sessions are attacked. + * @i915: i915 device handle. + * + * Return: true if HW shows protected sessions are attacked, false otherwise. + */ +static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_private *i915) +{ + i915_reg_t kcr_status_reg = KCR_STATUS_1; + u32 reg_value = 0; + u32 mask = 0x80000000; + int ret; + + if (!i915) + return false; + + if (i915->pxp.ctx->global_state_attacked) + return true; + + ret = pxp_sm_reg_read(i915, kcr_status_reg.reg, ®_value); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_sm_reg_read\n"); + goto end; + } + + if (reg_value & mask) + return true; +end: + return false; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index d061f395aa16..222a879be96d 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -15,6 +15,57 @@ /* Setting KCR Init bit is required after system boot */ #define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << KCR_INIT_MASK_SHIFT)) +#define KCR_STATUS_1 _MMIO(0x320f4) +#define GEN12_KCR_SIP _MMIO(0x32260) /* KCR type0 session in play 0-31 */ +#define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */ +#define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */ + +enum pxp_session_types { + SESSION_TYPE_TYPE0 = 0, + SESSION_TYPE_TYPE1 = 1, + + SESSION_TYPE_MAX +}; + +enum pxp_protection_modes { + PROTECTION_MODE_NONE = 0, + PROTECTION_MODE_LM = 2, + PROTECTION_MODE_HM = 3, + PROTECTION_MODE_SM = 6, + + PROTECTION_MODE_ALL +}; + +/** + * struct pxp_protected_session - linked list to track all active sessions. + */ +struct pxp_protected_session { + /** @session_list: linked list infrastructure, do not change its order. */ + struct list_head session_list; + + /** @session_index: Numeric identifier for this protected session */ + int session_index; + /** @session_type: Type of session */ + int session_type; + /** @protection_mode: mode of protection requested */ + int protection_mode; + /** @context_id: context identifier of the protected session requestor */ + int context_id; + /** @pid: pid of this session's creator */ + int pid; + /** @drmfile: pointer to drm_file, which is allocated on device file open() call */ + struct drm_file *drmfile; + + /** + * @session_is_in_play: indicates whether the session has been established + * in the HW root of trust if this flag is false, it + * indicates an application has reserved this session, + * but has not * established the session in the + * hardware yet. + */ + bool session_is_in_play; +}; + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1491DC56202 for ; Sat, 21 Nov 2020 00:36:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C65E823A65 for ; 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20 Nov 2020 16:35:41 -0800 IronPort-SDR: 5IwnArO1eWOvJ8oxd38vowb+FWA9XgQL60lwRNKE8BOAx8yws7RAHg+kxQtMIMm9K6+UHiXBiR 6wcU3mEFnvwg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352677" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:22 -0800 Message-Id: <20201121003540.24980-9-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 08/26] drm/i915/pxp: Implement funcs to get/set PXP tag X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the functions to get/set the PXP tag, which is 32-bit bitwise value containing the hardware session info, such as its session id, protection mode or whether it's enabled. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 95 +++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 18 +++++ 2 files changed, 113 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index 6413f401d939..469810390c9b 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -41,6 +41,16 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval) return 0; } +static u8 pxp_get_session_id(int session_index, int session_type) +{ + u8 session_id = session_index & SESSION_ID_MASK; + + if (session_type == SESSION_TYPE_TYPE1) + session_id |= SESSION_TYPE_MASK; + + return session_id; +} + /** * is_sw_session_active - Check if the given sw session id is active. * @i915: i915 device handle. @@ -78,6 +88,91 @@ static bool is_sw_session_active(struct drm_i915_private *i915, int session_type return false; } +static int pxp_set_pxp_tag(struct drm_i915_private *i915, int session_type, + int session_idx, int protection_mode) +{ + struct pxp_tag *pxp_tag; + + if (!i915 || session_type >= SESSION_TYPE_MAX) + return -EINVAL; + + if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) { + pxp_tag = (struct pxp_tag *)&i915->pxp.ctx->type0_session_pxp_tag[session_idx]; + } else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) { + pxp_tag = (struct pxp_tag *)&i915->pxp.ctx->type1_session_pxp_tag[session_idx]; + } else { + drm_err(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n", + __func__, session_type, session_idx); + return -EINVAL; + } + + switch (protection_mode) { + case PROTECTION_MODE_NONE: + { + pxp_tag->enable = false; + pxp_tag->hm = false; + pxp_tag->sm = false; + break; + } + case PROTECTION_MODE_LM: + { + pxp_tag->enable = true; + pxp_tag->hm = false; + pxp_tag->sm = false; + pxp_tag->instance_id++; + break; + } + case PROTECTION_MODE_HM: + { + pxp_tag->enable = true; + pxp_tag->hm = true; + pxp_tag->sm = false; + pxp_tag->instance_id++; + break; + } + case PROTECTION_MODE_SM: + { + pxp_tag->enable = true; + pxp_tag->hm = true; + pxp_tag->sm = true; + pxp_tag->instance_id++; + break; + } + default: + drm_err(&i915->drm, "Failed to %s, bad params protection_mode=[%d]\n", + __func__, protection_mode); + return -EINVAL; + } + + pxp_tag->session_id = pxp_get_session_id(session_idx, session_type); +end: + return 0; +} + +u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx, + int session_type, u32 *session_is_alive) +{ + struct pxp_tag *pxp_tag; + + if (!i915 || session_type >= SESSION_TYPE_MAX) + return -EINVAL; + + if (session_type == SESSION_TYPE_TYPE0 && session_idx < MAX_TYPE0_SESSIONS) { + pxp_tag = (struct pxp_tag *)&i915->pxp.ctx->type0_session_pxp_tag[session_idx]; + } else if (session_type == SESSION_TYPE_TYPE1 && session_idx < MAX_TYPE1_SESSIONS) { + pxp_tag = (struct pxp_tag *)&i915->pxp.ctx->type1_session_pxp_tag[session_idx]; + } else { + drm_err(&i915->drm, "Failed to %s, bad params session_type=[%d], session_idx=[%d]\n", + __func__, session_type, session_idx); + return -EINVAL; + } + + if (session_is_alive) + *session_is_alive = pxp_tag->enable; + + return pxp_tag->value; +} + static bool is_hw_type0_session_in_play(struct drm_i915_private *i915, int session_index) { u32 regval_sip = 0; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 222a879be96d..b5012948f971 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -20,6 +20,9 @@ #define GEN12_KCR_TSIP_LOW _MMIO(0x32264) /* KCR type1 session in play 0-31 */ #define GEN12_KCR_TSIP_HIGH _MMIO(0x32268) /* KCR type1 session in play 32-63 */ +#define SESSION_TYPE_MASK BIT(7) +#define SESSION_ID_MASK (BIT(7) - 1) + enum pxp_session_types { SESSION_TYPE_TYPE0 = 0, SESSION_TYPE_TYPE1 = 1, @@ -36,6 +39,21 @@ enum pxp_protection_modes { PROTECTION_MODE_ALL }; +struct pxp_tag { + union { + u32 value; + struct { + u32 session_id : 8; + u32 instance_id : 8; + u32 enable : 1; + u32 hm : 1; + u32 reserved_1 : 1; + u32 sm : 1; + u32 reserved_2 : 12; + }; + }; +}; + /** * struct pxp_protected_session - linked list to track all active sessions. */ From patchwork Sat Nov 21 00:35:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D768FC56202 for ; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8043223A65 for ; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8043223A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C19F96E943; Sat, 21 Nov 2020 00:35:45 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 303ED6E94A for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: 4JGsyPuHAG2mRRukgDBgwq4iErGZgOHM8gDYhBBbYaljWr+OGYBoKayqsXAx0A7GJDmbkQ0mH/ uZvhZqcyTbmw== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670518" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670518" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: 5HDEcwDOtANNzxxCDVmw75W3xuNjlbk0IpCg5A8J5Yl6BSiTppyuL3sR3kTK/BGlXT1SDMe2g+ W252bI88kfrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352679" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:23 -0800 Message-Id: <20201121003540.24980-10-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 09/26] drm/i915/pxp: Implement ioctl action to reserve session slot X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With this ioctl action, user space driver can reserve a specific session slot/id assigned by PXP, as the first step of PXP session establishment flow. The session info is stored in the session list structure. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 20 ++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 24 +++- drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 149 +++++++++++++++++++++++- drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 3 + 4 files changed, 193 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 34f6db3f8bd6..5f13a44fe548 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -38,6 +38,26 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf } switch (pxp_info.action) { + case PXP_ACTION_SET_SESSION_STATUS: + { + struct pxp_sm_set_session_status_params *params = &pxp_info.set_session_status; + + if (params->req_session_state == PXP_SM_REQ_SESSION_ID_INIT) { + ret = intel_pxp_sm_reserve_session(i915, drmfile, 0, + params->session_type, + params->session_mode, + ¶ms->pxp_tag); + if (ret == PXP_SM_STATUS_RETRY_REQUIRED || + ret == PXP_SM_STATUS_SESSION_NOT_AVAILABLE) { + pxp_info.sm_status = ret; + ret = 0; + } + } else { + ret = -EINVAL; + goto end; + } + break; + } case PXP_ACTION_SET_USER_CONTEXT: { ret = intel_pxp_set_user_ctx(i915, pxp_info.set_user_ctx); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index c9d19d3ee0e7..1ed433b04943 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -15,6 +15,9 @@ #define pxp_session_list(i915, session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \ &(i915)->pxp.ctx->active_pxp_type0_sessions : &(i915)->pxp.ctx->active_pxp_type1_sessions) +#define pxp_session_max(session_type) (((session_type) == SESSION_TYPE_TYPE0) ? \ + MAX_TYPE0_SESSIONS : MAX_TYPE1_SESSIONS) + #define MAX_TYPE0_SESSIONS 16 #define MAX_TYPE1_SESSIONS 6 @@ -27,7 +30,10 @@ enum pxp_sm_session_req { PXP_SM_REQ_SESSION_TERMINATE }; -#define PXP_ACTION_SET_USER_CONTEXT 5 +enum pxp_ioctl_action { + PXP_ACTION_SET_SESSION_STATUS = 1, + PXP_ACTION_SET_USER_CONTEXT = 5, +}; enum pxp_sm_status { PXP_SM_STATUS_SUCCESS, @@ -36,10 +42,24 @@ enum pxp_sm_status { PXP_SM_STATUS_ERROR_UNKNOWN }; +struct pxp_sm_set_session_status_params { + /** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */ + u32 pxp_tag; + /** @session_type: in, session type */ + u32 session_type; + /** @session_mode: in, session mode */ + u32 session_mode; + /** @req_session_state: in, new session state */ + u32 req_session_state; +}; + struct pxp_info { u32 action; u32 sm_status; - u32 set_user_ctx; + union { + struct pxp_sm_set_session_status_params set_session_status; + u32 set_user_ctx; + }; } __attribute__((packed)); struct drm_i915_pxp_ops { diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index 469810390c9b..e4218083f7ec 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -145,7 +145,7 @@ static int pxp_set_pxp_tag(struct drm_i915_private *i915, int session_type, } pxp_tag->session_id = pxp_get_session_id(session_idx, session_type); -end: + return 0; } @@ -298,6 +298,153 @@ static bool check_if_protected_type0_sessions_are_attacked(struct drm_i915_priva return false; } +/** + * create_new_session_entry - Create a new session entry with provided info. + * @i915: i915 device handle. + * @drmfile: pointer to drm_file + * @context_id: Numeric identifier of the context created by the caller. + * @session_type: Type of the session requested. One of enum pxp_session_types. + * @protection_mode: Type of protection requested for the session. + * One of the enum pxp_protection_modes. + * @session_index: Numeric session identifier. + * + * Return: status. 0 means creation is successful. + */ +static int create_new_session_entry(struct drm_i915_private *i915, struct drm_file *drmfile, + int context_id, int session_type, int protection_mode, + int session_index) +{ + struct pxp_protected_session *new_session = NULL; + int pid = 0; + + if (drmfile) + pid = pid_nr(drmfile->pid); + + new_session = kzalloc(sizeof(*new_session), GFP_KERNEL); + if (!new_session) + return -ENOMEM; + + new_session->context_id = context_id; + new_session->session_type = session_type; + new_session->protection_mode = protection_mode; + new_session->session_index = session_index; + new_session->session_is_in_play = false; + new_session->drmfile = drmfile; + new_session->pid = pid; + + switch (session_type) { + case SESSION_TYPE_TYPE0: + /* check to make sure the session id is within allowed range */ + if (session_index < 0 || session_index >= MAX_TYPE0_SESSIONS) { + /* session id out of range.. free the new entry and return error */ + kfree(new_session); + drm_err(&i915->drm, "Failed to %s, bad params\n", __func__); + return -EINVAL; + } + + list_add(&new_session->session_list, &i915->pxp.ctx->active_pxp_type0_sessions); + break; + + case SESSION_TYPE_TYPE1: + /* check to make sure the session id is within allowed range */ + if (session_index < 0 || session_index >= MAX_TYPE1_SESSIONS) { + /* session id out of range.. free the new entry and return error */ + kfree(new_session); + drm_err(&i915->drm, "Failed to %s, bad params\n", __func__); + return -EINVAL; + } + + list_add(&new_session->session_list, &i915->pxp.ctx->active_pxp_type1_sessions); + break; + + default: + /* session type is invalid... free new entry and return error. */ + kfree(new_session); + drm_err(&i915->drm, "Failed to %s, bad params\n", __func__); + return -EINVAL; + } + + return 0; +} + +/** + * intel_pxp_sm_reserve_session - To reserve an available protected session. + * @i915: i915 device handle. + * @drmfile: pointer to drm_file. + * @context_id: Numeric identifier of the context created by the caller. + * @session_type: Type of the session requested. One of enum pxp_session_types. + * @protection_mode: Type of protection requested for the session. One of the + * enum pxp_protection_modes. + * @pxp_tag: Numeric session identifier returned back to caller. + * + * Return: status. 0 means reserve is successful. + */ +int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile, + int context_id, int session_type, int protection_mode, + u32 *pxp_tag) +{ + int ret; + int session_index = 0; + + if (!pxp_tag || !i915) + return -EINVAL; + + if (protection_mode != PROTECTION_MODE_LM && protection_mode != PROTECTION_MODE_HM && + protection_mode != PROTECTION_MODE_SM) { + drm_err(&i915->drm, "Failed to %s, invalid session mode=[%d]\n", + __func__, protection_mode); + return -EINVAL; + } + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + if (session_type == SESSION_TYPE_TYPE0) { + /* + * check if sessions are under attack. if so, don't allow creation of + * new session entries + */ + if (check_if_protected_type0_sessions_are_attacked(i915)) + /* protected sessions are under attack. return failure. */ + return -EPERM; + } + + /* + * iterate over the active sessions list to find next available open session id + * Cannot assume that the session entries will be sorted in the linked list + * as terminates are allowed at any time without re-sorting the linked list. + * So, the linked list should be walked start to finish to ensure a session is + * not already active + */ + for (session_index = 0; session_index < pxp_session_max(session_type); session_index++) { + if (!is_sw_session_active(i915, session_type, session_index, false, NULL)) { + ret = sync_hw_sw_state(i915, session_index, session_type); + if (unlikely(ret)) { + ret = PXP_SM_STATUS_RETRY_REQUIRED; + goto end; + } + + /* + * found an available session... create a new session entry + * with this identifier and return success + */ + ret = create_new_session_entry(i915, drmfile, context_id, session_type, + protection_mode, session_index); + if (unlikely(ret)) + goto end; + + ret = pxp_set_pxp_tag(i915, session_type, session_index, protection_mode); + goto end; + } + } + + ret = PXP_SM_STATUS_SESSION_NOT_AVAILABLE; +end: + if (ret == 0) + *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, NULL); + + return ret; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index b5012948f971..5fcf63f804f8 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -84,6 +84,9 @@ struct pxp_protected_session { bool session_is_in_play; }; +int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile, + int context_id, int session_type, int protection_mode, + u32 *pxp_tag); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE037C5519F for ; Sat, 21 Nov 2020 00:36:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9B97223A65 for ; Sat, 21 Nov 2020 00:36:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9B97223A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A92666E960; Sat, 21 Nov 2020 00:35:53 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 541756E94E for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: juTI8casKt+ZmFGlVYJlnPbE+wHDQNyhd3UED6yxzeGNIQZvcpIIrpYgBnXmj/EZE5p5QybfWH sukEaIlElO1Q== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670519" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670519" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: 4Ney4xSsgcA3EPwmyuKuXZPb9FrdMeDBE5GmQPJoj/lJqxMhsLIDmVKZKXCrZpZA4xwY9Kj2lC dOz9/zelI+QQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352680" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:24 -0800 Message-Id: <20201121003540.24980-11-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 10/26] drm/i915/pxp: Implement ioctl action to set session in play X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With this ioctl action, user space driver can set the session in state "session in play", after dirver reserved the session slot/id from driver, and sent the TEE commands to activate the corresponding hardware session. Session state "session in play" means this session is ready for secure playback. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 4 ++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 69 +++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 2 + 3 files changed, 75 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 5f13a44fe548..30bdbcf543e0 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -52,6 +52,10 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf pxp_info.sm_status = ret; ret = 0; } + } else if (params->req_session_state == PXP_SM_REQ_SESSION_IN_PLAY) { + ret = pxp_sm_mark_protected_session_in_play(i915, params->session_type, + params->pxp_tag); + } else { ret = -EINVAL; goto end; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index e4218083f7ec..b69f5f8bf238 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -41,6 +41,18 @@ static int pxp_reg_write(struct drm_i915_private *i915, u32 offset, u32 regval) return 0; } +static int pxp_get_session_index(struct drm_i915_private *i915, u32 pxp_tag, + int *session_index_out, int *session_type_out) +{ + if (!session_index_out || !session_type_out) + return -EINVAL; + + *session_type_out = (pxp_tag & SESSION_TYPE_MASK) ? SESSION_TYPE_TYPE1 : SESSION_TYPE_TYPE0; + *session_index_out = pxp_tag & SESSION_ID_MASK; + + return 0; +} + static u8 pxp_get_session_id(int session_index, int session_type) { u8 session_id = session_index & SESSION_ID_MASK; @@ -445,6 +457,63 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file return ret; } +/** + * pxp_sm_mark_protected_session_in_play - To put an reserved protected session to "in_play" state + * @i915: i915 device handle. + * @session_type: Type of the session to be updated. One of enum pxp_session_types. + * @session_id: Session id identifier of the protected session. + * + * Return: status. 0 means update is successful. + */ +int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type, + u32 session_id) +{ + int ret; + int session_index; + int session_type_in_id; + struct pxp_protected_session *current_session; + + ret = pxp_get_session_index(i915, session_id, &session_index, &session_type_in_id); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_get_session_index\n"); + return ret; + } + + if (session_type != session_type_in_id) { + drm_err(&i915->drm, "Failed to session_type and session_type_in_id don't match\n"); + return -EINVAL; + } + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + switch (session_type) { + case SESSION_TYPE_TYPE0: + list_for_each_entry(current_session, &i915->pxp.ctx->active_pxp_type0_sessions, + session_list) { + if (current_session->session_index == session_index) { + current_session->session_is_in_play = true; + return 0; + } + } + break; + case SESSION_TYPE_TYPE1: + list_for_each_entry(current_session, &i915->pxp.ctx->active_pxp_type1_sessions, + session_list) { + if (current_session->session_index == session_index) { + current_session->session_is_in_play = true; + return 0; + } + } + break; + default: + /* invalid session type */ + return -EINVAL; + } + + drm_err(&i915->drm, "Failed to %s couldn't find active session\n", __func__); + return -EINVAL; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 5fcf63f804f8..90f7d74cacdf 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -87,6 +87,8 @@ struct pxp_protected_session { int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile, int context_id, int session_type, int protection_mode, u32 *pxp_tag); +int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type, + u32 session_id); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86D31C6379D for ; Sat, 21 Nov 2020 00:35:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F14E23A65 for ; Sat, 21 Nov 2020 00:35:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4F14E23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F32FA6E958; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7785A6E943 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: C3VBpZAJq1/VbDWLTOvrtX3wNuzZ51eGIZB4O2wfa/qTRAe+api8soOBjPvRMWQ2jKqvfvRyeo VacGCkSsv1Gw== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670520" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670520" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: 27uZxAxY0Z5eAzaakb9sSCNUkFoT4Iv5L34w2LhVmSfQCQTD/LgSpJ5mV5koRld2jHJoTXevPb 4+VyYKVOJNMA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352681" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:25 -0800 Message-Id: <20201121003540.24980-12-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 11/26] drm/i915/pxp: Func to send hardware session termination X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the functions to allow PXP to send a GPU command, in order to terminate the hardware session, so hardware can recycle this session slot for the next usage. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 288 ++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 16 ++ 2 files changed, 304 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index b69f5f8bf238..f41e50911688 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -3,13 +3,163 @@ * Copyright(c) 2020, Intel Corporation. All rights reserved. */ +#include "gt/intel_gpu_commands.h" +#include "gt/intel_gt.h" #include "gt/intel_context.h" +#include "gt/intel_gt_buffer_pool.h" #include "gt/intel_engine_pm.h" #include "intel_pxp.h" #include "intel_pxp_sm.h" #include "intel_pxp_context.h" +static struct i915_vma *pxp_get_batch(struct drm_i915_private *i915, + struct intel_context *ce, + struct intel_gt_buffer_pool_node *pool, + u32 *cmd_buf, int cmd_size_in_dw) +{ + struct i915_vma *batch = ERR_PTR(-EINVAL); + u32 *cmd; + + if (!ce || !ce->engine || !cmd_buf) + return ERR_PTR(-EINVAL); + + if (cmd_size_in_dw * 4 > PAGE_SIZE) { + drm_err(&i915->drm, "Failed to %s, invalid cmd_size_id_dw=[%d]\n", + __func__, cmd_size_in_dw); + return ERR_PTR(-EINVAL); + } + + cmd = i915_gem_object_pin_map(pool->obj, I915_MAP_FORCE_WC); + if (IS_ERR(cmd)) { + drm_err(&i915->drm, "Failed to i915_gem_object_pin_map()\n"); + return ERR_PTR(-EINVAL); + } + + memcpy(cmd, cmd_buf, cmd_size_in_dw * 4); + + if (drm_debug_enabled(DRM_UT_DRIVER)) { + print_hex_dump(KERN_DEBUG, "cmd binaries:", + DUMP_PREFIX_OFFSET, 4, 4, cmd, cmd_size_in_dw * 4, true); + } + + i915_gem_object_unpin_map(pool->obj); + + batch = i915_vma_instance(pool->obj, ce->vm, NULL); + if (IS_ERR(batch)) { + drm_err(&i915->drm, "Failed to i915_vma_instance()\n"); + return batch; + } + + return batch; +} + +static int pxp_submit_cmd(struct drm_i915_private *i915, u32 *cmd, int cmd_size_in_dw) +{ + int err = -EINVAL; + struct i915_vma *batch; + struct i915_request *rq; + struct intel_context *ce = NULL; + bool is_engine_pm_get = false; + bool is_batch_vma_pin = false; + bool is_skip_req_on_err = false; + bool is_engine_get_pool = false; + struct intel_gt_buffer_pool_node *pool = NULL; + struct intel_gt *gt = NULL; + + if (!i915 || !HAS_ENGINE(&i915->gt, VCS0) || + !i915->gt.engine[VCS0]->kernel_context) { + err = -EINVAL; + goto end; + } + + if (!cmd || (cmd_size_in_dw * 4) > PAGE_SIZE) { + drm_err(&i915->drm, "Failed to %s bad params\n", __func__); + return -EINVAL; + } + + gt = &i915->gt; + ce = i915->gt.engine[VCS0]->kernel_context; + + intel_engine_pm_get(ce->engine); + is_engine_pm_get = true; + + pool = intel_gt_get_buffer_pool(gt, PAGE_SIZE); + if (IS_ERR(pool)) { + drm_err(&i915->drm, "Failed to intel_engine_get_pool()\n"); + goto end; + } + is_engine_get_pool = true; + + batch = pxp_get_batch(i915, ce, pool, cmd, cmd_size_in_dw); + if (IS_ERR(batch)) { + drm_err(&i915->drm, "Failed to pxp_get_batch()\n"); + goto end; + } + + err = i915_vma_pin(batch, 0, 0, PIN_USER); + if (err) { + drm_err(&i915->drm, "Failed to i915_vma_pin()\n"); + goto end; + } + is_batch_vma_pin = true; + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) { + drm_err(&i915->drm, "Failed to intel_context_create_request()\n"); + goto end; + } + is_skip_req_on_err = true; + + err = intel_gt_buffer_pool_mark_active(pool, rq); + if (err) { + drm_err(&i915->drm, "Failed to intel_engine_pool_mark_active()\n"); + goto end; + } + + i915_vma_lock(batch); + err = i915_request_await_object(rq, batch->obj, false); + if (!err) + err = i915_vma_move_to_active(batch, rq, 0); + i915_vma_unlock(batch); + if (err) { + drm_err(&i915->drm, "Failed to i915_request_await_object()\n"); + goto end; + } + + if (ce->engine->emit_init_breadcrumb) { + err = ce->engine->emit_init_breadcrumb(rq); + if (err) { + drm_err(&i915->drm, "Failed to emit_init_breadcrumb()\n"); + goto end; + } + } + + err = ce->engine->emit_bb_start(rq, batch->node.start, + batch->node.size, 0); + if (err) { + drm_err(&i915->drm, "Failed to emit_bb_start()\n"); + goto end; + } + + i915_request_add(rq); + +end: + if (unlikely(err) && is_skip_req_on_err) + i915_request_set_error_once(rq, err); + + if (is_batch_vma_pin) + i915_vma_unpin(batch); + + if (is_engine_get_pool) + intel_gt_buffer_pool_put(pool); + + if (is_engine_pm_get) + intel_engine_pm_put(ce->engine); + + return err; +} + static int pxp_sm_reg_read(struct drm_i915_private *i915, u32 offset, u32 *regval) { intel_wakeref_t wakeref; @@ -514,6 +664,144 @@ int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int ses return -EINVAL; } +static int add_pxp_prolog(struct drm_i915_private *i915, u32 *cmd, int session_type, + int session_index) +{ + u32 increased_size_in_dw = 0; + u32 *cmd_prolog = cmd; + const int cmd_prolog_size_in_dw = 10; + + if (!cmd) + return cmd_prolog_size_in_dw; + + /* MFX_WAIT - stall until prior PXP and MFX/HCP/HUC objects are cmopleted */ + *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | + MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG); + + /* MI_FLUSH_DW - pxp off */ + *cmd_prolog++ = MI_FLUSH_DW; /* DW0 */ + *cmd_prolog++ = 0; /* DW1 */ + *cmd_prolog++ = 0; /* DW2 */ + + /* MI_SET_APPID */ + if (session_type == SESSION_TYPE_TYPE1) { + if (session_index >= MAX_TYPE1_SESSIONS) { + drm_err(&i915->drm, "Failed to %s invalid session_index\n", __func__); + goto end; + } + + *cmd_prolog++ = (MI_SET_APPID | MI_SET_APPID_TYPE1_APP | + MI_SET_APPID_SESSION_ID(session_index)); + } else { + if (session_index >= MAX_TYPE0_SESSIONS) { + drm_err(&i915->drm, "Failed to %s invalid session_index\n", __func__); + goto end; + } + + *cmd_prolog++ = (MI_SET_APPID | MI_SET_APPID_SESSION_ID(session_index)); + } + + /* MFX_WAIT */ + *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | + MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG); + + /* MI_FLUSH_DW - pxp on */ + *cmd_prolog++ = (MI_FLUSH_DW | MI_FLUSH_DW_DW0_PROTECTED_MEMORY_ENABLE); /* DW0 */ + *cmd_prolog++ = 0; /* DW1 */ + *cmd_prolog++ = 0; /* DW2 */ + + /* MFX_WAIT */ + *cmd_prolog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | + MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG); + + increased_size_in_dw = (cmd_prolog - cmd); +end: + return increased_size_in_dw; +} + +static int add_pxp_epilog(u32 *cmd) +{ + u32 increased_size_in_dw = 0; + u32 *cmd_epilog = cmd; + const int cmd_epilog_size_in_dw = 5; + + if (!cmd) + return cmd_epilog_size_in_dw; + + /* MI_FLUSH_DW - pxp off */ + *cmd_epilog++ = MI_FLUSH_DW; /* DW0 */ + *cmd_epilog++ = 0; /* DW1 */ + *cmd_epilog++ = 0; /* DW2 */ + + /* MFX_WAIT - stall until prior PXP and MFX/HCP/HUC objects are cmopleted */ + *cmd_epilog++ = (MFX_WAIT | MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | + MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG); + + /* MI_BATCH_BUFFER_END */ + *cmd_epilog++ = MI_BATCH_BUFFER_END; + + increased_size_in_dw = (cmd_epilog - cmd); + return increased_size_in_dw; +} + +static int add_pxp_inline_termination(u32 *cmd) +{ + u32 increased_size_in_dw = 0; + u32 *cmd_termin = cmd; + const int cmd_termin_size_in_dw = 2; + + if (!cmd) + return cmd_termin_size_in_dw; + + /* CRYPTO_KEY_EXCHANGE - session inline termination */ + *cmd_termin++ = CRYPTO_KEY_EXCHANGE; /* DW0 */ + *cmd_termin++ = 0; /* DW1 */ + + increased_size_in_dw = (cmd_termin - cmd); + return increased_size_in_dw; +} + +static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int session_type, + int session_index) +{ + u32 *cmd = NULL; + u32 *cmd_ptr = NULL; + int cmd_size_in_dw = 0; + int ret; + + if (!i915) + return -EINVAL; + + cmd_size_in_dw += add_pxp_prolog(i915, NULL, session_type, session_index); + cmd_size_in_dw += add_pxp_inline_termination(NULL); + cmd_size_in_dw += add_pxp_epilog(NULL); + + cmd = kzalloc(cmd_size_in_dw * 4, GFP_KERNEL); + if (!cmd) + return -ENOMEM; + + cmd_ptr = cmd; + cmd_ptr += add_pxp_prolog(i915, cmd_ptr, session_type, session_index); + cmd_ptr += add_pxp_inline_termination(cmd_ptr); + cmd_ptr += add_pxp_epilog(cmd_ptr); + + if (cmd_size_in_dw != (cmd_ptr - cmd)) { + ret = -EINVAL; + drm_err(&i915->drm, "Failed to %s\n", __func__); + goto end; + } + + ret = pxp_submit_cmd(i915, cmd, cmd_size_in_dw); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_submit_cmd()\n"); + goto end; + } + +end: + kfree(cmd); + return ret; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 90f7d74cacdf..1b3173bca281 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -23,6 +23,22 @@ #define SESSION_TYPE_MASK BIT(7) #define SESSION_ID_MASK (BIT(7) - 1) +/* PXP GPU command definitions */ + +/* MI_SET_APPID */ +#define MI_SET_APPID_TYPE1_APP BIT(7) +#define MI_SET_APPID_SESSION_ID(x) ((x) << 0) + +/* MI_FLUSH_DW */ +#define MI_FLUSH_DW_DW0_PROTECTED_MEMORY_ENABLE BIT(22) + +/* MI_WAIT */ +#define MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG BIT(9) +#define MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG BIT(8) + +/* CRYPTO_KEY_EXCHANGE */ +#define CRYPTO_KEY_EXCHANGE ((0x3 << 29) | (0x01609 << 16)) + enum pxp_session_types { SESSION_TYPE_TYPE0 = 0, SESSION_TYPE_TYPE1 = 1, From patchwork Sat Nov 21 00:35:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B348CC64E75 for ; Sat, 21 Nov 2020 00:36:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 75BE423A65 for ; Sat, 21 Nov 2020 00:36:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 75BE423A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DE6DA6E961; Sat, 21 Nov 2020 00:35:48 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9BFFD6E952 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: C9vEA4LQoMwhnvxFHp2COzvqi7HDWhA1HmMH7PStDwW45hZd6u2/WNdUN7WChGkZ+AF/p9pAUj hT30DGwLbkkQ== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670521" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670521" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: h9BXv5QvS61hdIphIL99cAEB06ka5qlZRV6g/OJ1HeeB9SKKRDt6ZYB9LT+oV17oFQ1WPbDo0x LI4ZFVqKXcWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352683" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:26 -0800 Message-Id: <20201121003540.24980-13-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 12/26] drm/i915/pxp: Implement ioctl action to terminate the session X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the PXP ioctl action to allow user space driver to terminate the hardware session and cleanup its software session state. PXP sends the session termination command to GPU once receves this ioctl action. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 7 + drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 190 ++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 5 + 3 files changed, 202 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 30bdbcf543e0..91164005e0ff 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -56,6 +56,13 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf ret = pxp_sm_mark_protected_session_in_play(i915, params->session_type, params->pxp_tag); + } else if (params->req_session_state == PXP_SM_REQ_SESSION_TERMINATE) { + ret = pxp_sm_terminate_protected_session_safe(i915, 0, + params->session_type, + params->pxp_tag); + + if (!intel_pxp_sm_is_any_type0_session_in_play(i915, PROTECTION_MODE_ALL)) + intel_pxp_destroy_user_ctx_list(i915); } else { ret = -EINVAL; goto end; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index f41e50911688..65b89728251d 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -802,6 +802,174 @@ static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int ses return ret; } +/** + * terminate_protected_session - To terminate an active HW session and free its entry. + * @i915: i915 device handle. + * @context_id: context identifier of the requestor. only relevant if do_safety_check is true. + * @session_type: type of the session to be terminated. One of enum pxp_session_types. + * @session_index: session index of the session to be terminated. + * @do_safety_check: if enabled the context Id sent by the caller is + * matched with the one associated with the terminated + * session entry. + * + * Return: 0 means terminate is successful, or didn't find the desired session. + */ +static int terminate_protected_session(struct drm_i915_private *i915, int context_id, + int session_type, int session_index, + bool do_safety_check) +{ + int ret; + struct pxp_protected_session *current_session, *n; + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + switch (session_type) { + case SESSION_TYPE_TYPE0: + list_for_each_entry_safe(current_session, n, + pxp_session_list(i915, SESSION_TYPE_TYPE0), + session_list) { + if (current_session->session_index == session_index) { + if (do_safety_check && current_session->context_id != context_id) { + ret = -EPERM; + drm_err(&i915->drm, "Failed to %s due to invalid context_id=[%d]\n", + __func__, context_id); + goto end; + } + + ret = issue_hw_terminate_for_session(i915, session_type, + session_index); + if (ret) { + drm_err(&i915->drm, "Failed to issue_hw_terminate_for_session()\n"); + goto end; + } + + ret = pxp_set_pxp_tag(i915, session_type, session_index, + PROTECTION_MODE_NONE); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_set_pxp_tag()\n"); + goto end; + } + + list_del(¤t_session->session_list); + kfree(current_session); + return 0; + } + } + return 0; + + case SESSION_TYPE_TYPE1: + list_for_each_entry_safe(current_session, n, + pxp_session_list(i915, SESSION_TYPE_TYPE1), + session_list) { + if (current_session->session_index == session_index) { + if (do_safety_check && current_session->context_id != context_id) { + ret = -EPERM; + drm_err(&i915->drm, "Failed to %s due to invalid context_id=[%d]\n", + __func__, context_id); + goto end; + } + + ret = issue_hw_terminate_for_session(i915, session_type, + session_index); + if (ret) { + drm_err(&i915->drm, "Failed to issue_hw_terminate_for_session()\n"); + goto end; + } + + ret = pxp_set_pxp_tag(i915, session_type, session_index, + PROTECTION_MODE_NONE); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_set_pxp_tag()\n"); + goto end; + } + + list_del(¤t_session->session_list); + kfree(current_session); + return 0; + } + } + return 0; + + default: + return -EINVAL; + } +end: + return ret; +} + +/** + * pxp_sm_terminate_protected_session_safe - to terminate an active HW session and free its entry. + * @i915: i915 device handle. + * @context_id: context identifier of the requestor. + * @session_type: type of the session to be terminated. One of enum pxp_session_types. + * @session_id: session id identifier of the session to be terminated. + * + * For safety, the context Id sent by the caller is matched with the + * one associated with the terminated session entry. * Terminate is + * only issued if context Ids match. Rejected otherwise This function + * is intended to be called from the ioctl. + * + * Return: status. 0 means terminate is successful. + */ +int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id, + int session_type, int session_id) +{ + int ret; + int session_type_in_id; + int session_idx; + + ret = pxp_get_session_index(i915, session_id, &session_idx, &session_type_in_id); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_get_session_index\n"); + return ret; + } + + if (session_type != session_type_in_id) { + drm_err(&i915->drm, "Failed to session_type and session_type_in_id don't match\n"); + return -EINVAL; + } + + ret = terminate_protected_session(i915, context_id, session_type, session_idx, true); + + return ret; +} + +/** + * pxp_sm_terminate_protected_session_unsafe - To terminate an active HW session and free its entry. + * @i915: i915 device handle. + * @session_type: type of the session to be terminated. One of enum pxp_session_types. + * @session_id: session id identifier of the session to be terminated. + * + * No safety; the context Id sent by the caller is not matched with + * the one associated with the terminated session entry. This function + * is NOT intended to be called from the ioctl. Kernel administration + * purposes only. + * + * Return: status. 0 means terminate is successful. + */ +int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, + int session_id) +{ + int ret; + int session_idx; + int session_type_in_id; + + ret = pxp_get_session_index(i915, session_id, &session_idx, &session_type_in_id); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_get_session_index\n"); + return ret; + } + + if (session_type != session_type_in_id) { + drm_err(&i915->drm, "Failed to session_type and session_type_in_id don't match\n"); + return -EINVAL; + } + + ret = terminate_protected_session(i915, -1, session_type, session_idx, false); + + return ret; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; @@ -812,3 +980,25 @@ int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) return ret; } + +/** + * intel_pxp_sm_is_any_type0_session_in_play - To check if there is a type0 "in play" session. + * @i915: i915 device handle. + * @protection_mode: check for specified protection mode of the session + * + * Return: True if at least one alive session in "session in play" state, false otherwise. + */ +bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode) +{ + struct pxp_protected_session *session, *n; + + list_for_each_entry_safe(session, n, pxp_session_list(i915, SESSION_TYPE_TYPE0), + session_list) { + if (protection_mode == PROTECTION_MODE_ALL) + return true; + else if (protection_mode == session->protection_mode) + return true; + } + + return false; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 1b3173bca281..a68e1d109437 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -105,6 +105,11 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file u32 *pxp_tag); int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type, u32 session_id); +int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id, + int session_type, int session_id); +int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, + int session_id); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); +bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CC73C56202 for ; Sat, 21 Nov 2020 00:35:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0C6CC23A65 for ; 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20 Nov 2020 16:35:41 -0800 IronPort-SDR: 9EY0leNoZ014mdVM34qsoHRgcpb19tD6U05vc5ya9QMKHo8AIa7Z3Utbqmz2PPkHbWia6AonS6 fJLzmJ4cbx0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352684" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:27 -0800 Message-Id: <20201121003540.24980-14-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 13/26] drm/i915/pxp: Enable ioctl action to query PXP tag X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable the PXP ioctl action to allow user space driver to query the PXP tag, which is a 32-bit bitwise value indicating the current session info, including protection type, session id, and whether the session is enabled. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 7 +++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 7 +++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 3 +++ 4 files changed, 37 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 91164005e0ff..c4e287f34588 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -69,6 +69,13 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf } break; } + case PXP_ACTION_QUERY_PXP_TAG: + { + struct pxp_sm_query_pxp_tag *params = &pxp_info.query_pxp_tag; + + ret = pxp_sm_ioctl_query_pxp_tag(i915, ¶ms->session_is_alive, ¶ms->pxp_tag); + break; + } case PXP_ACTION_SET_USER_CONTEXT: { ret = intel_pxp_set_user_ctx(i915, pxp_info.set_user_ctx); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 1ed433b04943..6f29a409c124 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -31,6 +31,7 @@ enum pxp_sm_session_req { }; enum pxp_ioctl_action { + PXP_ACTION_QUERY_PXP_TAG = 0, PXP_ACTION_SET_SESSION_STATUS = 1, PXP_ACTION_SET_USER_CONTEXT = 5, }; @@ -42,6 +43,11 @@ enum pxp_sm_status { PXP_SM_STATUS_ERROR_UNKNOWN }; +struct pxp_sm_query_pxp_tag { + u32 session_is_alive; + u32 pxp_tag; /* in - Session ID, out pxp tag */ +}; + struct pxp_sm_set_session_status_params { /** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */ u32 pxp_tag; @@ -57,6 +63,7 @@ struct pxp_info { u32 action; u32 sm_status; union { + struct pxp_sm_query_pxp_tag query_pxp_tag; struct pxp_sm_set_session_status_params set_session_status; u32 set_user_ctx; }; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index 65b89728251d..fdfb366d7472 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -970,6 +970,26 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int return ret; } +int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag) +{ + int session_type = 0; + int session_index = 0; + int ret; + + if (!session_is_alive || !pxp_tag) + return -EINVAL; + + ret = pxp_get_session_index(i915, *pxp_tag, &session_index, &session_type); + if (ret) { + drm_err(&i915->drm, "Failed to __pxpsessionid_to_sessionid\n"); + return ret; + } + + *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, session_is_alive); +end: + return 0; +} + int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915) { int ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index a68e1d109437..7ae001ccb60f 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -109,7 +109,10 @@ int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int c int session_type, int session_id); int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, int session_id); +int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); +u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx, + int session_type, u32 *session_is_alive); bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1238C6379F for ; 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a="189670522" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670522" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: gAGddZZqiTMsWwEhMrFxVTPARMjCkODBr9c/jj2dk74ZXYEMc15VwoL1ITuH0X9J8aWtz3/4f6 KSh05EkLzbNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352685" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:28 -0800 Message-Id: <20201121003540.24980-15-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 14/26] drm/i915/pxp: Destroy all type0 sessions upon teardown X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. So as a result, PXP should handle such case and terminate all the type0 sessions. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 6 +- drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 112 +++++++++++++++++++++++- drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 1 + 3 files changed, 117 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index c4e287f34588..ff6941cd3d83 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -124,16 +124,20 @@ static void intel_pxp_mask_irq(struct intel_gt *gt, u32 mask) static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915) { + int ret; + mutex_lock(&i915->pxp.ctx->ctx_mutex); i915->pxp.ctx->global_state_attacked = true; i915->pxp.ctx->flag_display_hm_surface_keys = false; + ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE0); + intel_pxp_destroy_user_ctx_list(i915); mutex_unlock(&i915->pxp.ctx->ctx_mutex); - return 0; + return ret; } static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index fdfb366d7472..32eebdc380e5 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -802,6 +802,64 @@ static int issue_hw_terminate_for_session(struct drm_i915_private *i915, int ses return ret; } +static int terminate_all_hw_sessions_with_global_termination(struct drm_i915_private *i915, + int session_type) +{ + u32 *cmd = NULL; + u32 *cmd_ptr = NULL; + int cmd_size_in_dw = 0; + int ret; + int session_index; + const int session_num_max = pxp_session_max(session_type); + + if (!i915) + return -EINVAL; + + /* Calculate how many bytes need to be alloc */ + for (session_index = 0; session_index < session_num_max; session_index++) { + if (is_hw_session_in_play(i915, session_type, session_index)) { + cmd_size_in_dw += add_pxp_prolog(i915, NULL, session_type, session_index); + cmd_size_in_dw += add_pxp_inline_termination(NULL); + } + } + cmd_size_in_dw += add_pxp_epilog(NULL); + + cmd = kzalloc(cmd_size_in_dw * 4, GFP_KERNEL); + if (!cmd) + return -ENOMEM; + + /* Program the command */ + cmd_ptr = cmd; + for (session_index = 0; session_index < session_num_max; session_index++) { + if (is_hw_session_in_play(i915, session_type, session_index)) { + cmd_ptr += add_pxp_prolog(i915, cmd_ptr, session_type, session_index); + cmd_ptr += add_pxp_inline_termination(cmd_ptr); + } + } + cmd_ptr += add_pxp_epilog(cmd_ptr); + + if (cmd_size_in_dw != (cmd_ptr - cmd)) { + ret = -EINVAL; + drm_err(&i915->drm, "Failed to %s\n", __func__); + goto end; + } + + if (drm_debug_enabled(DRM_UT_DRIVER)) { + print_hex_dump(KERN_DEBUG, "global termination cmd binaries:", + DUMP_PREFIX_OFFSET, 4, 4, cmd, cmd_size_in_dw * 4, true); + } + + ret = pxp_submit_cmd(i915, cmd, cmd_size_in_dw); + if (ret) { + drm_err(&i915->drm, "Failed to pxp_submit_cmd()\n"); + goto end; + } + +end: + kfree(cmd); + return ret; +} + /** * terminate_protected_session - To terminate an active HW session and free its entry. * @i915: i915 device handle. @@ -970,6 +1028,58 @@ int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int return ret; } +static int intel_pxp_sm_destroy_all_sw_sessions(struct drm_i915_private *i915, int session_type) +{ + int ret = 0; + struct pxp_protected_session *current_session, *n; + + list_for_each_entry_safe(current_session, n, pxp_session_list(i915, session_type), + session_list) { + ret = pxp_set_pxp_tag(i915, session_type, current_session->session_index, + PROTECTION_MODE_NONE); + if (ret) + drm_err(&i915->drm, "Failed to pxp_set_pxp_tag()\n"); + + list_del(¤t_session->session_list); + kfree(current_session); + } + + return ret; +} + +/** + * intel_pxp_sm_terminate_all_active_sessions - Terminate all active HW sessions and their entries. + * @i915: i915 device handle. + * @session_type: Type of the sessions to be terminated. + * One of enum pxp_session_types. + * + * This function is NOT intended to be called from the ioctl, and need to be protected by + * ctx_mutex to ensure no SIP change during the call. + * + * Return: status. 0 means terminate is successful. + */ +int intel_pxp_sm_terminate_all_active_sessions(struct drm_i915_private *i915, int session_type) +{ + int ret; + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + /* terminate the hw sessions */ + ret = terminate_all_hw_sessions_with_global_termination(i915, session_type); + if (ret) { + drm_err(&i915->drm, "Failed to terminate_all_hw_sessions_with_global_termination\n"); + return ret; + } + + ret = intel_pxp_sm_destroy_all_sw_sessions(i915, session_type); + if (ret) { + drm_err(&i915->drm, "Failed to intel_pxp_sm_destroy_all_sw_sessions\n"); + return ret; + } + + return ret; +} + int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag) { int session_type = 0; @@ -986,7 +1096,7 @@ int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_al } *pxp_tag = intel_pxp_get_pxp_tag(i915, session_index, session_type, session_is_alive); -end: + return 0; } diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 7ae001ccb60f..aee638e70be6 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -109,6 +109,7 @@ int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int c int session_type, int session_id); int pxp_sm_terminate_protected_session_unsafe(struct drm_i915_private *i915, int session_type, int session_id); +int intel_pxp_sm_terminate_all_active_sessions(struct drm_i915_private *i915, int session_type); int pxp_sm_ioctl_query_pxp_tag(struct drm_i915_private *i915, u32 *session_is_alive, u32 *pxp_tag); int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx, From patchwork Sat Nov 21 00:35:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7405CC5519F for ; Sat, 21 Nov 2020 00:35:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 304F823A65 for ; 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20 Nov 2020 16:35:41 -0800 IronPort-SDR: WIbH368iFOJNaSw02LyKhmrPvTI7kFj4QNva9awiJTIO3+UL/GU443MZqYakVgiTBAYZ4Pkj9n a623mpl31BQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352687" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:29 -0800 Message-Id: <20201121003540.24980-16-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 15/26] drm/i915/pxp: Termiante the session upon app crash X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" PXP should terminate the hardware session and cleanup the software state gracefully when the application has established the protection session, but doesn't close the session correctly due to some cases like application crash. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/pxp/intel_pxp.c | 12 ++++++++++-- drivers/gpu/drm/i915/pxp/intel_pxp.h | 1 + drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 1 + 5 files changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index c8b9c42fcbd6..dec3bb96d238 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1028,6 +1028,8 @@ static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) /* Catch up with all the deferred frees from "this" client */ i915_gem_flush_free_objects(to_i915(dev)); + + intel_pxp_close(to_i915(dev), file); } static void intel_suspend_encoders(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index ff6941cd3d83..846d94d90861 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -100,10 +100,18 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf return ret; } -static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) +void intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile) { - WARN_ON(INTEL_GEN(i915) < 11); + if (!i915 || !i915->pxp.ctx || !drmfile) + return; + mutex_lock(&i915->pxp.ctx->ctx_mutex); + intel_pxp_sm_close(i915, drmfile); + mutex_unlock(&i915->pxp.ctx->ctx_mutex); +} + +static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) +{ /* crypto mask is in bit31-16 (Engine1 Interrupt Mask) */ intel_uncore_write(&i915->uncore, GEN11_CRYPTO_RSVD_INTR_MASK, mask << 16); } diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 6f29a409c124..a3a0cf1f12e9 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -88,6 +88,7 @@ struct intel_gt; struct drm_i915_private; int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile); +void intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile); void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir); int i915_pxp_teardown_required_callback(struct drm_i915_private *i915); int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index 32eebdc380e5..6ff347b7b72b 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -1132,3 +1132,22 @@ bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, in return false; } + +int intel_pxp_sm_close(struct drm_i915_private *i915, struct drm_file *drmfile) +{ + struct pxp_protected_session *s, *n; + int ret = 0; + + list_for_each_entry_safe(s, n, pxp_session_list(i915, SESSION_TYPE_TYPE0), session_list) { + if (s->drmfile && s->drmfile == drmfile && s->pid == pid_nr(drmfile->pid)) { + ret = terminate_protected_session(i915, 0, s->session_type, + s->session_index, false); + if (ret) { + drm_err(&i915->drm, "Failed to terminate_protected_session()\n"); + return ret; + } + } + } + + return ret; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index aee638e70be6..143f024bb0d2 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -115,5 +115,6 @@ int pxp_sm_set_kcr_init_reg(struct drm_i915_private *i915); u32 intel_pxp_get_pxp_tag(struct drm_i915_private *i915, int session_idx, int session_type, u32 *session_is_alive); bool intel_pxp_sm_is_any_type0_session_in_play(struct drm_i915_private *i915, int protection_mode); +int intel_pxp_sm_close(struct drm_i915_private *i915, struct drm_file *drmfile); #endif /* __INTEL_PXP_SM_H__ */ From patchwork Sat Nov 21 00:35:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A64AC2D0E4 for ; Sat, 21 Nov 2020 00:36:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D2DC223A65 for ; Sat, 21 Nov 2020 00:36:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D2DC223A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 972236E95E; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id DE4F66E94E for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: hMCf/Fj9wAUNguKFDt08x08LnZoj9awdqmHq7lqfKe6siM6T76N44Bz8vIY2QsHJ1FOuQOhCkM wD1d0kcuggVA== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670524" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670524" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: yml87PXm/BeHLgbwNPmnvB1fTOZ2ZG3a6nJ4X1dUM7WYVJtkFcKa377CTPOWWMj4bWRb0ZsF9s /OugAKllWSEw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352689" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:30 -0800 Message-Id: <20201121003540.24980-17-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 16/26] drm/i915/pxp: Enable PXP power management X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the software session state was marked as alive after resume. So to handle such case, PXP should terminate all the hardware sessions and cleanup all the software states after the power cycle. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_drv.c | 8 +++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 72 +++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 16 ++++++ 4 files changed, 98 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 81432a9f44d6..6858392c1ef2 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -258,7 +258,8 @@ i915-y += i915_perf.o i915-y += \ pxp/intel_pxp.o \ pxp/intel_pxp_context.o \ - pxp/intel_pxp_sm.o + pxp/intel_pxp_sm.o \ + pxp/intel_pxp_pm.o # Post-mortem debug and GPU hang state capture i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index dec3bb96d238..2eab12b5d964 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -68,6 +68,8 @@ #include "gt/intel_gt_pm.h" #include "gt/intel_rc6.h" +#include "pxp/intel_pxp_pm.h" + #include "i915_debugfs.h" #include "i915_drv.h" #include "i915_ioc32.h" @@ -1094,6 +1096,8 @@ static int i915_drm_prepare(struct drm_device *dev) */ i915_gem_suspend(i915); + intel_pxp_pm_prepare_suspend(i915); + return 0; } @@ -1277,6 +1281,8 @@ static int i915_drm_resume(struct drm_device *dev) intel_power_domains_enable(dev_priv); + intel_pxp_pm_resume(dev_priv); + enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); return 0; @@ -1348,6 +1354,8 @@ static int i915_drm_resume_early(struct drm_device *dev) intel_power_domains_resume(dev_priv); + intel_pxp_pm_resume_early(dev_priv); + enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); return ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c new file mode 100644 index 000000000000..59847e0ed2e3 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020 Intel Corporation. + */ + +#include "intel_pxp_context.h" +#include "intel_pxp_sm.h" +#include "intel_pxp_pm.h" + +void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915) +{ + if (!i915->pxp.ctx) + return; + + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + /* Disable PXP-IOCTLs */ + i915->pxp.ctx->global_state_in_suspend = true; + + mutex_unlock(&i915->pxp.ctx->ctx_mutex); +} + +void intel_pxp_pm_resume_early(struct drm_i915_private *i915) +{ + if (!i915->pxp.ctx) + return; + + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + if (i915->pxp.ctx->global_state_in_suspend) { + /* reset the attacked flag even there was a pending */ + i915->pxp.ctx->global_state_attacked = false; + + i915->pxp.ctx->flag_display_hm_surface_keys = false; + } + + mutex_unlock(&i915->pxp.ctx->ctx_mutex); +} + +int intel_pxp_pm_resume(struct drm_i915_private *i915) +{ + int ret = 0; + + if (!i915->pxp.ctx) + return 0; + + mutex_lock(&i915->pxp.ctx->ctx_mutex); + + /* Re-enable PXP-IOCTLs */ + if (i915->pxp.ctx->global_state_in_suspend) { + intel_pxp_destroy_user_ctx_list(i915); + + ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE0); + if (ret) { + drm_err(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type0\n"); + goto end; + } + + ret = intel_pxp_sm_terminate_all_active_sessions(i915, SESSION_TYPE_TYPE1); + if (ret) { + drm_err(&i915->drm, "Failed to intel_pxp_sm_terminate_all_active_sessions with type1\n"); + goto end; + } + + i915->pxp.ctx->global_state_in_suspend = false; + } + +end: + mutex_unlock(&i915->pxp.ctx->ctx_mutex); + + return ret; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h new file mode 100644 index 000000000000..d2af781c3de1 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_PM_H__ +#define __INTEL_PXP_PM_H__ + +#include "i915_drv.h" + +void intel_pxp_pm_prepare_suspend(struct drm_i915_private *i915); + +void intel_pxp_pm_resume_early(struct drm_i915_private *i915); +int intel_pxp_pm_resume(struct drm_i915_private *i915); + +#endif From patchwork Sat Nov 21 00:35:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08376C5519F for ; Sat, 21 Nov 2020 00:35:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9E0723A65 for ; Sat, 21 Nov 2020 00:35:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A9E0723A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D31B6E951; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 003996E943 for ; Sat, 21 Nov 2020 00:35:42 +0000 (UTC) IronPort-SDR: gCo3+XSF9aVBu8t3kY4CcWS5l8mIp9wtnNomDZiOnbiUcjgDQVE8CTDt+uVVFTS/arGzsKsGWv /KT/my+fTgWA== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670525" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670525" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: tr6/+EzlGKmFP/iSa3djS4nP8wccxHG/SWXo72Sw7IeOIw3PGQj/Y4QBzFvOmu7iT4pXL145G9 AdKnFDLSgvoQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352690" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:31 -0800 Message-Id: <20201121003540.24980-18-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC-v2 17/26] drm/i915/pxp: Implement funcs to create the TEE channel X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently ring3 driver sends the TEE commands directly to TEE, but later, as our design, we would like to make ring3 sending the TEE commands via the ring0 PXP ioctl action instead of TEE ioctl, so we can centralize those protection operations at ring0 PXP. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ drivers/gpu/drm/i915/pxp/intel_pxp.c | 5 + drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 127 +++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 14 +++ include/drm/i915_component.h | 1 + include/drm/i915_pxp_tee_interface.h | 45 ++++++++ 8 files changed, 200 insertions(+) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee.h create mode 100644 include/drm/i915_pxp_tee_interface.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 6858392c1ef2..1f3e0b89ae42 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -259,6 +259,7 @@ i915-y += \ pxp/intel_pxp.o \ pxp/intel_pxp_context.o \ pxp/intel_pxp_sm.o \ + pxp/intel_pxp_tee.o \ pxp/intel_pxp_pm.o # Post-mortem debug and GPU hang state capture diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2eab12b5d964..453bb5222e99 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -324,6 +324,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) mutex_init(&dev_priv->wm.wm_mutex); mutex_init(&dev_priv->pps_mutex); mutex_init(&dev_priv->hdcp_comp_mutex); + mutex_init(&dev_priv->pxp_tee_comp_mutex); i915_memcpy_init_early(dev_priv); intel_runtime_pm_init_early(&dev_priv->runtime_pm); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f34ed07a68ee..9ba6eada4f84 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1219,6 +1219,12 @@ struct drm_i915_private { struct intel_pxp pxp; + struct i915_pxp_comp_master *pxp_tee_master; + bool pxp_tee_comp_added; + + /* Mutex to protect the above pxp_tee component related values. */ + struct mutex pxp_tee_comp_mutex; + I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;) /* diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 846d94d90861..441e57d6c58f 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -7,6 +7,7 @@ #include "intel_pxp.h" #include "intel_pxp_context.h" #include "intel_pxp_sm.h" +#include "intel_pxp_tee.h" int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile) { @@ -202,6 +203,8 @@ int intel_pxp_init(struct drm_i915_private *i915) return ret; } + intel_pxp_tee_component_init(i915); + INIT_WORK(&i915->pxp.irq_work, intel_pxp_irq_work); i915->pxp.handled_irr = (PXP_IRQ_VECTOR_DISPLAY_PXP_STATE_TERMINATED | @@ -213,6 +216,8 @@ int intel_pxp_init(struct drm_i915_private *i915) void intel_pxp_uninit(struct drm_i915_private *i915) { + intel_pxp_tee_component_fini(i915); + intel_pxp_destroy_ctx(i915); } diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c new file mode 100644 index 000000000000..fa617546bdd4 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020 Intel Corporation. + */ + +#include +#include "drm/i915_pxp_tee_interface.h" +#include "drm/i915_component.h" +#include "intel_pxp.h" +#include "intel_pxp_context.h" +#include "intel_pxp_tee.h" + +static int intel_pxp_tee_io_message(struct drm_i915_private *i915, + void *msg_in, u32 msg_in_size, + void *msg_out, u32 *msg_out_size_ptr, + u32 msg_out_buf_size) +{ + int ret; + struct i915_pxp_comp_master *pxp_tee_master = i915->pxp_tee_master; + + if (!pxp_tee_master || !msg_in || !msg_out || !msg_out_size_ptr) + return -EINVAL; + + lockdep_assert_held(&i915->pxp_tee_comp_mutex); + + if (drm_debug_enabled(DRM_UT_DRIVER)) + print_hex_dump(KERN_DEBUG, "TEE input message binaries:", + DUMP_PREFIX_OFFSET, 4, 4, msg_in, msg_in_size, true); + + ret = pxp_tee_master->ops->send(pxp_tee_master->tee_dev, msg_in, msg_in_size); + if (ret) { + drm_err(&i915->drm, "Failed to send TEE message\n"); + return -EFAULT; + } + + ret = pxp_tee_master->ops->receive(pxp_tee_master->tee_dev, msg_out, msg_out_buf_size); + if (ret < 0) { + drm_err(&i915->drm, "Failed to receive TEE message\n"); + return -EFAULT; + } + + if (ret > msg_out_buf_size) { + drm_err(&i915->drm, "Failed to receive TEE message due to unexpected output size\n"); + return -EFAULT; + } + + *msg_out_size_ptr = ret; + ret = 0; + + if (drm_debug_enabled(DRM_UT_DRIVER)) + print_hex_dump(KERN_DEBUG, "TEE output message binaries:", + DUMP_PREFIX_OFFSET, 4, 4, msg_out, *msg_out_size_ptr, true); + + return ret; +} + +/** + * i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee + * @i915_kdev: pointer to i915 kernel device + * @tee_kdev: pointer to tee kernel device + * @data: pointer to pxp_tee_master containing the function pointers + * + * This bind function is called during the system boot or resume from system sleep. + * + * Return: return 0 if successful. + */ +static int i915_pxp_tee_component_bind(struct device *i915_kdev, + struct device *tee_kdev, void *data) +{ + struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); + + if (!i915 || !tee_kdev || !data) + return -EPERM; + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_master = (struct i915_pxp_comp_master *)data; + i915->pxp_tee_master->tee_dev = tee_kdev; + mutex_unlock(&i915->pxp_tee_comp_mutex); + + return 0; +} + +static void i915_pxp_tee_component_unbind(struct device *i915_kdev, + struct device *tee_kdev, void *data) +{ + struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); + + if (!i915 || !tee_kdev || !data) + return; + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_master = NULL; + mutex_unlock(&i915->pxp_tee_comp_mutex); +} + +static const struct component_ops i915_pxp_tee_component_ops = { + .bind = i915_pxp_tee_component_bind, + .unbind = i915_pxp_tee_component_unbind, +}; + +void intel_pxp_tee_component_init(struct drm_i915_private *i915) +{ + int ret; + + if (!i915) + return; + + ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops, + I915_COMPONENT_PXP); + if (ret < 0) { + drm_err(&i915->drm, "Failed at component add(%d)\n", ret); + return; + } + + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_comp_added = true; + mutex_unlock(&i915->pxp_tee_comp_mutex); +} + +void intel_pxp_tee_component_fini(struct drm_i915_private *i915) +{ + mutex_lock(&i915->pxp_tee_comp_mutex); + i915->pxp_tee_comp_added = false; + mutex_unlock(&i915->pxp_tee_comp_mutex); + + component_del(i915->drm.dev, &i915_pxp_tee_component_ops); +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h new file mode 100644 index 000000000000..0d0fbd0ed018 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_TEE_H__ +#define __INTEL_PXP_TEE_H__ + +#include "i915_drv.h" + +void intel_pxp_tee_component_init(struct drm_i915_private *i915); +void intel_pxp_tee_component_fini(struct drm_i915_private *i915); + +#endif /* __INTEL_PXP_TEE_H__ */ diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h index 55c3b123581b..c1e2a43d2d1e 100644 --- a/include/drm/i915_component.h +++ b/include/drm/i915_component.h @@ -29,6 +29,7 @@ enum i915_component_type { I915_COMPONENT_AUDIO = 1, I915_COMPONENT_HDCP, + I915_COMPONENT_PXP }; /* MAX_PORT is the number of port diff --git a/include/drm/i915_pxp_tee_interface.h b/include/drm/i915_pxp_tee_interface.h new file mode 100644 index 000000000000..3999e255e145 --- /dev/null +++ b/include/drm/i915_pxp_tee_interface.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2020 Intel Corporation + * + * Authors: + * Vitaly Lubart + */ + +#ifndef _I915_PXP_TEE_INTERFACE_H_ +#define _I915_PXP_TEE_INTERFACE_H_ + +#include +#include + +/** + * struct i915_pxp_component_ops - ops for PXP services. + * @owner: Module providing the ops + * @send: sends data to PXP + * @receive: receives data from PXP + */ +struct i915_pxp_component_ops { + /** + * @owner: owner of the module provding the ops + */ + struct module *owner; + + int (*send)(struct device *dev, const void *message, size_t size); + int (*receive)(struct device *dev, void *buffer, size_t size); +}; + +/** + * struct i915_pxp_component_master - Used for communication between i915 + * and TEE drivers for the PXP services + * @tee_dev: device that provide the PXP service from TEE Bus. + * @pxp_ops: Ops implemented by TEE driver, used by i915 driver. + */ +struct i915_pxp_comp_master { + struct device *tee_dev; + const struct i915_pxp_component_ops *ops; + + /* To protect the above members. */ + struct mutex mutex; +}; + +#endif /* _I915_TEE_PXP_INTERFACE_H_ */ From patchwork Sat Nov 21 00:35:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56D78C6379D for ; Sat, 21 Nov 2020 00:36:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0096223A65 for ; Sat, 21 Nov 2020 00:36:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0096223A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 664356E969; Sat, 21 Nov 2020 00:35:49 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E9256E94A for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) IronPort-SDR: xY487R7Hl9vwThJhzOnRY2GkWR8gDqojj+nw/CKpnUXpzORT+M3VJF7GtvVWmmWpu9kCJganSv eHa0nCV/uS+A== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670526" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670526" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: hM4iT7PRtkd6kibf4ZpjlC7ctqITooVjGoXyl63c1Czid7tGsGxg2bjeUuSIpLUY6soXPJKbzl Tt5beihXqifA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352691" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:32 -0800 Message-Id: <20201121003540.24980-19-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 18/26] drm/i915/pxp: Implement ioctl action to send TEE commands X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the ioctl action to allow user space driver sends TEE commands via PXP ioctl, instead of TEE iotcl. So we can centralize those protection operations at PXP. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 14 ++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 18 ++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 55 ++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 5 +++ 4 files changed, 92 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 441e57d6c58f..bf95c63e52ff 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -77,6 +77,20 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf ret = pxp_sm_ioctl_query_pxp_tag(i915, ¶ms->session_is_alive, ¶ms->pxp_tag); break; } + case PXP_ACTION_TEE_IO_MESSAGE: + { + struct pxp_tee_io_message_params *params = &pxp_info.tee_io_message; + + ret = pxp_tee_ioctl_io_message(i915, + params->msg_in, params->msg_in_size, + params->msg_out, ¶ms->msg_out_size, + params->msg_out_buf_size); + if (ret) { + drm_err(&i915->drm, "Failed to send TEE IO message\n"); + ret = -EFAULT; + } + break; + } case PXP_ACTION_SET_USER_CONTEXT: { ret = intel_pxp_set_user_ctx(i915, pxp_info.set_user_ctx); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index a3a0cf1f12e9..f24e6109eae6 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -33,6 +33,7 @@ enum pxp_sm_session_req { enum pxp_ioctl_action { PXP_ACTION_QUERY_PXP_TAG = 0, PXP_ACTION_SET_SESSION_STATUS = 1, + PXP_ACTION_TEE_IO_MESSAGE = 4, PXP_ACTION_SET_USER_CONTEXT = 5, }; @@ -59,12 +60,29 @@ struct pxp_sm_set_session_status_params { u32 req_session_state; }; +/** + * struct pxp_tee_io_message_params - Params to send/receive message to/from TEE. + */ +struct pxp_tee_io_message_params { + /** @msg_in: in - message input from UMD */ + u8 __user *msg_in; + /** @msg_in_size: in - message input size from UMD */ + u32 msg_in_size; + /** @msg_out: in - message output buffer from UMD */ + u8 __user *msg_out; + /** @msg_out_size: out- message output size from TEE */ + u32 msg_out_size; + /** @msg_out_buf_size: in - message output buffer size from UMD */ + u32 msg_out_buf_size; +}; + struct pxp_info { u32 action; u32 sm_status; union { struct pxp_sm_query_pxp_tag query_pxp_tag; struct pxp_sm_set_session_status_params set_session_status; + struct pxp_tee_io_message_params tee_io_message; u32 set_user_ctx; }; } __attribute__((packed)); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c index fa617546bdd4..2a28478b092d 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -54,6 +54,61 @@ static int intel_pxp_tee_io_message(struct drm_i915_private *i915, return ret; } +int pxp_tee_ioctl_io_message(struct drm_i915_private *i915, + void __user *msg_in_user_ptr, u32 msg_in_size, + void __user *msg_out_user_ptr, u32 *msg_out_size_ptr, + u32 msg_out_buf_size) +{ + int ret; + void *msg_in = NULL; + void *msg_out = NULL; + + if (!msg_in_user_ptr || !msg_out_user_ptr || msg_out_buf_size == 0 || + msg_in_size == 0 || !msg_out_size_ptr) + return -EINVAL; + + msg_in = kzalloc(msg_in_size, GFP_KERNEL); + if (!msg_in) + return -ENOMEM; + + msg_out = kzalloc(msg_out_buf_size, GFP_KERNEL); + if (!msg_out) { + ret = -ENOMEM; + goto end; + } + + if (copy_from_user(msg_in, msg_in_user_ptr, msg_in_size) != 0) { + ret = -EFAULT; + drm_err(&i915->drm, "Failed to copy_from_user for TEE message\n"); + goto end; + } + + mutex_lock(&i915->pxp_tee_comp_mutex); + + ret = intel_pxp_tee_io_message(i915, + msg_in, msg_in_size, + msg_out, msg_out_size_ptr, + msg_out_buf_size); + + mutex_unlock(&i915->pxp_tee_comp_mutex); + + if (ret) { + drm_err(&i915->drm, "Failed to send/receive tee message\n"); + goto end; + } + + if (copy_to_user(msg_out_user_ptr, msg_out, *msg_out_size_ptr) != 0) { + ret = -EFAULT; + drm_err(&i915->drm, "Failed to copy_to_user for TEE message\n"); + goto end; + } + +end: + kfree(msg_in); + kfree(msg_out); + return ret; +} + /** * i915_pxp_tee_component_bind - bind funciton to pass the function pointers to pxp_tee * @i915_kdev: pointer to i915 kernel device diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h index 0d0fbd0ed018..8b1581c2f50f 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h @@ -11,4 +11,9 @@ void intel_pxp_tee_component_init(struct drm_i915_private *i915); void intel_pxp_tee_component_fini(struct drm_i915_private *i915); +int pxp_tee_ioctl_io_message(struct drm_i915_private *i915, + void __user *msg_in_user_ptr, u32 msg_in_size, + void __user *msg_out_user_ptr, u32 *msg_out_size_ptr, + u32 msg_out_buf_size); + #endif /* __INTEL_PXP_TEE_H__ */ From patchwork Sat Nov 21 00:35:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96FC5C2D0E4 for ; Sat, 21 Nov 2020 00:35:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24B8823A65 for ; Sat, 21 Nov 2020 00:35:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 24B8823A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EF2C56E955; Sat, 21 Nov 2020 00:35:46 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 299086E950 for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) IronPort-SDR: vVqFh0R/kN3A5dKkkzY7q6a2+pA7KJ+L9m2uJ9flygjisDfpQ0kaz4UMclAnj50NeV7GfpjqMd aKx7ERO1ngSw== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670527" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670527" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: x4KV9bVVZSNuEPQKLVsMNf7SbB7goKxxroGaDvndjYCGOQcRi5k5F5kYbBmEgFLXRMBOrk20NZ hvHCGQ81AKnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352692" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:33 -0800 Message-Id: <20201121003540.24980-20-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 19/26] drm/i915/pxp: Create the arbitrary session after boot X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Create the arbitrary session, with the fixed session id 0xf, after system boot, for the case that application allocates the protected buffer without establishing any protection session. Because the hardware requires at least one alive session for protected buffer creation. This arbitrary session needs to be re-created after teardown or power event because hardware encryption key won't be valid after such cases. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 47 +++++++++++++++++++++++- drivers/gpu/drm/i915/pxp/intel_pxp.h | 2 + drivers/gpu/drm/i915/pxp/intel_pxp_sm.c | 27 ++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_sm.h | 6 +++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 34 +++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_tee.h | 6 +++ 6 files changed, 121 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index bf95c63e52ff..80949f1bbe59 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -125,6 +125,43 @@ void intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile) mutex_unlock(&i915->pxp.ctx->ctx_mutex); } +int intel_pxp_create_arb_session(struct drm_i915_private *i915) +{ + struct pxp_tag pxptag; + int ret; + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + if (i915->pxp.ctx->flag_display_hm_surface_keys) { + drm_err(&i915->drm, "%s: arb session is alive so skipping the creation\n", + __func__); + return 0; + } + + ret = intel_pxp_sm_reserve_arb_session(i915, &pxptag.value); + if (ret) { + drm_err(&i915->drm, "Failed to reserve session\n"); + goto end; + } + + ret = intel_pxp_tee_cmd_create_arb_session(i915); + if (ret) { + drm_err(&i915->drm, "Failed to send tee cmd for arb session creation\n"); + goto end; + } + + ret = pxp_sm_mark_protected_session_in_play(i915, ARB_SESSION_TYPE, pxptag.session_id); + if (ret) { + drm_err(&i915->drm, "Failed to mark session status in play\n"); + goto end; + } + + i915->pxp.ctx->flag_display_hm_surface_keys = true; + +end: + return ret; +} + static void intel_pxp_write_irq_mask_reg(struct drm_i915_private *i915, u32 mask) { /* crypto mask is in bit31-16 (Engine1 Interrupt Mask) */ @@ -169,9 +206,17 @@ static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private mutex_lock(&i915->pxp.ctx->ctx_mutex); - if (i915->pxp.ctx->global_state_attacked) + if (i915->pxp.ctx->global_state_attacked) { i915->pxp.ctx->global_state_attacked = false; + /* Re-create the arb session after teardown handle complete */ + ret = intel_pxp_create_arb_session(i915); + if (ret) { + drm_err(&i915->drm, "Failed to create arb session\n"); + goto end; + } + } +end: mutex_unlock(&i915->pxp.ctx->ctx_mutex); return ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index f24e6109eae6..96664d71cf0c 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -107,6 +107,8 @@ struct drm_i915_private; int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile); void intel_pxp_close(struct drm_i915_private *i915, struct drm_file *drmfile); +int intel_pxp_create_arb_session(struct drm_i915_private *i915); + void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir); int i915_pxp_teardown_required_callback(struct drm_i915_private *i915); int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c index 6ff347b7b72b..31eaec25a85f 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.c @@ -607,6 +607,33 @@ int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file return ret; } +int intel_pxp_sm_reserve_arb_session(struct drm_i915_private *i915, u32 *pxp_tag) +{ + int ret; + + lockdep_assert_held(&i915->pxp.ctx->ctx_mutex); + + if (!pxp_tag || !i915) + return -EINVAL; + + ret = sync_hw_sw_state(i915, ARB_SESSION_INDEX, ARB_SESSION_TYPE); + if (unlikely(ret)) + goto end; + + ret = create_new_session_entry(i915, NULL, 0, ARB_SESSION_TYPE, + ARB_PROTECTION_MODE, ARB_SESSION_INDEX); + if (unlikely(ret)) + goto end; + + ret = pxp_set_pxp_tag(i915, ARB_SESSION_TYPE, ARB_SESSION_INDEX, ARB_PROTECTION_MODE); + +end: + if (ret == 0) + *pxp_tag = intel_pxp_get_pxp_tag(i915, ARB_SESSION_INDEX, ARB_SESSION_TYPE, NULL); + + return ret; +} + /** * pxp_sm_mark_protected_session_in_play - To put an reserved protected session to "in_play" state * @i915: i915 device handle. diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h index 143f024bb0d2..f715e348ded1 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_sm.h @@ -39,6 +39,11 @@ /* CRYPTO_KEY_EXCHANGE */ #define CRYPTO_KEY_EXCHANGE ((0x3 << 29) | (0x01609 << 16)) +/* Arbitrary session */ +#define ARB_SESSION_INDEX 0xf +#define ARB_SESSION_TYPE SESSION_TYPE_TYPE0 +#define ARB_PROTECTION_MODE PROTECTION_MODE_HM + enum pxp_session_types { SESSION_TYPE_TYPE0 = 0, SESSION_TYPE_TYPE1 = 1, @@ -103,6 +108,7 @@ struct pxp_protected_session { int intel_pxp_sm_reserve_session(struct drm_i915_private *i915, struct drm_file *drmfile, int context_id, int session_type, int protection_mode, u32 *pxp_tag); +int intel_pxp_sm_reserve_arb_session(struct drm_i915_private *i915, u32 *pxp_tag); int pxp_sm_mark_protected_session_in_play(struct drm_i915_private *i915, int session_type, u32 session_id); int pxp_sm_terminate_protected_session_safe(struct drm_i915_private *i915, int context_id, diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c index 2a28478b092d..0de259c754e9 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -122,6 +122,7 @@ int pxp_tee_ioctl_io_message(struct drm_i915_private *i915, static int i915_pxp_tee_component_bind(struct device *i915_kdev, struct device *tee_kdev, void *data) { + int ret; struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); if (!i915 || !tee_kdev || !data) @@ -132,6 +133,16 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev, i915->pxp_tee_master->tee_dev = tee_kdev; mutex_unlock(&i915->pxp_tee_comp_mutex); + mutex_lock(&i915->pxp.ctx->ctx_mutex); + /* Create arb session only if tee is ready, during system boot or sleep/resume */ + ret = intel_pxp_create_arb_session(i915); + mutex_unlock(&i915->pxp.ctx->ctx_mutex); + + if (ret) { + drm_err(&i915->drm, "Failed to create arb session ret=[%d]\n", ret); + return ret; + } + return 0; } @@ -180,3 +191,26 @@ void intel_pxp_tee_component_fini(struct drm_i915_private *i915) component_del(i915->drm.dev, &i915_pxp_tee_component_ops); } + +int intel_pxp_tee_cmd_create_arb_session(struct drm_i915_private *i915) +{ + int ret; + u32 msg_out_size_received = 0; + u32 msg_in[PXP_TEE_ARB_CMD_DW_LEN] = PXP_TEE_ARB_CMD_BIN; + u32 msg_out[PXP_TEE_ARB_CMD_DW_LEN] = {0}; + + mutex_lock(&i915->pxp_tee_comp_mutex); + + ret = intel_pxp_tee_io_message(i915, + &msg_in, + sizeof(msg_in), + &msg_out, &msg_out_size_received, + sizeof(msg_out)); + + mutex_unlock(&i915->pxp_tee_comp_mutex); + + if (ret) + drm_err(&i915->drm, "Failed to send/receive tee message\n"); + + return ret; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h index 8b1581c2f50f..6cc9517701ea 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.h @@ -16,4 +16,10 @@ int pxp_tee_ioctl_io_message(struct drm_i915_private *i915, void __user *msg_out_user_ptr, u32 *msg_out_size_ptr, u32 msg_out_buf_size); +int intel_pxp_tee_cmd_create_arb_session(struct drm_i915_private *i915); + +/* TEE command to create the arbitrary session */ +#define PXP_TEE_ARB_CMD_BIN {0x00040000, 0x0000001e, 0x00000000, 0x00000008, 0x00000002, 0x0000000f} +#define PXP_TEE_ARB_CMD_DW_LEN (6) + #endif /* __INTEL_PXP_TEE_H__ */ From patchwork Sat Nov 21 00:35:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1297C63798 for ; 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a="235707201" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="235707201" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: jfFHpah+pykuCyb1e2vpYT+e0CY8Efo6j7T8vVtRRmjurg91KxlHiSMyQhKdGIlymSPf3vPhBW o/v2v2iXnuSg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352693" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:34 -0800 Message-Id: <20201121003540.24980-21-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 20/26] drm/i915/pxp: Add i915 trace logs for PXP operations X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add several i915 trace logs for PXP calls for debugging or performance measurement, including: (1) PXP ioctl (2) PXP teardown callbacks To trun on this feature, we need to set "CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS=y" in .config for compiling the Linux kernel. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_trace.h | 44 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.c | 6 ++++ 2 files changed, 50 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index a4addcc64978..36470e20dc61 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -1031,6 +1031,50 @@ DEFINE_EVENT(i915_context, i915_context_free, TP_ARGS(ctx) ); +TRACE_EVENT(i915_pxp_ops_ioctl, + TP_PROTO(struct drm_device *dev, void *data, struct drm_file *file, u32 action), + TP_ARGS(dev, data, file, action), + + TP_STRUCT__entry( + __field(struct drm_device *, dev) + __field(void *, data) + __field(struct drm_file *, file) + __field(u32, action) + ), + + TP_fast_assign( + __entry->dev = dev; + __entry->data = data; + __entry->file = file; + __entry->action = action; + ), + + TP_printk("dev=%p, data=%p, file=%p, action=%u", + __entry->dev, __entry->data, __entry->file, __entry->action) +); + +TRACE_EVENT(i915_pxp_teardown_required_callback, + TP_PROTO(bool global_state_attacked), + TP_ARGS(global_state_attacked), + + TP_STRUCT__entry(__field(bool, global_state_attacked)), + + TP_fast_assign(__entry->global_state_attacked = global_state_attacked;), + + TP_printk("global_state_attacked=%s", yesno(__entry->global_state_attacked)) +); + +TRACE_EVENT(i915_pxp_global_terminate_complete_callback, + TP_PROTO(bool global_state_attacked), + TP_ARGS(global_state_attacked), + + TP_STRUCT__entry(__field(bool, global_state_attacked)), + + TP_fast_assign(__entry->global_state_attacked = global_state_attacked;), + + TP_printk("global_state_attacked=%s", yesno(__entry->global_state_attacked)) +); + #endif /* _I915_TRACE_H_ */ /* This part must be outside protection */ diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 80949f1bbe59..d5e79beca0d3 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -8,6 +8,7 @@ #include "intel_pxp_context.h" #include "intel_pxp_sm.h" #include "intel_pxp_tee.h" +#include "i915_trace.h" int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmfile) { @@ -22,6 +23,8 @@ int i915_pxp_ops_ioctl(struct drm_device *dev, void *data, struct drm_file *drmf if (copy_from_user(&pxp_info, pxp_ops->info_ptr, sizeof(pxp_info)) != 0) return -EFAULT; + trace_i915_pxp_ops_ioctl(dev, data, drmfile, pxp_info.action); + mutex_lock(&i915->pxp.ctx->ctx_mutex); if (i915->pxp.ctx->global_state_in_suspend) { @@ -197,6 +200,8 @@ static int intel_pxp_teardown_required_callback(struct drm_i915_private *i915) mutex_unlock(&i915->pxp.ctx->ctx_mutex); + trace_i915_pxp_teardown_required_callback(i915->pxp.ctx->global_state_attacked); + return ret; } @@ -219,6 +224,7 @@ static int intel_pxp_global_terminate_complete_callback(struct drm_i915_private end: mutex_unlock(&i915->pxp.ctx->ctx_mutex); + trace_i915_pxp_global_terminate_complete_callback(i915->pxp.ctx->global_state_attacked); return ret; } From patchwork Sat Nov 21 00:35:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB61BC64E69 for ; Sat, 21 Nov 2020 00:36:04 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 51AFC23A65 for ; Sat, 21 Nov 2020 00:36:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 51AFC23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 44E096E967; Sat, 21 Nov 2020 00:35:49 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 32F0F6E951 for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) IronPort-SDR: 0n9k/r47rdm2PsIKJ5XewdKxkT8kXBkXvuM8PwwcjxC1yXlwHXaH5SuzfR7v1xh4uQv1siuiT1 MPIVFwJmtMzQ== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670528" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670528" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: mxNVDi1vEQTXS6LYARaXh+rCgpRaLVZGjLjQp4CX5kUHDnpB3sNQTFifH8xgflDcQQ1vqEeRQ9 zsXAOUDIZdSQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352694" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:35 -0800 Message-Id: <20201121003540.24980-22-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 21/26] drm/i915/pxp: Expose session state for display protection flip X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement the intel_pxp_gem_object_status() to allow i915 display querying the current PXP session state. In the design, display should not perform protection flip on the protected buffers if there is no PXP session alive. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/pxp/intel_pxp.c | 8 ++++++++ drivers/gpu/drm/i915/pxp/intel_pxp.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index d5e79beca0d3..45db4fb50507 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -312,3 +312,11 @@ void intel_pxp_irq_handler(struct intel_gt *gt, u16 iir) end: return; } + +bool intel_pxp_gem_object_status(struct drm_i915_private *i915) +{ + if (i915->pxp.ctx && i915->pxp.ctx->flag_display_hm_surface_keys) + return true; + else + return false; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 96664d71cf0c..6cbe7164ac7a 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -116,4 +116,6 @@ int i915_pxp_global_terminate_complete_callback(struct drm_i915_private *i915); int intel_pxp_init(struct drm_i915_private *i915); void intel_pxp_uninit(struct drm_i915_private *i915); +bool intel_pxp_gem_object_status(struct drm_i915_private *i915); + #endif From patchwork Sat Nov 21 00:35:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C855C6379F for ; Sat, 21 Nov 2020 00:36:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F74F23A65 for ; Sat, 21 Nov 2020 00:36:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F74F23A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 34C256E965; Sat, 21 Nov 2020 00:35:49 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 906186E943 for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) IronPort-SDR: rQuEUmcyxwSU8KJKtLmdppSX/yyyLyYuyWWhXBhk2FCD4QUskuVCwMIm9vqh7SKhDqOp0P+yZn YkJHkrmG3nqA== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670530" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670530" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: eMPYArfRUeFV62tr0jAkJhKF4IXETszysM1+wdLOID1ejprsugg1g1iJ04mBAPdySa0ybOzrEr eU6r6DKPxqWA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352699" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:36 -0800 Message-Id: <20201121003540.24980-23-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC-v2 22/26] mei: pxp: export pavp client to me client bus X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vitaly Lubart Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Vitaly Lubart Export PAVP client to work with i915_cp driver, for binding it uses kernel component framework. Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler --- drivers/misc/mei/Kconfig | 2 + drivers/misc/mei/Makefile | 1 + drivers/misc/mei/pxp/Kconfig | 13 ++ drivers/misc/mei/pxp/Makefile | 7 + drivers/misc/mei/pxp/mei_pxp.c | 230 +++++++++++++++++++++++++++++++++ drivers/misc/mei/pxp/mei_pxp.h | 18 +++ 6 files changed, 271 insertions(+) create mode 100644 drivers/misc/mei/pxp/Kconfig create mode 100644 drivers/misc/mei/pxp/Makefile create mode 100644 drivers/misc/mei/pxp/mei_pxp.c create mode 100644 drivers/misc/mei/pxp/mei_pxp.h diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig index c06581ffa7bd..36884b0a6395 100644 --- a/drivers/misc/mei/Kconfig +++ b/drivers/misc/mei/Kconfig @@ -57,3 +57,5 @@ config INTEL_MEI_VIRTIO device over virtio. source "drivers/misc/mei/hdcp/Kconfig" +source "drivers/misc/mei/pxp/Kconfig" + diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile index 52aefaab5c1b..cab19c96ba7a 100644 --- a/drivers/misc/mei/Makefile +++ b/drivers/misc/mei/Makefile @@ -29,3 +29,4 @@ mei-$(CONFIG_EVENT_TRACING) += mei-trace.o CFLAGS_mei-trace.o = -I$(src) obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/ +obj-$(CONFIG_INTEL_MEI_PXP) += pxp/ diff --git a/drivers/misc/mei/pxp/Kconfig b/drivers/misc/mei/pxp/Kconfig new file mode 100644 index 000000000000..4029b96afc04 --- /dev/null +++ b/drivers/misc/mei/pxp/Kconfig @@ -0,0 +1,13 @@ + +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +config INTEL_MEI_PXP + tristate "Intel PXP services of ME Interface" + select INTEL_MEI_ME + depends on DRM_I915 + help + MEI Support for PXP Services on Intel platforms. + + Enables the ME FW services required for PXP support through + I915 display driver of Intel. diff --git a/drivers/misc/mei/pxp/Makefile b/drivers/misc/mei/pxp/Makefile new file mode 100644 index 000000000000..0329950d5794 --- /dev/null +++ b/drivers/misc/mei/pxp/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +# Makefile - PXP client driver for Intel MEI Bus Driver. + +obj-$(CONFIG_INTEL_MEI_PXP) += mei_pxp.o diff --git a/drivers/misc/mei/pxp/mei_pxp.c b/drivers/misc/mei/pxp/mei_pxp.c new file mode 100644 index 000000000000..5bd61fe445e3 --- /dev/null +++ b/drivers/misc/mei/pxp/mei_pxp.c @@ -0,0 +1,230 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright © 2020 Intel Corporation + */ + +/** + * DOC: MEI_PXP Client Driver + * + * The mei_pxp driver acts as a translation layer between PXP + * protocol implementer (I915) and ME FW by translating PXP + * negotiation messages to ME FW command payloads and vice versa. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mei_pxp.h" + +/** + * mei_pxp_send_message() - Sends a PXP message to ME FW. + * @dev: device corresponding to the mei_cl_device + * @message: a message buffer to send + * @size: size of the message + * Return: 0 on Success, <0 on Failure + */ +static int +mei_pxp_send_message(struct device *dev, const void *message, size_t size) +{ + struct mei_cl_device *cldev; + ssize_t byte; + + if (!dev || !message) + return -EINVAL; + + cldev = to_mei_cl_device(dev); + + /* temporary drop const qualifier till the API is fixed */ + byte = mei_cldev_send(cldev, (u8 *)message, size); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte); + return byte; + } + + return 0; +} + +/** + * mei_pxp_receive_message() - Receives a PXP message from ME FW. + * @dev: device corresponding to the mei_cl_device + * @buffer: a message buffer to contain the received message + * @size: size of the buffer + * Return: bytes sent on Success, <0 on Failure + */ +static int +mei_pxp_receive_message(struct device *dev, void *buffer, size_t size) +{ + struct mei_cl_device *cldev; + ssize_t byte; + + if (!dev || !buffer) + return -EINVAL; + + cldev = to_mei_cl_device(dev); + + byte = mei_cldev_recv(cldev, buffer, size); + if (byte < 0) { + dev_dbg(dev, "mei_cldev_recv failed. %zd\n", byte); + return byte; + } + + return byte; +} + +static const struct i915_pxp_component_ops mei_pxp_ops = { + .owner = THIS_MODULE, + .send = mei_pxp_send_message, + .receive = mei_pxp_receive_message, +}; + +static int mei_component_master_bind(struct device *dev) +{ + struct mei_cl_device *cldev = to_mei_cl_device(dev); + struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev); + int ret; + + dev_dbg(dev, "%s\n", __func__); + comp_master->ops = &mei_pxp_ops; + comp_master->tee_dev = dev; + ret = component_bind_all(dev, comp_master); + if (ret < 0) + return ret; + + return 0; +} + +static void mei_component_master_unbind(struct device *dev) +{ + struct mei_cl_device *cldev = to_mei_cl_device(dev); + struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev); + + dev_dbg(dev, "%s\n", __func__); + component_unbind_all(dev, comp_master); +} + +static const struct component_master_ops mei_component_master_ops = { + .bind = mei_component_master_bind, + .unbind = mei_component_master_unbind, +}; + +/** + * mei_pxp_component_match - compare function for matching mei pxp. + * + * The function checks if the driver is i915, the subcomponent is PXP + * and the grand parent of pxp and the parent of i915 are the same + * PCH device. + * + * @dev: master device + * @subcomponent: subcomponent to match (I915_COMPONENT_PXP) + * @data: compare data (mei pxp device) + * + * Return: + * * 1 - if components match + * * 0 - otherwise + */ +static int mei_pxp_component_match(struct device *dev, int subcomponent, + void *data) +{ + struct device *base = data; + + if (subcomponent != I915_COMPONENT_PXP) + return 0; + + if (strcmp(dev->driver->name, "i915") == 0) { + base = base->parent; + if (!base) + return 0; + + base = base->parent; + dev = dev->parent; + return (base && dev && dev == base); + } + + return 0; +} + +static int mei_pxp_probe(struct mei_cl_device *cldev, + const struct mei_cl_device_id *id) +{ + struct i915_pxp_comp_master *comp_master; + struct component_match *master_match; + int ret; + + ret = mei_cldev_enable(cldev); + if (ret < 0) { + dev_err(&cldev->dev, "mei_cldev_enable Failed. %d\n", ret); + goto enable_err_exit; + } + + comp_master = kzalloc(sizeof(*comp_master), GFP_KERNEL); + if (!comp_master) { + ret = -ENOMEM; + goto err_exit; + } + + master_match = NULL; + component_match_add_typed(&cldev->dev, &master_match, + mei_pxp_component_match, &cldev->dev); + if (IS_ERR_OR_NULL(master_match)) { + ret = -ENOMEM; + goto err_exit; + } + + mei_cldev_set_drvdata(cldev, comp_master); + ret = component_master_add_with_match(&cldev->dev, + &mei_component_master_ops, + master_match); + if (ret < 0) { + dev_err(&cldev->dev, "Master comp add failed %d\n", ret); + goto err_exit; + } + + return 0; + +err_exit: + mei_cldev_set_drvdata(cldev, NULL); + kfree(comp_master); + mei_cldev_disable(cldev); +enable_err_exit: + return ret; +} + +static int mei_pxp_remove(struct mei_cl_device *cldev) +{ + struct i915_pxp_comp_master *comp_master = mei_cldev_get_drvdata(cldev); + + component_master_del(&cldev->dev, &mei_component_master_ops); + kfree(comp_master); + mei_cldev_set_drvdata(cldev, NULL); + + return mei_cldev_disable(cldev); +} + +/* fbf6fcf1-96cf-4e2e-a6a6-1bab8cbe36b1 : PAVP GUID*/ +#define MEI_GUID_PXP GUID_INIT(0xfbf6fcf1, 0x96cf, 0x4e2e, 0xA6, \ + 0xa6, 0x1b, 0xab, 0x8c, 0xbe, 0x36, 0xb1) + +static struct mei_cl_device_id mei_pxp_tbl[] = { + { .uuid = MEI_GUID_PXP, .version = MEI_CL_VERSION_ANY }, + { } +}; +MODULE_DEVICE_TABLE(mei, mei_pxp_tbl); + +static struct mei_cl_driver mei_pxp_driver = { + .id_table = mei_pxp_tbl, + .name = KBUILD_MODNAME, + .probe = mei_pxp_probe, + .remove = mei_pxp_remove, +}; + +module_mei_cl_driver(mei_pxp_driver); + +MODULE_AUTHOR("Intel Corporation"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MEI PXP"); diff --git a/drivers/misc/mei/pxp/mei_pxp.h b/drivers/misc/mei/pxp/mei_pxp.h new file mode 100644 index 000000000000..e7b15373fefd --- /dev/null +++ b/drivers/misc/mei/pxp/mei_pxp.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright © 2020 Intel Corporation + * + * Authors: + * Vitaly Lubart + */ + +#ifndef __MEI_PXP_H__ +#define __MEI_PXP_H__ + +/* me_pxp_status: Enumeration of all PXP Status Codes */ +enum me_pxp_status { + ME_PXP_STATUS_SUCCESS = 0x0000, + +}; + +#endif /* __MEI_PXP_H__ */ From patchwork Sat Nov 21 00:35:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76404C64E7A for ; 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a="189670531" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670531" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: qrAqVh9U4mzIEpFcSaq7JQIplLx4BqBwVY1w/woKMOPaBPvLi80UTgQvr6Z0gKBDJguRo3iPZH kicWzkVckFJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352702" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:37 -0800 Message-Id: <20201121003540.24980-24-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 23/26] drm/i915/uapi: introduce drm_i915_gem_create_ext X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Joonas@freedesktop.org, Bommu Krishnaiah , Matthew@freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Bommu Krishnaiah Same old gem_create but with now with extensions support. This is needed to support various upcoming usecases. For now we use the extensions mechanism to support PAVP. Signed-off-by: Bommu Krishnaiah Signed-off-by: Matthew Auld Cc: Joonas Lahtinen joonas.lahtinen@linux.intel.com Cc: Matthew Auld matthew.auld@intel.com Cc: Telukuntla Sreedhar --- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_gem.c | 42 ++++++++++++++++++++++++++++- include/uapi/drm/i915_drm.h | 47 +++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 453bb5222e99..e513fa359fe2 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1742,7 +1742,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = { DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(I915_GEM_CREATE_EXT, i915_gem_create_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_RENDER_ALLOW), diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 58276694c848..41698a823737 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -53,6 +53,7 @@ #include "i915_drv.h" #include "i915_trace.h" #include "i915_vgpu.h" +#include "i915_user_extensions.h" #include "intel_pm.h" @@ -260,6 +261,35 @@ i915_gem_dumb_create(struct drm_file *file, &args->size, &args->handle); } +struct create_ext { + struct drm_i915_private *i915; +}; + +static int __create_setparam(struct drm_i915_gem_object_param *args, + struct create_ext *ext_data) +{ + if (!(args->param & I915_OBJECT_PARAM)) { + DRM_DEBUG("Missing I915_OBJECT_PARAM namespace\n"); + return -EINVAL; + } + + return -EINVAL; +} + +static int create_setparam(struct i915_user_extension __user *base, void *data) +{ + struct drm_i915_gem_create_ext_setparam ext; + + if (copy_from_user(&ext, base, sizeof(ext))) + return -EFAULT; + + return __create_setparam(&ext.param, data); +} + +static const i915_user_extension_fn create_extensions[] = { + [I915_GEM_CREATE_EXT_SETPARAM] = create_setparam, +}; + /** * Creates a new mm object and returns a handle to it. * @dev: drm device pointer @@ -271,10 +301,20 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { struct drm_i915_private *i915 = to_i915(dev); - struct drm_i915_gem_create *args = data; + struct create_ext ext_data = { .i915 = i915 }; + struct drm_i915_gem_create_ext *args = data; + int ret; i915_gem_flush_free_objects(i915); + ret = i915_user_extensions(u64_to_user_ptr(args->extensions), + create_extensions, + ARRAY_SIZE(create_extensions), + &ext_data); + if (ret) + return ret; + + return i915_gem_create(file, intel_memory_region_by_type(i915, INTEL_MEMORY_SYSTEM), diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index fa1f3d62f9a6..2c1ce2761d55 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -391,6 +391,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT) #define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT) #define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create) +#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create_ext) #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread) #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite) #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap) @@ -728,6 +729,27 @@ struct drm_i915_gem_create { __u32 pad; }; +struct drm_i915_gem_create_ext { + /** + * Requested size for the object. + * + * The (page-aligned) allocated size for the object will be returned. + */ + __u64 size; + /** + * Returned handle for the object. + * + * Object handles are nonzero. + */ + __u32 handle; + __u32 pad; +#define I915_GEM_CREATE_EXT_SETPARAM (1u << 0) +#define I915_GEM_CREATE_EXT_FLAGS_UNKNOWN \ + (-(I915_GEM_CREATE_EXT_SETPARAM << 1)) + __u64 extensions; + +}; + struct drm_i915_gem_pread { /** Handle for the object being read. */ __u32 handle; @@ -1698,6 +1720,31 @@ struct drm_i915_gem_context_param { __u64 value; }; +struct drm_i915_gem_object_param { + /* Object handle (0 for I915_GEM_CREATE_EXT_SETPARAM) */ + __u32 handle; + + /* Data pointer size */ + __u32 size; + +/* + * I915_OBJECT_PARAM: + * + * Select object namespace for the param. + */ +#define I915_OBJECT_PARAM (1ull<<32) + + __u64 param; + + /* Data value or pointer */ + __u64 data; +}; + +struct drm_i915_gem_create_ext_setparam { + struct i915_user_extension base; + struct drm_i915_gem_object_param param; +}; + /** * Context SSEU programming * From patchwork Sat Nov 21 00:35:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5773BC56202 for ; Sat, 21 Nov 2020 00:35:58 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F259723A65 for ; Sat, 21 Nov 2020 00:35:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F259723A65 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 169AC6E959; Sat, 21 Nov 2020 00:35:47 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id A9EA26E94A for ; Sat, 21 Nov 2020 00:35:43 +0000 (UTC) IronPort-SDR: iu1jAbqA/h9bBOt00PFRkjjCLa5la20xkX03IgP7mOQseNnX/QSXfnCmIm7SsRMKspskQxlefz /gSnZ01M6T5A== X-IronPort-AV: E=McAfee;i="6000,8403,9811"; a="189670532" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670532" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: Ys8O88skwc/dr/HDYFL/oAfERRj+E6e7f01cFkIoc6VwKEihxT1L6cVNTcDyy5vx4sNsaFVT5c MGlVTPW+GiBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352705" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:38 -0800 Message-Id: <20201121003540.24980-25-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 24/26] drm/i915/pxp: User interface for Protected buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bommu Krishnaiah , Huang Sean Z , Kondapally Kalyan MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Bommu Krishnaiah This api allow user mode to create Protected buffer and context creation. Signed-off-by: Bommu Krishnaiah Cc: Telukuntla Sreedhar Cc: Kondapally Kalyan Cc: Gupta Anshuman Cc: Huang Sean Z --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 ++++++++++-- drivers/gpu/drm/i915/gem/i915_gem_context.h | 10 ++++++++ .../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +- .../gpu/drm/i915/gem/i915_gem_object_types.h | 5 ++++ drivers/gpu/drm/i915/i915_gem.c | 23 +++++++++++++++---- include/uapi/drm/i915_drm.h | 19 +++++++++++++++ 6 files changed, 67 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index a6299da64de4..dd5d24a13cb9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -2060,12 +2060,23 @@ static int ctx_setparam(struct drm_i915_file_private *fpriv, case I915_CONTEXT_PARAM_RECOVERABLE: if (args->size) ret = -EINVAL; - else if (args->value) - i915_gem_context_set_recoverable(ctx); + else if (args->value) { + if (!i915_gem_context_is_protected(ctx)) + i915_gem_context_set_recoverable(ctx); + else + ret = -EPERM; + } else i915_gem_context_clear_recoverable(ctx); break; + case I915_CONTEXT_PARAM_PROTECTED_CONTENT: + if (args->size) + ret = -EINVAL; + else if (args->value) + i915_gem_context_set_protected(ctx); + break; + case I915_CONTEXT_PARAM_PRIORITY: ret = set_priority(ctx, args); break; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h index a133f92bbedb..5897e7ca11a8 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h @@ -70,6 +70,16 @@ static inline void i915_gem_context_set_recoverable(struct i915_gem_context *ctx set_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags); } +static inline void i915_gem_context_set_protected(struct i915_gem_context *ctx) +{ + set_bit(UCONTEXT_PROTECTED, &ctx->user_flags); +} + +static inline bool i915_gem_context_is_protected(struct i915_gem_context *ctx) +{ + return test_bit(UCONTEXT_PROTECTED, &ctx->user_flags); +} + static inline void i915_gem_context_clear_recoverable(struct i915_gem_context *ctx) { clear_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h index ae14ca24a11f..81ae94c2be86 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h @@ -135,7 +135,7 @@ struct i915_gem_context { #define UCONTEXT_BANNABLE 2 #define UCONTEXT_RECOVERABLE 3 #define UCONTEXT_PERSISTENCE 4 - +#define UCONTEXT_PROTECTED 5 /** * @flags: small set of booleans */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index e2d9b7e1e152..90ac955463f4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -161,6 +161,11 @@ struct drm_i915_gem_object { } mmo; I915_SELFTEST_DECLARE(struct list_head st_link); + /** + * @user_flags: small set of booleans set by the user + */ + unsigned long user_flags; +#define I915_BO_PROTECTED BIT(0) unsigned long flags; #define I915_BO_ALLOC_CONTIGUOUS BIT(0) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 41698a823737..6a791fd24eaa 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -184,7 +184,8 @@ static int i915_gem_create(struct drm_file *file, struct intel_memory_region *mr, u64 *size_p, - u32 *handle_p) + u32 *handle_p, + u64 user_flags) { struct drm_i915_gem_object *obj; u32 handle; @@ -204,6 +205,8 @@ i915_gem_create(struct drm_file *file, if (IS_ERR(obj)) return PTR_ERR(obj); + obj->user_flags = user_flags; + ret = drm_gem_handle_create(file, &obj->base, &handle); /* drop reference from allocate - handle holds it now */ i915_gem_object_put(obj); @@ -258,11 +261,12 @@ i915_gem_dumb_create(struct drm_file *file, return i915_gem_create(file, intel_memory_region_by_type(to_i915(dev), mem_type), - &args->size, &args->handle); + &args->size, &args->handle, 0); } struct create_ext { - struct drm_i915_private *i915; + struct drm_i915_private *i915; + unsigned long user_flags; }; static int __create_setparam(struct drm_i915_gem_object_param *args, @@ -273,6 +277,17 @@ static int __create_setparam(struct drm_i915_gem_object_param *args, return -EINVAL; } + switch (lower_32_bits(args->param)) { + case I915_PARAM_PROTECTED_CONTENT: + if (args->size) { + return -EINVAL; + } else if (args->data) { + ext_data->user_flags = args->data; + return 0; + } + break; + } + return -EINVAL; } @@ -318,7 +333,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data, return i915_gem_create(file, intel_memory_region_by_type(i915, INTEL_MEMORY_SYSTEM), - &args->size, &args->handle); + &args->size, &args->handle, ext_data.user_flags); } static int diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 2c1ce2761d55..fab00bfbbdee 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1715,6 +1715,15 @@ struct drm_i915_gem_context_param { * Default is 16 KiB. */ #define I915_CONTEXT_PARAM_RINGSIZE 0xc + +/* + * I915_CONTEXT_PARAM_PROTECTED_CONTENT: + * + * If set to true (1) PAVP content protection is enabled. + * When enabled, the context is marked unrecoverable and may + * become invalid due to PAVP teardown event or other error. + */ +#define I915_CONTEXT_PARAM_PROTECTED_CONTENT 0xd /* Must be kept compact -- no holes and well documented */ __u64 value; @@ -1734,6 +1743,16 @@ struct drm_i915_gem_object_param { */ #define I915_OBJECT_PARAM (1ull<<32) +/* + * I915_PARAM_PROTECTED_CONTENT: + * + * If set to true (1) buffer contents is expected to be protected by + * PAVP encryption and requires decryption for scan out and processing. + * Protected buffers can only be used in PAVP protected contexts. + * A protected buffer may become invalid as a result of PAVP teardown. + */ +#define I915_PARAM_PROTECTED_CONTENT 0x1 + __u64 param; /* Data value or pointer */ From patchwork Sat Nov 21 00:35:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11923019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9353C56202 for ; Sat, 21 Nov 2020 00:36:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8440C23A65 for ; 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20 Nov 2020 16:35:41 -0800 IronPort-SDR: ZA4TPv54y4/iwfyiXqZkkRMI3u1nxA6e2eSxtFo33OeAbRgXxd/5mxhfAH8Wf+xaWF4/ZStubR WZ+U9en/YqVg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352707" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:39 -0800 Message-Id: <20201121003540.24980-26-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 25/26] drm/i915/pxp: Add plane decryption support X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bommu Krishnaiah MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Anshuman Gupta Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PAVP session is enabled. 2. Buffer object is protected. v2: - Rebased to libva_cp-drm-tip_tgl_cp tree. - Used gen fb obj user_flags instead gem_object_metadata. [Krishna] Cc: Bommu Krishnaiah Cc: Huang, Sean Z Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_sprite.c | 21 ++++++++++++++++++--- drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index 019a2d6d807a..158c8dea0930 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -39,6 +39,8 @@ #include #include +#include "pxp/intel_pxp.h" + #include "i915_drv.h" #include "i915_trace.h" #include "i915_vgpu.h" @@ -752,6 +754,11 @@ icl_program_input_csc(struct intel_plane *plane, PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0); } +static bool intel_fb_obj_protected(const struct drm_i915_gem_object *obj) +{ + return obj->user_flags & I915_BO_PROTECTED ? true : false; +} + static void skl_plane_async_flip(struct intel_plane *plane, const struct intel_crtc_state *crtc_state, @@ -788,6 +795,7 @@ skl_program_plane(struct intel_plane *plane, u32 surf_addr = plane_state->color_plane[color_plane].offset; u32 stride = skl_plane_stride(plane_state, color_plane); const struct drm_framebuffer *fb = plane_state->hw.fb; + const struct drm_i915_gem_object *obj = intel_fb_obj(fb); int aux_plane = intel_main_to_aux_plane(fb, color_plane); int crtc_x = plane_state->uapi.dst.x1; int crtc_y = plane_state->uapi.dst.y1; @@ -798,7 +806,7 @@ skl_program_plane(struct intel_plane *plane, u8 alpha = plane_state->hw.alpha >> 8; u32 plane_color_ctl = 0, aux_dist = 0; unsigned long irqflags; - u32 keymsk, keymax; + u32 keymsk, keymax, plane_surf; u32 plane_ctl = plane_state->ctl; plane_ctl |= skl_plane_ctl_crtc(crtc_state); @@ -874,8 +882,15 @@ skl_program_plane(struct intel_plane *plane, * the control register just before the surface register. */ intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl); - intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), - intel_plane_ggtt_offset(plane_state) + surf_addr); + plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr; + + if (intel_pxp_gem_object_status(dev_priv) && + intel_fb_obj_protected(obj)) + plane_surf |= PLANE_SURF_DECRYPTION_ENABLED; + else + plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED; + + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf); if (plane_state->scaler_id >= 0) skl_program_scaler(plane, crtc_state, plane_state); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 69758935abb8..63d370c38ecd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7208,6 +7208,7 @@ enum { #define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B) #define PLANE_SURF(pipe, plane) \ _MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe)) +#define PLANE_SURF_DECRYPTION_ENABLED REG_BIT(2) #define _PLANE_OFFSET_1_B 0x711a4 #define _PLANE_OFFSET_2_B 0x712a4 From patchwork Sat Nov 21 00:35:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Sean Z" X-Patchwork-Id: 11922995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FAD1C63798 for ; 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a="189670529" X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="189670529" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Nov 2020 16:35:41 -0800 IronPort-SDR: JWw41SrVl2mOpq2GcQ7B4JIYzg+HXz9f5NEu39YVVfmHCJTc+X3pc21mtdglgWNfgfk3C5ZAmg +pYO3BMbPT1A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.78,357,1599548400"; d="scan'208";a="369352703" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by FMSMGA003.fm.intel.com with ESMTP; 20 Nov 2020 16:35:40 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Fri, 20 Nov 2020 16:35:40 -0800 Message-Id: <20201121003540.24980-27-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201121003540.24980-1-sean.z.huang@intel.com> References: <20201121003540.24980-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v2 26/26] drm/i915/pxp: Enable the PXP ioctl for protected session X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In the previous commits, we have implemented the PXP ioctl functions. Now we enable those handlers and expose them as PXP ioctl, so allow the user space driver can establish, set, or destory the protected session via this ioctl. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/pxp/intel_pxp.h | 48 ------------------ include/uapi/drm/i915_drm.h | 75 ++++++++++++++++++++++++++++ 3 files changed, 76 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e513fa359fe2..a2b5b6f2723f 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1772,6 +1772,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = { DRM_IOCTL_DEF_DRV(I915_QUERY, i915_query_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_VM_CREATE, i915_gem_vm_create_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_VM_DESTROY, i915_gem_vm_destroy_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(I915_PXP_OPS, i915_pxp_ops_ioctl, DRM_RENDER_ALLOW), }; static const struct drm_driver driver = { diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 6cbe7164ac7a..06608617c318 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -44,54 +44,6 @@ enum pxp_sm_status { PXP_SM_STATUS_ERROR_UNKNOWN }; -struct pxp_sm_query_pxp_tag { - u32 session_is_alive; - u32 pxp_tag; /* in - Session ID, out pxp tag */ -}; - -struct pxp_sm_set_session_status_params { - /** @pxp_tag: in [optional], for Arbitrator session, out pxp tag */ - u32 pxp_tag; - /** @session_type: in, session type */ - u32 session_type; - /** @session_mode: in, session mode */ - u32 session_mode; - /** @req_session_state: in, new session state */ - u32 req_session_state; -}; - -/** - * struct pxp_tee_io_message_params - Params to send/receive message to/from TEE. - */ -struct pxp_tee_io_message_params { - /** @msg_in: in - message input from UMD */ - u8 __user *msg_in; - /** @msg_in_size: in - message input size from UMD */ - u32 msg_in_size; - /** @msg_out: in - message output buffer from UMD */ - u8 __user *msg_out; - /** @msg_out_size: out- message output size from TEE */ - u32 msg_out_size; - /** @msg_out_buf_size: in - message output buffer size from UMD */ - u32 msg_out_buf_size; -}; - -struct pxp_info { - u32 action; - u32 sm_status; - union { - struct pxp_sm_query_pxp_tag query_pxp_tag; - struct pxp_sm_set_session_status_params set_session_status; - struct pxp_tee_io_message_params tee_io_message; - u32 set_user_ctx; - }; -} __attribute__((packed)); - -struct drm_i915_pxp_ops { - struct pxp_info __user *info_ptr; - __u32 info_size; -}; - struct pxp_context; struct intel_pxp { diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index fab00bfbbdee..83044309708d 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -359,6 +359,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_QUERY 0x39 #define DRM_I915_GEM_VM_CREATE 0x3a #define DRM_I915_GEM_VM_DESTROY 0x3b +#define DRM_I915_PXP_OPS 0x3c /* Must be kept compact -- no holes */ #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) @@ -423,6 +424,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query) #define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control) #define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control) +#define DRM_IOCTL_I915_PXP_OPS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_PXP_OPS, struct drm_i915_pxp_ops) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -1964,6 +1966,79 @@ struct drm_i915_gem_vm_control { __u32 vm_id; }; +/* + * struct pxp_sm_query_pxp_tag - Params to query the PXP tag of specified + * session id and whether the session is alive from PXP state machine. + */ +struct pxp_sm_query_pxp_tag { + u32 session_is_alive; + u32 pxp_tag; /* in - Session ID, out pxp tag */ +}; + +/* + * struct pxp_sm_set_session_status_params - Params to reserved, set or destroy + * the session from the PXP state machine. + */ +struct pxp_sm_set_session_status_params { + u32 pxp_tag; /* in [optional], for Arbitrator session, out pxp tag */ + u32 session_type; /* in, session type */ + u32 session_mode; /* in, session mode */ + u32 req_session_state; /* in, new session state */ +}; + +/* + * struct pxp_tee_io_message_params - Params to send/receive message to/from TEE. + */ +struct pxp_tee_io_message_params { + u8 __user *msg_in; /* in - message input */ + u32 msg_in_size; /* in - message input size */ + u8 __user *msg_out; /* in - message output buffer */ + u32 msg_out_size; /* out- message output size from TEE */ + u32 msg_out_buf_size; /* in - message output buffer size */ +}; + +/* + * struct pxp_info - Params for PXP operation. + */ +struct pxp_info { + u32 action; /* in - specified action of this operation */ + + u32 sm_status; /* out - status output for this operation */ + + union { + /* in - action params to query PXP tag */ + struct pxp_sm_query_pxp_tag query_pxp_tag; + + /* in - action params to set the PXP session state */ + struct pxp_sm_set_session_status_params set_session_status; + + /* in - action params to send TEE commands */ + struct pxp_tee_io_message_params tee_io_message; + + /* in - action params to set user space context */ + u32 set_user_ctx; + }; +} __attribute__((packed)); + +/* + * DRM_I915_PXP_OPS - + * + * PXP is an i915 componment, that helps user space to establish the hardware + * protected session and manage the status of each alive software session, + * as well as the life cycle of each session. + * + * This ioctl is to allow user space driver to create, set, and destroy each + * session. It also provides the communication chanel to TEE (Trusted + * Execution Environment) for the protected hardware session creation. + */ +struct drm_i915_pxp_ops { + /* in - user space pointer to struct pxp_info */ + struct pxp_info __user *info_ptr; + + /* in - memory size that info_ptr points to */ + __u32 info_size; +}; + struct drm_i915_reg_read { /* * Register offset.