From patchwork Fri Nov 27 13:26:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 11936337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,INCLUDES_PULL_REQUEST, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9FA9C63798 for ; Fri, 27 Nov 2020 13:26:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9CEC42087C for ; Fri, 27 Nov 2020 13:26:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9CEC42087C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 218F96ED9E; Fri, 27 Nov 2020 13:26:38 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 67B7A6ED90; Fri, 27 Nov 2020 13:26:36 +0000 (UTC) IronPort-SDR: zK/k+M6QmHNft7dVSP3Mcug1Y2LO/+cBbcHYa/uI5gEW+0vdTvSTD65gGOkeR3kgqTNXRvdGwW l5hld1nekWwA== X-IronPort-AV: E=McAfee;i="6000,8403,9817"; a="236522410" X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="236522410" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 05:26:30 -0800 IronPort-SDR: oomOqYMs7ojHOBth0JwMbIbD57NVG+10l0zEk7QI/qNAEhOOzpU3XwdCY+zdfRyORIuGYxq4GM NJycZhf18o4w== X-IronPort-AV: E=Sophos;i="5.78,374,1599548400"; d="scan'208";a="479680245" Received: from acoxx-mobl2.ger.corp.intel.com (HELO localhost) ([10.251.84.211]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2020 05:26:26 -0800 From: Jani Nikula To: Dave Airlie , Daniel Vetter , Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Date: Fri, 27 Nov 2020 15:26:23 +0200 Message-ID: <87czzzkk1s.fsf@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PULL] drm-intel-next-queued X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: , dim-tools@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Maxime Ripard , intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi Dave & Daniel - Last feature pull for v5.11. drm-intel-next-queued-2020-11-27: drm/i915 features for v5.11: Highlights: - Enable big joiner to join two pipes to one port to overcome pipe restrictions (Manasi, Ville, Maarten) Display: - More DG1 enabling (Lucas, Aditya) - Fixes to cases without display (Lucas, José, Jani) - Initial PSR state improvements (José) - JSL eDP vswing updates (Tejas) - Handle EDID declared max 16 bpc (Ville) - Display refactoring (Ville) Other: - GVT features - Backmerge BR, Jani. The following changes since commit e047c7be173caab95f3876ab30c03ebcf654c300: Merge tag 'drm-intel-next-queued-2020-11-03' of git://anongit.freedesktop.org/drm/drm-intel into drm-next (2020-11-04 12:17:34 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-queued-2020-11-27 for you to fetch changes up to b3bf99daaee96a141536ce5c60a0d6dba6ec1d23: drm/i915/display: Defer initial modeset until after GGTT is initialised (2020-11-26 11:01:52 +0000) ---------------------------------------------------------------- drm/i915 features for v5.11: Highlights: - Enable big joiner to join two pipes to one port to overcome pipe restrictions (Manasi, Ville, Maarten) Display: - More DG1 enabling (Lucas, Aditya) - Fixes to cases without display (Lucas, José, Jani) - Initial PSR state improvements (José) - JSL eDP vswing updates (Tejas) - Handle EDID declared max 16 bpc (Ville) - Display refactoring (Ville) Other: - GVT features - Backmerge ---------------------------------------------------------------- Aditya Swarup (1): drm/i915/dg1: Enable ports Anusha Srivatsa (1): drm/i915/ehl: Remove invalid PCI ID Bob Paauwe (1): drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platforms Chris Wilson (2): drm/i915/display: Whitespace cleanups drm/i915/display: Defer initial modeset until after GGTT is initialised Colin Xu (3): drm/i915/gvt: Save/restore HW status to support GVT suspend/resume drm/i915: Add GVT resume routine to i915 drm/i915/gvt: Fix virtual display setup for BXT/APL Deepak R Varma (1): drm/i915/gvt: replace idr_init() by idr_init_base() Imre Deak (1): drm/i915/tgl: Fix typo during output setup Jani Nikula (3): Merge drm/drm-next into drm-intel-next-queued drm/i915/display: return earlier from intel_modeset_init() without display Merge tag 'gvt-next-2020-11-23' of https://github.com/intel/gvt-linux into drm-intel-next-queued José Roberto de Souza (4): drm/i915/display: Use initial_fastset_check() to compute and apply the initial PSR state drm/i915/display: Do not reset display when there is none drm/i915/display: Group DC9 mask set drm/i915/display: Make get_allowed_dc_mask().max_dc set a chain of if and elses Julian Stecklina (1): drm/i915/gvt: treat intel_gvt_mpt as const in gvt code Lionel Landwerlin (1): drm/i915/perf: workaround register corruption in OATAILPTR Lucas De Marchi (6): drm/i915/dg1: map/unmap pll clocks drm/i915/display: add namespace to intel_prepare_reset drm/i915/display: add namespace to intel_finish_reset drm/i915: re-order if/else ladder for hpd_irq_setup drm/i915: move display-related to the end of intel_irq_init() drm/i915: Do not setup hpd without display Maarten Lankhorst (5): drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3. drm/i915: Try to make bigjoiner work in atomic check drm/i915: Add bigjoiner aware plane clipping checks drm/i915: Add debugfs dumping for bigjoiner, v3. Manasi Navare (9): drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes drm/i915: Move encoder->get_config to a new function drm/i915: Add a wrapper function around get_pipe_config drm/i915: Pass intel_atomic_state instead of drm_atomic_state drm/i915/dp: Add from_crtc_state to copy color blobs drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner drm/i915: HW state readout for Bigjoiner case drm/i915: Do not call hsw_set_frame_start_delay for dsi Tejas Upadhyay (2): drm/i915/ehl: Implement W/A 22010492432 drm/i915/edp/jsl: Update vswing table for HBR and HBR2 Ville Syrjälä (26): drm/i915: Sort EHL/JSL PCI IDs drm/i915: Include fb modifier in state dumps drm/i915: Add plane .{min,max}_width() and .max_height() vfuncs drm/i915: Move hw.active assignment into intel_crtc_get_pipe_config() drm/i915: s/intel_mode_from_pipe_config/intel_mode_from_crtc_timings/ drm/i915: Introduce intel_crtc_readout_derived_state() drm/i915: Pass intel_atomic_state around drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code drm/i915: Pimp the watermark documentation a bit drm/i915: Precompute can_sagv for each wm level drm/i915: Store plane relative data rate in crtc_state drm/i915: Remove skl_adjusted_plane_pixel_rate() drm/i915: Introduce intel_dpll_get_hw_state() drm/i915: Move intel_dpll_get_hw_state() into the hsw+ platform specific functions drm/i915: Use actual readout results for .get_freq() drm/i915: Relocate cnl_get_ddi_pll() drm/i915: Handle max_bpc==16 drm/i915: Fix the DDI encoder names drm/i915: Copy the plane hw state directly for Y planes drm/i915: Add crtcs affected by bigjoiner to the state drm/i915: Add planes affected by bigjoiner to the state drm/i915: Get the uapi state from the correct plane when bigjoiner is used drm/i915: Disable legacy cursor fastpath for bigjoiner drm/i915: Fix cursor src/dst rectangle with bigjoiner drm/i915: Add bigjoiner state dump drm/i915: Enable bigjoiner Yan Zhao (1): drm/i915/gvt: correct a false comment of flag F_UNALIGN drivers/gpu/drm/i915/display/icl_dsi.c | 5 +- drivers/gpu/drm/i915/display/intel_atomic.c | 10 +- drivers/gpu/drm/i915/display/intel_atomic.h | 3 +- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 131 ++- drivers/gpu/drm/i915/display/intel_atomic_plane.h | 9 +- drivers/gpu/drm/i915/display/intel_ddi.c | 259 +++- drivers/gpu/drm/i915/display/intel_display.c | 1234 +++++++++++++------- drivers/gpu/drm/i915/display/intel_display.h | 9 +- .../gpu/drm/i915/display/intel_display_debugfs.c | 30 +- drivers/gpu/drm/i915/display/intel_display_power.c | 49 +- drivers/gpu/drm/i915/display/intel_display_types.h | 83 +- drivers/gpu/drm/i915/display/intel_dp.c | 116 +- drivers/gpu/drm/i915/display/intel_dp.h | 1 + drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 111 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 11 +- drivers/gpu/drm/i915/display/intel_dsi.c | 2 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 41 - drivers/gpu/drm/i915/display/intel_psr.h | 4 - drivers/gpu/drm/i915/display/intel_sprite.c | 161 ++- drivers/gpu/drm/i915/display/intel_vdsc.c | 201 ++-- drivers/gpu/drm/i915/display/intel_vdsc.h | 6 +- drivers/gpu/drm/i915/gt/intel_reset.c | 4 +- drivers/gpu/drm/i915/gvt/display.c | 179 +++ drivers/gpu/drm/i915/gvt/gtt.c | 64 + drivers/gpu/drm/i915/gvt/gtt.h | 4 + drivers/gpu/drm/i915/gvt/gvt.c | 13 +- drivers/gpu/drm/i915/gvt/gvt.h | 7 +- drivers/gpu/drm/i915/gvt/handlers.c | 44 +- drivers/gpu/drm/i915/gvt/kvmgt.c | 2 +- drivers/gpu/drm/i915/gvt/mmio.c | 5 + drivers/gpu/drm/i915/gvt/mmio.h | 4 + drivers/gpu/drm/i915/gvt/mpt.h | 2 +- drivers/gpu/drm/i915/gvt/vgpu.c | 2 +- drivers/gpu/drm/i915/i915_drv.c | 2 + drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 44 +- drivers/gpu/drm/i915/i915_perf.c | 9 +- drivers/gpu/drm/i915/i915_reg.h | 26 + drivers/gpu/drm/i915/intel_gvt.c | 15 + drivers/gpu/drm/i915/intel_gvt.h | 5 + drivers/gpu/drm/i915/intel_pm.c | 272 +++-- include/drm/i915_pciids.h | 15 +- 44 files changed, 2263 insertions(+), 937 deletions(-)