From patchwork Tue Nov 6 13:19:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670305 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2E44313AD for ; Tue, 6 Nov 2018 13:19:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D8D2298E0 for ; Tue, 6 Nov 2018 13:19:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11EC22A34A; Tue, 6 Nov 2018 13:19:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 566F5298E0 for ; Tue, 6 Nov 2018 13:19:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730540AbeKFWob (ORCPT ); Tue, 6 Nov 2018 17:44:31 -0500 Received: from mail-ve1eur01on0077.outbound.protection.outlook.com ([104.47.1.77]:13585 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729728AbeKFWob (ORCPT ); Tue, 6 Nov 2018 17:44:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7JB1S9SmarCguAU4eQt5YuI7NtTxSkYTRWtQlAqJHzw=; b=Ir9cl8ZM/auvqPwgDwlV8ahOihtAbjDZLDOs7Pv3WtQaDXYjI3NpltFlyfqEpr/97JMbMTirpEi2bvLNnSWu69fN9aWKLGm0bm4iXZuHzWPTEMnDKMq/h3wIh09RoawVbZOx+vGdE6/rcMfZ0lGCM14O+yhD94yrbfdV8zAP9Ig= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:13 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:13 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 01/23] PCI: mobiveil: uniform the register accessors Thread-Topic: [PATCH 01/23] PCI: mobiveil: uniform the register accessors Thread-Index: AQHUddNPQtKfGnE9Y0iqnS6q0DlZPQ== Date: Tue, 6 Nov 2018 13:19:12 +0000 Message-ID: <20181106131807.29951-2-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:j9x4gbzeGYqdZu+D64E9XE6rW3NYSyuMFFQXtyu8xcmD3IFIdLw/o3bwWsSUBfd+aDA6draJvps0bGwgh2P1bm5rHxHaDuN2EgjS6jZcByx5pHSz9N3Ee3E78TzSN8XXPifrojkNqMAEQCP1rTy7aKwMA4Z53uhfvbeYOkYgQykO5U0U+60OKv7AZRNPsE0cUq/6N5i/SD7lmEPk2a6Z6L/Dhz87oZ7kFVjlPaxxzZkfSVpqhvnxrjsSi4j533gWev3/1ZsdK90YV9e8cGHwhbr3HNp9LH9nWOf6JsmWqSUpBFsVuIqgElok5oOsSSHtjUFFI8+TjM1F7G/2je3BgomJ7Rj/EJ4c6tR8l9ghR44x2pUYbooSmebt42V+fWrcYW2MvxcxmoC18WW5VKuFrvFzPsvioJtz6wgpuYot2Zex29WpUbe7FImzOEIZ2tV+tCt7LPfB9I/x4yRJwBNVrw==;5:I2X/vaBRmng0c4BM/4bVFw1LkTKuMfRG4FpXEzx6c1oRzng+YdKlfUpqVJafr6iblSfT80SrTNp7Kam9UnJQj6ALPue6CQyJiGG6G3Wv7hI+6paioTVfstCINU2FoAliWmp3khu9aUbHla59CbGv/wmzQXPIvnciePdh7c8Bzlk=;7:MxvyPmuMMFM03sDfXLD6Z/WReYjlpt8lkTC+B3G+PnXI5HR/wnCbnUiEvw2Z9GKaQEw+7ABIEUhIGTN1mMFgVqT8Fi12DJ6OcXG/OBZOyilaeEv5hOyELUlDSKCGB7A13MtQ/VU5EF64amOIkRrzdA== x-ms-office365-filtering-correlation-id: 618cbdde-f96b-4359-ff95-08d643ea718a x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123558120)(20161123564045)(20161123562045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(14444005)(2201001)(4326008)(2501003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(575784001)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: D0vuB2pui/Jc4ysGG0r4vdQgytmaAPfLx84qJT/sDOK+zrZ1IudeQwvVRN9a9qNwqsedKhJ6353A914EC3ed/tIim1Zm857yotbygiwI+lBgTqTWmoOgabmElzEEnf3TIYkcdpW9THfsZS3gogXCvvoMITpjn7gvwPAw9x0LcCBI5x3K1xJnuRuU4Cd88zmcL6Xh8etdHvN68Yj99HX4yoIjJ6A+VCVINRFCDfjxSuy14C7p0+CfXMmAAZZ7t7Lnj0vycbV77707v1kJKjSnOjPAHAFLLkMmthzbckPNHj4bZ27MqNdgbZb8vDoImDzif5+mO7OxtTyTWQVPcOMzbCXoNzSKKe09cKTAhKMpEHs= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 618cbdde-f96b-4359-ff95-08d643ea718a X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:13.0931 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang It's confused that R/W some registers by csr_readl()/csr_writel(), while others by read_paged_register()/write_paged_register(). Actually the low 3KB of 4KB PCIe configure space can be accessed directly and high 1KB is paging area. So this patch uniformed the register accessors to csr_readl() and csr_writel() by comparing the register offset with page access boundary 3KB in the accessor internal. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 179 +++++++++++++++++-------- 1 file changed, 124 insertions(+), 55 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 77052a0712d0..d55c7e780c6e 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -47,7 +47,6 @@ #define PAGE_SEL_SHIFT 13 #define PAGE_SEL_MASK 0x3f #define PAGE_LO_MASK 0x3ff -#define PAGE_SEL_EN 0xc00 #define PAGE_SEL_OFFSET_SHIFT 10 #define PAB_AXI_PIO_CTRL 0x0840 @@ -117,6 +116,12 @@ #define LINK_WAIT_MIN 90000 #define LINK_WAIT_MAX 100000 +#define PAGED_ADDR_BNDRY 0xc00 +#define OFFSET_TO_PAGE_ADDR(off) \ + ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) +#define OFFSET_TO_PAGE_IDX(off) \ + ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) + struct mobiveil_msi { /* MSI information */ struct mutex lock; /* protect bitmap variable */ struct irq_domain *msi_domain; @@ -145,15 +150,119 @@ struct mobiveil_pcie { struct mobiveil_msi msi; }; -static inline void csr_writel(struct mobiveil_pcie *pcie, const u32 value, - const u32 reg) +/* + * mobiveil_pcie_sel_page - routine to access paged register + * + * Registers whose address greater than PAGED_ADDR_BNDRY (0xc00) are paged, + * for this scheme to work extracted higher 6 bits of the offset will be + * written to pg_sel field of PAB_CTRL register and rest of the lower 10 + * bits enabled with PAGED_ADDR_BNDRY are used as offset of the register. + */ +static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) { - writel_relaxed(value, pcie->csr_axi_slave_base + reg); + u32 val; + + val = readl(pcie->csr_axi_slave_base + PAB_CTRL); + val &= ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT); + val |= (pg_idx & PAGE_SEL_MASK) << PAGE_SEL_SHIFT; + + writel(val, pcie->csr_axi_slave_base + PAB_CTRL); } -static inline u32 csr_readl(struct mobiveil_pcie *pcie, const u32 reg) +static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) { - return readl_relaxed(pcie->csr_axi_slave_base + reg); + if (off < PAGED_ADDR_BNDRY) { + /* For directly accessed registers, clear the pg_sel field */ + mobiveil_pcie_sel_page(pcie, 0); + return pcie->csr_axi_slave_base + off; + } + + mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); + return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); +} + +static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val) +{ + if ((uintptr_t)addr & (size - 1)) { + *val = 0; + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + switch (size) { + case 4: + *val = readl(addr); + break; + case 2: + *val = readw(addr); + break; + case 1: + *val = readb(addr); + break; + default: + *val = 0; + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val) +{ + if ((uintptr_t)addr & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + switch (size) { + case 4: + writel(val, addr); + break; + case 2: + writew(val, addr); + break; + case 1: + writeb(val, addr); + break; + default: + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + return PCIBIOS_SUCCESSFUL; +} + +static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) +{ + void *addr; + u32 val; + int ret; + + addr = mobiveil_pcie_comp_addr(pcie, off); + + ret = mobiveil_pcie_read(addr, size, &val); + if (ret) + dev_err(&pcie->pdev->dev, "read CSR address failed\n"); + + return val; +} + +static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size) +{ + void *addr; + int ret; + + addr = mobiveil_pcie_comp_addr(pcie, off); + + ret = mobiveil_pcie_write(addr, size, val); + if (ret) + dev_err(&pcie->pdev->dev, "write CSR address failed\n"); +} + +static u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x4); +} + +static void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x4); } static bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) @@ -342,45 +451,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) return 0; } -/* - * select_paged_register - routine to access paged register of root complex - * - * registers of RC are paged, for this scheme to work - * extracted higher 6 bits of the offset will be written to pg_sel - * field of PAB_CTRL register and rest of the lower 10 bits enabled with - * PAGE_SEL_EN are used as offset of the register. - */ -static void select_paged_register(struct mobiveil_pcie *pcie, u32 offset) -{ - int pab_ctrl_dw, pg_sel; - - /* clear pg_sel field */ - pab_ctrl_dw = csr_readl(pcie, PAB_CTRL); - pab_ctrl_dw = (pab_ctrl_dw & ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT)); - - /* set pg_sel field */ - pg_sel = (offset >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK; - pab_ctrl_dw |= ((pg_sel << PAGE_SEL_SHIFT)); - csr_writel(pcie, pab_ctrl_dw, PAB_CTRL); -} - -static void write_paged_register(struct mobiveil_pcie *pcie, - u32 val, u32 offset) -{ - u32 off = (offset & PAGE_LO_MASK) | PAGE_SEL_EN; - - select_paged_register(pcie, offset); - csr_writel(pcie, val, off); -} - -static u32 read_paged_register(struct mobiveil_pcie *pcie, u32 offset) -{ - u32 off = (offset & PAGE_LO_MASK) | PAGE_SEL_EN; - - select_paged_register(pcie, offset); - return csr_readl(pcie, off); -} - static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, int pci_addr, u32 type, u64 size) { @@ -397,19 +467,19 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); csr_writel(pcie, pio_ctrl_val | (1 << PIO_ENABLE_SHIFT), PAB_PEX_PIO_CTRL); - amap_ctrl_dw = read_paged_register(pcie, PAB_PEX_AMAP_CTRL(win_num)); + amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); amap_ctrl_dw = (amap_ctrl_dw | (type << AMAP_CTRL_TYPE_SHIFT)); amap_ctrl_dw = (amap_ctrl_dw | (1 << AMAP_CTRL_EN_SHIFT)); - write_paged_register(pcie, amap_ctrl_dw | lower_32_bits(size64), - PAB_PEX_AMAP_CTRL(win_num)); + csr_writel(pcie, amap_ctrl_dw | lower_32_bits(size64), + PAB_PEX_AMAP_CTRL(win_num)); - write_paged_register(pcie, upper_32_bits(size64), - PAB_EXT_PEX_AMAP_SIZEN(win_num)); + csr_writel(pcie, upper_32_bits(size64), + PAB_EXT_PEX_AMAP_SIZEN(win_num)); - write_paged_register(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); - write_paged_register(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); - write_paged_register(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); + csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); } /* @@ -437,8 +507,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); - write_paged_register(pcie, upper_32_bits(size64), - PAB_EXT_AXI_AMAP_SIZE(win_num)); + csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); /* * program AXI window base with appropriate value in From patchwork Tue Nov 6 13:19:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670365 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5F28813AD for ; Tue, 6 Nov 2018 13:22:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A6A02A3D5 for ; Tue, 6 Nov 2018 13:22:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3D63C2A3E0; Tue, 6 Nov 2018 13:22:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F32BD2A3D5 for ; Tue, 6 Nov 2018 13:22:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388149AbeKFWoi (ORCPT ); Tue, 6 Nov 2018 17:44:38 -0500 Received: from mail-ve1eur01on0042.outbound.protection.outlook.com ([104.47.1.42]:6144 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388116AbeKFWoi (ORCPT ); Tue, 6 Nov 2018 17:44:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qXJRwrovUUKiYjNqsuKTVCx6zYFvEURHM0Vftqm3yRo=; b=E8CGWbMXOS24fM9PmU8Wte07A4PIVk/cm/ovolXzlKSCEBSDMuYPp8wvenJ50QUwgEgTHW8wE/k5zMdGuUv5pADMJA2SBfQQfHdQexNs54qM7Wd6JjCSfeE4gDdod9wUBU8gz36XqiEM1YOkPd5ibf1aRZkoMKmsAjzq+LWaNYo= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:19 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:19 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 02/23] PCI: mobiveil: format the code without function change Thread-Topic: [PATCH 02/23] PCI: mobiveil: format the code without function change Thread-Index: AQHUddNS+DCnL3X600OvsTp7/fExhw== Date: Tue, 6 Nov 2018 13:19:19 +0000 Message-ID: <20181106131807.29951-3-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:WM0MaVQazM47fyyTn7LmUpFQOl5mxZrpe4uhhw9JVXpnqd0RK3p0ycsBgMkUpj/MHwJ1vzf5yKnhAlKTQx4IcxiWi3TRZmuq/agkSF/L8VyOUWmU3AZQF6dY0d4X0kdDtKCZ3TbreSqc3Y2MJ4cSoNgKR+LzHEOEOgYQE5a4oPfMqq4rqStiZ27xIetIXgoJBWJA6IkhhXhXjjAm/+yqxgCzQxL2HYL8riwDdFoKApmqrTD6OHTGJ8vLnck00fgM2jA2FRxiXKIjXlssEaeOIbJNKfzeUSIm+RFgvZUqsLdIhepInvSEpE5+R5Eo2+k7SfB66e3CsGUu3R7Ns9bDz2HTd8AVSHODGXUxbi5dR8sgMvTXcGbAx7P1ZjJWOvJsQ6t7lBd7Qe/lg4J57vVjbXsLfrEwHTmkSkIlGXn55xkmL/255wsv/+4tIY75X2aQ1v69LzVuSuBdvVBQy5JzEA==;5:M0PYzbQN2RnjksaTvQVHn2bsaedJFgWOiZXmTZ8+1p9ZUa4k2YNv0+m8cbW10EHmDVHeXslP0M9/SpHagTeZHz0Lk4yswXVdqlHReWrraLHsXsoSZ1HeWFu8Ebhkd0a2O3yEm4FFUq9w+tT4UhqWSfIuzfPpES5j5jThO77+xeg=;7:h2BivclZhoVzKsGUZTBak6I40Dqd0hC78wB0OypjwLmUST+mGNa6KZoHfF3juJ2Uk4C2ZSLwrFq4iTIZR69Wna8LG6HVNNR2ff3+DCVaL799t5IGrVWwki5zftUJEhxk6hezFj9EV8BFHJ09wvQjZg== x-ms-office365-filtering-correlation-id: 4ea14e6a-d442-4164-6f97-08d643ea751d x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(269456686620040)(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123558120)(20161123564045)(20161123562045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(4744004)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(14444005)(2201001)(4326008)(2501003)(53946003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(575784001)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: xkaRTW1TYO1EAXm+dt8Wi8CJH+kvnvO/L9pWwrZwa3KZChjPRTYrfGtTMeOKEF3liA/q6QAyR34olJLIY36JddvWgdwA1vXgYPnRx7td6E3MK+oi684iuIVt5PIHo/HidhP2Dt2XzQz0ZKUe+DCaaLYeN90npEAql4DPdfh0I5ETgvjK27cr33S1TZQmzcshPCfgkLYm17rFLIII35gfciLrXKjvgNdWCnav/xngbzPwvUTWfEG5D2sR6O0r/2msUe1fKUdji61Npt2az9tj6tQKWZuUun1BSHeWuprkX4QLiFMMW62Q7v/16gnAHO6TNBw4e39i01giD/ZGRnXLa+rvKCNRRMhvcRSsLivx5GY= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4ea14e6a-d442-4164-6f97-08d643ea751d X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:19.2280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Just format the code without functionality change. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 261 +++++++++++++------------ 1 file changed, 137 insertions(+), 124 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index d55c7e780c6e..b87471f08a40 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -31,38 +31,40 @@ * translation tables are grouped into windows, each window registers are * grouped into blocks of 4 or 16 registers each */ -#define PAB_REG_BLOCK_SIZE 16 -#define PAB_EXT_REG_BLOCK_SIZE 4 +#define PAB_REG_BLOCK_SIZE 16 +#define PAB_EXT_REG_BLOCK_SIZE 4 -#define PAB_REG_ADDR(offset, win) (offset + (win * PAB_REG_BLOCK_SIZE)) -#define PAB_EXT_REG_ADDR(offset, win) (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) +#define PAB_REG_ADDR(offset, win) \ + (offset + (win * PAB_REG_BLOCK_SIZE)) +#define PAB_EXT_REG_ADDR(offset, win) \ + (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) -#define LTSSM_STATUS 0x0404 -#define LTSSM_STATUS_L0_MASK 0x3f -#define LTSSM_STATUS_L0 0x2d +#define LTSSM_STATUS 0x0404 +#define LTSSM_STATUS_L0_MASK 0x3f +#define LTSSM_STATUS_L0 0x2d -#define PAB_CTRL 0x0808 -#define AMBA_PIO_ENABLE_SHIFT 0 -#define PEX_PIO_ENABLE_SHIFT 1 -#define PAGE_SEL_SHIFT 13 -#define PAGE_SEL_MASK 0x3f -#define PAGE_LO_MASK 0x3ff -#define PAGE_SEL_OFFSET_SHIFT 10 +#define PAB_CTRL 0x0808 +#define AMBA_PIO_ENABLE_SHIFT 0 +#define PEX_PIO_ENABLE_SHIFT 1 +#define PAGE_SEL_SHIFT 13 +#define PAGE_SEL_MASK 0x3f +#define PAGE_LO_MASK 0x3ff +#define PAGE_SEL_OFFSET_SHIFT 10 -#define PAB_AXI_PIO_CTRL 0x0840 -#define APIO_EN_MASK 0xf +#define PAB_AXI_PIO_CTRL 0x0840 +#define APIO_EN_MASK 0xf -#define PAB_PEX_PIO_CTRL 0x08c0 -#define PIO_ENABLE_SHIFT 0 +#define PAB_PEX_PIO_CTRL 0x08c0 +#define PIO_ENABLE_SHIFT 0 #define PAB_INTP_AMBA_MISC_ENB 0x0b0c -#define PAB_INTP_AMBA_MISC_STAT 0x0b1c +#define PAB_INTP_AMBA_MISC_STAT 0x0b1c #define PAB_INTP_INTX_MASK 0x01e0 #define PAB_INTP_MSI_MASK 0x8 -#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) -#define WIN_ENABLE_SHIFT 0 -#define WIN_TYPE_SHIFT 1 +#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) +#define WIN_ENABLE_SHIFT 0 +#define WIN_TYPE_SHIFT 1 #define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) @@ -70,16 +72,16 @@ #define AXI_WINDOW_ALIGN_MASK 3 #define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) -#define PAB_BUS_SHIFT 24 -#define PAB_DEVICE_SHIFT 19 -#define PAB_FUNCTION_SHIFT 16 +#define PAB_BUS_SHIFT 24 +#define PAB_DEVICE_SHIFT 19 +#define PAB_FUNCTION_SHIFT 16 #define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) #define PAB_INTP_AXI_PIO_CLASS 0x474 -#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) -#define AMAP_CTRL_EN_SHIFT 0 -#define AMAP_CTRL_TYPE_SHIFT 1 +#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) +#define AMAP_CTRL_EN_SHIFT 0 +#define AMAP_CTRL_TYPE_SHIFT 1 #define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) #define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) @@ -87,39 +89,39 @@ #define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) /* starting offset of INTX bits in status register */ -#define PAB_INTX_START 5 +#define PAB_INTX_START 5 /* supported number of MSI interrupts */ -#define PCI_NUM_MSI 16 +#define PCI_NUM_MSI 16 /* MSI registers */ -#define MSI_BASE_LO_OFFSET 0x04 -#define MSI_BASE_HI_OFFSET 0x08 -#define MSI_SIZE_OFFSET 0x0c -#define MSI_ENABLE_OFFSET 0x14 -#define MSI_STATUS_OFFSET 0x18 -#define MSI_DATA_OFFSET 0x20 -#define MSI_ADDR_L_OFFSET 0x24 -#define MSI_ADDR_H_OFFSET 0x28 +#define MSI_BASE_LO_OFFSET 0x04 +#define MSI_BASE_HI_OFFSET 0x08 +#define MSI_SIZE_OFFSET 0x0c +#define MSI_ENABLE_OFFSET 0x14 +#define MSI_STATUS_OFFSET 0x18 +#define MSI_DATA_OFFSET 0x20 +#define MSI_ADDR_L_OFFSET 0x24 +#define MSI_ADDR_H_OFFSET 0x28 /* outbound and inbound window definitions */ -#define WIN_NUM_0 0 -#define WIN_NUM_1 1 -#define CFG_WINDOW_TYPE 0 -#define IO_WINDOW_TYPE 1 -#define MEM_WINDOW_TYPE 2 -#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) -#define MAX_PIO_WINDOWS 8 +#define WIN_NUM_0 0 +#define WIN_NUM_1 1 +#define CFG_WINDOW_TYPE 0 +#define IO_WINDOW_TYPE 1 +#define MEM_WINDOW_TYPE 2 +#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) +#define MAX_PIO_WINDOWS 8 /* Parameters for the waiting for link up routine */ -#define LINK_WAIT_MAX_RETRIES 10 -#define LINK_WAIT_MIN 90000 -#define LINK_WAIT_MAX 100000 +#define LINK_WAIT_MAX_RETRIES 10 +#define LINK_WAIT_MIN 90000 +#define LINK_WAIT_MAX 100000 -#define PAGED_ADDR_BNDRY 0xc00 -#define OFFSET_TO_PAGE_ADDR(off) \ +#define PAGED_ADDR_BNDRY 0xc00 +#define OFFSET_TO_PAGE_ADDR(off) \ ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) -#define OFFSET_TO_PAGE_IDX(off) \ +#define OFFSET_TO_PAGE_IDX(off) \ ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) struct mobiveil_msi { /* MSI information */ @@ -297,14 +299,14 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, int where) { struct mobiveil_pcie *pcie = bus->sysdata; + u32 value; if (!mobiveil_pcie_valid_device(bus, devfn)) return NULL; - if (bus->number == pcie->root_bus_nr) { - /* RC config access */ + /* RC config access */ + if (bus->number == pcie->root_bus_nr) return pcie->csr_axi_slave_base + where; - } /* * EP config access (in Config/APIO space) @@ -312,10 +314,12 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, * (BDF) in PAB_AXI_AMAP_PEX_WIN_L0 Register. * Relies on pci_lock serialization */ - csr_writel(pcie, bus->number << PAB_BUS_SHIFT | - PCI_SLOT(devfn) << PAB_DEVICE_SHIFT | - PCI_FUNC(devfn) << PAB_FUNCTION_SHIFT, - PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); + value = bus->number << PAB_BUS_SHIFT | + PCI_SLOT(devfn) << PAB_DEVICE_SHIFT | + PCI_FUNC(devfn) << PAB_FUNCTION_SHIFT; + + csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); + return pcie->config_axi_slave_base + where; } @@ -350,22 +354,22 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { - shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT) >> - PAB_INTX_START; + shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { virq = irq_find_mapping(pcie->intx_domain, - bit + 1); + bit + 1); if (virq) generic_handle_irq(virq); else - dev_err_ratelimited(dev, - "unexpected IRQ, INT%d\n", bit); + dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", + bit); /* clear interrupt */ csr_writel(pcie, - shifted_status << PAB_INTX_START, - PAB_INTP_AMBA_MISC_STAT); + shifted_status << PAB_INTX_START, + PAB_INTP_AMBA_MISC_STAT); } } while ((shifted_status >> PAB_INTX_START) != 0); } @@ -375,8 +379,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* handle MSI interrupts */ while (msi_status & 1) { - msi_data = readl_relaxed(pcie->apb_csr_base - + MSI_DATA_OFFSET); + msi_data = readl_relaxed(pcie->apb_csr_base + MSI_DATA_OFFSET); /* * MSI_STATUS_OFFSET register gets updated to zero @@ -385,18 +388,18 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) * two dummy reads. */ msi_addr_lo = readl_relaxed(pcie->apb_csr_base + - MSI_ADDR_L_OFFSET); + MSI_ADDR_L_OFFSET); msi_addr_hi = readl_relaxed(pcie->apb_csr_base + - MSI_ADDR_H_OFFSET); + MSI_ADDR_H_OFFSET); dev_dbg(dev, "MSI registers, data: %08x, addr: %08x:%08x\n", - msi_data, msi_addr_hi, msi_addr_lo); + msi_data, msi_addr_hi, msi_addr_lo); virq = irq_find_mapping(msi->dev_domain, msi_data); if (virq) generic_handle_irq(virq); msi_status = readl_relaxed(pcie->apb_csr_base + - MSI_STATUS_OFFSET); + MSI_STATUS_OFFSET); } /* Clear the interrupt status */ @@ -413,7 +416,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) /* map config resource */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "config_axi_slave"); + "config_axi_slave"); pcie->config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); if (IS_ERR(pcie->config_axi_slave_base)) return PTR_ERR(pcie->config_axi_slave_base); @@ -421,7 +424,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) /* map csr resource */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "csr_axi_slave"); + "csr_axi_slave"); pcie->csr_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); if (IS_ERR(pcie->csr_axi_slave_base)) return PTR_ERR(pcie->csr_axi_slave_base); @@ -452,7 +455,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) } static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, - int pci_addr, u32 type, u64 size) + int pci_addr, u32 type, u64 size) { int pio_ctrl_val; int amap_ctrl_dw; @@ -465,19 +468,20 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, } pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); - csr_writel(pcie, - pio_ctrl_val | (1 << PIO_ENABLE_SHIFT), PAB_PEX_PIO_CTRL); - amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); - amap_ctrl_dw = (amap_ctrl_dw | (type << AMAP_CTRL_TYPE_SHIFT)); - amap_ctrl_dw = (amap_ctrl_dw | (1 << AMAP_CTRL_EN_SHIFT)); + pio_ctrl_val |= 1 << PIO_ENABLE_SHIFT; + csr_writel(pcie, pio_ctrl_val, PAB_PEX_PIO_CTRL); - csr_writel(pcie, amap_ctrl_dw | lower_32_bits(size64), - PAB_PEX_AMAP_CTRL(win_num)); + amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); + amap_ctrl_dw |= (type << AMAP_CTRL_TYPE_SHIFT) | + (1 << AMAP_CTRL_EN_SHIFT) | + lower_32_bits(size64); + csr_writel(pcie, amap_ctrl_dw, PAB_PEX_AMAP_CTRL(win_num)); csr_writel(pcie, upper_32_bits(size64), PAB_EXT_PEX_AMAP_SIZEN(win_num)); csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); } @@ -486,7 +490,8 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, * routine to program the outbound windows */ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, - u64 cpu_addr, u64 pci_addr, u32 config_io_bit, u64 size) + u64 cpu_addr, u64 pci_addr, + u32 config_io_bit, u64 size) { u32 value, type; @@ -505,7 +510,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, type = config_io_bit; value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | - lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); + lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); @@ -515,14 +520,14 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, */ value = csr_readl(pcie, PAB_AXI_AMAP_AXI_WIN(win_num)); csr_writel(pcie, cpu_addr & (~AXI_WINDOW_ALIGN_MASK), - PAB_AXI_AMAP_AXI_WIN(win_num)); + PAB_AXI_AMAP_AXI_WIN(win_num)); value = csr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_H(win_num)); csr_writel(pcie, lower_32_bits(pci_addr), - PAB_AXI_AMAP_PEX_WIN_L(win_num)); + PAB_AXI_AMAP_PEX_WIN_L(win_num)); csr_writel(pcie, upper_32_bits(pci_addr), - PAB_AXI_AMAP_PEX_WIN_H(win_num)); + PAB_AXI_AMAP_PEX_WIN_H(win_num)); pcie->ob_wins_configured++; } @@ -538,7 +543,9 @@ static int mobiveil_bringup_link(struct mobiveil_pcie *pcie) usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); } + dev_err(&pcie->pdev->dev, "link never came up\n"); + return -ETIMEDOUT; } @@ -551,16 +558,16 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) msi->msi_pages_phys = (phys_addr_t)msg_addr; writel_relaxed(lower_32_bits(msg_addr), - pcie->apb_csr_base + MSI_BASE_LO_OFFSET); + pcie->apb_csr_base + MSI_BASE_LO_OFFSET); writel_relaxed(upper_32_bits(msg_addr), - pcie->apb_csr_base + MSI_BASE_HI_OFFSET); + pcie->apb_csr_base + MSI_BASE_HI_OFFSET); writel_relaxed(4096, pcie->apb_csr_base + MSI_SIZE_OFFSET); writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); } static int mobiveil_host_init(struct mobiveil_pcie *pcie) { - u32 value, pab_ctrl, type = 0; + u32 value, pab_ctrl, type; int err; struct resource_entry *win, *tmp; @@ -575,26 +582,27 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) * Space */ value = csr_readl(pcie, PCI_COMMAND); - csr_writel(pcie, value | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER, PCI_COMMAND); + value |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; + csr_writel(pcie, value, PCI_COMMAND); /* * program PIO Enable Bit to 1 (and PEX PIO Enable to 1) in PAB_CTRL * register */ pab_ctrl = csr_readl(pcie, PAB_CTRL); - csr_writel(pcie, pab_ctrl | (1 << AMBA_PIO_ENABLE_SHIFT) | - (1 << PEX_PIO_ENABLE_SHIFT), PAB_CTRL); + pab_ctrl |= (1 << AMBA_PIO_ENABLE_SHIFT) | (1 << PEX_PIO_ENABLE_SHIFT); + csr_writel(pcie, pab_ctrl, PAB_CTRL); csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK), - PAB_INTP_AMBA_MISC_ENB); + PAB_INTP_AMBA_MISC_ENB); /* * program PIO Enable Bit to 1 and Config Window Enable Bit to 1 in * PAB_AXI_PIO_CTRL Register */ value = csr_readl(pcie, PAB_AXI_PIO_CTRL); - csr_writel(pcie, value | APIO_EN_MASK, PAB_AXI_PIO_CTRL); + value |= APIO_EN_MASK; + csr_writel(pcie, value, PAB_AXI_PIO_CTRL); /* * we'll program one outbound window for config reads and @@ -605,25 +613,25 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* config outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, - pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, - resource_size(pcie->ob_io_res)); + pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, + resource_size(pcie->ob_io_res)); /* memory inbound translation window */ program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { - type = 0; if (resource_type(win->res) == IORESOURCE_MEM) type = MEM_WINDOW_TYPE; - if (resource_type(win->res) == IORESOURCE_IO) + else if (resource_type(win->res) == IORESOURCE_IO) type = IO_WINDOW_TYPE; - if (type) { - /* configure outbound translation window */ - program_ob_windows(pcie, pcie->ob_wins_configured, - win->res->start, 0, type, - resource_size(win->res)); - } + else + continue; + + /* configure outbound translation window */ + program_ob_windows(pcie, pcie->ob_wins_configured, + win->res->start, 0, type, + resource_size(win->res)); } /* setup MSI hardware registers */ @@ -643,7 +651,8 @@ static void mobiveil_mask_intx_irq(struct irq_data *data) mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); - csr_writel(pcie, (shifted_val & (~mask)), PAB_INTP_AMBA_MISC_ENB); + shifted_val &= ~mask; + csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); } @@ -658,7 +667,8 @@ static void mobiveil_unmask_intx_irq(struct irq_data *data) mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); - csr_writel(pcie, (shifted_val | mask), PAB_INTP_AMBA_MISC_ENB); + shifted_val |= mask; + csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); } @@ -672,10 +682,11 @@ static struct irq_chip intx_irq_chip = { /* routine to setup the INTx related data */ static int mobiveil_pcie_intx_map(struct irq_domain *domain, unsigned int irq, - irq_hw_number_t hwirq) + irq_hw_number_t hwirq) { irq_set_chip_and_handler(irq, &intx_irq_chip, handle_level_irq); irq_set_chip_data(irq, domain->host_data); + return 0; } @@ -692,7 +703,7 @@ static struct irq_chip mobiveil_msi_irq_chip = { static struct msi_domain_info mobiveil_msi_domain_info = { .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), + MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), .chip = &mobiveil_msi_irq_chip, }; @@ -710,7 +721,7 @@ static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) } static int mobiveil_msi_set_affinity(struct irq_data *irq_data, - const struct cpumask *mask, bool force) + const struct cpumask *mask, bool force) { return -EINVAL; } @@ -722,7 +733,8 @@ static struct irq_chip mobiveil_msi_bottom_irq_chip = { }; static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, - unsigned int virq, unsigned int nr_irqs, void *args) + unsigned int virq, + unsigned int nr_irqs, void *args) { struct mobiveil_pcie *pcie = domain->host_data; struct mobiveil_msi *msi = &pcie->msi; @@ -742,13 +754,13 @@ static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, mutex_unlock(&msi->lock); irq_domain_set_info(domain, virq, bit, &mobiveil_msi_bottom_irq_chip, - domain->host_data, handle_level_irq, - NULL, NULL); + domain->host_data, handle_level_irq, NULL, NULL); return 0; } static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, - unsigned int virq, unsigned int nr_irqs) + unsigned int virq, + unsigned int nr_irqs) { struct irq_data *d = irq_domain_get_irq_data(domain, virq); struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(d); @@ -756,12 +768,11 @@ static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, mutex_lock(&msi->lock); - if (!test_bit(d->hwirq, msi->msi_irq_in_use)) { + if (!test_bit(d->hwirq, msi->msi_irq_in_use)) dev_err(&pcie->pdev->dev, "trying to free unused MSI#%lu\n", d->hwirq); - } else { + else __clear_bit(d->hwirq, msi->msi_irq_in_use); - } mutex_unlock(&msi->lock); } @@ -785,12 +796,14 @@ static int mobiveil_allocate_msi_domains(struct mobiveil_pcie *pcie) } msi->msi_domain = pci_msi_create_irq_domain(fwnode, - &mobiveil_msi_domain_info, msi->dev_domain); + &mobiveil_msi_domain_info, + msi->dev_domain); if (!msi->msi_domain) { dev_err(dev, "failed to create MSI domain\n"); irq_domain_remove(msi->dev_domain); return -ENOMEM; } + return 0; } @@ -801,8 +814,8 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) int ret; /* setup INTx */ - pcie->intx_domain = irq_domain_add_linear(node, - PCI_NUM_INTX, &intx_domain_ops, pcie); + pcie->intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, + &intx_domain_ops, pcie); if (!pcie->intx_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); @@ -917,10 +930,10 @@ MODULE_DEVICE_TABLE(of, mobiveil_pcie_of_match); static struct platform_driver mobiveil_pcie_driver = { .probe = mobiveil_pcie_probe, .driver = { - .name = "mobiveil-pcie", - .of_match_table = mobiveil_pcie_of_match, - .suppress_bind_attrs = true, - }, + .name = "mobiveil-pcie", + .of_match_table = mobiveil_pcie_of_match, + .suppress_bind_attrs = true, + }, }; builtin_platform_driver(mobiveil_pcie_driver); From patchwork Tue Nov 6 13:19:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670307 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70ADA13AD for ; Tue, 6 Nov 2018 13:19:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5F8A52A342 for ; Tue, 6 Nov 2018 13:19:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 538552A34B; Tue, 6 Nov 2018 13:19:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2049E2A342 for ; Tue, 6 Nov 2018 13:19:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388227AbeKFWom (ORCPT ); Tue, 6 Nov 2018 17:44:42 -0500 Received: from mail-ve1eur01on0042.outbound.protection.outlook.com ([104.47.1.42]:6144 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388144AbeKFWol (ORCPT ); Tue, 6 Nov 2018 17:44:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9AC3UUG1F1PvvLngn7cYEsiSg64fPhRxYE3u5taIiX0=; b=u3bzRr1hhrhTHqw1BNhXj51o1rQaVjRvSO1GOnaRepJXtYW1Tjq3jbs1zJ2Z3iJLbOjHpx109quiZ1eFq28o0nIElvaVa2fqty8LuAn9pR+PisqWVToLz6Wb4GX+bBHnKSQoTfMLlXTSq4F9JElO0fp0hLtjLhOV+AKi9rTc9qU= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:25 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:25 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 03/23] PCI: mobiveil: correct the returned error number Thread-Topic: [PATCH 03/23] PCI: mobiveil: correct the returned error number Thread-Index: AQHUddNWBw9Y+2zWwUWykmDsJwZN2g== Date: Tue, 6 Nov 2018 13:19:25 +0000 Message-ID: <20181106131807.29951-4-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:8QcC08GxecpxAHu+xkULTEFr2LgMh6/h/glf029Y9w5hJ5nzUTfYSdTPjBkNT7ebH5jk7K5qaufiuvSmC6+lhnJNxvQZzOkUzOX4wEaCYOvnp1aHmX/yXmdh5b5j8pjbsMCdMtXv1jJtLn+M30XZEz2DAzIZvo5p+1StykvPKS9pP8TejP3wE6dJnnLhRBrRR1lgtcZmJ2DClJD/oEIbMaQ3Wo7HYMLvFGwP44LpAOhTkUONoTLeAMdr10Ze1CdhGfKAq3mb2V+xfDzX/lX/bUOve55U1u6S/rHwFuG/ekDlWGfW17l2L0ZHXuyk0HqExp2ipycvBYLrEGKxOWRF23/sLec+TGAQ3xG8RXRy57k3vK4cwoKOl1d2gsPcSWnHodw6DjOqJ069kATMMOQ+jrWpLMiBXcg1Nmp7W3aJz9ZGxl81rKjKtCabsph5lcH+hvmkPXgYnyiXM4AKH6FxJQ==;5:l46jzSUURO7wuA8VmPerwbVZ9otX7BDzPzT8Iii5WsSRKpDNy6/irKlpYgo1CU+jceipj2Gt4ZS6skAymI83Nre5v1so+z/y0s3qC8DOZskAM3Pi0Z7/dct77EX6Kln6f52fkXweJSTtefvZMWw1kSou/c+dRpOQmJiOGW8a6No=;7:6xK8d2lK8tecnTfpW309Xiyu7GBtryU0K7fwGpNLQwLfAQlqfgz7ETaPqdNBKBJgk81ZDcPBS4wMuuwnJmNt+0WpAyPmv6+NoPHqrC0nJPxYBgyQZYGZcyZny+kXV+WXmcnsNRVYMmLAhiGZhdc1JQ== x-ms-office365-filtering-correlation-id: b37e4529-cc03-4fc3-f2a7-08d643ea78c4 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(269456686620040)(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123558120)(20161123564045)(20161123562045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(14444005)(2201001)(4326008)(2501003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: dEJput1Ah59F2ebPX/TXauTSIxY1T3eUulFDh1zXL4Hcry5y7qWR2Ts7VAVSIYcww1O5qcGi3so4ddENNU/de0zHUcEzga/NhAa1N042gtfoGaTRiAjpE6ecIQJ/iih8Zfr0h+N1wJdWg8KNiIr/Gu7u1uqFv4dsy4wNBBMGulJ1pRKmgGF3xX062RYWzx3R5K+CmpwyFM3gRQF/gKiGVX9h7V03E7UEI2JTrgi6ytxGPb8tQ5CvUVjgWVTxLM8UL196jxAkA5uuI9TZ6g+7UCxBv74fQOkE42g0iNaNRiHQ0jEVBwlMEWEtScUqM9dbeirQeq/BVDxVYvJ1mwbFYOQgQacG4HyS/g+/FqA7GP4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b37e4529-cc03-4fc3-f2a7-08d643ea78c4 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:25.3020 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang This patch corrected the returned error number by convention, and removed a unnecessary error check. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index b87471f08a40..563210e731d3 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -819,7 +819,7 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) if (!pcie->intx_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); - return -ENODEV; + return -ENOMEM; } raw_spin_lock_init(&pcie->intx_mask_lock); @@ -845,11 +845,9 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) /* allocate the PCIe port */ bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); if (!bridge) - return -ENODEV; + return -ENOMEM; pcie = pci_host_bridge_priv(bridge); - if (!pcie) - return -ENOMEM; pcie->pdev = pdev; @@ -866,7 +864,7 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) &pcie->resources, &iobase); if (ret) { dev_err(dev, "Getting bridge resources failed\n"); - return -ENOMEM; + return ret; } /* From patchwork Tue Nov 6 13:19:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670313 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6114413AD for ; Tue, 6 Nov 2018 13:19:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4A3992A34B for ; Tue, 6 Nov 2018 13:19:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3E2A62A393; Tue, 6 Nov 2018 13:19:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E49002A34B for ; Tue, 6 Nov 2018 13:19:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388257AbeKFWou (ORCPT ); Tue, 6 Nov 2018 17:44:50 -0500 Received: from mail-ve1eur01on0044.outbound.protection.outlook.com ([104.47.1.44]:4455 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388116AbeKFWou (ORCPT ); Tue, 6 Nov 2018 17:44:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0qb0/iYVXl5Bpc+MJ4m43iRbJvao/IFvoOxipmC6V64=; b=Z3Xu/sa4Frm/2mraKn+9YDRuKnHvq3w1DzegoDJTfY2Q34I/VvwhF210/dfvZbyH3ICk/rQWJwV7PCaHPv52B+SpnuShO+hyItR89+LK4aQ6721c7mSb7bnBm54YNxcViZsJpzjJOrJ0etZM61jYuu/SMFf534JHKXi6k6Oebow= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:32 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:32 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 04/23] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Thread-Topic: [PATCH 04/23] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Thread-Index: AQHUddNaKsP++nomakmKhf5vdiC8Ig== Date: Tue, 6 Nov 2018 13:19:32 +0000 Message-ID: <20181106131807.29951-5-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:u0e4s4CbGqPsIrzvv8JB9qhm7I1uiSC6R++EFkkeQ8Zm8QhAqFnERkEiKxty6JUbyO0NO7TUvr/JY+Meeg2/hzPIieLA0spCfpGEqEhPthhYJObV0lzQqOCkKVaQM0R02Pm9mgixsinZnZY+z9L5wxlQFefQguQBsDTpI7thPFiAxLo4AD/SRLpnOv2c78rP9/yVyzTfXlQ/hQVQGcGoHp9wHGoVdAlFqZJySx0VSxoy36qvl2aUEJPVGsGk+VlzjiAaOlVYNq2YocSjMGKX0QF0p5DTg4jBqrRNNKUmUrHczOKwylzZlD3d2BCKCtsPeMjAGkv5qz76ocZ4L0LScxY0Xr8AZluBDD9jL/hr9NbrF8ON5/QLewGKef8N/zWcUBjRlQ+iQGBTeAnJ8aUj3yqEnRi8HMv3C6SGNzYbxd+H9S3shwfcUrK5kFpSjhPoYUwg7xRg3u1JbGd6KuoGoA==;5:jSztkSawfRlVI37TQLld+pm5YtnKF1xtMW3Y5zCTrhB4/uPx3VbAsNGeeMFu66zmiy18XW0BdmAgzv8fuP9iwy1oqs5sXwf3xHmx5/WH1/LdF8YA3t8OD0HLb/Lj+EAgoxAnF9VBr2yFrYjP2HPcgvgeT2b+6LHA05hM/L1CraQ=;7:HOlD9ae3YHTp4erk1YMfKvJKyIDjoFeg4ydQP6e3exixF9QUXhRhJ7QRpXqecNR3yYbqN+SwMcRyZbmJEBKV9vbCAmTDNLwyZT0UdPGTQpiWOMNUi+RVLVMfm20GON4RUVkrBo/TJWfQvmuL0bOv0Q== x-ms-office365-filtering-correlation-id: 6f3a157a-0475-450d-1513-08d643ea7cf2 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3231382)(944501410)(52105095)(3002001)(10201501046)(93006095)(93001095)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(14444005)(2201001)(4326008)(2501003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(575784001)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: ONDjVfDOWvJTtqmFcIZrF3V56ob4CUoI3K1ExNS2Gm+j6qQ1hiY4Y9nAe4GD8Bc93LkunPBnDGh1dL6i/8t/d/mYaE7konBY4SdEnntnFd3N+QAdy7ynvCPBjrkr9ovEMx4M6rJnljCsviFN/RO9JELOg14F64heBe3HGa8WO93NB0fj/8Q2Gyg/KXWkia9krCn0YTgIMAIbWJQe6+zQD7SYlb84vpCKklkZZ0ddpgOpnFkc64gX6vs76fw3msy5BkZtOv3sDXOCGl5IbmeqTquNaQ7oK6AMKzy6KvUPRzIvFmY1AiWYm+6+Jk9TwdeFY6EG251+UL3tiq9T6zzVE4xBfmppdgyHMUvWivMdris= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6f3a157a-0475-450d-1513-08d643ea7cf2 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:32.4227 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The current code does not support multiple MSIs, so remove the corresponding flag from the msi_domain_info structure. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 563210e731d3..a0dd337c6214 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -703,7 +703,7 @@ static struct irq_chip mobiveil_msi_irq_chip = { static struct msi_domain_info mobiveil_msi_domain_info = { .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), + MSI_FLAG_PCI_MSIX), .chip = &mobiveil_msi_irq_chip, }; From patchwork Tue Nov 6 13:19:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670309 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C97F413A4 for ; Tue, 6 Nov 2018 13:19:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B85712A35D for ; Tue, 6 Nov 2018 13:19:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AB3AB2A34B; Tue, 6 Nov 2018 13:19:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 865662A34B for ; Tue, 6 Nov 2018 13:19:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388116AbeKFWox (ORCPT ); Tue, 6 Nov 2018 17:44:53 -0500 Received: from mail-ve1eur01on0044.outbound.protection.outlook.com ([104.47.1.44]:4455 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388254AbeKFWow (ORCPT ); Tue, 6 Nov 2018 17:44:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lPhpcWs3Q8C0n9L9cxWHHveTmJo0itj+iLaZ5ZOefBM=; b=onwNo1oGV+w7bW15CAvTxZETEbbpfyR1RVu+qXs4yI24mUEScgiMxaUQelfeaab4/ovPDEUyAQ4Ekl2C3RioYCyyhHMIns0waKhH/GXxXJq8vKK+OhyQ18UPnpjHQopYLUNTmfRQNL1+XuKvGkSRtS2mh12M9j36Ak/N58DLxUA= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:38 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:38 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 05/23] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Thread-Topic: [PATCH 05/23] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Thread-Index: AQHUddNeL1I8T2u2cEmHB1HMg7sNcA== Date: Tue, 6 Nov 2018 13:19:38 +0000 Message-ID: <20181106131807.29951-6-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:zjPYg1qM/Cf2Vzs9pZQE18ta4BaWyvEVmcpigbchDmipx7PR/uFkRL2htA/Pdhlki/P+i6Zpq3ZriaQzFR0RyU3WlH+R/numlV43RuMQBTPJlV4QzmCjjqkgJ2BTHdQPVI3iyN6oHG5L/uvQEj6aEj0+5ECq0OEszpGpnz714yqtWwQyEWlWY1HYOqIr7JOzCHkI54/xBN2MzJIELjkIrNT3VvHG8nH7X9LbuMePyJNpzSJqHO0Gxj08FkBdoTe+qPzr+MawnZQ/Sa8ISl0stcXb2iDeJlu/pUzVk5OZ2zH5LmaLz1MXaOYkq4078uTsGPLXcUtnAsW88EcoI/D9gNB/Kms6G1IcI5scZfrAmaCOpbD6uWz4/ggPbJbqIQubUCeqO6MqpENeeAVoeihfFNWkQVd/GNCDlKxE91GMUEFHTlv+LQXv+LtJfVJN4kMwSOhgTL6CgoXOTTd6tcb6GQ==;5:MKmHZZ15mqV502MMDY3JhuGBoiv8L/awAbJEaEwBm5A47sltV41XZ0hCtrA/fGI1MJAEjpF74N+IuuOrofhhUaHpQ9PMQ+m8tQzsjrpmRubP5szAGujB4z/V22Q6IxPr4gqPENYNgPWv4SSRbqQU3qzv5QpjkLH3scvPap3sCvU=;7:3q+yTU6XkPTDQ+AAFUQQtFjpvSeVtTR/aovvGQwaK66x/7dXW9s8ENEBj70FSBwfuTwTfWODY2rmlg0o44fpHanjaUf0iiBOAHbdhULhaMTM1ZWrMWuYRoC85ZFo4yJGZnSb6KWE0f1lRcCCA56HPA== x-ms-office365-filtering-correlation-id: d5efcf71-2e3a-40c5-0c28-08d643ea80a5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3231382)(944501410)(52105095)(3002001)(10201501046)(93006095)(93001095)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(2201001)(4326008)(2501003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(575784001)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: GUBl9WX0rRPv7Vw7AOmYPHVoH1+8QhM9t7Yca0ZgAftsKnP77B0JTGRt6gEXLgDXquSxN5r8V+UGAz+kewVJO8ndALYQxFUOQrVJeF6rZZOi/iftBkyXqc/q3pnoTMxELDtrUwlAf+fJeVb/5/2+HJ7OkbwCv46YhfbUE53PX38UjNuWG02J1ZL2UtgWAGYnMFegqupQc3dI3+efLUfXg6m/ActQi/1nPxUn5nfn3Cqtj0q32VrMQcHl48HZtXEdsxIaYHwJA6yeOZnoG0xlYDsWIL4qyeUru+/HLz0uyLCo/7V73rsoGYxXTYOrT7T0QUz8BorOnUc30R9LMVjBIoMo0j0HC3vVE+pQKUXe1oM= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d5efcf71-2e3a-40c5-0c28-08d643ea80a5 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:38.4546 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang It should get PCI base address from the DT node property 'ranges' to setup MEM/IO outbound windows instead of always zero. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index a0dd337c6214..8ff873023b5f 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* configure outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, - win->res->start, 0, type, - resource_size(win->res)); + win->res->start, + win->res->start - win->offset, + type, resource_size(win->res)); } /* setup MSI hardware registers */ From patchwork Tue Nov 6 13:19:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670315 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3998413A4 for ; Tue, 6 Nov 2018 13:19:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27D1E2A34C for ; Tue, 6 Nov 2018 13:19:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1C1882A393; Tue, 6 Nov 2018 13:19:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD5EA2A34C for ; Tue, 6 Nov 2018 13:19:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388323AbeKFWpC (ORCPT ); Tue, 6 Nov 2018 17:45:02 -0500 Received: from mail-ve1eur01on0054.outbound.protection.outlook.com ([104.47.1.54]:27020 "EHLO EUR01-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388254AbeKFWpC (ORCPT ); Tue, 6 Nov 2018 17:45:02 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ITN65Tw7kmahmu2x6f3Sa+TQdaCKzjrriWUPO8T6uzo=; b=Z0YgfWAXLaUCvN6AiPRg7S1b7d1rJpWS0Tiplbz1nhe40Xg0ilg7NU7LCduDYVzFy1MLSg8SjvLSmRVfIgWqtxr/yAeU/5he6VXUyosAefDCr7F7qmJtwo2ANSqjcrjlxojYNuhY2JWDTVtQas2ddNdNwseF88GERI7Ltdupxx0= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB0984.eurprd04.prod.outlook.com (10.161.196.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.21; Tue, 6 Nov 2018 13:19:45 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:45 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 06/23] PCI: mobiveil: replace the resource list iteration function Thread-Topic: [PATCH 06/23] PCI: mobiveil: replace the resource list iteration function Thread-Index: AQHUddNiS0TfUu12MkCKemU5AZPRtA== Date: Tue, 6 Nov 2018 13:19:45 +0000 Message-ID: <20181106131807.29951-7-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB0984;6:wGoSfKClWftm0958WpCUj4o8+E4PNjCqLWwvxBtfeLEKel+YFxaFdQvzqVlqACVaRMTIKyl00SJ4a5F18O0RCrbtVUlJj3w1xKxGNNvqzRFfCriI9rWsxhznaoKwitpSzqO3A1Fp9Lho5pcLoKAND7ihRpycOKcuPoDqmQ18J7lb4JF6G4uK416VZ7ikinWqQN1WKTkoxQ8sShp7w3/NAubhJz0bw5Qn/kAlqSV3nMVcy8KK1WLNfdO1ldxRjGqTu8QaDDNoJcCJqFZM/7H1sZtJlVTBQqOzagZ6NElMKzk43wmTaxflsdrW7viAq6siV/veqhncSW84qn+Rt6QNqI2oeWp/JYoyRXRkedkwbtjsQ6j6EcPhzgmSjOfcgSu4DfwFII/JsSOcQXAbAy6CPyNYllwVhoyOGUn/8Gj27ojeUmP2WfBiWTW7wHZ+6tpumCU1GC+ofptWU4R5wmMrhg==;5:RLLCFMK0RcvGVRHe275Y9NpcErdix8o9Gl1sw5PnBkICuUAIhwe8PBmtgWoLBVbuC+qvlz6N0VHxeRIWS9J56qZ7sJugbSv2WuQ6F5au7TA6FdILDXwl0mQ1P78r8clh67rFyJRqw75mxrFsKbwYjKQAILVfSAT4BjA2MLYQTAY=;7:ez+Nnfcz/mMqs/FcNpKISQ2cVXZikTmo0HJtDuJ5i9NTdB1a6SmXugacwnSdp3R8vJqIdrWbd99hqj3AKOtBm2gxTVcZ8oRxEBqgEXxIkjyV1rM1GvMih7aKrQPodOr/lFsrm9ft5NBh0x71LjiZVg== x-ms-office365-filtering-correlation-id: 8519397a-8d7a-4b5b-2fad-08d643ea84a8 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB0984; x-ms-traffictypediagnostic: DB5PR04MB0984: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(788757137089)(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123560045)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB0984;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB0984; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(376002)(346002)(39860400002)(366004)(136003)(396003)(199004)(189003)(68736007)(486006)(386003)(8936002)(3846002)(99286004)(71190400001)(81156014)(71200400001)(81166006)(53936002)(8676002)(105586002)(110136005)(54906003)(5660300001)(2616005)(446003)(11346002)(66066001)(97736004)(305945005)(7416002)(476003)(2900100001)(7736002)(106356001)(14444005)(2201001)(4326008)(2501003)(25786009)(1076002)(186003)(6486002)(26005)(2906002)(256004)(6512007)(36756003)(6116002)(6436002)(316002)(102836004)(52116002)(6506007)(86362001)(14454004)(76176011)(478600001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB0984;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: hLKPzKQoD9N3fRwLNFyZt3RMIC8/mE9U2W4vRTi5N6rdGntFWllQIwMuvIenrwwOzzEjApQlteYd8QUHJDvPkeg8/7X0VY183zDO6WQV5UElHwDvD90c1+SJWGEp7lswZlwB+N/DJO+9mX7qyQfH7WYfE3IR/zDZmGkpaJcyvD7W7Z32McHx1wQxC+fB8QLFbbQPiECSsLdGJatm1DbELt+aY5VJjOwHH3PEAnbGBRV5gYthN8hhc83FB8uuqicruv+Sjip8jOURd/VDiSEe+W714pfRi3FXDUpXLNOGwf5/NpuvfFRgxK8GKpFYUd8NenyNc6uqO+ehpjexH6aHvs/v9QWjb0R9mAcUqaTj0mI= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8519397a-8d7a-4b5b-2fad-08d643ea84a8 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:45.2271 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang As it won't delete any node in this iteration, replaced the function resource_list_for_each_entry_safe() with the resource_list_for_each_entry(). Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 8ff873023b5f..b2cc9c097fc9 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -569,7 +569,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) { u32 value, pab_ctrl, type; int err; - struct resource_entry *win, *tmp; + struct resource_entry *win; err = mobiveil_bringup_link(pcie); if (err) { @@ -620,7 +620,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ - resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { + resource_list_for_each_entry(win, &pcie->resources) { if (resource_type(win->res) == IORESOURCE_MEM) type = MEM_WINDOW_TYPE; else if (resource_type(win->res) == IORESOURCE_IO) From patchwork Tue Nov 6 13:19:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670317 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD34113A4 for ; Tue, 6 Nov 2018 13:20:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7D8C2A34B for ; Tue, 6 Nov 2018 13:20:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 929952A3CB; Tue, 6 Nov 2018 13:20:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1DD172A34B for ; Tue, 6 Nov 2018 13:20:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388331AbeKFWpI (ORCPT ); Tue, 6 Nov 2018 17:45:08 -0500 Received: from mail-db5eur01on0058.outbound.protection.outlook.com ([104.47.2.58]:39970 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388254AbeKFWpH (ORCPT ); Tue, 6 Nov 2018 17:45:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZS2hRXJJlt/QVQw1liM73vw+1a0UDYm2S5hjWyMQFts=; b=IHyprFuhLes4pR+MiVlSYWCjv77y3iuygokt216Aj85MO2eJctc0hvfdPAL5SGx3VPwXW3xqIjtr71zXKURMPOGvS7jW4J2wIWwIYZWuIkBzBufOZ5txKV07ilEGGclBJVz84LuTwl1E5NWJlXJyXc5eqUljOOeKycMujhHnYXQ= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB2119.eurprd04.prod.outlook.com (10.166.172.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.28; Tue, 6 Nov 2018 13:19:51 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:51 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 07/23] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Thread-Topic: [PATCH 07/23] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Thread-Index: AQHUddNmDCFLeVfDxUWJtUrD4ryopA== Date: Tue, 6 Nov 2018 13:19:51 +0000 Message-ID: <20181106131807.29951-8-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB2119;6:TwzdiO+IU9aArC5e7x/NeFhZEwVJfy934UxqDcVh8BlfWr/VYIMYn5NkWdr2bR6Wahl8A7qnYmFAigHX2xGuM7KiUOTQngx7y7VyE0XCuNSl1CZajpgj26/F3OnyGIjcAC2CMg40+VXnw23G7gmQf4AiEf2ZT6HFUw/jYMjVdFCyrXvTxGzginD7veAw/IdcL/GS/f18oYvpchotXiERFOqNDNPfGxVi3XSNhmNLs8RGUKxUU6BNn9C5EnO7yjr5YI79QreFALJzZvUC1dldMbXlyKUnrh1ydT79fUcNx05J+KAQrMuZf/RzyQfjvo/7pIB+8pF30iMJpE9PCS1SkEvV+AgR8uojuU3m/7Vg3fn3tvJBos1h9kuvsplKQKCCboDJyF8KSeaP1dmgTrmSMfoRM1SHyEMOP6bsBCeET+BQ7hMea9rUIKaEBXjK7wz3Hw6a/hp0e9nhVilIaTHcJg==;5:IjDjfuVgo8kYNDldW/D5aY8x52HRZJB2NNZGnXVRie1p7oSVM/AV1lRlcRyp5DLYY28llog13XL/ifQ5ZAcFL0o8H0Oy1FW2Iy8FrZhgj5fVxECAudlMJ1WNda6/yPhGy2iW0sCXmhiqVgOj7kSiCW4nqSQJ/TVpV4M/rORMLbE=;7:MUr1uy2Xc46rxgtKe6jVg6YG0fGTvMWIjXRwtrMQMYRJs+GOPaxc6x8kAd8RU0vhCGhZ3gqG1fDm6Ur9IMjTkonHYPDEYrIARPOSl0yOU58GWjKJndrLD+XsOr45VTdTTWfpEiEse26qAFiI0VDKmg== x-ms-office365-filtering-correlation-id: 291cf0d2-e04b-42c9-256f-08d643ea8847 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB2119; x-ms-traffictypediagnostic: DB5PR04MB2119: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(3231382)(944501410)(52105095)(10201501046)(3002001)(6055026)(148016)(149066)(150057)(6041310)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123564045)(20161123562045)(20161123558120)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB2119;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB2119; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(346002)(376002)(396003)(136003)(39860400002)(366004)(189003)(199004)(81156014)(99286004)(2201001)(8936002)(86362001)(6486002)(68736007)(6436002)(5660300001)(478600001)(53936002)(6512007)(4326008)(25786009)(36756003)(14454004)(54906003)(186003)(316002)(110136005)(2906002)(2900100001)(1076002)(3846002)(6116002)(81166006)(8676002)(7416002)(256004)(446003)(11346002)(486006)(476003)(2616005)(7736002)(305945005)(71190400001)(71200400001)(66066001)(97736004)(76176011)(52116002)(102836004)(106356001)(26005)(2501003)(105586002)(386003)(6506007)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB2119;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: f/NXZwHG+kQfDwzZmcI2fbnC1cJroM89gRPyo6DOykKRMGMD1c6XrGZuLI1VumAREHlOsyvSKhTrhw8Wkh4TRuM1Hgtfh380Imx8eme+BxXJFXrePjSiJfjjPnVt7J/MC2KmaHtAffVn9KGAEa4Z1nq0AvGGrUiTHi1IbaYs1Bz+UtaxXLmMvo6PsDuCPJkOwQ46m7+7wFZNpE6fKvpWt1witWACHmAwvl3l8DAzzgJ2q/fy36NuGaJZqnT3dsiaVS2y9lvnIzkAA6q4IE6fW6cxvgkOUbKPs/RVbHI7U+HVegsr9LSF5JJi3Jadi/FJSh2lZj+v3/mbq1KOCZe0zzoDkt4fJ8loKVDMBLlk1Sw= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 291cf0d2-e04b-42c9-256f-08d643ea8847 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:51.3130 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB2119 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang As the .map_bus() use the WIN_NUM_0 for CFG transactions, it's better passing WIN_NUM_0 explicitly when initialize the CFG outbound window. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index b2cc9c097fc9..df71c11b4810 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -612,9 +612,8 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) */ /* config outbound translation window */ - program_ob_windows(pcie, pcie->ob_wins_configured, - pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, - resource_size(pcie->ob_io_res)); + program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, + CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); From patchwork Tue Nov 6 13:19:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670319 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02EBD1803 for ; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E91882A3CC for ; Tue, 6 Nov 2018 13:20:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DDFE92A3CB; Tue, 6 Nov 2018 13:20:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A0C132A35D for ; Tue, 6 Nov 2018 13:20:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388350AbeKFWpM (ORCPT ); Tue, 6 Nov 2018 17:45:12 -0500 Received: from mail-db5eur01on0042.outbound.protection.outlook.com ([104.47.2.42]:33016 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388346AbeKFWpM (ORCPT ); Tue, 6 Nov 2018 17:45:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LyBCotOB/4UBwLRak7AHF0ZaJZcy4ZO/gV3QOKviEd0=; b=t3batCTkmNXYjgemRl1LYAewSKEjEs1LhYPwAslLrHlpZ7MKEH39cFLvliqBvdezhv4O5Agojj2rN4WKGo0DvMs4rWuqMxH9PFaYSSRVmxKb1lbF7no2xfBG8+yy4eiNkPtyFeBz2d8T5Jvf+pk7bSLqTjF6pCSMkAWSqOgQT+I= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB2119.eurprd04.prod.outlook.com (10.166.172.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.28; Tue, 6 Nov 2018 13:19:57 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:19:57 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 08/23] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Thread-Topic: [PATCH 08/23] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Thread-Index: AQHUddNpdXj5L9iawkiutXzPzwWf9A== Date: Tue, 6 Nov 2018 13:19:57 +0000 Message-ID: <20181106131807.29951-9-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB2119;6:zAlVBRVBJiJ3EJ3y7SX2nqdOJne8LEP0gsuDfeglcf1+yE+DuT3kn6pgqzZ0xBoghqQal464kEVoOY2AkIdS7pR4ZNy7HUEUOfOvny1tW+TLVf1O9zzl1rOFMC8R4QCEJWK5ZIU5ly/xoB5W61e28Ds6qaS9so+y1bP4SZoZqiteoMFGMyZKfCM+rJcDDyFduCdIGidHWCIS9wzTgPV3aklZzC6BEcWkR/m7onQfUg1rPZarsYW5oNadWMpqJOR0MOw5YBku24w4KLGtyO9+e9KRtFQULCZM1KGjvMjsWx5l5VmD4qGaVl27YG0cPlFYmvWmc1oezS2nKU/p1wGqPA+ZXBKXFH5Xjr/VnBGNQ/s+zDVnlVkZ54zZzdbsYRr6wQo/rIzPrnp1p09icQg0MqhhGBmIswze3HS6hxFsa93gR8CDDqNCJJTuDEH9UXhVdG3DBWzqzGVEYEey+tmK7A==;5:L9I4PeE+uLIjufaGxO48gWCPlegreotOpP+MUdGTKhnnktIJwAMTLhaHQzBGfQ0JyZAKf4g5B1OGz9zBEvZZcbaSpJuyDDiyihuy7VWrcAj+sEvu84Qw1atvFrod1yrYcB9XNoRpYMVUQ4SmjdAdBFMOl1ASpzxCoLEUch19laY=;7:HyRLDW6026r1MhcIItLiJOkAH7KZeVP06kMWCfEcwGBqau1jaTTP0ODwrIfU3/USmr28jOclxf2BytQcO0gjqrdvKvQWJ2plksWc2HwMRlhEf/4JpN8w3IRKlRdtokXX9zYqF3OZ7CfEt9sdhJRHHg== x-ms-office365-filtering-correlation-id: c696d1ab-4eef-40fb-1ef0-08d643ea8be4 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB2119; x-ms-traffictypediagnostic: DB5PR04MB2119: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(3231382)(944501410)(52105095)(10201501046)(3002001)(6055026)(148016)(149066)(150057)(6041310)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123564045)(20161123562045)(20161123558120)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB2119;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB2119; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(346002)(376002)(396003)(136003)(39860400002)(366004)(189003)(199004)(81156014)(99286004)(2201001)(8936002)(86362001)(6486002)(68736007)(6436002)(5660300001)(478600001)(53936002)(6512007)(4326008)(25786009)(36756003)(14454004)(54906003)(186003)(316002)(110136005)(2906002)(2900100001)(1076002)(3846002)(6116002)(81166006)(8676002)(7416002)(256004)(14444005)(446003)(11346002)(486006)(476003)(2616005)(7736002)(305945005)(71190400001)(71200400001)(66066001)(97736004)(76176011)(52116002)(102836004)(106356001)(26005)(2501003)(105586002)(386003)(6506007)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB2119;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: o3ny4DSrn8DdYN0DVyY2QGtrbXAvVc9FzUvtRXdEZVXCxw9IcAPJh0m2VnVYqpNScp9hW0Xl+cbXHXRCa3ISBBsoOF//86F2z9V+LMokF9oxXJLw1YYao8XNBloM7AGj4qD1O7uItbgA3TFS37ZMOsv/Nt+760EX028wwQVxhetdvM0rR7QDturfkrByZt+fOYLu3OgWm5i1T89biGAAvXUw76rcol7Tcx9XNQqXgoQGn4BUPgew+jh5rg/bNNLFMB50PsOFKW5lPtzXrPoQh1MPOEkmGP27guQXCFref+NpE+noQx2B4uecmrldPfSyDPL/H3qEFVtPSlD3VAs5jJ+5c4poN0GKVKbT0SpBqx4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c696d1ab-4eef-40fb-1ef0-08d643ea8be4 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:57.3629 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB2119 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The inbound windows have different register set with outbound windows. This patch change the MEM inbound window to the first one. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index df71c11b4810..e88afc792a5c 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -616,7 +616,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ - program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry(win, &pcie->resources) { From patchwork Tue Nov 6 13:20:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670323 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 97D9513A4 for ; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 87E0D2A34B for ; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7C1A72A3BE; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F32C12A3BE for ; Tue, 6 Nov 2018 13:20:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388387AbeKFWpU (ORCPT ); Tue, 6 Nov 2018 17:45:20 -0500 Received: from mail-eopbgr20055.outbound.protection.outlook.com ([40.107.2.55]:14549 "EHLO EUR02-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388368AbeKFWpU (ORCPT ); Tue, 6 Nov 2018 17:45:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=E6A//kSWAA3pV67hmBpmbuxuzUfqX8FwkLzvfGvYX7M=; b=qyJGIfoRV861U7z3Jacv+piM5mOgmsR4n/yy99AmE1ZwpiHZqsv+ITZJ45h8wWhPmLeqB8C3zqarZ2BQp79RgEPPel+MB+lveBEFzoGSoxFcNaZkoTLQo3pPKg+46eBX9/jWg/jUY4L4DqOUcmFO4UNwUtcSi4Q+TAMFSqc1/I0= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:04 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:04 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 09/23] PCI: mobiveil: correct the inbound/outbound window setup routine Thread-Topic: [PATCH 09/23] PCI: mobiveil: correct the inbound/outbound window setup routine Thread-Index: AQHUddNtMbL21S1CEEC9/74fdJoQhg== Date: Tue, 6 Nov 2018 13:20:04 +0000 Message-ID: <20181106131807.29951-10-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:CPGlyQvdVpjBxYKeB9J/1afP1M+njcCRB5tH/dfEyDUGhv1wc6B6hkkArRRxYJe5qbymWlaVpRsG0vtMtIhmIg7CXJimIuibZLzWEgkZAXdmDvs5rm9Lx0s9/E1VzD+WWuc9nFECdLrJR9sgMdyImKlTKDi/2jr0BWQqhWBvU+wxIGzcdC3dySlffudakEVCz/Rrg4eLIRG9wdMMaZyGLEB4lHheEPnACzx33/7R9KJajsoQy0YUF8J8zmg1JsL7Qj2FVsunAvGiNo0rFFWNdJWHescfeLqlTB7JyqCf357l8BnKvCmzpQQsWZ7d9GGrn1a8NW/AEJ29kBpc+RQatvEtTuz7DOyeRTR7XGGlu1FcoMiFlbrVZPntUZQ8GTYgnl6S04Gb8tJeirfj5lZBnhuxJpD8MuRdXT58i2KdKoxuWayJ0H1ln5X8pjmtNyyTXz60n8oO7JXQ4Qxes6IvHQ==;5:Lje3RB1Bim7DWFQiboROOLocAshuBh8mNa+Q/kwjYyKfHF5eIjylXFqoFuoaGq4HKQ5nAZnA85f3EFP19hR0OvhLjHTyehqXNJfRwlcP4jemvVP3tEiwwFsSx8x3x8RI9AXjrk7S/DIDMN6UxsECDRJZnaYGIOvdb8Gn0/MRDpo=;7:lHAlME0PxQEuIg688ONbqabB3f1tahbp3y/4kT3r8R+T4gLrJpFZEdUmJmxxE/nY/nBR48Wc0VTNrHm3oHMVEukDXY1N9LffAUqBTos2siekF+b8hlxTP8Wjpuqmtz+/rkDQ2knXuZ1e16xikIA5mw== x-ms-office365-filtering-correlation-id: a803228c-7357-4991-e1ae-08d643ea902e x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(575784001)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: xgnRhqXvoq9gXtf5bXV35V0aGytEcLIcXiSpART+XynKjNgPgd+QsQ3Std2A4AiEUz2rL/EyJb+Ww3UIltIYj3FMA8ybEvMoouzsYJJp8UOxAI9PwYLHd7mnUdKPjruFbUq73ogoXQ6iSS5Wj63aHO1jowLn28OJ27G+wq5pjYejVZMUcngyl5ldrmFrdgmuHs3Bmf8q+gQ1iiNH70Hzfx+BGXJCcraLbUoF//2mzP8kq3AUiSpNIErPZXDHwL8mZxl+CrRUJYkZ4GFeqvP3DAIZM9EI/et36lU161cKmeFWL5QkPzSYjUEqZWUsVEP+p2jJjCsgsHxqlmODxbV5REEpgYxrk5Mw48u1ZDzeOuU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a803228c-7357-4991-e1ae-08d643ea902e X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:04.4527 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Outbound window routine: - Removed unused var definition and register read operations. - Added the upper 32-bit cpu address setup of the window. - Instead of blindly write, only change the fields specified. - Masked the lower bits of window size in case override the control bits. - Check if the passing window number is available, instead of the total number of the initialized windows. Inbound window routine: - Added parameter 'u64 cpu_addr' to specify the cpu address of the window instead of using 'pci_addr'. - Changed 'int pci_addr' to 'u64 pci_addr', and added setup of the upper 32-bit pci address of the window. - Moved the PCIe PIO master enablement to mobiveil_host_init(). - Instead of blindly write, only change the fields specified. - Masked the lower bits of window size in case override the control bits. - Check if the passing window number is available, instead of the total number of the initialized windows. - And added the statistic of initialized inbound windows. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 69 +++++++++++++++----------- 1 file changed, 41 insertions(+), 28 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index e88afc792a5c..d03392940944 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -65,9 +65,13 @@ #define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) #define WIN_ENABLE_SHIFT 0 #define WIN_TYPE_SHIFT 1 +#define WIN_TYPE_MASK 0x3 +#define WIN_SIZE_SHIFT 10 +#define WIN_SIZE_MASK 0x3fffff #define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) +#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) #define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) #define AXI_WINDOW_ALIGN_MASK 3 @@ -82,8 +86,10 @@ #define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) #define AMAP_CTRL_EN_SHIFT 0 #define AMAP_CTRL_TYPE_SHIFT 1 +#define AMAP_CTRL_TYPE_MASK 3 #define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) +#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win) #define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) #define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win) #define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) @@ -455,49 +461,50 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) } static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, - int pci_addr, u32 type, u64 size) + u64 cpu_addr, u64 pci_addr, u32 type, u64 size) { - int pio_ctrl_val; - int amap_ctrl_dw; + u32 value; u64 size64 = ~(size - 1); - if ((pcie->ib_wins_configured + 1) > pcie->ppio_wins) { + if (win_num >= pcie->ppio_wins) { dev_err(&pcie->pdev->dev, "ERROR: max inbound windows reached !\n"); return; } - pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); - pio_ctrl_val |= 1 << PIO_ENABLE_SHIFT; - csr_writel(pcie, pio_ctrl_val, PAB_PEX_PIO_CTRL); - - amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); - amap_ctrl_dw |= (type << AMAP_CTRL_TYPE_SHIFT) | - (1 << AMAP_CTRL_EN_SHIFT) | - lower_32_bits(size64); - csr_writel(pcie, amap_ctrl_dw, PAB_PEX_AMAP_CTRL(win_num)); + value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); + value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT); + value |= (type << AMAP_CTRL_TYPE_SHIFT) | (1 << AMAP_CTRL_EN_SHIFT) | + (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); + csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); csr_writel(pcie, upper_32_bits(size64), PAB_EXT_PEX_AMAP_SIZEN(win_num)); - csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, lower_32_bits(cpu_addr), + PAB_PEX_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, upper_32_bits(cpu_addr), + PAB_EXT_PEX_AMAP_AXI_WIN(win_num)); + + csr_writel(pcie, lower_32_bits(pci_addr), + PAB_PEX_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, upper_32_bits(pci_addr), + PAB_PEX_AMAP_PEX_WIN_H(win_num)); - csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); - csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); + pcie->ib_wins_configured++; } /* * routine to program the outbound windows */ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, - u64 cpu_addr, u64 pci_addr, - u32 config_io_bit, u64 size) + u64 cpu_addr, u64 pci_addr, u32 type, u64 size) { - u32 value, type; + u32 value; u64 size64 = ~(size - 1); - if ((pcie->ob_wins_configured + 1) > pcie->apio_wins) { + if (win_num >= pcie->apio_wins) { dev_err(&pcie->pdev->dev, "ERROR: max outbound windows reached !\n"); return; @@ -507,10 +514,12 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, * program Enable Bit to 1, Type Bit to (00) base 2, AXI Window Size Bit * to 4 KB in PAB_AXI_AMAP_CTRL register */ - type = config_io_bit; value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); - csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | - lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); + value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | + WIN_SIZE_MASK << WIN_SIZE_SHIFT); + value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | + (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); + csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); @@ -518,11 +527,10 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, * program AXI window base with appropriate value in * PAB_AXI_AMAP_AXI_WIN0 register */ - value = csr_readl(pcie, PAB_AXI_AMAP_AXI_WIN(win_num)); - csr_writel(pcie, cpu_addr & (~AXI_WINDOW_ALIGN_MASK), + csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), PAB_AXI_AMAP_AXI_WIN(win_num)); - - value = csr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_H(win_num)); + csr_writel(pcie, upper_32_bits(cpu_addr), + PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); csr_writel(pcie, lower_32_bits(pci_addr), PAB_AXI_AMAP_PEX_WIN_L(win_num)); @@ -604,6 +612,11 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) value |= APIO_EN_MASK; csr_writel(pcie, value, PAB_AXI_PIO_CTRL); + /* Enable PCIe PIO master */ + value = csr_readl(pcie, PAB_PEX_PIO_CTRL); + value |= 1 << PIO_ENABLE_SHIFT; + csr_writel(pcie, value, PAB_PEX_PIO_CTRL); + /* * we'll program one outbound window for config reads and * another default inbound window for all the upstream traffic @@ -616,7 +629,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); /* memory inbound translation window */ - program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry(win, &pcie->resources) { From patchwork Tue Nov 6 13:20:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670327 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6FD681803 for ; Tue, 6 Nov 2018 13:20:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E0112A34B for ; Tue, 6 Nov 2018 13:20:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 51E862A3A5; Tue, 6 Nov 2018 13:20:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D24C92A3B2 for ; Tue, 6 Nov 2018 13:20:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388409AbeKFWpZ (ORCPT ); Tue, 6 Nov 2018 17:45:25 -0500 Received: from mail-eopbgr20042.outbound.protection.outlook.com ([40.107.2.42]:4545 "EHLO EUR02-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387913AbeKFWpZ (ORCPT ); Tue, 6 Nov 2018 17:45:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SVB+Q3p2TSvssytRdo1ioIXIUh9auspubyHuck3Lfqc=; b=fryNB+YnFa2EC2sdXZjjq8wa1nS40q2UGK06XNUQ9t18TssAyXLCW+YtzAoHSf0oZ1Th6BWOdGgP+YWrmLRdFaznod5wwomb/QlmLFr0kJvmvAFBvurtlHjr73kMOofUm/ofiyXzSXBUlxbHQzEpR7ZMMW6B73rj75Cus4Ihtxs= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:10 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:10 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 10/23] PCI: mobiveil: fix the INTx process error Thread-Topic: [PATCH 10/23] PCI: mobiveil: fix the INTx process error Thread-Index: AQHUddNxtNgB2s9yF0+e35QgaH10Fw== Date: Tue, 6 Nov 2018 13:20:10 +0000 Message-ID: <20181106131807.29951-11-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:d08o9ZVklfQwu+oTAMmRn/9YziXgE1YANy66qM7g612HYi8O2DmUCeNYPhwqKcsCl/h61OYt+rhf7eXqz+3BzlLho6hvoLW+9vlv3OX3UQO/w2CIFX+xrdWt60zBGWgEp0aqKXh4tow3xazsP7Q4gKjRV4sCzcdY56OWOVGqFljvSPV4EBefTGXi+olVMVWqjGpzJX66qvCLaIGyMW3DRJ+LLoB19s4JwxY5hRvkm3b9vmABFSZtuV/ZWgbQzajRsjjrbQNMTF0fwM9bV2uu+qi8cNdqMm2x+xdNs8p/6BU1lidAuEfX0LO3JeCEordn+QVJUS0dHscY/knrRxAOVvoU1i0GiozQ25F5mUU+ii1fCHUcI90QF4OvfZxTg6PNLtXHMpqiYMEWSFySSlLz3JKIMIwJewEic9RhPkWHMT+Wo0HSj6qhE1vxu3dkPPElcA3GKLXtPdxzdqndMiLISA==;5:o8KxXnzkeI02o0nVd3i0Q1haNwb+hNHcVUx8Mn/Pk4I++uOkPZraOjElvW/BkxBUWU++5SOlVrHLDLDitB3eFcOQ7R/wqYESJBX7W/Zh5NLbu/uLGOVFGGhln+b8yLdOrD9sKHHY1oKvVLnW+A5FMSYcT0+FxLvrnxnvRJIiYcM=;7:lnvLsATFXbSE96y+anN1Tk+roFBaY4/y9MANxfMH/n3NkcBJ29kLKcey2pk0KGRr5UqRrN2Y/zUEYSJXLtP2bxACo0S4/uHZDLKQivtqA0I087EWkezZNshiWrkmkWq6Oi/IOOK47CY1Jjok2zxnbQ== x-ms-office365-filtering-correlation-id: dbcc4256-4f20-4e1e-2442-08d643ea93ba x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: cnwPQLha4W3N5kWd35YpjtlcA6kOFOaV3IlWuALKXoDyhA3cYjhgIinfj1cNxEqHLFUQ0shAE4N/2g3788XjhWrfCYL6rR9/BPWLGvDl656hqb8aMZv9IIzdpvSs4KuZpybHOwxw83cpxLJ/h4i4CtIliyvcZACSDa4sHPFdxGGZI16Y1sQa5bD9cfgxqZrYaxtdXmsrgWj4bq1vdbOTyXRqiZMHnHUKYKF3AP2w/WqThWsAS71q79g06k6nwWwEh0A3aiTrRXelYVmFXzrQO+h6pFBBZE+P/NwS3H4ZPzyCgvR7dRMmMtgpiuKGSUXcxMK49S+0gp28ObB7/M2LS6cMMglDqjt1ftG9pe40qwA= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: dbcc4256-4f20-4e1e-2442-08d643ea93ba X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:10.2694 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang In the loop block, there is not code change the loop key, this patch updated the loop key by re-read the INTx status register. This patch also change to clear the handled INTx status. Note: Need MV to test this change. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index d03392940944..884c9f95374d 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */ From patchwork Tue Nov 6 13:20:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670321 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4432C1923 for ; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 359BC2A34B for ; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2A4242A3CB; Tue, 6 Nov 2018 13:20:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 341412A3C3 for ; Tue, 6 Nov 2018 13:20:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388429AbeKFWpc (ORCPT ); Tue, 6 Nov 2018 17:45:32 -0500 Received: from mail-eopbgr20070.outbound.protection.outlook.com ([40.107.2.70]:53248 "EHLO EUR02-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2387930AbeKFWpb (ORCPT ); Tue, 6 Nov 2018 17:45:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vLCzTSVXqk69mjV2G0uMjdSuJB0D7mj0QkDfLtG61lc=; b=nx7neKGs2mMSe4Uym3gizNi4EEC9paTqqDbAMph9jLd6JUhxesErw2seBa7Cvw6jM3JL8hoP1njqtkA+EKg97VeCyFuvvslnE9RIP0uweL9u+3PRbrBegyWMRSoV9x507NCyh8lNKbe44n+LyonwoLYjfMJXDmasf0s4xVRcj4c= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:17 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:17 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 11/23] PCI: mobiveil: only fixup the Class Code field Thread-Topic: [PATCH 11/23] PCI: mobiveil: only fixup the Class Code field Thread-Index: AQHUddN1NZze+4D3a0WmVRogFB+YMw== Date: Tue, 6 Nov 2018 13:20:16 +0000 Message-ID: <20181106131807.29951-12-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:M7txVNWWM/xN+eQBg3HFXyYnHcV3le7ItrSVU4pgZrDDeSL5x4qCo9ANJUqsPzAAv+v31q5OcSHjmw0JUVtzjdyB0nLofc+bYzDd65z3bIXlAnOFiXkyG94filzcBJQ1tVG5vmja9FNkciHV8E5XKLq55ScaDaFaeK2yvoEnBBq/EG7g88Mb3gVeqp0XTKFyWiJwU1ohJ9/uHlQmCvGgFOUknXkvhSFDn8srBjjk62kdJddvPz5uUMWGbFEhfIGTsfbTl81oCedVSnbpfocHEE5ozWyq9SSSlDk2VIPj0E7eXcUmxbCih1l1kf/q+Hkp+rFGFfe7VMEYZh72PdA55YllWHSpcQHuJ1C3t4aW1nsyh5MwsO7ooRqcNrTwHg1m4Rbb1UIPrPaIPKdAkTrRLV2SWBYfeU20CsJl/ODbHNcQAs9i0knlWeZvCt9GwU4FHhb4N9MIt6VyBwdzbZxzpg==;5:DGTZyReU+cZAnoZ9cUR734rNtYRr7753my6xe/C5qQhTWb6SkuZ561vJrK/AwCK8fP6s4WydJovEaNQNidJsG0c/zukomzCTdn7i8QJOIArXpIhxrw+ADofSx4YTEmxUxKz+OKh37UKrgHcnkR3x0q+qr1B1j9PIELr7UGUkANc=;7:VCMmf2c9wG3mVqk3t36eVMgmaYw5a1EKJ++hUnElrq1DiSoAyyRNCZC1X4CVIUlxt4pLSBNDr9xIdFgoH/d5lGr0GoVntnyueQo5k4+ugV1be/p3sLlPsyL4MaPw+/rZRDOYD06RFMtCK/NHtmNaVg== x-ms-office365-filtering-correlation-id: 80a4a48f-863a-423a-2beb-08d643ea9798 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: CNsQ/t8Sk6vuQS0PzBsvjhB77nUE1qe76sEwgzeuQO7iiNnUaTN6vPh7D5VnPmjp+2sYjvIZejUcJBPN+Z4WegnRn1x7XSVAu83oqMv/voNvYhWpw1v1PnC96nUmpp4yiG0YQfEhk0x5VtmCsqR7NWQyhHnEORffGngNVOGbMyuEAxqFqDoNWSmSMxTnmkiBzBkICmz6tR1j+BFLDXjAvli28hxgyp/m6vCdz7pQ3173G8C5KArB5YqHN/fOMuUR9hCpHpp+OVPHQ+gLkmAYt5bA9o8Bg2PLZLkWGFZlIH+/1sUsf0EvjE86NBYMv3fFf43A/iaPq4v9ggxyAGMdn+wutYDhBfW/Tzb5qEQNz1Y= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 80a4a48f-863a-423a-2beb-08d643ea9798 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:16.9909 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Fixup the Class Code to PCI bridge, do not change the Revision ID. And move the fixup to *_host_init function. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 884c9f95374d..8e3630359597 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -652,6 +652,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) type, resource_size(win->res)); } + /* fixup for PCIe class register */ + value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS); + value &= 0xff; + value |= (PCI_CLASS_BRIDGE_PCI << 16); + csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); + /* setup MSI hardware registers */ mobiveil_pcie_enable_msi(pcie); @@ -895,9 +901,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) goto error; } - /* fixup for PCIe class register */ - csr_writel(pcie, 0x060402ab, PAB_INTP_AXI_PIO_CLASS); - /* initialize the IRQ domains */ ret = mobiveil_pcie_init_irq_domain(pcie); if (ret) { From patchwork Tue Nov 6 13:20:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670331 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B862C13A4 for ; Tue, 6 Nov 2018 13:20:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7C1729171 for ; Tue, 6 Nov 2018 13:20:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9C0DE2A393; Tue, 6 Nov 2018 13:20:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B67772A3B2 for ; Tue, 6 Nov 2018 13:20:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730481AbeKFWpi (ORCPT ); Tue, 6 Nov 2018 17:45:38 -0500 Received: from mail-he1eur01on0088.outbound.protection.outlook.com ([104.47.0.88]:31635 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729728AbeKFWph (ORCPT ); Tue, 6 Nov 2018 17:45:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vu0Gn1s/q0UKMAa9copK/c+XN2Y+zhvBH+DX2EtU8CI=; b=VlyJO1nw202UHTt4Wy7eFlWvmNlz4kigHiTJJWIOPYpLQeyJxBD0Au24QBOnpT8AGrsc6skCEOO7GyvigiY3uHY3BxhJEp8RfUqdOAVp3M7Pw/sIeQDLDNPD1WdF5OablJZ7YljsApBL1FYCzJzss2DpBam3XOyk/mTlO66I68E= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:23 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:22 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 12/23] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Thread-Topic: [PATCH 12/23] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Thread-Index: AQHUddN4KxeZ6jJ77ka31NmPNJmtWQ== Date: Tue, 6 Nov 2018 13:20:22 +0000 Message-ID: <20181106131807.29951-13-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:fklJxJof4i7LYB86SkTDVhI5hTKIkKft0Rhe9E6YdwIvGfPdtESAjCo3iGs/QMkrZ3ofnGfZ6ExhTL+dyOoUXtXFhJzKknvSgoFyWP+/uJ0g+R1ah/3McILyzk4Xh212mMd+jG27aYREa4QzDPZOkeHDAO+1fyeG19/UDrBM6e++uXyv92l90eKYxVG+W/vg8QbcEc6nO1kKKGi0Q4q2qGfEOA28B7ceIAoHGwdDtvqE3ss824pN/qLLAaTYBu5CBqSaZeVmo+20VcDJ4EXqb4Wbng9R7iiY5sBY3e5IkFRjVeL3q8sCgkQSoBL4ngROfDnZyBShy3ZPQ8lISp/lGZX6SmLEflYpjU2EBJ/S827X0/0Ms7f9nQqx/NSp6b9+HPDSwqta3zcHnVEmnuhlHZJgS2vs640O6LEYYqtkTwx/XzF+z2iD0HBAOP6OoMUCVAoAHIlEUECBvzckujnxZw==;5:1l6x5fBlrk9BlV+kqyMkGOnJqLBYVAPYPXtSg0D5ozFgz4aP44jsVFgJ8BVJNDOouAKjJnCzbvvgLHgwbVNe0seyW14XjFYBlZ5dO+BwwUhWKeGJK/i0xZ15XoAOlJXkBofXl1H72vZ6NnN3dBWWqBBPVbwqRQ5EFrcRY6RmGkQ=;7:28zHLv9vp6pyegzl+Ck7EGtlC8vrCbW37aA174siv9rw2O16T4KuJDzNNBgaGQGKxY0DOW5qh2uUprSZQ9oooHTtLvD7hMJx3pWBjU5T0hFvoikd+UCQ6Mp/bSZ9/qC+bqZRHXHL+iRuhq+xiMm3gA== x-ms-office365-filtering-correlation-id: 429190ff-f254-4a95-1f0b-08d643ea9b39 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: z/wVW3/SSemqjo1uJ1akycQ5LuAw1fmECtu8TCeo0ruS1O5grbtEnL98IsVeKOlm2Be7fE9xHdPEWJ5/fVTqSQdiNlHjAc/hj6B4c/ACul0bKpm1tg0rMkuP11+osknJP0xMSwvqbpMQn6o4WKgrh5fYvljVE7Rj+7Q2lD9xnlUesAUs2NURxDRN/XKxvyUNQPEFxSF5GBl3zCEck8+dR27yuLmS+Lac8Oo27PQEoC8L6KYTmT+80qlG3aWmQ4CoY3Z5RT2Ksfw7UGJpjAStdTg1e7IE1GR76zCY5fScwFx8gptTsGDKlBS9vU8EMktRa14ktwgAGdCcPA7OZOiTU63Veq/0aNgakftFKBvYmxw= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 429190ff-f254-4a95-1f0b-08d643ea9b39 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:22.8266 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Host initial sequence does not depend on PCIe link up, so move it to the place just before the enumeration. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 8e3630359597..4b21b8549664 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -581,15 +581,8 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) static int mobiveil_host_init(struct mobiveil_pcie *pcie) { u32 value, pab_ctrl, type; - int err; struct resource_entry *win; - err = mobiveil_bringup_link(pcie); - if (err) { - dev_info(&pcie->pdev->dev, "link bring-up failed\n"); - return err; - } - /* * program Bus Master Enable Bit in Command Register in PAB Config * Space @@ -661,7 +654,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) /* setup MSI hardware registers */ mobiveil_pcie_enable_msi(pcie); - return err; + return 0; } static void mobiveil_mask_intx_irq(struct irq_data *data) @@ -921,6 +914,12 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; + ret = mobiveil_bringup_link(pcie); + if (ret) { + dev_info(dev, "link bring-up failed\n"); + goto error; + } + /* setup the kernel resources for the newly added PCIe root bus */ ret = pci_scan_root_bus_bridge(bridge); if (ret) From patchwork Tue Nov 6 13:20:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670333 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE61D13A4 for ; Tue, 6 Nov 2018 13:20:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE51E29171 for ; Tue, 6 Nov 2018 13:20:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A27152A3A0; Tue, 6 Nov 2018 13:20:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3B34729171 for ; Tue, 6 Nov 2018 13:20:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730603AbeKFWpp (ORCPT ); Tue, 6 Nov 2018 17:45:45 -0500 Received: from mail-he1eur01on0055.outbound.protection.outlook.com ([104.47.0.55]:40139 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730570AbeKFWpo (ORCPT ); Tue, 6 Nov 2018 17:45:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9TSZL6OvmPW9vGjNi5uKl2hki+nFAPJvHeqAas4f4Xc=; b=wCS+rVF/Jn8FLWxpXscdVCMksZxSpGSUhpUYcYS1QoSKyCBGALTKPueKfJiIf/75ejh1d/hrTr9tBEYJt4XVc7yY8XoeS6la7p0Lc76pv4dypcW4a1C5wCv7n91JWbiVwpGzjeOBrQFi14rhFGils/dc8aaVXDAnXAkaoEceBbc= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:29 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:29 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 13/23] PCI: mobiveil: move irq chained handler setup out of DT parse Thread-Topic: [PATCH 13/23] PCI: mobiveil: move irq chained handler setup out of DT parse Thread-Index: AQHUddN8oajHesmzXUW49s2raTQqMw== Date: Tue, 6 Nov 2018 13:20:29 +0000 Message-ID: <20181106131807.29951-14-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:A55z3VFNF3061oE96Xpk1luoAJ7wSfXXUEzVGe4Z96T9Kh+kDOvO65kFg+c37acpBrEP+XG6DlHuWong0cFiUsvRqVbTE/H6xgCqn0HmYWmwUA4QMfv/SCNiTf9rdiJc6qUmNjEmBF3EbmXiso2og4dAcBNv/nxWldf65HSjB9rHAjkqYAJ/j7uURMVHl153QMAYNZ92Ltehv8IobAN0n+CBglxTTVE4ByA2K0TH6UsxjNsjggmg8s9tGUJgo02CRSQkQGisb4Aq7WPQVD5vnPUM/dCR+54fzV0OHyMn1YImYb/ahYCb2bC0BNvElWnUfQQTHb9NdHaRyzu8kpc9zJRjG4gOfv4mcPWBO8uV5gvzNeOyQAf1AVfAMOIjsd+MHiIyBHjDNGdnhYa8RcSwnuHsb85w1ZxRYsNtZ1bjkRlOePucFNfqvyYuxCF4oFLLnmaBhMLhCghsRqAvWilDHA==;5:sFJveMbMpoWmXRV2v5dPFdFje4Te9FOKvTUb+VWTLjE2ZP5Zz7qDflWVgx61dE0AvNlLMLHUnQnptHR2pFDX/7rqKOq4PW/YBAY2vAjA+6dJZO5y812+AN1Suf2U9Xp01spMFYgrplm2PvfMrAGBPK/xThYY4i7Uw8ACpbJ5P3U=;7:shnE4j0FpLXc7COc0P0BNp0WV6CIZVqlBVTQtd+tQL0tuslSU2B3PS6lYplCQZZiNEgP1nhaTRroNfDMSZjC/iyDAVUXiaCEt7TLmjdUTCsPmv4K/YsQd/sK3X+NQSOykcxRsK7+9YDJSfHDm/NbiA== x-ms-office365-filtering-correlation-id: 0b05c0ad-4811-4a71-95c6-08d643ea9f24 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(14444005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: JrxkO0GVflfjavCvn6aCdne4M57oQyHf2GrOtSZrIUDSWkEL3qX0vXz7ytvXvZPdhsSalIJQKhvO5YNtN7dquWBXBsX27iVFyiOouXbBGC2U/0A3NUe/YX9rpwMt3Nzhc9Fs0vhmD33SZM0BWZuYN6SfX2VAMGDwCgzLAbQkh4o4gBFdZ7TzRyTip6u0ZNahbVs1hf/AndzUdzUULg4bbcGkCv69Vel6CPCb6+jHR+lPx6UUVQ59rjqtSdWYTR+EzZ1YuvHDmY8voE8ljF/4upW/7qnSBwL5MrAuTZou2DghMxLlb7QkNJEj2++Q+Ak5Ccs4gPvglFKCvpnAnsBZ6/1us9e8u3jYRz6DHKJ3T44= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0b05c0ad-4811-4a71-95c6-08d643ea9f24 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:29.6351 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Move irq_set_chained_handler_and_data() out of DT parse function. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4b21b8549664..3da924bb6b3c 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -460,8 +460,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) return -ENODEV; } - irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); - return 0; } @@ -901,6 +899,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) goto error; } + irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); + ret = devm_request_pci_bus_resources(dev, &pcie->resources); if (ret) goto error; From patchwork Tue Nov 6 13:20:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670335 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4C92E13AD for ; Tue, 6 Nov 2018 13:20:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3CCFA2A3A0 for ; Tue, 6 Nov 2018 13:20:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 30D942A3B2; Tue, 6 Nov 2018 13:20:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C1A802A3A0 for ; Tue, 6 Nov 2018 13:20:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730620AbeKFWpu (ORCPT ); Tue, 6 Nov 2018 17:45:50 -0500 Received: from mail-eopbgr20059.outbound.protection.outlook.com ([40.107.2.59]:61568 "EHLO EUR02-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730570AbeKFWpt (ORCPT ); Tue, 6 Nov 2018 17:45:49 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yAUFvYhjmTM46xau+yCPPWh2H2TGKQRiw9bL+RiVHL4=; b=YuwGC9Y4kj77+JnvZO9djzWaYfhl7Oijf/T+aX2qFcAWanDG83ZZ3H86DCGEQVZJTF+MpAkfMVXkzKftA6Nqti1xu1zINDgwuLu5Ox4sIOLj5G5o2w8k1woyxs+/0jmaCPKhb8zXqUXq/q/toKGZ6OKU+A68Wf/WWfi8n/+0H5Y= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:35 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:35 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 14/23] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Thread-Topic: [PATCH 14/23] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Thread-Index: AQHUddOAOpjrJxdoLEW1ke5psCHyLA== Date: Tue, 6 Nov 2018 13:20:35 +0000 Message-ID: <20181106131807.29951-15-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:2Ru1+Bq4n0ok02zcRoXayJD4p5fZugs2lh0GG9+kY6Qk0lXsyU8yaCb157Ok7uu9ca8zOPeI5JKWtn6XKrGo1AAK5HN62QIWYg8OBgCDoSHTFTOOG8X6kG2qlqMbNBKTksRVUp+WbkgwMY/aZzwqYRQFffo1EYBewafvOgCFpqNdk4Y7/batTCistTG6ewvsppPmpSuf7m5U+35akIhnzWRxSnaNNaRdvRS5ltf6b37/kzbd8wlO9vKx3ngyE3uR81XSD5mV1HC/DPXgQkd6+ZH+U3f/BaqYCi5cCOtoiYmFfKOoDCyABQn2Qs0C+eMuiwoM+qQ9S/1tw4UkmEzgvwmJGhusJRtSk16+c3Kyak+CeFLXpB8+ukFmaQJ6nZL7N0W0HySS21DTQIu5eMsrgjNb2kxVtuSAXoxUbfd5zrgNfjlxSHldSdyiBuWQdo1OTCek+fCbpG/+3v1ycNcAug==;5:xfgto8n9BeSkyGKWBuJ9BMZt3a7QaECGIslq/zyYsedmd/wi/MvGoV/n3KzIsggzlkK0EUrSsvM8oemyaGmUvZ2qKJYxlC/7rwRIGf3WvDCXDYBLcjCMXjN8t1GnYTo9alkoqXrVzHsCSeMskhprhIXLh1d8MeX014rki1DGIzk=;7:USPqfnoL+OJWw5NZQLCXG1MLeEQZ8MHkFuYLa17g9xq1ofyr8eF+xDew6XRiVpAQfm0MpIB1LSd2P1054V2T9rqCURWJUFGNiqHlkclwRa9ilAmkn71Yb8MrCl8svRSkwYWYEis8XymNldhGW4OG/w== x-ms-office365-filtering-correlation-id: c2fbdc9f-b473-44a6-cf9d-08d643eaa2be x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: ADfJiFj4c08S++/5lqfKgEB6Veo65TZI2npmb86Nk8l0resNCmU45ZTxlcwLaKzMy2reVTV6YKkr83cVDefZBdnK60TW0ZRaErphwrMUVX1xsGTQ51zSGdBrP19/wJpa0+OWhtcA41Wp3IVG4kKHhr7FviQCqXtG6fCTv5kdFuXRFhGLq1OHr8nMSZOLd1Mew/fBFOuLnTJwvX5taez4Dw3qjS27DIyBevsUm4ZGqFTI0qdiGK2NTLw+KhpwD9qVBK91wMe+J3a3wrfu+i0OhV+2X2bLIpg3Vmb0GVnosrYZx2N1xOm/jvAeM4l1L9JpSwPRvOtg+HWI/CtNEBNabtRUIYAHHXfbcNjennoye9c= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c2fbdc9f-b473-44a6-cf9d-08d643eaa2be X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:35.6670 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The reset value is all zero, so set a workable value for Primary, Secondary and Subordinate bus numbers. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/pcie-mobiveil.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 3da924bb6b3c..8d6a1e98f655 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -581,6 +581,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) u32 value, pab_ctrl, type; struct resource_entry *win; + /* setup bus numbers */ + value = csr_readl(pcie, PCI_PRIMARY_BUS); + value &= 0xff000000; + value |= 0x00ff0100; + csr_writel(pcie, value, PCI_PRIMARY_BUS); + /* * program Bus Master Enable Bit in Command Register in PAB Config * Space From patchwork Tue Nov 6 13:20:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670339 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9FC101803 for ; Tue, 6 Nov 2018 13:20:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8FFC42A3A0 for ; Tue, 6 Nov 2018 13:20:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 848972A3A5; Tue, 6 Nov 2018 13:20:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27A322A3C5 for ; Tue, 6 Nov 2018 13:20:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388434AbeKFWp6 (ORCPT ); Tue, 6 Nov 2018 17:45:58 -0500 Received: from mail-he1eur01on0056.outbound.protection.outlook.com ([104.47.0.56]:1632 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388116AbeKFWp5 (ORCPT ); Tue, 6 Nov 2018 17:45:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/YLf24qphxUIRFAt/Tr/CmTNedbEu3U+TSjeFQGRsj8=; b=udXByu/mqMHidqVy7rG2d4BHBlgXvklcqMXsykIHESCwsPgJa5H9cA3xTwimIrynQFs23cWuLaFg22a1fqygR6bmFrkV43nigmBsngnvxe3F88KJuQJQIkw0pKdRbNOmBsicr/O38a1aP0CKnMCmq+95SPT/q7Gck9XD1clPGec= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:41 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:41 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Thread-Topic: [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Thread-Index: AQHUddOEP/V1AsPVHEO11IQdjk5tbA== Date: Tue, 6 Nov 2018 13:20:41 +0000 Message-ID: <20181106131807.29951-16-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:5QOvlDpDaN0PiJWV81dl1auGuHDuEPG1ONqZpXnE12z8/ViCpVKKZSr6AY3Ozpv46qPA9R02fqAVnAZMcse5BN4h2nRen2SwAeFabPGOksuYvfk299pv6sYsR9ei8Sf/9B+CpLb+l3pzzvIPWDdlThtML+RV90j8l3GeRNoeBgSzK2pW2z2xufQ2zZipEEIk0Qp1d5SrCu6o3H575BDixaPhwSDwgUppGpn7Ok7Nf3UHeHR9U5/AG4DDsWmctn+9ldi1gwM6qTuoJ4M6ayBPh28PIc9BwgANhnJGIlLv6ahizesYTQLR9NKdQHYQKUjzulTIKJ2PgheLt53Shhum245PZM+ozuaAqX06hu+LDRjtiTkrfJvhwQeBK4hoT/c9UOwafIQxIAg359mXYa+X2vwNwsMdWBD2PNO7kCCTCEmGsZTlWaqkdiVHZ6T+B5b0Q98tusqEe6iw9frZEpl0Ng==;5:CPR42xHv1WBtP/l0BWNm6ngGka6OKCACbBOo0O+EBh6I9ttKp1wIemU4HNmSzWOeEPnf7IuO4/mDaUSnvaHEedKJJST6un7ouIwNSn/r3GK2KIJcmW+XHd51+cHbWlDfJVu/cno1AV6IBzvoM+AVwOOOqxAnjbdVoQU6ZvImhcA=;7:uK8DjVT0hFfXNZOhGR7QwERJ6+n7qJaE27MZxunBpP2Uhyd7XAgGf5zfS881kqCgKiT3sgGH7yKq7EM9OhWdRm0e53KS2Kv7aEI7dwlAy05af/2ZLfbkHDbR0L8bgrI+lyT+tMhgnnYhE5kL7JromQ== x-ms-office365-filtering-correlation-id: f6993cfc-ad59-4881-d844-08d643eaa653 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: sc0aV76Q/S4RUOM7nl3k0niSwPvJwsmjHs4ycrAbZsunLNh7mghp1/TNPm/xGtl1hudWiylLAQX7xToofCcLp2/+LogzHG+kM4aqZSByqOYYvT1MYGfl/i0PKmf9yEDxj7SOf3xEJlEYNFYogMQ13PBed3R62uDJksLX7ShdBv/8MEOdPR6W7oPGPT7GlMjvBfkb1k6yBzErBGc2j3Nle4t5ijKuN7Sm6188q/3HTlhDhwSH0ARMM1nxChNtNS7qKMvkr+5ymevd2SFEocqw3xrK0WY7b3xIaAc4X2cRGcr6Q4QC4T8/kY3REExOYdFqlg+vNwSFmNodMeQVL5NBztIHHNgrFzae0ReKG4NxAyE= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6993cfc-ad59-4881-d844-08d643eaa653 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:41.7299 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" is not used in current code, and "apb_csr" is not used by some platorms. Signed-off-by: Hou Zhiqiang Acked-by: Subrahmanya Lingappa --- Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt index a618d4787dd7..64156993e052 100644 --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt @@ -10,8 +10,10 @@ Required properties: interrupt source. The value must be 1. - compatible: Should contain "mbvl,gpex40-pcie" - reg: Should contain PCIe registers location and length + Mandatory: "config_axi_slave": PCIe controller registers "csr_axi_slave" : Bridge config registers + Optional: "gpio_slave" : GPIO registers to control slot power "apb_csr" : MSI registers From patchwork Tue Nov 6 13:20:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670361 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D45E313AD for ; Tue, 6 Nov 2018 13:22:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEEF82A3D5 for ; Tue, 6 Nov 2018 13:22:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B18722A445; Tue, 6 Nov 2018 13:22:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 475552A3D5 for ; Tue, 6 Nov 2018 13:21:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388065AbeKFWqG (ORCPT ); Tue, 6 Nov 2018 17:46:06 -0500 Received: from mail-he1eur01on0070.outbound.protection.outlook.com ([104.47.0.70]:42149 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388116AbeKFWqG (ORCPT ); Tue, 6 Nov 2018 17:46:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Q9Hurid/k7/Pgj2dGKpxEOVwgz+HQchMrr/nZNew0hs=; b=EOFm4ihNVQSLyrPM2WoZMitAL8C5w38Gxl720DiyludNHizOdEvMGc/sQLr3R4o8NXjZVCpHD9MVcs5YJ3jaclGTJhlhSVSPhA6/p9PlubkeRThXl1DcGBwQUpEpl5XrBhA2/Ej0yhQKW0EcdYzRqBH/vS7TNoY1ACjUbXhfsDI= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:48 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:48 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 16/23] PCI: mobiveil: refactor the Mobiveil driver Thread-Topic: [PATCH 16/23] PCI: mobiveil: refactor the Mobiveil driver Thread-Index: AQHUddOINdoJDe12wkCn0hB7BBKcqw== Date: Tue, 6 Nov 2018 13:20:48 +0000 Message-ID: <20181106131807.29951-17-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:4wS7LkQk/P3sHDFUvB8ZBVo0yg9duqQwTBdWBSnNyxSm5OAbtG0XSF6wbbkt553BAX95cZ5MBot8404CNTOTukcJIVmjHH8LtJGGB5+NUzioH20Vehzjwy2LsdQM/sIZrVwcUh38uEmyvLOj68XNiR4C6CWn4sTJSTQ7D03852p6cAPCT5mWqnD3sb3l0rVED5sAXALAm2mueQwciOamRxdmUuGbEOKOx7oCtSABrgqvEOCnblpYQzEAba3lrCmlMChoDQH95/jigWyAs3ftWaxfyBXxQDbh8Y7hPTh9qBKUaFt6/r+DLEViqwdTuNg8mD79sKRA3/X/7qnm+iOSFVEBJdU5NbmHtahojKK8i/+Gr8/qot4WD/3N+NbL23DJ3p0AiyhTGz9rNRTf1ik4yTs8lkiPdTRuWYFM/fLwDEMF6E5hJ+A+mmumlSNNTV3t3ohdNj6eR13SSjPEdrTXXA==;5:j+d7YlKCUDs7PeCOv3apLZrZed7RAhvaXonOsTLVTf+WRWSmyW9YZVOKZAl/OGTAPdYYoWfBircToebhGM50pjlJRpc0Tve4Tuu2odvDVE0qsiIEoYbOwB0R3LL310CAm29BrmV9aorz7CKhlsB47KfaveadrShS4O6z2HBfzrY=;7:oj/VSssSqlnU0Cc3MwQCYL3a2x8S00etwZggoa08RzHcwAAqvpkEOGJSSMBb7icpv6R8C2wd1eP7lRANwRMD1zpboDF1XPbnnSYj5uDpmCmZfsKgrOy7Vqd16HSi7T1nys5SCywBi2EbKnhAea6N8A== x-ms-office365-filtering-correlation-id: 49f69f3d-7081-4df5-890b-08d643eaaa5f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(9452136761055)(269456686620040)(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(4744004)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53946003)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(5024004)(14444005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(575784001)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003)(579004)(569006);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: P4r49eiQ2eSurlRDpyBOWPImV4ftP0yNnwHUMdjvuHtCEWLcaWa9NmeS1lYgtNC154xWQEy5CoktCyUyug657bzjUYOU5KT2Hg6Y4jCoiIc8oqnCN37bwFxuUYXd9506+yDgNpuIKUpxtfGqCyRKAAl6aPTszhFtXHeVySYDHBtp02pIBkpJlWODrXMhfJSWTzt4iDu8lLi5gdk54GatVzMvLmVc2Vlr4fBoZFVQVDW/LDqiUIDbAAyfjcl/tLphijqBMM1OYB9qUJ4dOH6FrpR300Kpr7OAC0QSrkh+zjr0ZGyttc+wPXMOi71Ov4+z+y4I8FgdWf3zWkbfpasZf4isH1Ep4/BJ0NmB4Iq2QeU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 49f69f3d-7081-4df5-890b-08d643eaaa5f X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:48.5574 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang As the Mobiveil PCIe controller support RC&EP DAUL mode, and to make Platforms which integrated the Mobiveil PCIe IP more easy to add their drivers, this patch moved the Mobiveil driver to a new directory 'drivers/pci/controller/mobiveil' and refactored it to different file according to the abstraction of RC&EP(TODO). Signed-off-by: Hou Zhiqiang --- MAINTAINERS | 2 +- drivers/pci/controller/Kconfig | 11 +- drivers/pci/controller/Makefile | 2 +- drivers/pci/controller/mobiveil/Kconfig | 24 + drivers/pci/controller/mobiveil/Makefile | 4 + .../pcie-mobiveil-host.c} | 520 +++--------------- .../controller/mobiveil/pcie-mobiveil-plat.c | 54 ++ .../pci/controller/mobiveil/pcie-mobiveil.c | 227 ++++++++ .../pci/controller/mobiveil/pcie-mobiveil.h | 187 +++++++ 9 files changed, 582 insertions(+), 449 deletions(-) create mode 100644 drivers/pci/controller/mobiveil/Kconfig create mode 100644 drivers/pci/controller/mobiveil/Makefile rename drivers/pci/controller/{pcie-mobiveil.c => mobiveil/pcie-mobiveil-host.c} (55%) create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h diff --git a/MAINTAINERS b/MAINTAINERS index e8e817818656..0c57ccff3188 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11294,7 +11294,7 @@ M: Subrahmanya Lingappa L: linux-pci@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt -F: drivers/pci/controller/pcie-mobiveil.c +F: drivers/pci/controller/mobiveil/pcie-mobiveil* PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support) M: Thomas Petazzoni diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 028b287466fb..e06c386405ad 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -239,16 +239,6 @@ config PCIE_MEDIATEK Say Y here if you want to enable PCIe controller support on MediaTek SoCs. -config PCIE_MOBIVEIL - bool "Mobiveil AXI PCIe controller" - depends on ARCH_ZYNQMP || COMPILE_TEST - depends on OF - depends on PCI_MSI_IRQ_DOMAIN - help - Say Y here if you want to enable support for the Mobiveil AXI PCIe - Soft IP. It has up to 8 outbound and inbound windows - for address translation and it is a PCIe Gen4 IP. - config PCIE_TANGO_SMP8759 bool "Tango SMP8759 PCIe controller (DANGEROUS)" depends on ARCH_TANGO && PCI_MSI && OF @@ -279,4 +269,5 @@ config VMD module will be called vmd. source "drivers/pci/controller/dwc/Kconfig" +source "drivers/pci/controller/mobiveil/Kconfig" endmenu diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile index d56a507495c5..b79a615041a0 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -26,11 +26,11 @@ obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o obj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o -obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o obj-$(CONFIG_VMD) += vmd.o # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y += dwc/ +obj-y += mobiveil/ # The following drivers are for devices that use the generic ACPI diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig new file mode 100644 index 000000000000..64343c07bfed --- /dev/null +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 + +menu "Mobiveil PCIe Core Support" + depends on PCI + +config PCIE_MOBIVEIL + bool + +config PCIE_MOBIVEIL_HOST + bool + depends on PCI_MSI_IRQ_DOMAIN + select PCIE_MOBIVEIL + +config PCIE_MOBIVEIL_PLAT + bool "Mobiveil AXI PCIe controller" + depends on ARCH_ZYNQMP || COMPILE_TEST + depends on OF + select PCIE_MOBIVEIL_HOST + help + Say Y here if you want to enable support for the Mobiveil AXI PCIe + Soft IP. It has up to 8 outbound and inbound windows + for address translation and it is a PCIe Gen4 IP. + +endmenu diff --git a/drivers/pci/controller/mobiveil/Makefile b/drivers/pci/controller/mobiveil/Makefile new file mode 100644 index 000000000000..9fb6d1c6504d --- /dev/null +++ b/drivers/pci/controller/mobiveil/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o +obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o +obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c similarity index 55% rename from drivers/pci/controller/pcie-mobiveil.c rename to drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index 8d6a1e98f655..383b2f3947a5 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -4,9 +4,9 @@ * * Copyright (c) 2018 Mobiveil Inc. * Author: Subrahmanya Lingappa + * Refactor: Zhiqiang Hou */ -#include #include #include #include @@ -23,275 +23,21 @@ #include #include -#include "../pci.h" - -/* register offsets and bit positions */ - -/* - * translation tables are grouped into windows, each window registers are - * grouped into blocks of 4 or 16 registers each - */ -#define PAB_REG_BLOCK_SIZE 16 -#define PAB_EXT_REG_BLOCK_SIZE 4 - -#define PAB_REG_ADDR(offset, win) \ - (offset + (win * PAB_REG_BLOCK_SIZE)) -#define PAB_EXT_REG_ADDR(offset, win) \ - (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) - -#define LTSSM_STATUS 0x0404 -#define LTSSM_STATUS_L0_MASK 0x3f -#define LTSSM_STATUS_L0 0x2d - -#define PAB_CTRL 0x0808 -#define AMBA_PIO_ENABLE_SHIFT 0 -#define PEX_PIO_ENABLE_SHIFT 1 -#define PAGE_SEL_SHIFT 13 -#define PAGE_SEL_MASK 0x3f -#define PAGE_LO_MASK 0x3ff -#define PAGE_SEL_OFFSET_SHIFT 10 - -#define PAB_AXI_PIO_CTRL 0x0840 -#define APIO_EN_MASK 0xf - -#define PAB_PEX_PIO_CTRL 0x08c0 -#define PIO_ENABLE_SHIFT 0 - -#define PAB_INTP_AMBA_MISC_ENB 0x0b0c -#define PAB_INTP_AMBA_MISC_STAT 0x0b1c -#define PAB_INTP_INTX_MASK 0x01e0 -#define PAB_INTP_MSI_MASK 0x8 - -#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) -#define WIN_ENABLE_SHIFT 0 -#define WIN_TYPE_SHIFT 1 -#define WIN_TYPE_MASK 0x3 -#define WIN_SIZE_SHIFT 10 -#define WIN_SIZE_MASK 0x3fffff - -#define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) - -#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) -#define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) -#define AXI_WINDOW_ALIGN_MASK 3 - -#define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) -#define PAB_BUS_SHIFT 24 -#define PAB_DEVICE_SHIFT 19 -#define PAB_FUNCTION_SHIFT 16 - -#define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) -#define PAB_INTP_AXI_PIO_CLASS 0x474 - -#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) -#define AMAP_CTRL_EN_SHIFT 0 -#define AMAP_CTRL_TYPE_SHIFT 1 -#define AMAP_CTRL_TYPE_MASK 3 - -#define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) -#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win) -#define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) -#define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win) -#define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) - -/* starting offset of INTX bits in status register */ -#define PAB_INTX_START 5 - -/* supported number of MSI interrupts */ -#define PCI_NUM_MSI 16 - -/* MSI registers */ -#define MSI_BASE_LO_OFFSET 0x04 -#define MSI_BASE_HI_OFFSET 0x08 -#define MSI_SIZE_OFFSET 0x0c -#define MSI_ENABLE_OFFSET 0x14 -#define MSI_STATUS_OFFSET 0x18 -#define MSI_DATA_OFFSET 0x20 -#define MSI_ADDR_L_OFFSET 0x24 -#define MSI_ADDR_H_OFFSET 0x28 - -/* outbound and inbound window definitions */ -#define WIN_NUM_0 0 -#define WIN_NUM_1 1 -#define CFG_WINDOW_TYPE 0 -#define IO_WINDOW_TYPE 1 -#define MEM_WINDOW_TYPE 2 -#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) -#define MAX_PIO_WINDOWS 8 - -/* Parameters for the waiting for link up routine */ -#define LINK_WAIT_MAX_RETRIES 10 -#define LINK_WAIT_MIN 90000 -#define LINK_WAIT_MAX 100000 - -#define PAGED_ADDR_BNDRY 0xc00 -#define OFFSET_TO_PAGE_ADDR(off) \ - ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) -#define OFFSET_TO_PAGE_IDX(off) \ - ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) - -struct mobiveil_msi { /* MSI information */ - struct mutex lock; /* protect bitmap variable */ - struct irq_domain *msi_domain; - struct irq_domain *dev_domain; - phys_addr_t msi_pages_phys; - int num_of_vectors; - DECLARE_BITMAP(msi_irq_in_use, PCI_NUM_MSI); -}; - -struct mobiveil_pcie { - struct platform_device *pdev; - struct list_head resources; - void __iomem *config_axi_slave_base; /* endpoint config base */ - void __iomem *csr_axi_slave_base; /* root port config base */ - void __iomem *apb_csr_base; /* MSI register base */ - phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base */ - struct irq_domain *intx_domain; - raw_spinlock_t intx_mask_lock; - int irq; - int apio_wins; - int ppio_wins; - int ob_wins_configured; /* configured outbound windows */ - int ib_wins_configured; /* configured inbound windows */ - struct resource *ob_io_res; - char root_bus_nr; - struct mobiveil_msi msi; -}; - -/* - * mobiveil_pcie_sel_page - routine to access paged register - * - * Registers whose address greater than PAGED_ADDR_BNDRY (0xc00) are paged, - * for this scheme to work extracted higher 6 bits of the offset will be - * written to pg_sel field of PAB_CTRL register and rest of the lower 10 - * bits enabled with PAGED_ADDR_BNDRY are used as offset of the register. - */ -static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) -{ - u32 val; - - val = readl(pcie->csr_axi_slave_base + PAB_CTRL); - val &= ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT); - val |= (pg_idx & PAGE_SEL_MASK) << PAGE_SEL_SHIFT; - - writel(val, pcie->csr_axi_slave_base + PAB_CTRL); -} - -static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) -{ - if (off < PAGED_ADDR_BNDRY) { - /* For directly accessed registers, clear the pg_sel field */ - mobiveil_pcie_sel_page(pcie, 0); - return pcie->csr_axi_slave_base + off; - } - - mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); - return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); -} - -static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val) -{ - if ((uintptr_t)addr & (size - 1)) { - *val = 0; - return PCIBIOS_BAD_REGISTER_NUMBER; - } - - switch (size) { - case 4: - *val = readl(addr); - break; - case 2: - *val = readw(addr); - break; - case 1: - *val = readb(addr); - break; - default: - *val = 0; - return PCIBIOS_BAD_REGISTER_NUMBER; - } - - return PCIBIOS_SUCCESSFUL; -} - -static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val) -{ - if ((uintptr_t)addr & (size - 1)) - return PCIBIOS_BAD_REGISTER_NUMBER; - - switch (size) { - case 4: - writel(val, addr); - break; - case 2: - writew(val, addr); - break; - case 1: - writeb(val, addr); - break; - default: - return PCIBIOS_BAD_REGISTER_NUMBER; - } - - return PCIBIOS_SUCCESSFUL; -} - -static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) -{ - void *addr; - u32 val; - int ret; - - addr = mobiveil_pcie_comp_addr(pcie, off); - - ret = mobiveil_pcie_read(addr, size, &val); - if (ret) - dev_err(&pcie->pdev->dev, "read CSR address failed\n"); - - return val; -} - -static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size) -{ - void *addr; - int ret; - - addr = mobiveil_pcie_comp_addr(pcie, off); - - ret = mobiveil_pcie_write(addr, size, val); - if (ret) - dev_err(&pcie->pdev->dev, "write CSR address failed\n"); -} - -static u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) -{ - return csr_read(pcie, off, 0x4); -} - -static void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) -{ - csr_write(pcie, val, off, 0x4); -} - -static bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) -{ - return (csr_readl(pcie, LTSSM_STATUS) & - LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0; -} +#include "pcie-mobiveil.h" static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) { struct mobiveil_pcie *pcie = bus->sysdata; /* Only one device down on each root port */ - if ((bus->number == pcie->root_bus_nr) && (devfn > 0)) + if ((bus->number == pcie->rp.root_bus_nr) && (devfn > 0)) return false; /* * Do not read more than one device on the bus directly * attached to RC */ - if ((bus->primary == pcie->root_bus_nr) && (devfn > 0)) + if ((bus->primary == pcie->rp.root_bus_nr) && (devfn > 0)) return false; return true; @@ -311,7 +57,7 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, return NULL; /* RC config access */ - if (bus->number == pcie->root_bus_nr) + if (bus->number == pcie->rp.root_bus_nr) return pcie->csr_axi_slave_base + where; /* @@ -326,7 +72,7 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); - return pcie->config_axi_slave_base + where; + return pcie->rp.config_axi_slave_base + where; } static struct pci_ops mobiveil_pcie_ops = { @@ -340,7 +86,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) struct irq_chip *chip = irq_desc_get_chip(desc); struct mobiveil_pcie *pcie = irq_desc_get_handler_data(desc); struct device *dev = &pcie->pdev->dev; - struct mobiveil_msi *msi = &pcie->msi; + struct mobiveil_msi *msi = &pcie->rp.msi; u32 msi_data, msi_addr_lo, msi_addr_hi; u32 intr_status, msi_status; unsigned long shifted_status; @@ -365,7 +111,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { - virq = irq_find_mapping(pcie->intx_domain, + virq = irq_find_mapping(pcie->rp.intx_domain, bit + 1); if (virq) generic_handle_irq(virq); @@ -428,10 +174,10 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) /* map config resource */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config_axi_slave"); - pcie->config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); - if (IS_ERR(pcie->config_axi_slave_base)) - return PTR_ERR(pcie->config_axi_slave_base); - pcie->ob_io_res = res; + pcie->rp.config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); + if (IS_ERR(pcie->rp.config_axi_slave_base)) + return PTR_ERR(pcie->rp.config_axi_slave_base); + pcie->rp.ob_io_res = res; /* map csr resource */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, @@ -441,12 +187,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) return PTR_ERR(pcie->csr_axi_slave_base); pcie->pcie_reg_base = res->start; - /* map MSI config resource */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "apb_csr"); - pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res); - if (IS_ERR(pcie->apb_csr_base)) - return PTR_ERR(pcie->apb_csr_base); - /* read the number of windows requested */ if (of_property_read_u32(node, "apio-wins", &pcie->apio_wins)) pcie->apio_wins = MAX_PIO_WINDOWS; @@ -454,118 +194,15 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) if (of_property_read_u32(node, "ppio-wins", &pcie->ppio_wins)) pcie->ppio_wins = MAX_PIO_WINDOWS; - pcie->irq = platform_get_irq(pdev, 0); - if (pcie->irq <= 0) { - dev_err(dev, "failed to map IRQ: %d\n", pcie->irq); - return -ENODEV; - } - return 0; } -static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, - u64 cpu_addr, u64 pci_addr, u32 type, u64 size) -{ - u32 value; - u64 size64 = ~(size - 1); - - if (win_num >= pcie->ppio_wins) { - dev_err(&pcie->pdev->dev, - "ERROR: max inbound windows reached !\n"); - return; - } - - value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); - value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT); - value |= (type << AMAP_CTRL_TYPE_SHIFT) | (1 << AMAP_CTRL_EN_SHIFT) | - (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); - csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); - - csr_writel(pcie, upper_32_bits(size64), - PAB_EXT_PEX_AMAP_SIZEN(win_num)); - - csr_writel(pcie, lower_32_bits(cpu_addr), - PAB_PEX_AMAP_AXI_WIN(win_num)); - csr_writel(pcie, upper_32_bits(cpu_addr), - PAB_EXT_PEX_AMAP_AXI_WIN(win_num)); - - csr_writel(pcie, lower_32_bits(pci_addr), - PAB_PEX_AMAP_PEX_WIN_L(win_num)); - csr_writel(pcie, upper_32_bits(pci_addr), - PAB_PEX_AMAP_PEX_WIN_H(win_num)); - - pcie->ib_wins_configured++; -} - -/* - * routine to program the outbound windows - */ -static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, - u64 cpu_addr, u64 pci_addr, u32 type, u64 size) -{ - - u32 value; - u64 size64 = ~(size - 1); - - if (win_num >= pcie->apio_wins) { - dev_err(&pcie->pdev->dev, - "ERROR: max outbound windows reached !\n"); - return; - } - - /* - * program Enable Bit to 1, Type Bit to (00) base 2, AXI Window Size Bit - * to 4 KB in PAB_AXI_AMAP_CTRL register - */ - value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); - value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | - WIN_SIZE_MASK << WIN_SIZE_SHIFT); - value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | - (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); - csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); - - csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); - - /* - * program AXI window base with appropriate value in - * PAB_AXI_AMAP_AXI_WIN0 register - */ - csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), - PAB_AXI_AMAP_AXI_WIN(win_num)); - csr_writel(pcie, upper_32_bits(cpu_addr), - PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); - - csr_writel(pcie, lower_32_bits(pci_addr), - PAB_AXI_AMAP_PEX_WIN_L(win_num)); - csr_writel(pcie, upper_32_bits(pci_addr), - PAB_AXI_AMAP_PEX_WIN_H(win_num)); - - pcie->ob_wins_configured++; -} - -static int mobiveil_bringup_link(struct mobiveil_pcie *pcie) -{ - int retries; - - /* check if the link is up or not */ - for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) { - if (mobiveil_pcie_link_up(pcie)) - return 0; - - usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); - } - - dev_err(&pcie->pdev->dev, "link never came up\n"); - - return -ETIMEDOUT; -} - static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) { phys_addr_t msg_addr = pcie->pcie_reg_base; - struct mobiveil_msi *msi = &pcie->msi; + struct mobiveil_msi *msi = &pcie->rp.msi; - pcie->msi.num_of_vectors = PCI_NUM_MSI; + msi->num_of_vectors = PCI_NUM_MSI; msi->msi_pages_phys = (phys_addr_t)msg_addr; writel_relaxed(lower_32_bits(msg_addr), @@ -627,20 +264,24 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) */ /* config outbound translation window */ - program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, - CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); + program_ob_windows(pcie, WIN_NUM_0, pcie->rp.ob_io_res->start, 0, + CFG_WINDOW_TYPE, resource_size(pcie->rp.ob_io_res)); /* memory inbound translation window */ program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry(win, &pcie->resources) { - if (resource_type(win->res) == IORESOURCE_MEM) + if (resource_type(win->res) == IORESOURCE_MEM) { type = MEM_WINDOW_TYPE; - else if (resource_type(win->res) == IORESOURCE_IO) + } else if (resource_type(win->res) == IORESOURCE_IO) { type = IO_WINDOW_TYPE; - else + } else if (resource_type(win->res) == IORESOURCE_BUS) { + pcie->rp.root_bus_nr = win->res->start; continue; + } else { + continue; + } /* configure outbound translation window */ program_ob_windows(pcie, pcie->ob_wins_configured, @@ -655,9 +296,6 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) value |= (PCI_CLASS_BRIDGE_PCI << 16); csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); - /* setup MSI hardware registers */ - mobiveil_pcie_enable_msi(pcie); - return 0; } @@ -670,11 +308,11 @@ static void mobiveil_mask_intx_irq(struct irq_data *data) pcie = irq_desc_get_chip_data(desc); mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); - raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); + raw_spin_lock_irqsave(&pcie->rp.intx_mask_lock, flags); shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); shifted_val &= ~mask; csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); - raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); + raw_spin_unlock_irqrestore(&pcie->rp.intx_mask_lock, flags); } static void mobiveil_unmask_intx_irq(struct irq_data *data) @@ -686,11 +324,11 @@ static void mobiveil_unmask_intx_irq(struct irq_data *data) pcie = irq_desc_get_chip_data(desc); mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); - raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); + raw_spin_lock_irqsave(&pcie->rp.intx_mask_lock, flags); shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); shifted_val |= mask; csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); - raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); + raw_spin_unlock_irqrestore(&pcie->rp.intx_mask_lock, flags); } static struct irq_chip intx_irq_chip = { @@ -758,7 +396,7 @@ static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, unsigned int nr_irqs, void *args) { struct mobiveil_pcie *pcie = domain->host_data; - struct mobiveil_msi *msi = &pcie->msi; + struct mobiveil_msi *msi = &pcie->rp.msi; unsigned long bit; WARN_ON(nr_irqs != 1); @@ -785,7 +423,7 @@ static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, { struct irq_data *d = irq_domain_get_irq_data(domain, virq); struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(d); - struct mobiveil_msi *msi = &pcie->msi; + struct mobiveil_msi *msi = &pcie->rp.msi; mutex_lock(&msi->lock); @@ -806,9 +444,9 @@ static int mobiveil_allocate_msi_domains(struct mobiveil_pcie *pcie) { struct device *dev = &pcie->pdev->dev; struct fwnode_handle *fwnode = of_node_to_fwnode(dev->of_node); - struct mobiveil_msi *msi = &pcie->msi; + struct mobiveil_msi *msi = &pcie->rp.msi; - mutex_init(&pcie->msi.lock); + mutex_init(&msi->lock); msi->dev_domain = irq_domain_add_linear(NULL, msi->num_of_vectors, &msi_domain_ops, pcie); if (!msi->dev_domain) { @@ -835,15 +473,15 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) int ret; /* setup INTx */ - pcie->intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, - &intx_domain_ops, pcie); + pcie->rp.intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, + &intx_domain_ops, pcie); - if (!pcie->intx_domain) { + if (!pcie->rp.intx_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); return -ENOMEM; } - raw_spin_lock_init(&pcie->intx_mask_lock); + raw_spin_lock_init(&pcie->rp.intx_mask_lock); /* setup MSI */ ret = mobiveil_allocate_msi_domains(pcie); @@ -853,24 +491,54 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) return 0; } -static int mobiveil_pcie_probe(struct platform_device *pdev) +static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) +{ + struct device *dev = &pcie->pdev->dev; + struct resource *res; + int ret; + + if (pcie->rp.ops->interrupt_init) + return pcie->rp.ops->interrupt_init(pcie); + + /* map MSI config resource */ + res = platform_get_resource_byname(pcie->pdev, IORESOURCE_MEM, + "apb_csr"); + pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res); + if (IS_ERR(pcie->apb_csr_base)) + return PTR_ERR(pcie->apb_csr_base); + + /* setup MSI hardware registers */ + mobiveil_pcie_enable_msi(pcie); + + pcie->rp.irq = platform_get_irq(pcie->pdev, 0); + if (pcie->rp.irq <= 0) { + dev_err(dev, "failed to map IRQ: %d\n", pcie->rp.irq); + return -ENODEV; + } + + /* initialize the IRQ domains */ + ret = mobiveil_pcie_init_irq_domain(pcie); + if (ret) { + dev_err(dev, "Failed creating IRQ Domain\n"); + return ret; + } + + irq_set_chained_handler_and_data(pcie->rp.irq, + mobiveil_pcie_isr, pcie); + + return 0; +} + +int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) { - struct mobiveil_pcie *pcie; struct pci_bus *bus; struct pci_bus *child; struct pci_host_bridge *bridge; - struct device *dev = &pdev->dev; + struct device *dev = &pcie->pdev->dev; resource_size_t iobase; int ret; - /* allocate the PCIe port */ - bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); - if (!bridge) - return -ENOMEM; - - pcie = pci_host_bridge_priv(bridge); - - pcie->pdev = pdev; + INIT_LIST_HEAD(&pcie->resources); ret = mobiveil_pcie_parse_dt(pcie); if (ret) { @@ -878,7 +546,10 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) return ret; } - INIT_LIST_HEAD(&pcie->resources); + /* allocate the PCIe port */ + bridge = devm_pci_alloc_host_bridge(dev, 0); + if (!bridge) + return -ENOMEM; /* parse the host bridge base addresses from the device tree file */ ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, @@ -898,15 +569,12 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) goto error; } - /* initialize the IRQ domains */ - ret = mobiveil_pcie_init_irq_domain(pcie); + ret = mobiveil_pcie_interrupt_init(pcie); if (ret) { - dev_err(dev, "Failed creating IRQ Domain\n"); + dev_err(dev, "Interrupt init failed\n"); goto error; } - irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); - ret = devm_request_pci_bus_resources(dev, &pcie->resources); if (ret) goto error; @@ -915,7 +583,7 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) list_splice_init(&pcie->resources, &bridge->windows); bridge->dev.parent = dev; bridge->sysdata = pcie; - bridge->busnr = pcie->root_bus_nr; + bridge->busnr = pcie->rp.root_bus_nr; bridge->ops = &mobiveil_pcie_ops; bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; @@ -943,25 +611,3 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) pci_free_resource_list(&pcie->resources); return ret; } - -static const struct of_device_id mobiveil_pcie_of_match[] = { - {.compatible = "mbvl,gpex40-pcie",}, - {}, -}; - -MODULE_DEVICE_TABLE(of, mobiveil_pcie_of_match); - -static struct platform_driver mobiveil_pcie_driver = { - .probe = mobiveil_pcie_probe, - .driver = { - .name = "mobiveil-pcie", - .of_match_table = mobiveil_pcie_of_match, - .suppress_bind_attrs = true, - }, -}; - -builtin_platform_driver(mobiveil_pcie_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("Mobiveil PCIe host controller driver"); -MODULE_AUTHOR("Subrahmanya Lingappa "); diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c new file mode 100644 index 000000000000..216c62f35568 --- /dev/null +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCIe host controller driver for Mobiveil PCIe Host controller + * + * Copyright (c) 2018 Mobiveil Inc. + * Author: Subrahmanya Lingappa + * Refactor: Zhiqiang Hou + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "pcie-mobiveil.h" + +static int mobiveil_pcie_probe(struct platform_device *pdev) +{ + struct mobiveil_pcie *pcie; + struct device *dev = &pdev->dev; + + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); + if (!pcie) + return -ENOMEM; + + pcie->pdev = pdev; + + return mobiveil_pcie_host_probe(pcie); +} + +static const struct of_device_id mobiveil_pcie_of_match[] = { + {.compatible = "mbvl,gpex40-pcie",}, + {}, +}; + +MODULE_DEVICE_TABLE(of, mobiveil_pcie_of_match); + +static struct platform_driver mobiveil_pcie_driver = { + .probe = mobiveil_pcie_probe, + .driver = { + .name = "mobiveil-pcie", + .of_match_table = mobiveil_pcie_of_match, + .suppress_bind_attrs = true, + }, +}; + +builtin_platform_driver(mobiveil_pcie_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Mobiveil PCIe host controller driver"); +MODULE_AUTHOR("Subrahmanya Lingappa "); diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c new file mode 100644 index 000000000000..a25ebdd23592 --- /dev/null +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCIe host controller driver for Mobiveil PCIe Host controller + * + * Copyright (c) 2018 Mobiveil Inc. + * Author: Subrahmanya Lingappa + * Refactor: Zhiqiang Hou + */ + +#include +#include +#include +#include +#include + +#include "pcie-mobiveil.h" + +/* + * mobiveil_pcie_sel_page - routine to access paged register + * + * Registers whose address greater than PAGED_ADDR_BNDRY (0xc00) are paged, + * for this scheme to work extracted higher 6 bits of the offset will be + * written to pg_sel field of PAB_CTRL register and rest of the lower 10 + * bits enabled with PAGED_ADDR_BNDRY are used as offset of the register. + */ +static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) +{ + u32 val; + + val = readl(pcie->csr_axi_slave_base + PAB_CTRL); + val &= ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT); + val |= (pg_idx & PAGE_SEL_MASK) << PAGE_SEL_SHIFT; + + writel(val, pcie->csr_axi_slave_base + PAB_CTRL); +} + +static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) +{ + if (off < PAGED_ADDR_BNDRY) { + /* For directly accessed registers, clear the pg_sel field */ + mobiveil_pcie_sel_page(pcie, 0); + return pcie->csr_axi_slave_base + off; + } + + mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); + return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); +} + +static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val) +{ + if ((uintptr_t)addr & (size - 1)) { + *val = 0; + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + switch (size) { + case 4: + *val = readl(addr); + break; + case 2: + *val = readw(addr); + break; + case 1: + *val = readb(addr); + break; + default: + *val = 0; + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val) +{ + if ((uintptr_t)addr & (size - 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + switch (size) { + case 4: + writel(val, addr); + break; + case 2: + writew(val, addr); + break; + case 1: + writeb(val, addr); + break; + default: + return PCIBIOS_BAD_REGISTER_NUMBER; + } + + return PCIBIOS_SUCCESSFUL; +} + +u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) +{ + void *addr; + u32 val; + int ret; + + addr = mobiveil_pcie_comp_addr(pcie, off); + + ret = mobiveil_pcie_read(addr, size, &val); + if (ret) + dev_err(&pcie->pdev->dev, "read CSR address failed\n"); + + return val; +} + +void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size) +{ + void *addr; + int ret; + + addr = mobiveil_pcie_comp_addr(pcie, off); + + ret = mobiveil_pcie_write(addr, size, val); + if (ret) + dev_err(&pcie->pdev->dev, "write CSR address failed\n"); +} + +bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) +{ + if (pcie->ops->link_up) + return pcie->ops->link_up(pcie); + + return (csr_readl(pcie, LTSSM_STATUS) & + LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0; +} + +void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size) +{ + u32 value; + u64 size64 = ~(size - 1); + + if (win_num >= pcie->ppio_wins) { + dev_err(&pcie->pdev->dev, + "ERROR: max inbound windows reached !\n"); + return; + } + + value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); + value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT); + value |= (type << AMAP_CTRL_TYPE_SHIFT) | (1 << AMAP_CTRL_EN_SHIFT) | + (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); + csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), + PAB_EXT_PEX_AMAP_SIZEN(win_num)); + + csr_writel(pcie, lower_32_bits(cpu_addr), + PAB_PEX_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, upper_32_bits(cpu_addr), + PAB_EXT_PEX_AMAP_AXI_WIN(win_num)); + + csr_writel(pcie, lower_32_bits(pci_addr), + PAB_PEX_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, upper_32_bits(pci_addr), + PAB_PEX_AMAP_PEX_WIN_H(win_num)); + + pcie->ib_wins_configured++; +} + +/* + * routine to program the outbound windows + */ +void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size) +{ + + u32 value; + u64 size64 = ~(size - 1); + + if (win_num >= pcie->apio_wins) { + dev_err(&pcie->pdev->dev, + "ERROR: max outbound windows reached !\n"); + return; + } + + /* + * program Enable Bit to 1, Type Bit to (00) base 2, AXI Window Size Bit + * to 4 KB in PAB_AXI_AMAP_CTRL register + */ + value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); + value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | + WIN_SIZE_MASK << WIN_SIZE_SHIFT); + value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | + (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); + csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); + + /* + * program AXI window base with appropriate value in + * PAB_AXI_AMAP_AXI_WIN0 register + */ + csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), + PAB_AXI_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, upper_32_bits(cpu_addr), + PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); + + csr_writel(pcie, lower_32_bits(pci_addr), + PAB_AXI_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, upper_32_bits(pci_addr), + PAB_AXI_AMAP_PEX_WIN_H(win_num)); + + pcie->ob_wins_configured++; +} + +int mobiveil_bringup_link(struct mobiveil_pcie *pcie) +{ + int retries; + + /* check if the link is up or not */ + for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) { + if (mobiveil_pcie_link_up(pcie)) + return 0; + + usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); + } + + dev_err(&pcie->pdev->dev, "link never came up\n"); + + return -ETIMEDOUT; +} diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h new file mode 100644 index 000000000000..eb4cb61291a8 --- /dev/null +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -0,0 +1,187 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * PCIe host controller driver for Mobiveil PCIe Host controller + * + * Copyright (c) 2018 Mobiveil Inc. + * Author: Subrahmanya Lingappa + * Refactor: Zhiqiang Hou + */ + +#ifndef _PCIE_MOBIVEIL_H +#define _PCIE_MOBIVEIL_H + +#include +#include +#include +#include "../../pci.h" + +/* register offsets and bit positions */ + +/* + * translation tables are grouped into windows, each window registers are + * grouped into blocks of 4 or 16 registers each + */ +#define PAB_REG_BLOCK_SIZE 16 +#define PAB_EXT_REG_BLOCK_SIZE 4 + +#define PAB_REG_ADDR(offset, win) \ + (offset + (win * PAB_REG_BLOCK_SIZE)) +#define PAB_EXT_REG_ADDR(offset, win) \ + (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) + +#define LTSSM_STATUS 0x0404 +#define LTSSM_STATUS_L0_MASK 0x3f +#define LTSSM_STATUS_L0 0x2d + +#define PAB_CTRL 0x0808 +#define AMBA_PIO_ENABLE_SHIFT 0 +#define PEX_PIO_ENABLE_SHIFT 1 +#define PAGE_SEL_SHIFT 13 +#define PAGE_SEL_MASK 0x3f +#define PAGE_LO_MASK 0x3ff +#define PAGE_SEL_OFFSET_SHIFT 10 + +#define PAB_AXI_PIO_CTRL 0x0840 +#define APIO_EN_MASK 0xf + +#define PAB_PEX_PIO_CTRL 0x08c0 +#define PIO_ENABLE_SHIFT 0 + +#define PAB_INTP_AMBA_MISC_ENB 0x0b0c +#define PAB_INTP_AMBA_MISC_STAT 0x0b1c +#define PAB_INTP_INTX_MASK 0x01e0 +#define PAB_INTP_MSI_MASK 0x8 + +#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) +#define WIN_ENABLE_SHIFT 0 +#define WIN_TYPE_SHIFT 1 +#define WIN_TYPE_MASK 0x3 +#define WIN_SIZE_SHIFT 10 +#define WIN_SIZE_MASK 0x3fffff + +#define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) + +#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) +#define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) +#define AXI_WINDOW_ALIGN_MASK 3 + +#define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) +#define PAB_BUS_SHIFT 24 +#define PAB_DEVICE_SHIFT 19 +#define PAB_FUNCTION_SHIFT 16 + +#define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) +#define PAB_INTP_AXI_PIO_CLASS 0x474 + +#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) +#define AMAP_CTRL_EN_SHIFT 0 +#define AMAP_CTRL_TYPE_SHIFT 1 +#define AMAP_CTRL_TYPE_MASK 3 + +#define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) +#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win) +#define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) +#define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win) +#define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) + +/* starting offset of INTX bits in status register */ +#define PAB_INTX_START 5 + +/* supported number of MSI interrupts */ +#define PCI_NUM_MSI 16 + +/* MSI registers */ +#define MSI_BASE_LO_OFFSET 0x04 +#define MSI_BASE_HI_OFFSET 0x08 +#define MSI_SIZE_OFFSET 0x0c +#define MSI_ENABLE_OFFSET 0x14 +#define MSI_STATUS_OFFSET 0x18 +#define MSI_DATA_OFFSET 0x20 +#define MSI_ADDR_L_OFFSET 0x24 +#define MSI_ADDR_H_OFFSET 0x28 + +/* outbound and inbound window definitions */ +#define WIN_NUM_0 0 +#define WIN_NUM_1 1 +#define CFG_WINDOW_TYPE 0 +#define IO_WINDOW_TYPE 1 +#define MEM_WINDOW_TYPE 2 +#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) +#define MAX_PIO_WINDOWS 8 + +/* Parameters for the waiting for link up routine */ +#define LINK_WAIT_MAX_RETRIES 10 +#define LINK_WAIT_MIN 90000 +#define LINK_WAIT_MAX 100000 + +#define PAGED_ADDR_BNDRY 0xc00 +#define OFFSET_TO_PAGE_ADDR(off) \ + ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) +#define OFFSET_TO_PAGE_IDX(off) \ + ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) + +struct mobiveil_pcie; + +struct mobiveil_msi { /* MSI information */ + struct mutex lock; /* protect bitmap variable */ + struct irq_domain *msi_domain; + struct irq_domain *dev_domain; + phys_addr_t msi_pages_phys; + int num_of_vectors; + DECLARE_BITMAP(msi_irq_in_use, PCI_NUM_MSI); +}; + +struct mobiveil_rp_ops { + int (*interrupt_init)(struct mobiveil_pcie *pcie); +}; + +struct root_port { + u8 root_bus_nr; + void __iomem *config_axi_slave_base; /* endpoint config base */ + struct resource *ob_io_res; + struct mobiveil_rp_ops *ops; + int irq; + raw_spinlock_t intx_mask_lock; + struct irq_domain *intx_domain; + struct mobiveil_msi msi; +}; + +struct mobiveil_pab_ops { + int (*link_up)(struct mobiveil_pcie *pcie); +}; + +struct mobiveil_pcie { + struct platform_device *pdev; + struct list_head resources; + void __iomem *csr_axi_slave_base; /* PAB registers base */ + phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base */ + void __iomem *apb_csr_base; /* MSI register base */ + u32 apio_wins; + u32 ppio_wins; + u32 ob_wins_configured; /* configured outbound windows */ + u32 ib_wins_configured; /* configured inbound windows */ + const struct mobiveil_pab_ops *ops; + struct root_port rp; +}; + +int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie); +bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie); +int mobiveil_bringup_link(struct mobiveil_pcie *pcie); +void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size); +void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size); +u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size); +void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size); + +static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x4); +} + +static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x4); +} + +#endif /* _PCIE_MOBIVEIL_H */ From patchwork Tue Nov 6 13:20:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670359 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1218813AD for ; Tue, 6 Nov 2018 13:21:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 01F722A3CE for ; Tue, 6 Nov 2018 13:21:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E9AFC2A3D5; Tue, 6 Nov 2018 13:21:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 626202A3CE for ; Tue, 6 Nov 2018 13:21:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388481AbeKFWqJ (ORCPT ); Tue, 6 Nov 2018 17:46:09 -0500 Received: from mail-he1eur01on0070.outbound.protection.outlook.com ([104.47.0.70]:42149 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388257AbeKFWqJ (ORCPT ); Tue, 6 Nov 2018 17:46:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lb2IMZBFlQIytfd9EOGRKi3YEAR8o4+NIFs8xDjcSss=; b=Mm91HeiipkYgNULF/YVjt7FHUvXc49MUHOAr1u7O05mPKw1t2knmYqEC8i4MfbURNLlOWi8o/VvMjHS+BRbf9Kwf0ijdzEnQQE+RkZLCe7cz/5wFmylGXL0dgswUXGjByLHRf8Adq2W9QYS1xgQ1SkN9o5oyU1i7X0QxJenK6sc= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:20:54 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:20:54 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 17/23] PCI: mobiveil: continue to initialize the host upon no PCIe link Thread-Topic: [PATCH 17/23] PCI: mobiveil: continue to initialize the host upon no PCIe link Thread-Index: AQHUddOLMi7Bc9hStkiEwUyEZdwaYQ== Date: Tue, 6 Nov 2018 13:20:54 +0000 Message-ID: <20181106131807.29951-18-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:GA5uPTqjIGv6+vOHQKhWS11ffQsH6v8BslFYzQ51lDabpHX5R8sC1NXG1skCjdo4YYviwfneP4NQvHmgVt63hGq7Vu2c7tl2FLy+zEcb4j3GRC2PL0XlaJu86KyppzVRCq+t/J06aq14PegLQlLOk6zvNmQukV/LV/R9HlC42UNKUiGUEeb4iR0kCthDcGXNRQjgxEoJ4ojrWz16T4NPTxG64ts2FiGfMvmYwGxMTMjtWAPaBIaoUyM04z9XXOIz4Klm+x15azhfD4iQdZEpl9GXMumCuZ87uAjz30BzCKVVOlmBA40t2Okq2DhqLZioP0jNPssuy6BE66pGLVw6gAWWkwyyUmrZQw4MTRClvSdw4TtbtyhrPP9mI5bQD1wMBb2aPdrJqc4Vt0+oug54EI2N0wdeV7ySlGWqc7CBrqgJuB6RTcgm4Olbr0pwvhCLFlWdHpUpGxiC27Dudal3jw==;5:nx90jrA51+8oJXSr8jEWOKipAY77+G+G05A3FxU5+ahcwf87SzFOUts0tEZjzE1iUkIV1hzMv07V09Q8Jbjv9PAn7voHkkijd63kmbKQrPQPPak7r/Z7B8e6DkCYtJFpXf4F0K03/yetYep1PzxuECQJjH6Yb1hIZx5HltuyOkE=;7:pXVT6ZNd65St6AzpapWiqYgfubx2zKUjqSa12JHo9Vph6OBdx8Inc/6/TKnZPRdCsA5gkkNEXQy0f6Vi4+a0wjYNlJFhegxbGgH0tVQcbFLibI/0CHu8TNGFLsRJ3hNG15bhu9LQ1rAlMOprs4tdNA== x-ms-office365-filtering-correlation-id: 23e6ed78-0b4a-4c62-00c0-08d643eaae0d x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: exWZlm7pys8MTz4IQxWEEGpoRjm/00XEYgYuEJAnmagq+R2iOmhIiEkOaFE6+X2XBJUFAgAIzpNcY51mWLJzJEIfuLOVgvbkm+ASUZjZGYBPrE0ClyVqGGIYLU6lx8sEsxFMm8JmiEczYZzqGh7Gg8ipb2oJfuzGmMMnn6X+JNVu1iERd4J3o0KxQJtq4nfKvHJntWphHJU+d9BcZ67tJ20hcD+4oloGWbhCw/gtnvsvjO/rZIy2LhmMZlRae8mBN1Iv/XHDtgljwMpx3s2BszoPCx4XWRdarxkNWG3SdbyP13ZpYPpKT5dSPXNVmI9vSiMBLt3y4/pGxVk12Cx9VmloHnPNblFvcJSdVymtn40= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 23e6ed78-0b4a-4c62-00c0-08d643eaae0d X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:20:54.3792 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Sometimes there is not a PCIe Endpoint in the PCIe slot, so do not exit when the PCIe link is not up. And degrade the print level of link up info. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/mobiveil/pcie-mobiveil-host.c | 1 - drivers/pci/controller/mobiveil/pcie-mobiveil.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index 383b2f3947a5..4419179f64bc 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -591,7 +591,6 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) ret = mobiveil_bringup_link(pcie); if (ret) { dev_info(dev, "link bring-up failed\n"); - goto error; } /* setup the kernel resources for the newly added PCIe root bus */ diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c index a25ebdd23592..71389ebbf229 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c @@ -221,7 +221,7 @@ int mobiveil_bringup_link(struct mobiveil_pcie *pcie) usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); } - dev_err(&pcie->pdev->dev, "link never came up\n"); + dev_info(&pcie->pdev->dev, "link never came up\n"); return -ETIMEDOUT; } From patchwork Tue Nov 6 13:21:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670341 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C20B313A4 for ; Tue, 6 Nov 2018 13:21:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B0FA72A3A5 for ; Tue, 6 Nov 2018 13:21:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A46E02A3BE; Tue, 6 Nov 2018 13:21:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3471C2A3A5 for ; Tue, 6 Nov 2018 13:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388514AbeKFWqR (ORCPT ); Tue, 6 Nov 2018 17:46:17 -0500 Received: from mail-he1eur01on0083.outbound.protection.outlook.com ([104.47.0.83]:64240 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388497AbeKFWqP (ORCPT ); Tue, 6 Nov 2018 17:46:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sc5uKHbf3v0qCGYcXW6quzgbwBxS23iSrW0yDURxXNI=; b=N8d+9wkOjaawnZpwmINsGFhXVoJ/LlBkCXlwvV3PSZyhNFKdFMsROqK5FgKR17HVKmGMImGU3I9eVd41f47YPyHhMnn4usMBfmYuNlLb0+nBt1qpHOOhZkxQpsqLLmvPz5Dy+aEobjw0O/GPl12Wx3C1rgWHUimOkDc3vql/RZw= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:21:00 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:00 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 18/23] PCI: mobiveil: disabled IB and OB windows set by bootloader Thread-Topic: [PATCH 18/23] PCI: mobiveil: disabled IB and OB windows set by bootloader Thread-Index: AQHUddOP9u/TlMIhSUSgJ6+th1klBQ== Date: Tue, 6 Nov 2018 13:21:00 +0000 Message-ID: <20181106131807.29951-19-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:FT3m/CyJzk43NDHKn9yh9+hTv4DHr4VUSs+BKGs6T6AQIj1rf1zpuS4zih7RLzHPXu5i/DNd6PTPcfhKyRkOBdUQMh2b3GGu8pOPU1MBeYRvsxX6bfnYY6T2iteZGmqxAZ2dpuZD1bMiwmCzzSko8Ux3Tc5cr7vOHy+G5Va9lqL50JhAhNzaz052A01wBUEqWhGAtIlDO8q6dy6LzihnJaOSMPA8raWmdA1grYHvnyoj1GJZL4TKSl5sfAlHqSnTCbsur230Z3QpiCqHY1RA69DcyIs3BfbGmW7nw+c3P0832H5eJTgXhpGRIZRYpXG1IM9wai+1DMQNGC6MEQmk94fGlWLoq1gug1Kn7xikM5oWrkq3KAklkbV0mttrkPKX9/PParmZABzlFQT0A4ewuzmd3dLrEAG1OUNVsWqz//8kIT7xcftuu5ZVDz6+Ghf6VWeFYNZXl75U8Df/Rasshw==;5:ggE/GtkItCqNTunVGnCKwBKrGsCUEz67C4dPk9/oIl7syI+pqBLJwC0gSvYQTMRPOPiBY1FL6wJUd8M/+j67qkIWHDM065ryncOrLZVsVmZr5chs6xoMflxpXzNeQZsPd5j5v4JW06uvNLC1RmFiFDlvRka1ZuHiors7+uOzX78=;7:smQNiI1bshWtHAsvJ6rlVyCNDXIL4Ksu9Vt5ZUh/Adi7717OUGleGOo5/7XlZM/2aAnCBkdjwPeFoXSSDpWYCW8dIQO69Xo+Gy8gNZWaFVJWn7MHo9MKaF0Nn+HiQ9njo9NxLtBrs1joP7JKGO9qsw== x-ms-office365-filtering-correlation-id: fee4da17-a9a8-414a-10c9-08d643eab17f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(14444005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 5dGcm1parw0Sqc6syt8omU3BdxROGcIdO+s2QDq92VIXBvk1Mx3/ln2MGCiXkp4f18JKmTt8LS7B9EYAQyX96zAjgo+DCC75Rn58FFGu+akr07alNDrQqVFO+kJfX/fRxnbCtkBWtnUfc0bDGRBerka30CRycutZF0wW/tbB1+DClGYVBKeqAOo2w7ebQAn/e/sAb7cOzcOH2DU+cQhbCJeUdUCyyZMWl6yt4j1mu/ic+L9jdMbPreleRJV2vgohmYqcgfakd1mdthH9SWsA33JR3RmYj4q9DdonCgE1PCVtFji3zcyndvNVkznMa7eE4b0CLq22+GSaoqFtsA+SikshmULcFm4lUcDSz01S73w= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: fee4da17-a9a8-414a-10c9-08d643eab17f X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:00.2659 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Disabled all inbound and outbound windows before set up the windows in kernel, in case transactions match the window set by bootloader. Signed-off-by: Hou Zhiqiang --- .../controller/mobiveil/pcie-mobiveil-host.c | 7 +++++++ .../pci/controller/mobiveil/pcie-mobiveil.c | 18 ++++++++++++++++++ .../pci/controller/mobiveil/pcie-mobiveil.h | 2 ++ 3 files changed, 27 insertions(+) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index 4419179f64bc..de24fedcb92d 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -217,6 +217,13 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) { u32 value, pab_ctrl, type; struct resource_entry *win; + int i; + + /* Disable all inbound/outbound windows */ + for (i = 0; i < pcie->apio_wins; i++) + mobiveil_pcie_disable_ob_win(pcie, i); + for (i = 0; i < pcie->ppio_wins; i++) + mobiveil_pcie_disable_ib_win(pcie, i); /* setup bus numbers */ value = csr_readl(pcie, PCI_PRIMARY_BUS); diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c index 71389ebbf229..cd2a7b9a7a2f 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c @@ -225,3 +225,21 @@ int mobiveil_bringup_link(struct mobiveil_pcie *pcie) return -ETIMEDOUT; } + +void mobiveil_pcie_disable_ib_win(struct mobiveil_pcie *pci, int win_num) +{ + u32 val; + + val = csr_readl(pci, PAB_PEX_AMAP_CTRL(win_num)); + val &= ~(1 << AMAP_CTRL_EN_SHIFT); + csr_writel(pci, val, PAB_PEX_AMAP_CTRL(win_num)); +} + +void mobiveil_pcie_disable_ob_win(struct mobiveil_pcie *pci, int win_num) +{ + u32 val; + + val = csr_readl(pci, PAB_AXI_AMAP_CTRL(win_num)); + val &= ~(1 << WIN_ENABLE_SHIFT); + csr_writel(pci, val, PAB_AXI_AMAP_CTRL(win_num)); +} diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index eb4cb61291a8..81685840b378 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -171,6 +171,8 @@ void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, u64 pci_addr, u32 type, u64 size); void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, u64 pci_addr, u32 type, u64 size); +void mobiveil_pcie_disable_ob_win(struct mobiveil_pcie *pci, int win_num); +void mobiveil_pcie_disable_ib_win(struct mobiveil_pcie *pci, int win_num); u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size); void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size); From patchwork Tue Nov 6 13:21:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670345 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1534813AD for ; Tue, 6 Nov 2018 13:21:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03ACF2A3A5 for ; Tue, 6 Nov 2018 13:21:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBAB32A3BE; Tue, 6 Nov 2018 13:21:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 77CCF2A3A5 for ; Tue, 6 Nov 2018 13:21:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388524AbeKFWqW (ORCPT ); Tue, 6 Nov 2018 17:46:22 -0500 Received: from mail-he1eur01on0079.outbound.protection.outlook.com ([104.47.0.79]:43456 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388225AbeKFWqV (ORCPT ); Tue, 6 Nov 2018 17:46:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mWry7gCZSzWVlS4ahhb1go/W/PQXURJtjoF7yBzmDFU=; b=oc8yRIiqdC0earhhWIvifUCR4blyPz1BEsi+7OwKG8kcYNc3ILjyuvPUWKWfzSemcGXWLcc7crd2DnSdJ3GZzP95wazO5Dj24ADPV+yF8o0m2ojO2I7eEl3/EKGIiitoeE43NZ8K0LOMq54GYlA38+c32MPr9VyVNwOU1lSBAbA= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:21:06 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:06 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 19/23] PCI: mobiveil: add Byte and Half-Word width register accessors Thread-Topic: [PATCH 19/23] PCI: mobiveil: add Byte and Half-Word width register accessors Thread-Index: AQHUddOSJtO93UKerUSO5oBANnJx3A== Date: Tue, 6 Nov 2018 13:21:06 +0000 Message-ID: <20181106131807.29951-20-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:0ih/73KH9iFglZu4Rr+DkvKGrZeSuWYR3CcOr+olJHbau0x8i67tNSwNTr1FtJWrdCm590A+/u+eMfDruIOlZqrhX/TQzvOOTkH3Xtlp0UFhvP+SLLg9Qbt+h7CN25LFJdaHaFdbjmJSmGW0WhPGdEJBX8SjyYjDTD/IKlPUVEbvZhP/8pUORyN5/HK9E1dvkhoKrRtw+yypRqn3kM0zGlcipYQJ9rSWEqvqOOWXxhHoskXULfUyv1LLv7uef0uDMefUkVx78koVXWOzXUggDkGu3Y7XB9Uck8jgh5fnahRglGWDpq0Tf9H7gtk3XgdGT6vQV/aRBP+3TjpxNOgkoDfUASnC857Z2twQrKTH1yEyV5+wxMm+CNUQLoeT03J8WtMIZsmfwdecw/5eFHEd/PcYAODfXQOFb46QOuXrkKyFQq0jf5HvVmxzRZpJfjZGWpKWqgqWejVckC0041sLsw==;5:B+coAuih0gaJdIB3cDxOCLlh+SIXZrUzHNRhbzzb7xbqIF0WKNu55YpuhS2wum3LrGahPXopsaFTOEJ4lHLvJHFDGWiPLW/v312kJCB0HPjAGlc0qZaThpPkg/SocNRMKv/CizRPk7+4NcU8FZSEC97ZOvF0WFJ8vk9BsMcHQVw=;7:Ju5KL9+K4Q+Hs2ltRAyJYHgu+0g32xA90I7Gb3koHTbb3qPvM97S12ISuMYn7jhTp3E9jAC5D+61jC/q21lPMWLyMRfwYYBl4BSvSVIc8ylCf3WMqeRgs9/6oMifBZC+KYdl8/YLDkJSQp3i1prDGA== x-ms-office365-filtering-correlation-id: beba9873-d6f7-4aea-6283-08d643eab502 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: WDnPafxHbyx/3pdSt7BbkmXCy1cCAY2p8pO9f/ReVjNAqLFojuyKAqQcZ+yewrEeRGAWvuuwTdxn5MV5GsmRcZkgrrrT8K/hUgXqcgpwtJxgLo3HJPUz99hplevGcSx8oaTysLkhHFVX6z/mZD0Q5jZhq0y5F76rREnpKbEIKavAVOm0/XgjALJO11a3vPFuJ4GzXYtRlZoDf+OqEvh06WpeB65nDL1a58zqJykQMloJD3Gl4dvNzAbhjmZ/t0sm0QgkYRywL2WNvgDjVM6ccELb+44+RnRr4o5LZH+rp5f0+VtLnJSLSHlBYGSejDcPB8vXmwgonM96nenpv4Vxz7jaX6BFm6KfwEX/le7csvg= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: beba9873-d6f7-4aea-6283-08d643eab502 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:06.4419 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang As there are some Byte and Half-Work width registers in PCIe configuration space, add Byte and Half-Word width register accessors. Signed-off-by: Hou Zhiqiang --- .../pci/controller/mobiveil/pcie-mobiveil.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 81685840b378..933c2f34bc52 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -181,9 +181,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) return csr_read(pcie, off, 0x4); } +static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x2); +} + +static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x1); +} + static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) { csr_write(pcie, val, off, 0x4); } +static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x2); +} + +static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x1); +} + #endif /* _PCIE_MOBIVEIL_H */ From patchwork Tue Nov 6 13:21:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670349 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 84E9A13A4 for ; Tue, 6 Nov 2018 13:21:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 74EE72A3A5 for ; Tue, 6 Nov 2018 13:21:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 683B02A3C5; Tue, 6 Nov 2018 13:21:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D47032A3B2 for ; Tue, 6 Nov 2018 13:21:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388225AbeKFWq2 (ORCPT ); Tue, 6 Nov 2018 17:46:28 -0500 Received: from mail-he1eur01on0051.outbound.protection.outlook.com ([104.47.0.51]:61568 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388220AbeKFWq2 (ORCPT ); Tue, 6 Nov 2018 17:46:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jaUMxiIt9moPZuvoSi/gXt0X2GuntRQRYRH/ENAvZ+0=; b=da7WQ3/kJr6AF4C2MNT5PFoikC0fD/mzhkkva9qIrktFr85kI+ABXKoJ+Uv+Jy0z/Q7Jj99zrBrlQ+kNNwBiD8jSiI7+D5MKUAcTlpU8CtKvDrGXOjQKAHJrDDmeW7ThvqcB7i1h3joHtq/80dnIaq6A3w7YpkZ9Sf4Xp6H35Wk= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:21:12 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:12 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 20/23] PCI: mobiveil: change prototype of function mobiveil_host_init Thread-Topic: [PATCH 20/23] PCI: mobiveil: change prototype of function mobiveil_host_init Thread-Index: AQHUddOWzQcefL0KukGVWvbBBU/BLA== Date: Tue, 6 Nov 2018 13:21:12 +0000 Message-ID: <20181106131807.29951-21-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:zdy1Je5SNs96dLwMcumxq/k57WAY+aPySkXkuasD+bIgVBA1eJnOK1Y1+lIFe5UNeQIwzFkNMH82h61ItFZH8bjk93ggGzLfVpWeDrvYkkiTbBghh9UKm6UDbm+P8tXG/zaJPlru3QS99u1U4pIkbDbabs4DJ05O4Y+ScNBsUc+FMjFFTm39EfX43xZMJj63A6SiGgwHMFHOjg5gzLHcj63T0KOck1fXiMkngkLJ7ypJ38gUPyTDT4RDJFf5CDEnPg/9mxy6U8f43bLZD4d1k9bgvSCQCIlqPTu8PjZRHMM8ewu2OYO4Rt5qLyiths7fkB8WOFDQGx5CvQXkdZO4664iAIPghR/yCdxLS1YVigQHB7kDZHGsVvzXyBRB1MvZS2X6oGC8UtUVG19my6ClsCBY4nlyFd0aYgKFDDxtmwEzRX9io1GBmx03zkOu9lYxcxIO0Pt5XXRXEyxmZIxQ1w==;5:1bf1XCeEcM+SEeW/D4EQ4l4DQFQf1ksPVi+ZfskPk1TYgIbAJtrSGO1G3kO4ZsJ9D/zougv3GA59fPzpu7CN+YIkM2rOW8aQJ1K0nO/zcBJbIcLlfvykN54ocArDqPrXJW2PkANePv/VwWn5wVCBiqud1dNk/9kpKoPWTpc/JdE=;7:peNzPUTDdEnBf8R682/ZdQhteCQ7DZjEs6ypsXkG1vKRA2BJKUufsoe2iKVi58I2OnI6PlrCouvi2vb4hmLwKlzGluEix3GZFG1Y8xM+sxBIm/RtBzqznw9R8Q+eAaTY1jWJV6Y6wWsPc96rvj5xNw== x-ms-office365-filtering-correlation-id: a9379a8c-0716-4b26-8fc7-08d643eab8ad x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(14444005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: gahF5gYBiejRAEJgmaYIGAAjXUL+PyfE0awzRMRmYx8FTYrejyAe8pVmGGwOj3J60n1ut+lYaSE7p0WiWliYFqrKKUTugCbwOjtKJfLjiCBXshXGwSPAOzAyCYIpPMhRxVYL0hE1NQXoaOC118o4bTTZm3Wp1MwTr77cHQzvAcgwDnKcJKUHBl5vPB3T4nSFGlyJYwVgD5OHaz44HRrg8HB7ed6w96T/9qdTfwZnJI+VvonkG3rJbp9a0+bi3Jtw9PL8hT3cyvEQRfwJUJU9ZyLFzbCRVU14QOb/rUtb99cfVAakq4EUZvdLjwXXp3uOuQhtjJRFeEbcV/7idJOlwzcpPXvmF3lCXBBn2KSI6H0= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a9379a8c-0716-4b26-8fc7-08d643eab8ad X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:12.5099 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Add a parameter 'bool reinit' to identify re-initializing the host controller, and export it. Signed-off-by: Hou Zhiqiang --- .../pci/controller/mobiveil/pcie-mobiveil-host.c | 16 +++++++++------- drivers/pci/controller/mobiveil/pcie-mobiveil.h | 1 + 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index de24fedcb92d..b1d67a697ecc 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -213,7 +213,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); } -static int mobiveil_host_init(struct mobiveil_pcie *pcie) +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit) { u32 value, pab_ctrl, type; struct resource_entry *win; @@ -225,11 +225,13 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) for (i = 0; i < pcie->ppio_wins; i++) mobiveil_pcie_disable_ib_win(pcie, i); - /* setup bus numbers */ - value = csr_readl(pcie, PCI_PRIMARY_BUS); - value &= 0xff000000; - value |= 0x00ff0100; - csr_writel(pcie, value, PCI_PRIMARY_BUS); + if (!reinit) { + /* setup bus numbers */ + value = csr_readl(pcie, PCI_PRIMARY_BUS); + value &= 0xff000000; + value |= 0x00ff0100; + csr_writel(pcie, value, PCI_PRIMARY_BUS); + } /* * program Bus Master Enable Bit in Command Register in PAB Config @@ -570,7 +572,7 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) * configure all inbound and outbound windows and prepare the RC for * config access */ - ret = mobiveil_host_init(pcie); + ret = mobiveil_host_init(pcie, false); if (ret) { dev_err(dev, "Failed to initialize host\n"); goto error; diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 933c2f34bc52..51195db09347 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -165,6 +165,7 @@ struct mobiveil_pcie { }; int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie); +int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit); bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie); int mobiveil_bringup_link(struct mobiveil_pcie *pcie); void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, From patchwork Tue Nov 6 13:21:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670351 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9FB7013AD for ; Tue, 6 Nov 2018 13:21:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8F0FC2A3A5 for ; Tue, 6 Nov 2018 13:21:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 828672A3C4; Tue, 6 Nov 2018 13:21:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 029652A3A5 for ; Tue, 6 Nov 2018 13:21:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388553AbeKFWqh (ORCPT ); Tue, 6 Nov 2018 17:46:37 -0500 Received: from mail-he1eur01on0055.outbound.protection.outlook.com ([104.47.0.55]:17984 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388180AbeKFWqg (ORCPT ); Tue, 6 Nov 2018 17:46:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qP597ofFwARdfQvL84KaevQpoVSDnVSMVolceCG1SCk=; b=a4l3Teh+81ykvX9BXtB776NQ8GMhyztKhi2mprEcYVw9isu9Bo1DQ+PBIyQaEH5VUPniU8fFSgkmN6hyhRgQlzBuUC+ncRY89QHrzUcM8yYF+n4zWi1Od2+k9WkEZqeg3MAm3m+Tb7ld6PKTgbtw3zii1VzwOZEAeuxNbqdYg9c= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB1414.eurprd04.prod.outlook.com (10.162.221.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Tue, 6 Nov 2018 13:21:19 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:19 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 21/23] dt-bindings: pci: Add NXP LX SoCs PCIe controller Thread-Topic: [PATCH 21/23] dt-bindings: pci: Add NXP LX SoCs PCIe controller Thread-Index: AQHUddOaH+hnWiOCjEOD1szvFZnE8w== Date: Tue, 6 Nov 2018 13:21:19 +0000 Message-ID: <20181106131807.29951-22-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB1414;6:6rU3Zv7RkXHN30u3w7re3eSTCE5TAFSxdNzw8wUcSj6FWo/xW3LPMXlUDeZO3qUc2KXET7SMRjyCV7qVLxmdEhWgSayVIGhCMHDRLAr6USxChXM7oAMJEJRGdqo93EHHs5+fAv+pLDWvUMnyf5kwm3bVFsflC+nHUpMv0GFnSoEpm5ENd4ojeVUHM1xQzZjY1TeWkveQzstVEzo7eoAcP+NeasxGQ0tdCmKP3pM9Vki8NesemPmAesNnvD2F6Axj/XOcV9NkQTm7pPwCSxX1j8lRoCJIm50nNTa/MAVEG3LY4y8hJy307bkBde51RS71ItLONpptTcBa05ZGKaKUyX30GZlIK3wreb00/8Tt2Wq4CxUndXBXy1kga2Xy0mGXakMNkT9P8vp5YPiQx/qLTy0TkWN3uGl8w7NlQEZvJJRgfLpX//b9Bf0H7+jdnOxXTHSwGpUDU4fTsiS/a+nobQ==;5:lE+GVPKhOZGuEnYO1CyV1MuZqR3jNIN/cnv8SD5+iqT61xVuF4TB94QmYKsX1otfdghuVcOo+oMOqyktRUcQ/cC61feV/gGFZuwldSsxITijNC3FNKEO7qQex644qbVM4U59G/f3S6F93baRmbzaJsG6QDUm1xFfi2sxP/m4QIQ=;7:C3JJh6AJ5tP9NJyb29Cpgq1q/vry05S63QpMVgAj4q8voVrHcNz7aETE9NT6bwik0rz0KPv815fcH28bVLXDh3/5ShvejO47D+12pNYvpT0S+8ECqTxit3tFVt1fvTxQZAtdiUs7VYJDtdISTZni/w== x-ms-office365-filtering-correlation-id: 9bd9b119-0f31-466e-29ea-08d643eabcc5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(5600074)(711020)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB1414; x-ms-traffictypediagnostic: DB5PR04MB1414: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(258649278758335)(9452136761055)(185117386973197)(180628864354917); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(3231382)(944501410)(52105095)(6055026)(148016)(149066)(150057)(6041310)(20161123562045)(20161123558120)(20161123564045)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB1414;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB1414; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6029001)(39860400002)(366004)(396003)(376002)(346002)(136003)(189003)(199004)(97736004)(66066001)(8936002)(81156014)(81166006)(7416002)(8676002)(5660300001)(71200400001)(71190400001)(478600001)(6486002)(6116002)(2900100001)(1076002)(53936002)(6436002)(6512007)(305945005)(4326008)(25786009)(7736002)(105586002)(106356001)(68736007)(2906002)(3846002)(256004)(26005)(486006)(2501003)(14454004)(99286004)(52116002)(76176011)(36756003)(110136005)(386003)(6506007)(102836004)(54906003)(86362001)(186003)(446003)(11346002)(316002)(2616005)(476003)(2201001)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB1414;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: huBlCRlRd3LVbAmFUTnZSDmM6weS34cb6TEbTn4aShacDveGqP/e9eqTTgREBZDP267rA/FFNhzQ55wAiqNnrj8/3xH0Y9N0QpG23A+dA1yyXGxFqWrBKbOPJpWk7y01t5r/eFr40VpVbQcXp0t8eFuFR8+D+uIbEDFqMInH3YGQKU1dRQihBKtAgl2WTfsuAmB3khDHGTciccflbi4HeLuSkHqEZXRpALW53XRsVr5RcvtW6X50IEi2AecvKWq1sZxgwj0klbEE01z+OcVuEHiyKQDWV2++PA6DZ8/g1+wuixMhrbBh6xDkHDOGZgemd42/6eyjGONr2pTbhwbwYHFXVFqUDpz63dSxGYmIFbM= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9bd9b119-0f31-466e-29ea-08d643eabcc5 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:19.2013 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1414 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Add PCIe controller DT bindings of NXP LX series SoCs. Signed-off-by: Hou Zhiqiang --- .../devicetree/bindings/pci/lx-pci.txt | 52 +++++++++++++++++++ MAINTAINERS | 8 +++ 2 files changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/lx-pci.txt diff --git a/Documentation/devicetree/bindings/pci/lx-pci.txt b/Documentation/devicetree/bindings/pci/lx-pci.txt new file mode 100644 index 000000000000..dc602fef93b0 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/lx-pci.txt @@ -0,0 +1,52 @@ +NXP LX PCIe controller + +This PCIe controller is based on the Mobiveil PCIe IP and thus inherits all +the common properties defined in mobiveil-pcie.txt. + +Required properties: +- compatible: should contain the platform identifier such as: + "fsl,lx2160a-pcie" +- reg: base addresses and lengths of the PCIe controller register blocks. + "config_axi_slave": PCIe controller registers + "csr_axi_slave": Bridge config registers +- interrupts: A list of interrupt outputs of the controller. Must contain an + entry for each entry in the interrupt-names property. +- interrupt-names: It could include the following entries: + "intr": The interrupt that is asserted for controller interrupts + "aer": Asserted for aer interrupt when chip support the aer interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for aer. + "pme": Asserted for pme interrupt when chip support the pme interrupt with + none MSI/MSI-X/INTx mode,but there is interrupt line for pme. +- dma-coherent: Indicates that the hardware IP block can ensure the coherency + of the data transferred from/to the IP block. This can avoid the software + cache flush/invalid actions, and improve the performance significantly. +- msi-parent : See the generic MSI binding described in + Documentation/devicetree/bindings/interrupt-controller/msi.txt. + +Example: + + pcie@3400000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + apio-wins = <8>; + ppio-wins = <8>; + dma-coherent; + bus-range = <0x0 0xff>; + msi-parent = <&its>; + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 0c57ccff3188..7da555c8e2f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11252,6 +11252,14 @@ L: linux-arm-kernel@lists.infradead.org S: Maintained F: drivers/pci/controller/dwc/*layerscape* +PCI DRIVER FOR NXP LX +M: Hou Zhiqiang +L: linux-pci@vger.kernel.org +L: linux-arm-kernel@lists.infradead.org +S: Maintained +F: Documentation/devicetree/bindings/pci/lx-pci.txt +F: drivers/pci/controller/mobibeil/pci-lx.c + PCI DRIVER FOR GENERIC OF HOSTS M: Will Deacon L: linux-pci@vger.kernel.org From patchwork Tue Nov 6 13:21:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670355 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E31213A4 for ; Tue, 6 Nov 2018 13:21:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A9B62A3D5 for ; Tue, 6 Nov 2018 13:21:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F273E2A3D6; Tue, 6 Nov 2018 13:21:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2A27F2A3CE for ; Tue, 6 Nov 2018 13:21:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387922AbeKFWqm (ORCPT ); Tue, 6 Nov 2018 17:46:42 -0500 Received: from mail-db5eur01on0082.outbound.protection.outlook.com ([104.47.2.82]:27088 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388180AbeKFWql (ORCPT ); Tue, 6 Nov 2018 17:46:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mVgDtGVx6qdNsZHy7LpnTvW7755nFc/ty1myaR0GhoI=; b=fo172d22SGx2tyGKTbEsK81aRiGvhgqJgrTKLPgMLpVYUT8Y7gpfJ+bf120QTnUEu0P66CLwWyPv7dUdFMnF99qHmFsoNzxBC6NVC9IHgDCh4HE1eZFNIN4CFQo8jKg2hVLquLGxsjmI8zNM9yj8WF9Lfxm1CXpZxXr4yMoKtME= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB2119.eurprd04.prod.outlook.com (10.166.172.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.28; Tue, 6 Nov 2018 13:21:25 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:25 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 22/23] PCI: mobiveil: add PCIe RC driver for NXP LX series SoCs Thread-Topic: [PATCH 22/23] PCI: mobiveil: add PCIe RC driver for NXP LX series SoCs Thread-Index: AQHUddOeWH2W17CrSk6lzc/1cOUlfw== Date: Tue, 6 Nov 2018 13:21:25 +0000 Message-ID: <20181106131807.29951-23-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB2119;6:ZocHzOUaHXh2dRmQaIQ8XHT5+YXfvoJWLP/dEpgQ91jGwquse7wOEAFSBBHb3pzfkcRGOM9Vw+yqyTOGs7ckjGjoG6pESe/RulM1cNVYtAjrI2+KwUYT4Fy+PHB11cpc+Kprr5F7U32tIlmR4YhzvOWc3sHV4pXd4RO7oCYEAwLwe3jhE3KFT0FjlDXASrPgbRUmgLXvq+NbKXn/CZqFSTU3Iap6amYEBi8d442cSwNVO11dDmyf6CraJM1OnLaJNEhg0RoqwdAW3ICRshJCxTaH8ufcquFyRIG2n85P4UIvmTxBWLPHV6X00J/TysShQV2V0PkNb7hcBTNqNiLYnp7HcjTr4Ppl6QQLWqtHkIzEQBcCM1q1v4/c6+Q5nBgvXbZwurnsGLEHEZtWQ80mlsz2neoMJPFfLGG0IKMkrEh2k+xLjJzQDQR5AzdUZX6FCQfKWDYlUmbrcRK8XlyfcA==;5:PJv4XnJ+L+jOV+xLkRvCNHe4QFl8NdeJ2QMSyWr0jLvR0+eyHlml2g2XBcfTd1SWYoUGGFORYiOmEFWZJjDY/caGvmTDmaGSuY+/BZ87kaOW78Msx3NM0b6ZoB6eelVsYeZ5tXifGLlhLnOOQwgSYU3eQnf+5glut9yr39YaQ7I=;7:qFlD4peB/dSF62vaKMwlpLq3YMfWYf8UpW6qPHw6slNQZHJozcj3T/Mz/KnHqgddjMirtdgvpNwboOq9GtnnMI2UtFEDszEwAozAmYf3wBiuc8dIsc1jZAD5KQ/NhKTCY6XL+t2E8QKjIRxTHF+A1Q== x-ms-office365-filtering-correlation-id: 76891e7d-26af-4977-740f-08d643eac04c x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB2119; x-ms-traffictypediagnostic: DB5PR04MB2119: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(3231382)(944501410)(52105095)(10201501046)(3002001)(6055026)(148016)(149066)(150057)(6041310)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123564045)(20161123562045)(20161123558120)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB2119;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB2119; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6029001)(346002)(376002)(396003)(136003)(39860400002)(366004)(189003)(199004)(81156014)(99286004)(2201001)(8936002)(575784001)(86362001)(6486002)(68736007)(6436002)(5660300001)(478600001)(53936002)(6512007)(4326008)(25786009)(36756003)(14454004)(54906003)(186003)(316002)(110136005)(2906002)(2900100001)(1076002)(3846002)(6116002)(81166006)(8676002)(7416002)(256004)(14444005)(446003)(11346002)(486006)(476003)(2616005)(7736002)(305945005)(71190400001)(71200400001)(66066001)(97736004)(76176011)(52116002)(102836004)(106356001)(26005)(2501003)(105586002)(386003)(6506007)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB2119;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: FV08fU5/3Qm9eSVUpY/CeEaQgsDdlNNgwE3R+4QEwFOyqBqWfK4/nSKzfsCTtVqKv9WV7UtUb7bRqND2ZH8n7bro2rdVXsEEISim3lX9wzMmn0LEgEOnw/80ZjG0oaD1eUyNcTJBdmirip0K3JbuL8/p5KbU/sMM901swW1eD0UeWP9W0xXJmMph8CDi2Skqtfei7NIWwsh8NtMXMo51MGYmBZlGt+d2psj8jOhb7eUg+R+bnwd88zl21qXLkCD7mOKRANpv3vHcFSkyoP3zZ6GKqFM0q5rJQO/tplr0UKIoptz91qMlG7w00p7ZRmiVxNuMQEDgLDXIJ3WBayu8YeAJxFvf/YgWq/W45XT3NZg= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-ID: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 76891e7d-26af-4977-740f-08d643eac04c X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:25.2022 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB2119 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang This PCIe controller is based on the Mobiveil GPEX IP, which is compatible with the PCI Express™ Base Specification, Revision 4.0. Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/mobiveil/Kconfig | 10 + drivers/pci/controller/mobiveil/Makefile | 1 + drivers/pci/controller/mobiveil/pci-lx.c | 222 ++++++++++++++++++ .../controller/mobiveil/pcie-mobiveil-host.c | 5 +- .../pci/controller/mobiveil/pcie-mobiveil.h | 15 +- 5 files changed, 249 insertions(+), 4 deletions(-) create mode 100644 drivers/pci/controller/mobiveil/pci-lx.c diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig index 64343c07bfed..1025448f6d0c 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -21,4 +21,14 @@ config PCIE_MOBIVEIL_PLAT Soft IP. It has up to 8 outbound and inbound windows for address translation and it is a PCIe Gen4 IP. +config PCI_LX + bool "Freescale LX PCIe controller" + depends on PCI + depends on OF && (ARM64 || ARCH_LAYERSCAPE) + depends on PCI_MSI_IRQ_DOMAIN + select PCIE_MOBIVEIL_HOST + help + Say Y here if you want PCIe controller support on LX SoCs. + The PCIe controller can work in RC or EP mode according to + RCW[HOST_AGT_PEX] setting. endmenu diff --git a/drivers/pci/controller/mobiveil/Makefile b/drivers/pci/controller/mobiveil/Makefile index 9fb6d1c6504d..e5318a334149 100644 --- a/drivers/pci/controller/mobiveil/Makefile +++ b/drivers/pci/controller/mobiveil/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o +obj-$(CONFIG_PCI_LX) += pci-lx.o diff --git a/drivers/pci/controller/mobiveil/pci-lx.c b/drivers/pci/controller/mobiveil/pci-lx.c new file mode 100644 index 000000000000..5308255dc725 --- /dev/null +++ b/drivers/pci/controller/mobiveil/pci-lx.c @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCIe host controller driver for NXP LX SoCs + * + * Copyright 2018 NXP + * + * Author: Zhiqiang Hou + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pcie-mobiveil.h" + +/* LUT and PF control registers */ +#define PCIE_LUT_OFF (0x80000) +#define PCIE_PF_OFF (0xc0000) +#define PCIE_PF_INT_STAT (0x18) +#define PF_INT_STAT_PABRST (31) + +#define PCIE_PF_DBG (0x7fc) +#define PF_DBG_LTSSM_MASK (0x3f) +#define PF_DBG_WE (31) +#define PF_DBG_PABR (27) + +#define LX_PCIE_LTSSM_L0 0x2d /* L0 state */ + +struct lx_pcie { + struct mobiveil_pcie *pci; + int irq; +}; + +#define to_lx_pcie(x) platform_get_drvdata((x)->pdev) + +static inline u32 lx_pcie_lut_readl(struct lx_pcie *pcie, u32 off) +{ + return ioread32(pcie->pci->csr_axi_slave_base + PCIE_LUT_OFF + off); +} + +static inline void lx_pcie_lut_writel(struct lx_pcie *pcie, u32 off, u32 val) +{ + iowrite32(val, pcie->pci->csr_axi_slave_base + PCIE_LUT_OFF + off); +} + +static inline u32 lx_pcie_pf_readl(struct lx_pcie *pcie, u32 off) +{ + return ioread32(pcie->pci->csr_axi_slave_base + PCIE_PF_OFF + off); +} + +static inline void lx_pcie_pf_writel(struct lx_pcie *pcie, u32 off, u32 val) +{ + iowrite32(val, pcie->pci->csr_axi_slave_base + PCIE_PF_OFF + off); +} + +static bool lx_pcie_is_bridge(struct lx_pcie *pcie) +{ + struct mobiveil_pcie *mv_pci = pcie->pci; + u32 header_type; + + header_type = csr_readb(mv_pci, PCI_HEADER_TYPE); + header_type &= 0x7f; + + return header_type == PCI_HEADER_TYPE_BRIDGE; +} + +static int lx_pcie_link_up(struct mobiveil_pcie *pci) +{ + struct lx_pcie *pcie = to_lx_pcie(pci); + u32 state; + + state = lx_pcie_pf_readl(pcie, PCIE_PF_DBG); + state = state & PF_DBG_LTSSM_MASK; + + if (state == LX_PCIE_LTSSM_L0) + return 1; + + return 0; +} + +static int lx_pcie_interrupt_init(struct mobiveil_pcie *pcie) +{ + return 0; +} + +static struct mobiveil_rp_ops lx_pcie_rp_ops = { + .interrupt_init = lx_pcie_interrupt_init, +}; + +static const struct mobiveil_pab_ops lx_pcie_pab_ops = { + .link_up = lx_pcie_link_up, +}; + +static const struct of_device_id lx_pcie_of_match[] = { + { .compatible = "fsl,lx2160a-pcie", }, + { }, +}; + +static void lx_pcie_reinit_hw(struct lx_pcie *pcie) +{ + struct mobiveil_pcie *mv_pci = pcie->pci; + u32 val, act_stat; + + /* Poll for pab_csb_reset to clear , PAB activity to set */ + do { + val = lx_pcie_pf_readl(pcie, PCIE_PF_INT_STAT); + act_stat = csr_readl(mv_pci, PAB_ACTIVITY_STAT); + + } while (((val & (1 << PF_INT_STAT_PABRST)) == 0) || act_stat); + + while (!lx_pcie_link_up(mv_pci)) + ; + + /* clear PEX_RESET bit in PEX_PF0_DBG register */ + val = lx_pcie_pf_readl(pcie, PCIE_PF_DBG); + val |= 1 << PF_DBG_WE; + lx_pcie_pf_writel(pcie, PCIE_PF_DBG, val); + + val = lx_pcie_pf_readl(pcie, PCIE_PF_DBG); + val |= 1 << PF_DBG_PABR; + lx_pcie_pf_writel(pcie, PCIE_PF_DBG, val); + + val = lx_pcie_pf_readl(pcie, PCIE_PF_DBG); + val &= ~(1 << PF_DBG_WE); + lx_pcie_pf_writel(pcie, PCIE_PF_DBG, val); + + mobiveil_host_init(mv_pci, true); +} + +static irqreturn_t lx_pcie_handler(int irq, void *dev_id) +{ + struct lx_pcie *pcie = (struct lx_pcie *)dev_id; + struct mobiveil_pcie *mv_pci = pcie->pci; + u32 val; + u16 ctrl; + + val = csr_readl(mv_pci, PAB_INTP_AMBA_MISC_STAT); + if (!val) + return IRQ_NONE; + + if (val & PAB_INTP_RESET) { + ctrl = csr_readw(mv_pci, PCI_BRIDGE_CONTROL); + ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; + csr_writew(mv_pci, ctrl, PCI_BRIDGE_CONTROL); + lx_pcie_reinit_hw(pcie); + } + + csr_writel(mv_pci, val, PAB_INTP_AMBA_MISC_STAT); + + return IRQ_HANDLED; +} + +static int __init lx_pcie_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mobiveil_pcie *mv_pci; + struct lx_pcie *pcie; + struct device_node *np = dev->of_node; + int ret; + + if (!of_parse_phandle(np, "msi-parent", 0)) { + dev_err(dev, "failed to find msi-parent\n"); + return -EINVAL; + } + + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); + if (!pcie) + return -ENOMEM; + + mv_pci = devm_kzalloc(dev, sizeof(*mv_pci), GFP_KERNEL); + if (!mv_pci) + return -ENOMEM; + + mv_pci->pdev = pdev; + mv_pci->ops = &lx_pcie_pab_ops; + mv_pci->rp.ops = &lx_pcie_rp_ops; + pcie->pci = mv_pci; + + platform_set_drvdata(pdev, pcie); + + pcie->irq = platform_get_irq_byname(pdev, "intr"); + if (pcie->irq < 0) { + dev_err(&pdev->dev, "Can't get intr irq.\n"); + return pcie->irq; + } + ret = devm_request_irq(dev, pcie->irq, lx_pcie_handler, + IRQF_SHARED, pdev->name, pcie); + if (ret) { + dev_err(dev, "Can't register LX PCIe IRQ.\n"); + return ret; + } + + ret = mobiveil_pcie_host_probe(mv_pci); + if (ret) { + dev_err(dev, "pci-lx: fail to probe!\n"); + return ret; + } + + if (!lx_pcie_is_bridge(pcie)) + return -ENODEV; + + return 0; +} + +static struct platform_driver lx_pcie_driver = { + .driver = { + .name = "lx-pcie", + .of_match_table = lx_pcie_of_match, + .suppress_bind_attrs = true, + }, +}; + +builtin_platform_driver_probe(lx_pcie_driver, lx_pcie_probe); diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index b1d67a697ecc..eade5a8002d1 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -249,8 +249,9 @@ int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit) pab_ctrl |= (1 << AMBA_PIO_ENABLE_SHIFT) | (1 << PEX_PIO_ENABLE_SHIFT); csr_writel(pcie, pab_ctrl, PAB_CTRL); - csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK), - PAB_INTP_AMBA_MISC_ENB); + value = PAB_INTP_INTX_MASK | PAB_INTP_MSI | PAB_INTP_RESET | + PAB_INTP_PCIE_UE | PAB_INTP_IE_PMREDI | PAB_INTP_IE_EC; + csr_writel(pcie, value, PAB_INTP_AMBA_MISC_ENB); /* * program PIO Enable Bit to 1 and Config Window Enable Bit to 1 in diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 51195db09347..ddd736fa2042 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -41,6 +41,8 @@ #define PAGE_LO_MASK 0x3ff #define PAGE_SEL_OFFSET_SHIFT 10 +#define PAB_ACTIVITY_STAT 0x81c + #define PAB_AXI_PIO_CTRL 0x0840 #define APIO_EN_MASK 0xf @@ -49,8 +51,17 @@ #define PAB_INTP_AMBA_MISC_ENB 0x0b0c #define PAB_INTP_AMBA_MISC_STAT 0x0b1c -#define PAB_INTP_INTX_MASK 0x01e0 -#define PAB_INTP_MSI_MASK 0x8 +#define PAB_INTP_RESET (0x1 << 1) +#define PAB_INTP_MSI (0x1 << 3) +#define PAB_INTP_INTA (0x1 << 5) +#define PAB_INTP_INTB (0x1 << 6) +#define PAB_INTP_INTC (0x1 << 7) +#define PAB_INTP_INTD (0x1 << 8) +#define PAB_INTP_PCIE_UE (0x1 << 9) +#define PAB_INTP_IE_PMREDI (0x1 << 29) +#define PAB_INTP_IE_EC (0x1 << 30) +#define PAB_INTP_INTX_MASK (PAB_INTP_INTA | PAB_INTP_INTB |\ + PAB_INTP_INTC | PAB_INTP_INTD) #define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) #define WIN_ENABLE_SHIFT 0 From patchwork Tue Nov 6 13:21:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10670353 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79DA213AD for ; Tue, 6 Nov 2018 13:21:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 688072A3CB for ; Tue, 6 Nov 2018 13:21:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 59BAB2A3D5; Tue, 6 Nov 2018 13:21:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 914AD2A3CB for ; Tue, 6 Nov 2018 13:21:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388298AbeKFWqr (ORCPT ); Tue, 6 Nov 2018 17:46:47 -0500 Received: from mail-db5eur01on0088.outbound.protection.outlook.com ([104.47.2.88]:27376 "EHLO EUR01-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388180AbeKFWqq (ORCPT ); Tue, 6 Nov 2018 17:46:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uH+NVtMyK88ERBuGiA3bleC7dKqchyffkOY+IM6SfLI=; b=m/41wVvheKP4mohlXq5KxKcew07MVGixcNINL6yeBli4W4c6Zb6Kk5A3IsbgP+YyghY3p+ro5/U97RfInloM9TJPCgTvEc8cYcKCKyoC+McNoX0794Kubf8BMYYsTOdEsk3LoLFqtTcJM2m6h56U6eg2+gbZMgc16AEtkRJb+wc= Received: from DB5PR04MB1221.eurprd04.prod.outlook.com (10.162.155.27) by DB5PR04MB2119.eurprd04.prod.outlook.com (10.166.172.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.28; Tue, 6 Nov 2018 13:21:31 +0000 Received: from DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb]) by DB5PR04MB1221.eurprd04.prod.outlook.com ([fe80::6c36:f4cb:26c2:e8cb%2]) with mapi id 15.20.1273.035; Tue, 6 Nov 2018 13:21:31 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" CC: Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: [PATCH 23/23] arm64: dts: freescale: lx2160a: add pcie DT nodes Thread-Topic: [PATCH 23/23] arm64: dts: freescale: lx2160a: add pcie DT nodes Thread-Index: AQHUddOh0w0BqLXql0i/nqlyxcYYgg== Date: Tue, 6 Nov 2018 13:21:31 +0000 Message-ID: <20181106131807.29951-24-Zhiqiang.Hou@nxp.com> References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DB5PR04MB2119;6:pKpXm3U9Rp7/iuw8MFd/5aZazFReMSkj38m1SnPpdfYKZyX45BcAJvghviQ3W4ZoS0L0tet4HSfBr3I1cobRKdA4O8yKBOdK1xNfXyVqcXo/D5I1Ej48T5GDUuHMpWw1f+32c7RZ1Z58Jcj1+AeMmKqLUhbpDNy0Ghv0WKYv/9Wi2rJKV6EI2RLnksYVXS2i+TTQHf8g3zDvuuGUPMstqwr7SKcUlbAFhXQSA6TsFL3YZlw3uu55SLxWSxRbAyqPXhmfO2OWBOIDCX+hzolr0rAb91XtDuj5LFX/SYw13A3X5KCfa3QzdWq+0SJGnR7+gm9SDgUrci/oCstZ9lOT85m5MjZWrl09+OwUasWPWww8L4BcxGRhK4PMP0XaQOlGLNkh+9LTi9t08zAALbI2qlM8cuYFFJ96bKA9A9U5lIVK2/dx+/U0mJAhrMocmOwA4d4Kc7ITRiIQBecbRgy8gw==;5:bC68TqHuRo6g1WWVQtnUtZ069OsfGUvt4RpOBBsBm/qLb1SgAnAOUw6iu5CFu0eZmgU8LfarE/fORYqwdXyenmOv1bnsxFotD92KAgsFqKmcTprcteJafzqTrWX+KNVfcAe4ZQy/4lAT4c5hCHET60nj5lmknv8KFtFPW6nqMVQ=;7:fz7YW1yZnHz2p4fg9/wUF1Uz+nGYQpTB8EYX5cfMWqm9a3cf24NMw2Byt64KqNNpUeX0hrOYlXWQ0dJIw7QaCB2G3SfXXtSzzM5O4XSLlWLRXEkpPJKMYsXbg+I51mkdduAC1oJIpRtwqgWcnrwiWw== x-ms-office365-filtering-correlation-id: 02cdaa70-aea5-416f-209c-08d643eac3de x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:DB5PR04MB2119; x-ms-traffictypediagnostic: DB5PR04MB2119: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(185117386973197); x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(93006095)(93001095)(3231382)(944501410)(52105095)(10201501046)(3002001)(6055026)(148016)(149066)(150057)(6041310)(20161123560045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123564045)(20161123562045)(20161123558120)(201708071742011)(7699051)(76991095);SRVR:DB5PR04MB2119;BCL:0;PCL:0;RULEID:;SRVR:DB5PR04MB2119; x-forefront-prvs: 0848C1A6AA x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(979002)(346002)(376002)(396003)(136003)(39860400002)(366004)(189003)(199004)(81156014)(99286004)(2201001)(8936002)(86362001)(6486002)(68736007)(6436002)(5660300001)(478600001)(53936002)(6512007)(4326008)(25786009)(36756003)(14454004)(54906003)(186003)(316002)(110136005)(2906002)(2900100001)(1076002)(3846002)(6116002)(81166006)(8676002)(7416002)(256004)(14444005)(446003)(11346002)(486006)(476003)(2616005)(7736002)(305945005)(71190400001)(71200400001)(66066001)(97736004)(76176011)(52116002)(102836004)(106356001)(26005)(2501003)(105586002)(386003)(6506007)(921003)(1121003)(969003)(989001)(999001)(1009001)(1019001);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR04MB2119;H:DB5PR04MB1221.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 9Lw/fxCGhNfATjJP0uA6I90xyikLpq2MNSQR5rG7YFnBQocLMyRah+IvM0JcgXLLjI3+9CdksER0eLVKC6UPUxw6q7y6KkVw86oe+SUDOyRNfHoU/YZNEoZ0qBajzlKdhfQGYxcBQWmrE8ZcHc30uoAQvcMu99Lo6lZj7sbxYqRe2jWR4qoUY59ZA816Xd8WilsbjG3RYN0MLf2Wb3wm5O0YlTAGi2pGESuVm99Ph7zNAF5IXtdcimFdsPbXojZRAFJmtOumZizhfC2PwGzGYmg7h/RF7yyVLoo5yut8KQU2rSYQumXuRMvAYQg00pTmg6ghnu/HH8b/R3aoFkk9QwFd48IRtTgtMrVc6By4EEE= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 02cdaa70-aea5-416f-209c-08d643eac3de X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:21:31.1390 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB2119 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Signed-off-by: Hou Zhiqiang --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 157 ++++++++++++++++++ 1 file changed, 157 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 6ba722e373ee..49dfaaf7560d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -953,5 +953,162 @@ clock-names = "fspi_en", "fspi"; status = "disabled"; }; + + pcie@3400000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>; + }; + + pcie@3500000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ + 0x88 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>; + }; + + pcie@3600000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ + 0x90 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>; + }; + + pcie@3700000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ + 0x98 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 124 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 125 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 126 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 127 IRQ_TYPE_LEVEL_HIGH>; + }; + + pcie@3800000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ + 0xa0 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 129 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 130 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 131 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 132 IRQ_TYPE_LEVEL_HIGH>; + }; + + pcie@3900000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ + 0xa8 0x00000000 0x0 0x00001000>; /* configuration space */ + reg-names = "csr_axi_slave", "config_axi_slave"; + interrupts = , /* AER interrupt */ + , /* PME interrupt */ + ; /* controller interrupt */ + interrupt-names = "aer", "pme", "intr"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + dma-coherent; + apio-wins = <8>; + ppio-wins = <8>; + bus-range = <0x0 0xff>; + ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&its>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0000 0 0 1 &gic 0 0 0 104 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 2 &gic 0 0 0 105 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 0 0 106 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 0 0 107 IRQ_TYPE_LEVEL_HIGH>; + }; + }; };