From patchwork Wed Dec 2 11:47:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bongsu Jeon X-Patchwork-Id: 11945741 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03CF0C83017 for ; Wed, 2 Dec 2020 11:49:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B29E42075A for ; Wed, 2 Dec 2020 11:49:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729761AbgLBLsf (ORCPT ); Wed, 2 Dec 2020 06:48:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726539AbgLBLsf (ORCPT ); Wed, 2 Dec 2020 06:48:35 -0500 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25766C0613D4; Wed, 2 Dec 2020 03:48:10 -0800 (PST) Received: by mail-pl1-x644.google.com with SMTP id p6so981920plr.7; Wed, 02 Dec 2020 03:48:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YgkXdxVYJGCqGi2vM/3GSDk0U6gyJJvLBMGDPOGgYCY=; b=AALNwzOvnIe1ZF2NsDfwryuf9Sp52NKnm25C1gMCRZSUXqxZoYtHbxQR9kdRywBUOU Sr1VfYVQ6CBJnglK/9f6yPCFKf3cvh28gVQlUTxeAFeQL6ZuPkBk41yiOrlm+Rw9WT4a M8isyrmKOQDMZF+btGHh08AVywjkgfTWpq8e91c3x/VT42Xe4hbKdZODDKdCGWIoKuC6 og+AWw8y0j7yBdeGRHH5Cw8uIfzi0cxOSxRXbRu+MUDC/OXe0a+Kfbk8eVjoTYLtb6l6 zj/KQEK6YS68aZEQj/2cdmO280fwF5f+h+TmyxTovmm2fiYg+U06c9Tvufls+3J/QsjV tTDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YgkXdxVYJGCqGi2vM/3GSDk0U6gyJJvLBMGDPOGgYCY=; b=jS2zWJDoqvb49btKhLPz9CGoNHhx6ywuCy2/sK2HYAidajU9/ivxSy07YrMNlw/ZAe SHgmd6OvObJEwzWoYoajgQigo8vGIG1iCAdzJ3rRFbNXDG52mQYvj80VWVhw8y9BDk2E bqXogil8L8KSGjZFGc6lkZ0RvlW5aGjLnQfUNljGg5dP313S0+056qXZoQnH7cK54lH2 Yt/QbV61myjqvHMHAHp8ddLo3G+aS7lVHgZeJnMzCo7XPx5/jMvj3/XMmZSjRjxVV3M1 ahhq5cgOeHZbydPCnqXlVSSTRS9mhWIPfYgjsk05L6BVEq6Xfa91aQ2TTsEBErODbazJ 15/g== X-Gm-Message-State: AOAM532xIzPfTdEB/eRDTyImY77aTkATYYYjIg048YCSrZnhFsHjPF8S WzVqJg/yH2IhRM+1oQkEwg7v1S1hPCU= X-Google-Smtp-Source: ABdhPJw5QtTAHCtBGn/aDXDjDAtHSw+WDVNqOZy47uX3ijKPOkhFoo7ATeLwKyfJVzsSTe0U55A4xA== X-Received: by 2002:a17:90a:6fc7:: with SMTP id e65mr2091450pjk.116.1606909689747; Wed, 02 Dec 2020 03:48:09 -0800 (PST) Received: from localhost.localdomain ([182.226.226.37]) by smtp.googlemail.com with ESMTPSA id q18sm2108806pfs.150.2020.12.02.03.48.07 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Dec 2020 03:48:09 -0800 (PST) From: Bongsu Jeon X-Google-Original-From: Bongsu Jeon To: krzk@kernel.org Cc: linux-nfc@lists.01.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bongsu Jeon Subject: [PATCH v5 net-next 1/4] dt-bindings: net: nfc: s3fwrn5: Support a UART interface Date: Wed, 2 Dec 2020 20:47:38 +0900 Message-Id: <1606909661-3814-2-git-send-email-bongsu.jeon@samsung.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> References: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Bongsu Jeon Since S3FWRN82 NFC Chip, The UART interface can be used. S3FWRN82 supports I2C and UART interface. Signed-off-by: Bongsu Jeon Reviewed-by: Krzysztof Kozlowski --- .../bindings/net/nfc/samsung,s3fwrn5.yaml | 31 +++++++++++++++++++--- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml index cb0b8a5..ca3904b 100644 --- a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -12,7 +12,9 @@ maintainers: properties: compatible: - const: samsung,s3fwrn5-i2c + enum: + - samsung,s3fwrn5-i2c + - samsung,s3fwrn82 en-gpios: maxItems: 1 @@ -47,10 +49,19 @@ additionalProperties: false required: - compatible - en-gpios - - interrupts - - reg - wake-gpios +allOf: + - if: + properties: + compatible: + contains: + const: samsung,s3fwrn5-i2c + then: + required: + - interrupts + - reg + examples: - | #include @@ -71,3 +82,17 @@ examples: wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; }; }; + # UART example on Raspberry Pi + - | + uart0 { + status = "okay"; + + nfc { + compatible = "samsung,s3fwrn82"; + + en-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; + wake-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + + status = "okay"; + }; + }; From patchwork Wed Dec 2 11:47:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bongsu Jeon X-Patchwork-Id: 11945743 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 875B2C83018 for ; Wed, 2 Dec 2020 11:49:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4C6D82086A for ; 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Wed, 02 Dec 2020 03:48:16 -0800 (PST) From: Bongsu Jeon X-Google-Original-From: Bongsu Jeon To: krzk@kernel.org Cc: linux-nfc@lists.01.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bongsu Jeon Subject: [PATCH v5 net-next 2/4] nfc: s3fwrn5: reduce the EN_WAIT_TIME Date: Wed, 2 Dec 2020 20:47:39 +0900 Message-Id: <1606909661-3814-3-git-send-email-bongsu.jeon@samsung.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> References: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Bongsu Jeon The delay of 20ms is enough to enable and wake up the Samsung's nfc chip. Acked-by: Krzysztof Kozlowski Signed-off-by: Bongsu Jeon --- drivers/nfc/s3fwrn5/i2c.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/nfc/s3fwrn5/i2c.c b/drivers/nfc/s3fwrn5/i2c.c index ae26594..9a64eea 100644 --- a/drivers/nfc/s3fwrn5/i2c.c +++ b/drivers/nfc/s3fwrn5/i2c.c @@ -19,7 +19,7 @@ #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c" -#define S3FWRN5_EN_WAIT_TIME 150 +#define S3FWRN5_EN_WAIT_TIME 20 struct s3fwrn5_i2c_phy { struct i2c_client *i2c_dev; @@ -40,7 +40,7 @@ static void s3fwrn5_i2c_set_wake(void *phy_id, bool wake) mutex_lock(&phy->mutex); gpio_set_value(phy->gpio_fw_wake, wake); - msleep(S3FWRN5_EN_WAIT_TIME/2); + msleep(S3FWRN5_EN_WAIT_TIME); mutex_unlock(&phy->mutex); } @@ -63,7 +63,7 @@ static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode) if (mode != S3FWRN5_MODE_COLD) { msleep(S3FWRN5_EN_WAIT_TIME); gpio_set_value(phy->gpio_en, 0); - msleep(S3FWRN5_EN_WAIT_TIME/2); + msleep(S3FWRN5_EN_WAIT_TIME); } phy->irq_skip = true; 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Wed, 02 Dec 2020 03:48:21 -0800 (PST) From: Bongsu Jeon X-Google-Original-From: Bongsu Jeon To: krzk@kernel.org Cc: linux-nfc@lists.01.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bongsu Jeon Subject: [PATCH v5 net-next 3/4] nfc: s3fwrn5: extract the common phy blocks Date: Wed, 2 Dec 2020 20:47:40 +0900 Message-Id: <1606909661-3814-4-git-send-email-bongsu.jeon@samsung.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> References: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Bongsu Jeon Extract the common phy blocks to reuse it. The UART module will use the common blocks. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bongsu Jeon --- drivers/nfc/s3fwrn5/Makefile | 2 +- drivers/nfc/s3fwrn5/i2c.c | 117 +++++++++++++-------------------------- drivers/nfc/s3fwrn5/phy_common.c | 63 +++++++++++++++++++++ drivers/nfc/s3fwrn5/phy_common.h | 36 ++++++++++++ 4 files changed, 139 insertions(+), 79 deletions(-) create mode 100644 drivers/nfc/s3fwrn5/phy_common.c create mode 100644 drivers/nfc/s3fwrn5/phy_common.h diff --git a/drivers/nfc/s3fwrn5/Makefile b/drivers/nfc/s3fwrn5/Makefile index d0ffa35..6b6f52d 100644 --- a/drivers/nfc/s3fwrn5/Makefile +++ b/drivers/nfc/s3fwrn5/Makefile @@ -3,7 +3,7 @@ # Makefile for Samsung S3FWRN5 NFC driver # -s3fwrn5-objs = core.o firmware.o nci.o +s3fwrn5-objs = core.o firmware.o nci.o phy_common.o s3fwrn5_i2c-objs = i2c.o obj-$(CONFIG_NFC_S3FWRN5) += s3fwrn5.o diff --git a/drivers/nfc/s3fwrn5/i2c.c b/drivers/nfc/s3fwrn5/i2c.c index 9a64eea..e1bdde1 100644 --- a/drivers/nfc/s3fwrn5/i2c.c +++ b/drivers/nfc/s3fwrn5/i2c.c @@ -15,75 +15,30 @@ #include -#include "s3fwrn5.h" +#include "phy_common.h" #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c" -#define S3FWRN5_EN_WAIT_TIME 20 - struct s3fwrn5_i2c_phy { + struct phy_common common; struct i2c_client *i2c_dev; - struct nci_dev *ndev; - - int gpio_en; - int gpio_fw_wake; - - struct mutex mutex; - enum s3fwrn5_mode mode; unsigned int irq_skip:1; }; -static void s3fwrn5_i2c_set_wake(void *phy_id, bool wake) -{ - struct s3fwrn5_i2c_phy *phy = phy_id; - - mutex_lock(&phy->mutex); - gpio_set_value(phy->gpio_fw_wake, wake); - msleep(S3FWRN5_EN_WAIT_TIME); - mutex_unlock(&phy->mutex); -} - static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode) { struct s3fwrn5_i2c_phy *phy = phy_id; - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); - if (phy->mode == mode) + if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false) goto out; - phy->mode = mode; - - gpio_set_value(phy->gpio_en, 1); - gpio_set_value(phy->gpio_fw_wake, 0); - if (mode == S3FWRN5_MODE_FW) - gpio_set_value(phy->gpio_fw_wake, 1); - - if (mode != S3FWRN5_MODE_COLD) { - msleep(S3FWRN5_EN_WAIT_TIME); - gpio_set_value(phy->gpio_en, 0); - msleep(S3FWRN5_EN_WAIT_TIME); - } - phy->irq_skip = true; out: - mutex_unlock(&phy->mutex); -} - -static enum s3fwrn5_mode s3fwrn5_i2c_get_mode(void *phy_id) -{ - struct s3fwrn5_i2c_phy *phy = phy_id; - enum s3fwrn5_mode mode; - - mutex_lock(&phy->mutex); - - mode = phy->mode; - - mutex_unlock(&phy->mutex); - - return mode; + mutex_unlock(&phy->common.mutex); } static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) @@ -91,7 +46,7 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) struct s3fwrn5_i2c_phy *phy = phy_id; int ret; - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); phy->irq_skip = false; @@ -102,7 +57,7 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); } - mutex_unlock(&phy->mutex); + mutex_unlock(&phy->common.mutex); if (ret < 0) return ret; @@ -114,9 +69,9 @@ static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) } static const struct s3fwrn5_phy_ops i2c_phy_ops = { - .set_wake = s3fwrn5_i2c_set_wake, + .set_wake = s3fwrn5_phy_set_wake, .set_mode = s3fwrn5_i2c_set_mode, - .get_mode = s3fwrn5_i2c_get_mode, + .get_mode = s3fwrn5_phy_get_mode, .write = s3fwrn5_i2c_write, }; @@ -128,7 +83,7 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) char hdr[4]; int ret; - hdr_size = (phy->mode == S3FWRN5_MODE_NCI) ? + hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ? NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE; ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size); if (ret < 0) @@ -137,7 +92,7 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) if (ret < hdr_size) return -EBADMSG; - data_len = (phy->mode == S3FWRN5_MODE_NCI) ? + data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ? ((struct nci_ctrl_hdr *)hdr)->plen : ((struct s3fwrn5_fw_header *)hdr)->len; @@ -157,24 +112,24 @@ static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) } out: - return s3fwrn5_recv_frame(phy->ndev, skb, phy->mode); + return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode); } static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) { struct s3fwrn5_i2c_phy *phy = phy_id; - if (!phy || !phy->ndev) { + if (!phy || !phy->common.ndev) { WARN_ON_ONCE(1); return IRQ_NONE; } - mutex_lock(&phy->mutex); + mutex_lock(&phy->common.mutex); if (phy->irq_skip) goto out; - switch (phy->mode) { + switch (phy->common.mode) { case S3FWRN5_MODE_NCI: case S3FWRN5_MODE_FW: s3fwrn5_i2c_read(phy); @@ -184,7 +139,7 @@ static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) } out: - mutex_unlock(&phy->mutex); + mutex_unlock(&phy->common.mutex); return IRQ_HANDLED; } @@ -197,19 +152,23 @@ static int s3fwrn5_i2c_parse_dt(struct i2c_client *client) if (!np) return -ENODEV; - phy->gpio_en = of_get_named_gpio(np, "en-gpios", 0); - if (!gpio_is_valid(phy->gpio_en)) { + phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_en)) { /* Support also deprecated property */ - phy->gpio_en = of_get_named_gpio(np, "s3fwrn5,en-gpios", 0); - if (!gpio_is_valid(phy->gpio_en)) + phy->common.gpio_en = of_get_named_gpio(np, + "s3fwrn5,en-gpios", + 0); + if (!gpio_is_valid(phy->common.gpio_en)) return -ENODEV; } - phy->gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); - if (!gpio_is_valid(phy->gpio_fw_wake)) { + phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_fw_wake)) { /* Support also deprecated property */ - phy->gpio_fw_wake = of_get_named_gpio(np, "s3fwrn5,fw-gpios", 0); - if (!gpio_is_valid(phy->gpio_fw_wake)) + phy->common.gpio_fw_wake = of_get_named_gpio(np, + "s3fwrn5,fw-gpios", + 0); + if (!gpio_is_valid(phy->common.gpio_fw_wake)) return -ENODEV; } @@ -226,8 +185,8 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, if (!phy) return -ENOMEM; - mutex_init(&phy->mutex); - phy->mode = S3FWRN5_MODE_COLD; + mutex_init(&phy->common.mutex); + phy->common.mode = S3FWRN5_MODE_COLD; phy->irq_skip = true; phy->i2c_dev = client; @@ -237,17 +196,19 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, if (ret < 0) return ret; - ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_en, - GPIOF_OUT_INIT_HIGH, "s3fwrn5_en"); + ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->common.gpio_en, + GPIOF_OUT_INIT_HIGH, "s3fwrn5_en"); if (ret < 0) return ret; - ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_fw_wake, - GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake"); + ret = devm_gpio_request_one(&phy->i2c_dev->dev, + phy->common.gpio_fw_wake, + GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake"); if (ret < 0) return ret; - ret = s3fwrn5_probe(&phy->ndev, phy, &phy->i2c_dev->dev, &i2c_phy_ops); + ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev, + &i2c_phy_ops); if (ret < 0) return ret; @@ -255,7 +216,7 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, s3fwrn5_i2c_irq_thread_fn, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, S3FWRN5_I2C_DRIVER_NAME, phy); if (ret) - s3fwrn5_remove(phy->ndev); + s3fwrn5_remove(phy->common.ndev); return ret; } @@ -264,7 +225,7 @@ static int s3fwrn5_i2c_remove(struct i2c_client *client) { struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); - s3fwrn5_remove(phy->ndev); + s3fwrn5_remove(phy->common.ndev); return 0; } diff --git a/drivers/nfc/s3fwrn5/phy_common.c b/drivers/nfc/s3fwrn5/phy_common.c new file mode 100644 index 0000000..5cad1f4 --- /dev/null +++ b/drivers/nfc/s3fwrn5/phy_common.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Link Layer for Samsung S3FWRN5 NCI based Driver + * + * Copyright (C) 2015 Samsung Electrnoics + * Robert Baldyga + * Copyright (C) 2020 Samsung Electrnoics + * Bongsu Jeon + */ + +#include +#include +#include + +#include "phy_common.h" + +void s3fwrn5_phy_set_wake(void *phy_id, bool wake) +{ + struct phy_common *phy = phy_id; + + mutex_lock(&phy->mutex); + gpio_set_value(phy->gpio_fw_wake, wake); + msleep(S3FWRN5_EN_WAIT_TIME); + mutex_unlock(&phy->mutex); +} +EXPORT_SYMBOL(s3fwrn5_phy_set_wake); + +bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode) +{ + if (phy->mode == mode) + return false; + + phy->mode = mode; + + gpio_set_value(phy->gpio_en, 1); + gpio_set_value(phy->gpio_fw_wake, 0); + if (mode == S3FWRN5_MODE_FW) + gpio_set_value(phy->gpio_fw_wake, 1); + + if (mode != S3FWRN5_MODE_COLD) { + msleep(S3FWRN5_EN_WAIT_TIME); + gpio_set_value(phy->gpio_en, 0); + msleep(S3FWRN5_EN_WAIT_TIME); + } + + return true; +} +EXPORT_SYMBOL(s3fwrn5_phy_power_ctrl); + +enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id) +{ + struct phy_common *phy = phy_id; + enum s3fwrn5_mode mode; + + mutex_lock(&phy->mutex); + + mode = phy->mode; + + mutex_unlock(&phy->mutex); + + return mode; +} +EXPORT_SYMBOL(s3fwrn5_phy_get_mode); diff --git a/drivers/nfc/s3fwrn5/phy_common.h b/drivers/nfc/s3fwrn5/phy_common.h new file mode 100644 index 0000000..b98531d --- /dev/null +++ b/drivers/nfc/s3fwrn5/phy_common.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later + * + * Link Layer for Samsung S3FWRN5 NCI based Driver + * + * Copyright (C) 2015 Samsung Electrnoics + * Robert Baldyga + * Copyright (C) 2020 Samsung Electrnoics + * Bongsu Jeon + */ + +#ifndef __NFC_S3FWRN5_PHY_COMMON_H +#define __NFC_S3FWRN5_PHY_COMMON_H + +#include +#include + +#include "s3fwrn5.h" + +#define S3FWRN5_EN_WAIT_TIME 20 + +struct phy_common { + struct nci_dev *ndev; + + int gpio_en; + int gpio_fw_wake; + + struct mutex mutex; + + enum s3fwrn5_mode mode; +}; + +void s3fwrn5_phy_set_wake(void *phy_id, bool wake); +bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode); +enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id); + +#endif /* __NFC_S3FWRN5_PHY_COMMON_H */ From patchwork Wed Dec 2 11:47:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bongsu Jeon X-Patchwork-Id: 11945745 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4E45C8301E for ; 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Wed, 02 Dec 2020 03:48:26 -0800 (PST) Received: from localhost.localdomain ([182.226.226.37]) by smtp.googlemail.com with ESMTPSA id q18sm2108806pfs.150.2020.12.02.03.48.23 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Dec 2020 03:48:25 -0800 (PST) From: Bongsu Jeon X-Google-Original-From: Bongsu Jeon To: krzk@kernel.org Cc: linux-nfc@lists.01.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bongsu Jeon Subject: [PATCH v5 net-next 4/4] nfc: s3fwrn5: Support a UART interface Date: Wed, 2 Dec 2020 20:47:41 +0900 Message-Id: <1606909661-3814-5-git-send-email-bongsu.jeon@samsung.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> References: <1606909661-3814-1-git-send-email-bongsu.jeon@samsung.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From: Bongsu Jeon Since S3FWRN82 NFC Chip, The UART interface can be used. S3FWRN82 uses NCI protocol and supports I2C and UART interface. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bongsu Jeon --- drivers/nfc/s3fwrn5/Kconfig | 12 +++ drivers/nfc/s3fwrn5/Makefile | 2 + drivers/nfc/s3fwrn5/phy_common.c | 12 +++ drivers/nfc/s3fwrn5/phy_common.h | 1 + drivers/nfc/s3fwrn5/uart.c | 196 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 223 insertions(+) create mode 100644 drivers/nfc/s3fwrn5/uart.c diff --git a/drivers/nfc/s3fwrn5/Kconfig b/drivers/nfc/s3fwrn5/Kconfig index 3f8b6da..8a6b1a7 100644 --- a/drivers/nfc/s3fwrn5/Kconfig +++ b/drivers/nfc/s3fwrn5/Kconfig @@ -20,3 +20,15 @@ config NFC_S3FWRN5_I2C To compile this driver as a module, choose m here. The module will be called s3fwrn5_i2c.ko. Say N if unsure. + +config NFC_S3FWRN82_UART + tristate "Samsung S3FWRN82 UART support" + depends on NFC_NCI && SERIAL_DEV_BUS + select NFC_S3FWRN5 + help + This module adds support for a UART interface to the S3FWRN82 chip. + Select this if your platform is using the UART bus. + + To compile this driver as a module, choose m here. The module will + be called s3fwrn82_uart.ko. + Say N if unsure. diff --git a/drivers/nfc/s3fwrn5/Makefile b/drivers/nfc/s3fwrn5/Makefile index 6b6f52d..7da827a 100644 --- a/drivers/nfc/s3fwrn5/Makefile +++ b/drivers/nfc/s3fwrn5/Makefile @@ -5,6 +5,8 @@ s3fwrn5-objs = core.o firmware.o nci.o phy_common.o s3fwrn5_i2c-objs = i2c.o +s3fwrn82_uart-objs = uart.o obj-$(CONFIG_NFC_S3FWRN5) += s3fwrn5.o obj-$(CONFIG_NFC_S3FWRN5_I2C) += s3fwrn5_i2c.o +obj-$(CONFIG_NFC_S3FWRN82_UART) += s3fwrn82_uart.o diff --git a/drivers/nfc/s3fwrn5/phy_common.c b/drivers/nfc/s3fwrn5/phy_common.c index 5cad1f4..497b02b 100644 --- a/drivers/nfc/s3fwrn5/phy_common.c +++ b/drivers/nfc/s3fwrn5/phy_common.c @@ -47,6 +47,18 @@ bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode) } EXPORT_SYMBOL(s3fwrn5_phy_power_ctrl); +void s3fwrn5_phy_set_mode(void *phy_id, enum s3fwrn5_mode mode) +{ + struct phy_common *phy = phy_id; + + mutex_lock(&phy->mutex); + + s3fwrn5_phy_power_ctrl(phy, mode); + + mutex_unlock(&phy->mutex); +} +EXPORT_SYMBOL(s3fwrn5_phy_set_mode); + enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id) { struct phy_common *phy = phy_id; diff --git a/drivers/nfc/s3fwrn5/phy_common.h b/drivers/nfc/s3fwrn5/phy_common.h index b98531d..99749c9 100644 --- a/drivers/nfc/s3fwrn5/phy_common.h +++ b/drivers/nfc/s3fwrn5/phy_common.h @@ -31,6 +31,7 @@ struct phy_common { void s3fwrn5_phy_set_wake(void *phy_id, bool wake); bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode); +void s3fwrn5_phy_set_mode(void *phy_id, enum s3fwrn5_mode mode); enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id); #endif /* __NFC_S3FWRN5_PHY_COMMON_H */ diff --git a/drivers/nfc/s3fwrn5/uart.c b/drivers/nfc/s3fwrn5/uart.c new file mode 100644 index 0000000..82ea35d --- /dev/null +++ b/drivers/nfc/s3fwrn5/uart.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UART Link Layer for S3FWRN82 NCI based Driver + * + * Copyright (C) 2015 Samsung Electronics + * Robert Baldyga + * Copyright (C) 2020 Samsung Electronics + * Bongsu Jeon + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "phy_common.h" + +#define S3FWRN82_NCI_HEADER 3 +#define S3FWRN82_NCI_IDX 2 +#define NCI_SKB_BUFF_LEN 258 + +struct s3fwrn82_uart_phy { + struct phy_common common; + struct serdev_device *ser_dev; + struct sk_buff *recv_skb; +}; + +static int s3fwrn82_uart_write(void *phy_id, struct sk_buff *out) +{ + struct s3fwrn82_uart_phy *phy = phy_id; + int err; + + err = serdev_device_write(phy->ser_dev, + out->data, out->len, + MAX_SCHEDULE_TIMEOUT); + if (err < 0) + return err; + + return 0; +} + +static const struct s3fwrn5_phy_ops uart_phy_ops = { + .set_wake = s3fwrn5_phy_set_wake, + .set_mode = s3fwrn5_phy_set_mode, + .get_mode = s3fwrn5_phy_get_mode, + .write = s3fwrn82_uart_write, +}; + +static int s3fwrn82_uart_read(struct serdev_device *serdev, + const unsigned char *data, + size_t count) +{ + struct s3fwrn82_uart_phy *phy = serdev_device_get_drvdata(serdev); + size_t i; + + for (i = 0; i < count; i++) { + skb_put_u8(phy->recv_skb, *data++); + + if (phy->recv_skb->len < S3FWRN82_NCI_HEADER) + continue; + + if ((phy->recv_skb->len - S3FWRN82_NCI_HEADER) + < phy->recv_skb->data[S3FWRN82_NCI_IDX]) + continue; + + s3fwrn5_recv_frame(phy->common.ndev, phy->recv_skb, + phy->common.mode); + phy->recv_skb = alloc_skb(NCI_SKB_BUFF_LEN, GFP_KERNEL); + if (!phy->recv_skb) + return 0; + } + + return i; +} + +static const struct serdev_device_ops s3fwrn82_serdev_ops = { + .receive_buf = s3fwrn82_uart_read, + .write_wakeup = serdev_device_write_wakeup, +}; + +static const struct of_device_id s3fwrn82_uart_of_match[] = { + { .compatible = "samsung,s3fwrn82", }, + {}, +}; +MODULE_DEVICE_TABLE(of, s3fwrn82_uart_of_match); + +static int s3fwrn82_uart_parse_dt(struct serdev_device *serdev) +{ + struct s3fwrn82_uart_phy *phy = serdev_device_get_drvdata(serdev); + struct device_node *np = serdev->dev.of_node; + + if (!np) + return -ENODEV; + + phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_en)) + return -ENODEV; + + phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); + if (!gpio_is_valid(phy->common.gpio_fw_wake)) + return -ENODEV; + + return 0; +} + +static int s3fwrn82_uart_probe(struct serdev_device *serdev) +{ + struct s3fwrn82_uart_phy *phy; + int ret = -ENOMEM; + + phy = devm_kzalloc(&serdev->dev, sizeof(*phy), GFP_KERNEL); + if (!phy) + goto err_exit; + + phy->recv_skb = alloc_skb(NCI_SKB_BUFF_LEN, GFP_KERNEL); + if (!phy->recv_skb) + goto err_exit; + + mutex_init(&phy->common.mutex); + phy->common.mode = S3FWRN5_MODE_COLD; + + phy->ser_dev = serdev; + serdev_device_set_drvdata(serdev, phy); + serdev_device_set_client_ops(serdev, &s3fwrn82_serdev_ops); + ret = serdev_device_open(serdev); + if (ret) { + dev_err(&serdev->dev, "Unable to open device\n"); + goto err_skb; + } + + ret = serdev_device_set_baudrate(serdev, 115200); + if (ret != 115200) { + ret = -EINVAL; + goto err_serdev; + } + + serdev_device_set_flow_control(serdev, false); + + ret = s3fwrn82_uart_parse_dt(serdev); + if (ret < 0) + goto err_serdev; + + ret = devm_gpio_request_one(&phy->ser_dev->dev, phy->common.gpio_en, + GPIOF_OUT_INIT_HIGH, "s3fwrn82_en"); + if (ret < 0) + goto err_serdev; + + ret = devm_gpio_request_one(&phy->ser_dev->dev, + phy->common.gpio_fw_wake, + GPIOF_OUT_INIT_LOW, "s3fwrn82_fw_wake"); + if (ret < 0) + goto err_serdev; + + ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->ser_dev->dev, + &uart_phy_ops); + if (ret < 0) + goto err_serdev; + + return ret; + +err_serdev: + serdev_device_close(serdev); +err_skb: + kfree_skb(phy->recv_skb); +err_exit: + return ret; +} + +static void s3fwrn82_uart_remove(struct serdev_device *serdev) +{ + struct s3fwrn82_uart_phy *phy = serdev_device_get_drvdata(serdev); + + s3fwrn5_remove(phy->common.ndev); + serdev_device_close(serdev); + kfree_skb(phy->recv_skb); +} + +static struct serdev_device_driver s3fwrn82_uart_driver = { + .probe = s3fwrn82_uart_probe, + .remove = s3fwrn82_uart_remove, + .driver = { + .name = "s3fwrn82_uart", + .of_match_table = s3fwrn82_uart_of_match, + }, +}; + +module_serdev_device_driver(s3fwrn82_uart_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("UART driver for Samsung NFC"); +MODULE_AUTHOR("Bongsu Jeon ");