From patchwork Wed Nov 7 10:36:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10672135 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 34A0D13BF for ; Wed, 7 Nov 2018 10:36:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 253732B7BC for ; Wed, 7 Nov 2018 10:36:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 190432B7CE; Wed, 7 Nov 2018 10:36:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 52D1E2B7BC for ; Wed, 7 Nov 2018 10:36:47 +0000 (UTC) Received: (qmail 9916 invoked by uid 550); 7 Nov 2018 10:36:39 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 9825 invoked from network); 7 Nov 2018 10:36:39 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U7OEJlVhIZDISv9Zi2qsSLfjSJ1jD2lTvAoXgGG2pP0=; b=VYQRSTzGuG8Iu4ZIPw0xOybhxgCxhUT1ljVkHkVEKfDttG3aXlw2rijGgBf56dM8Rk eQdkCMXeLoS7Go6LlNqx0J2wvwS9HuBsqi1mGxChKMDd35DuDKuM6isJg0gLwI+Ce6Mk qmz8XyDdyQHpVyLfHMeQWrhekSno9GhK/4gAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U7OEJlVhIZDISv9Zi2qsSLfjSJ1jD2lTvAoXgGG2pP0=; b=CJzPaI+MAqFC7nsXe4xz0ks5gYUqo8FlRn0Ar5t6Uy/kAW+SUJaNS91zWhSNeeIKee 9KpDWLTr2OfkzJtO/AV2lN7so/YYQEvEG+wA9jGx/lSAGSDU6wpD0Th4V3Nec+hh/Ur3 SA8OqHBQNMHB8mzmXCnrnt3nVhoEACfx0mUez7B9WP3s093xreIqt/U2ja+NLoHzLh5u goxMlCGEDZZIRBJWE1Y6epVfzItEsTspTdJglsb8L2xezQhB5wPMFYQ6kwbw9ZvVLyaj uhViTXxqKWtbkL5ZcX0JJtDcH1KHWJ1cEnBy9muR09J2YBjnYnFmsgjQBzXJAzi8ecjJ 24nw== X-Gm-Message-State: AGRZ1gL3GbjWAApj9p2XMJHGbwgXg0l5w1bPalBQMeJEL2XMEkztzh5a eJdjdYo8nOoXDF0TbKeU+uT5BQ== X-Google-Smtp-Source: AJdET5dF0virhes/qmJKHM2Ikdp1l/ExRtBxLheh/qDuP/2yfhFZ37qoK4GY3IbdGdM94ZWH/fE3UQ== X-Received: by 2002:adf:d1c6:: with SMTP id m6-v6mr1338695wri.138.1541586987637; Wed, 07 Nov 2018 02:36:27 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: kernel-hardening@lists.openwall.com, keescook@chromium.org, labbott@redhat.com, will.deacon@arm.com, jannh@google.com, mark.rutland@arm.com, james.morse@arm.com, catalin.marinas@arm.com, Ard Biesheuvel Subject: [PATCH v4 1/2] arm64: mm: purge lazily unmapped vm regions before changing permissions Date: Wed, 7 Nov 2018 11:36:19 +0100 Message-Id: <20181107103620.16054-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181107103620.16054-1-ard.biesheuvel@linaro.org> References: <20181107103620.16054-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Call vm_unmap_aliases() every time we apply any changes to permission attributes of mappings in the vmalloc region. This avoids any potential issues resulting from lingering writable or executable aliases of mappings that should be read-only or non-executable, respectively. Acked-by: Will Deacon Signed-off-by: Ard Biesheuvel --- arch/arm64/mm/pageattr.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index a56359373d8b..787f9e385e6d 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -93,6 +93,12 @@ static int change_memory_common(unsigned long addr, int numpages, if (!numpages) return 0; + /* + * Get rid of potentially aliasing lazily unmapped vm areas that may + * have permissions set that deviate from the ones we are setting here. + */ + vm_unmap_aliases(); + return __change_memory_common(start, size, set_mask, clear_mask); } From patchwork Wed Nov 7 10:36:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10672141 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B22EB13BF for ; Wed, 7 Nov 2018 10:36:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A30492B7BC for ; Wed, 7 Nov 2018 10:36:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 96E682B7CE; Wed, 7 Nov 2018 10:36:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by mail.wl.linuxfoundation.org (Postfix) with SMTP id 756592B7BC for ; Wed, 7 Nov 2018 10:36:54 +0000 (UTC) Received: (qmail 10202 invoked by uid 550); 7 Nov 2018 10:36:42 -0000 Mailing-List: contact kernel-hardening-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Delivered-To: mailing list kernel-hardening@lists.openwall.com Received: (qmail 9974 invoked from network); 7 Nov 2018 10:36:40 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AVCvXlYCuH2nrO7yB1o0TT2WUFgHZ0A09ZkNSgFBkj4=; b=N0hfnHFxEq2jJ7tF9dBXxnjuc8IBQ6OLQlUgaEEefIstHx6sLyUIHa//ifdxatQHKl iXG6i1vCa72Olh0kfsD/L8VxptTbebeZjTrCxaljoiQmw+82RV+UMwTBmZkbAA0Wyhd/ s4Lje9CmupdOXQk7HopwZu1ogNv6clWPf6Otc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AVCvXlYCuH2nrO7yB1o0TT2WUFgHZ0A09ZkNSgFBkj4=; b=g+bOQnCgvvGdDgdU88380ZEAWB2o9+L2z4KC2/3xl5m3wmTNf4zwc+u1/iApJi5UrW JjzL64Q/GXqA2Nn9asiQ7fgYuBZEM3gES8l3j1aH3IclJmtpQ8fVBdE2uWAv0a100xAj 9O7s61EFUE9vE6iJN+uV5IwTQxAcNNbf2diNJJSXEJLTxFcR4/1z8syJlq3Ayz1mUM0j /b++kpLd01Cb1k7RiRymmL8Jpilmtch95PtbSL9MrHIf8LkNpdWXzFO+h/Cvnm1vecEn TSMI5ogEVGtf40q7bxqAbFELt/bhAlLNqDtMU33S24ferIvxG9dlMhNfYH+qOkOo63+M 4WNw== X-Gm-Message-State: AGRZ1gJRBQUfGk0iuEhiWzFeJYdou3Yjw1vHu7KXkUUHr/AlkLeCHYkm 2GEjZj3nVWR7g76U/462MZjWOQ== X-Google-Smtp-Source: AJdET5ftQ/P5rmskWDLIJ6AFguGCk4Qi7R1G7UDQwPYYLL4lXe8IT7QiYbPdcPxRbf3jsK+2HMucFQ== X-Received: by 2002:a1c:ef15:: with SMTP id n21-v6mr1385905wmh.151.1541586988885; Wed, 07 Nov 2018 02:36:28 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: kernel-hardening@lists.openwall.com, keescook@chromium.org, labbott@redhat.com, will.deacon@arm.com, jannh@google.com, mark.rutland@arm.com, james.morse@arm.com, catalin.marinas@arm.com, Ard Biesheuvel Subject: [PATCH v4 2/2] arm64: mm: apply r/o permissions of VM areas to its linear alias as well Date: Wed, 7 Nov 2018 11:36:20 +0100 Message-Id: <20181107103620.16054-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181107103620.16054-1-ard.biesheuvel@linaro.org> References: <20181107103620.16054-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP On arm64, we use block mappings and contiguous hints to map the linear region, to minimize the TLB footprint. However, this means that the entire region is mapped using read/write permissions, which we cannot modify at page granularity without having to take intrusive measures to prevent TLB conflicts. This means the linear aliases of pages belonging to read-only mappings (executable or otherwise) in the vmalloc region are also mapped read/write, and could potentially be abused to modify things like module code, bpf JIT code or other read-only data. So let's fix this, by extending the set_memory_ro/rw routines to take the linear alias into account. The consequence of enabling this is that we can no longer use block mappings or contiguous hints, so in cases where the TLB footprint of the linear region is a bottleneck, performance may be affected. Therefore, allow this feature to be runtime en/disabled, by setting rodata=full (or 'on' to disable just this enhancement, or 'off' to disable read-only mappings for code and r/o data entirely) on the kernel command line. Also, allow the default value to be set via a Kconfig option. Signed-off-by: Ard Biesheuvel Acked-by: Will Deacon Tested-by: Laura Abbott --- arch/arm64/Kconfig | 14 ++++++++++++++ arch/arm64/include/asm/mmu_context.h | 2 ++ arch/arm64/mm/mmu.c | 16 ++++++++++++++-- arch/arm64/mm/pageattr.c | 15 +++++++++++++++ 4 files changed, 45 insertions(+), 2 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 787d7850e064..bf57c48c77df 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -958,6 +958,20 @@ config ARM64_SSBD If unsure, say Y. +config RODATA_FULL_DEFAULT_ENABLED + bool "Apply r/o permissions of VM areas also to their linear aliases" + default y + help + Apply read-only attributes of VM areas to the linear alias of + the backing pages as well. This prevents code or read-only data + from being modified (inadvertently or intentionally) via another + mapping of the same memory page. This additional enhancement can + be turned off at runtime by passing rodata=[off|on] (and turned on + with rodata=full if this option is set to 'n') + + This requires the linear region to be mapped down to pages, + which may adversely affect performance in some cases. + menuconfig ARMV8_DEPRECATED bool "Emulate deprecated/obsolete ARMv8 instructions" depends on COMPAT diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 1e58bf58c22b..dfcfeffd2080 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -35,6 +35,8 @@ #include #include +extern bool rodata_full; + static inline void contextidr_thread_switch(struct task_struct *next) { if (!IS_ENABLED(CONFIG_PID_IN_CONTEXTIDR)) diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index d1d6601b385d..e1b2d58a311a 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -451,7 +451,7 @@ static void __init map_mem(pgd_t *pgdp) struct memblock_region *reg; int flags = 0; - if (debug_pagealloc_enabled()) + if (rodata_full || debug_pagealloc_enabled()) flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; /* @@ -552,7 +552,19 @@ static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, static int __init parse_rodata(char *arg) { - return strtobool(arg, &rodata_enabled); + int ret = strtobool(arg, &rodata_enabled); + if (!ret) { + rodata_full = false; + return 0; + } + + /* permit 'full' in addition to boolean options */ + if (strcmp(arg, "full")) + return -EINVAL; + + rodata_enabled = true; + rodata_full = true; + return 0; } early_param("rodata", parse_rodata); diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index 787f9e385e6d..6cd645edcf35 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -25,6 +25,8 @@ struct page_change_data { pgprot_t clear_mask; }; +bool rodata_full __ro_after_init = IS_ENABLED(CONFIG_RODATA_FULL_DEFAULT_ENABLED); + static int change_page_range(pte_t *ptep, pgtable_t token, unsigned long addr, void *data) { @@ -64,6 +66,7 @@ static int change_memory_common(unsigned long addr, int numpages, unsigned long size = PAGE_SIZE*numpages; unsigned long end = start + size; struct vm_struct *area; + int i; if (!PAGE_ALIGNED(addr)) { start &= PAGE_MASK; @@ -93,6 +96,18 @@ static int change_memory_common(unsigned long addr, int numpages, if (!numpages) return 0; + /* + * If we are manipulating read-only permissions, apply the same + * change to the linear mapping of the pages that back this VM area. + */ + if (rodata_full && (pgprot_val(set_mask) == PTE_RDONLY || + pgprot_val(clear_mask) == PTE_RDONLY)) { + for (i = 0; i < area->nr_pages; i++) { + __change_memory_common((u64)page_address(area->pages[i]), + PAGE_SIZE, set_mask, clear_mask); + } + } + /* * Get rid of potentially aliasing lazily unmapped vm areas that may * have permissions set that deviate from the ones we are setting here.