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Mon, 7 Dec 2020 22:37:54 +0000 Subject: [PATCH 1/2] x86/cpufeatures: Add the Virtual SPEC_CTRL feature From: Babu Moger To: pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de Cc: fenghua.yu@intel.com, tony.luck@intel.com, wanpengli@tencent.com, kvm@vger.kernel.org, thomas.lendacky@amd.com, peterz@infradead.org, seanjc@google.com, joro@8bytes.org, x86@kernel.org, kyung.min.park@intel.com, linux-kernel@vger.kernel.org, krish.sadhukhan@oracle.com, hpa@zytor.com, mgross@linux.intel.com, vkuznets@redhat.com, kim.phillips@amd.com, wei.huang2@amd.com, jmattson@google.com Date: Mon, 07 Dec 2020 16:37:51 -0600 Message-ID: <160738067105.28590.10158084163761735153.stgit@bmoger-ubuntu> In-Reply-To: <160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu> References: <160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu> User-Agent: StGit/0.17.1-dirty X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: CH2PR03CA0021.namprd03.prod.outlook.com (2603:10b6:610:59::31) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [127.0.1.1] (165.204.77.1) by CH2PR03CA0021.namprd03.prod.outlook.com (2603:10b6:610:59::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3632.17 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?y6QnE7/fhZUiW2XlWxt/uLr0OCoe8c?= =?utf-8?q?t7RPT2K8CB/CRULJ6mM0zK/N64iQ3O9crqZcSff85tbZxwAMVEHqAplahHOVA+VdF?= =?utf-8?q?LR73TnKKMiyQuoFiWoQVG5FNc0kWhPIMYAqgwI7D9Y19qlkmYbDfrVUJXYP/+TygG?= =?utf-8?q?DefdkuqfPIR1QE2fI8ysHLKVOs2q0yMu/ifuZ0JheKo/RRIwTzBIRXth/g9PE/k3I?= =?utf-8?q?wxmSBfsrB+ncyK5S3MhI59tmkrJoUa9OPZX6LmkwX1jT2Wfdw2G0apgYmiVLTsdgj?= =?utf-8?q?FzN/4+VmD2YIV4rNNCyMcb6WVNKFmxzZalsDO+SA0mYXxqYhYhG1/YVdLJ1uoCewx?= =?utf-8?q?hoTlXDUIBhSFY88KjQW/s9BKoFoa96m5dbjiuSGwfA6HEf8NZ8Y2/JI/i//ckM9Of?= =?utf-8?q?Z+TTUdtivKepQkYSaIGue/fhOIrm5LNHKVSaJoLvLWImRKqXCxt6LCbPCz7VEtcSE?= =?utf-8?q?G7a4DkFjYaLCd+5GPSiyp4CGF757TFwvQTe22H7ZU4gEMC2sjP11z5GE1UQqSA3Fc?= =?utf-8?q?kPP0zNKojKrj0BWwNd1ksQg6+OkfpYogKQ52mP1xYpgQ94QFgEgHP1VJ275rz3qnu?= =?utf-8?q?CqW9WmNcMZOAvE7dsUuRB7ezKxb0mhsHfKgtfSosoU3IOmcwPr3iyP32M7NsmthEJ?= =?utf-8?q?lX6ewPdJ0tzQ8KP6jOlAQsDZ2syumPXeZdR3XNYLXWXQ6VO++oAtAdAV7pLzPYDuP?= =?utf-8?q?GN8+xJSzGyDn+LIOBgH1QEXkzYbTuWqTu1KjOlE2uBm5pssEgcPT7bqbQyCmo62gI?= =?utf-8?q?xlMlXWMDpdQyJSl656U5ZTdfX26eoICfYgaAunPLEMtoxjSe/0dxq1zaaNK6EGr1H?= =?utf-8?q?VlJPOMDtWS4H3dKuPBiglos32cSVvtGPTW7elyesBiOG5kVr61hZwFaS5MhHqGrJw?= =?utf-8?q?zUZhu8QUMjjywywdevhjhLlc54IWe3YvTHEFgKG89Se8WBvVrVTi94bTMwmdKjRkx?= =?utf-8?q?bgdbpKhkQ3zafU0ER4T?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: SN1PR12MB2560.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2020 22:37:54.4660 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: 2abbbe8a-3ef4-4531-6b6b-08d89b00bd39 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: K6puj/OVV5ncsIarbv+aklFDXmN72WKI14Zk6WxMum8IJtcA0sV8utCmbSY8q1B9 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2384 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Newer AMD processors have a feature to virtualize the use of the SPEC_CTRL MSR. This feature is identified via CPUID 0x8000000A_EDX[20]. When present, the SPEC_CTRL MSR is automatically virtualized and no longer requires hypervisor intervention. Signed-off-by: Babu Moger --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index dad350d42ecf..d649ac5ed7c7 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -335,6 +335,7 @@ #define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */ #define X86_FEATURE_V_VMSAVE_VMLOAD (15*32+15) /* Virtual VMSAVE VMLOAD */ #define X86_FEATURE_VGIF (15*32+16) /* Virtual GIF */ +#define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* Virtual SPEC_CTRL */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ From patchwork Mon Dec 7 22:37:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 11957007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F043C4167B for ; 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dkim=none (message not signed) header.d=none;tencent.com; dmarc=none action=none header.from=amd.com; Received: from SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) by SN6PR12MB2624.namprd12.prod.outlook.com (2603:10b6:805:70::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3611.31; Mon, 7 Dec 2020 22:38:01 +0000 Received: from SN1PR12MB2560.namprd12.prod.outlook.com ([fe80::d877:baf6:9425:ece]) by SN1PR12MB2560.namprd12.prod.outlook.com ([fe80::d877:baf6:9425:ece%3]) with mapi id 15.20.3632.023; Mon, 7 Dec 2020 22:38:01 +0000 Subject: [PATCH 2/2] KVM: SVM: Add support for Virtual SPEC_CTRL From: Babu Moger To: pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de Cc: fenghua.yu@intel.com, tony.luck@intel.com, wanpengli@tencent.com, kvm@vger.kernel.org, thomas.lendacky@amd.com, peterz@infradead.org, seanjc@google.com, joro@8bytes.org, x86@kernel.org, kyung.min.park@intel.com, linux-kernel@vger.kernel.org, krish.sadhukhan@oracle.com, hpa@zytor.com, mgross@linux.intel.com, vkuznets@redhat.com, kim.phillips@amd.com, wei.huang2@amd.com, jmattson@google.com Date: Mon, 07 Dec 2020 16:37:59 -0600 Message-ID: <160738067970.28590.1275116532320186155.stgit@bmoger-ubuntu> In-Reply-To: <160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu> References: <160738054169.28590.5171339079028237631.stgit@bmoger-ubuntu> User-Agent: StGit/0.17.1-dirty X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: SN6PR08CA0015.namprd08.prod.outlook.com (2603:10b6:805:66::28) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [127.0.1.1] (165.204.77.1) by SN6PR08CA0015.namprd08.prod.outlook.com (2603:10b6:805:66::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3632.17 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?E5DMDuEh6YQ4xOTIZpR/hmwdua/Eqp?= =?utf-8?q?ZRXoVuNa1Qnv4YrmRxBGTAPgm3EFau9lH/4a4AQTUZvA/bWwbPE2LyfIuhxDKMjos?= =?utf-8?q?WbZz3QTB8/1o4to2nWLlTCToXcMtjIJmPsVwp0dkrgEt12ZOmlaAtX1Qqj8QIUJKf?= =?utf-8?q?Q+VXJepgl9pdqmqPZ5r8dsyrlVvvE6dBUGMDnEzZ09K/tXTg7E+avltgBU1xL3JYs?= =?utf-8?q?crQAglhVi4FjLC4NJsN73YmDjTWOhdcWUjObENm0GePi3ntzBmdY1C/yrAFrZmb8e?= =?utf-8?q?8MMGajAJeRk6Ty6lsngqmsZJZvkwyEK5BeDg8RUHzG02cYqafEyFgz/PxL1pG3aA+?= =?utf-8?q?8I0z96bF8t2ZxvMJYA7tkDXit7q/GAHkjWALDkhSZof6RjpP/antkQQ9Mtd7f6eZh?= =?utf-8?q?VVYWreOxltxanKdE4AHbRpdkPCCzxHckrN3lRMktXVDN+oObrDMgMXnI/C9o/q3Pz?= =?utf-8?q?TvdepSwA3RS+yQIVR9E/M4zw+0x5n5r3eC7xmOSdEVMCXl1yuojeUAXvl3Pwa4MBU?= =?utf-8?q?hllBg4FjdbL0NyyVDpIF7avE6cEPZw1Gue0lDRwh9gLzMh93IibQoPLRMSDTteI8D?= =?utf-8?q?CqudhAoGpM246qOc6JT3wR3m0tVY0wZEwDpMXT//BLHunf5a4WCdbEgz3pJ/T/evj?= =?utf-8?q?Fk8jiZxulaQ2c1d5yt6C+vSkDN6mrJ7r1hOyro14ZB1lUleA+Qyh/Tox1QxtM+ZGe?= =?utf-8?q?S8+fOWOfVnVhMjTRH0j31qpxVMojEUwY1uXMZaDJ7T/AsRLwtJrO6PfmrQVuk32jh?= =?utf-8?q?nCTSdJ2Qq+rpkTUq8mDzLmgk5JkUTXJls215x+IvwhlVrwvI+eunqfcZUES0mIrUo?= =?utf-8?q?6i6wG6boaClVU1DroszxEwtwVyLPr34hVzipscX0JyTivCG9DBCw2QBb0lsDv0qmO?= =?utf-8?q?jGdciCwN9j3DdEvEDD9kJBmtlBRQBkZks9v4CTjgyFsAY5C8ot6J1SzP8nkC6eo?= =?utf-8?q?=3D?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: SN1PR12MB2560.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2020 22:38:00.9872 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: d7a4100d-1e79-41f2-3571-08d89b00c0e4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kg2viv17pp71YKH0XKhwHyhHQx603lNB5GibEWUl86InY5uwNvoKtiuWPLOUv4Mh X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2624 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Newer AMD processors have a feature to virtualize the use of the SPEC_CTRL MSR. When supported, the SPEC_CTRL MSR is automatically virtualized and no longer requires hypervisor intervention. This feature is detected via CPUID function 0x8000000A_EDX[20]: GuestSpecCtrl. Hypervisors are not required to enable this feature since it is automatically enabled on processors that support it. When this feature is enabled, the hypervisor no longer has to intercept the usage of the SPEC_CTRL MSR and no longer is required to save and restore the guest SPEC_CTRL setting when switching hypervisor/guest modes. The effective SPEC_CTRL setting is the guest SPEC_CTRL setting or'ed with the hypervisor SPEC_CTRL setting. This allows the hypervisor to ensure a minimum SPEC_CTRL if desired. This support also fixes an issue where a guest may sometimes see an inconsistent value for the SPEC_CTRL MSR on processors that support this feature. With the current SPEC_CTRL support, the first write to SPEC_CTRL is intercepted and the virtualized version of the SPEC_CTRL MSR is not updated. When the guest reads back the SPEC_CTRL MSR, it will be 0x0, instead of the actual expected value. There isn’t a security concern here, because the host SPEC_CTRL value is or’ed with the Guest SPEC_CTRL value to generate the effective SPEC_CTRL value. KVM writes with the guest's virtualized SPEC_CTRL value to SPEC_CTRL MSR just before the VMRUN, so it will always have the actual value even though it doesn’t appear that way in the guest. The guest will only see the proper value for the SPEC_CTRL register if the guest was to write to the SPEC_CTRL register again. With Virtual SPEC_CTRL support, the MSR interception of SPEC_CTRL is disabled during vmcb_init, so this will no longer be an issue. Signed-off-by: Babu Moger --- arch/x86/kvm/svm/svm.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 79b3a564f1c9..3d73ec0cdb87 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1230,6 +1230,14 @@ static void init_vmcb(struct vcpu_svm *svm) svm_check_invpcid(svm); + /* + * If the host supports V_SPEC_CTRL then disable the interception + * of MSR_IA32_SPEC_CTRL. + */ + if (boot_cpu_has(X86_FEATURE_V_SPEC_CTRL)) + set_msr_interception(&svm->vcpu, svm->msrpm, MSR_IA32_SPEC_CTRL, + 1, 1); + if (kvm_vcpu_apicv_active(&svm->vcpu)) avic_init_vmcb(svm); @@ -3590,7 +3598,8 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu) * is no need to worry about the conditional branch over the wrmsr * being speculatively taken. */ - x86_spec_ctrl_set_guest(svm->spec_ctrl, svm->virt_spec_ctrl); + if (!static_cpu_has(X86_FEATURE_V_SPEC_CTRL)) + x86_spec_ctrl_set_guest(svm->spec_ctrl, svm->virt_spec_ctrl); svm_vcpu_enter_exit(vcpu, svm); @@ -3609,12 +3618,14 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu) * If the L02 MSR bitmap does not intercept the MSR, then we need to * save it. */ - if (unlikely(!msr_write_intercepted(vcpu, MSR_IA32_SPEC_CTRL))) + if (!static_cpu_has(X86_FEATURE_V_SPEC_CTRL) && + unlikely(!msr_write_intercepted(vcpu, MSR_IA32_SPEC_CTRL))) svm->spec_ctrl = native_read_msr(MSR_IA32_SPEC_CTRL); reload_tss(vcpu); - x86_spec_ctrl_restore_host(svm->spec_ctrl, svm->virt_spec_ctrl); + if (!static_cpu_has(X86_FEATURE_V_SPEC_CTRL)) + x86_spec_ctrl_restore_host(svm->spec_ctrl, svm->virt_spec_ctrl); vcpu->arch.cr2 = svm->vmcb->save.cr2; vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;