From patchwork Thu Dec 10 18:22:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 11965889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED905C4361B for ; Thu, 10 Dec 2020 18:25:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A735D23DE3 for ; Thu, 10 Dec 2020 18:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393026AbgLJSZQ (ORCPT ); Thu, 10 Dec 2020 13:25:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393004AbgLJSXo (ORCPT ); Thu, 10 Dec 2020 13:23:44 -0500 Received: from mail-pf1-x441.google.com (mail-pf1-x441.google.com [IPv6:2607:f8b0:4864:20::441]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B795DC061794 for ; Thu, 10 Dec 2020 10:23:03 -0800 (PST) Received: by mail-pf1-x441.google.com with SMTP id 131so4883112pfb.9 for ; Thu, 10 Dec 2020 10:23:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QlYQYIjOvFUGV9u7dpq2U2XXQsFEp9E3/SIg8yeU14c=; b=lfAUoVooAJ+yZelRCF1lgwM6D/zfU4rspDyNoX6xa0cXBLmS4Q8uHwzVgpD/XO/YHX NI6xvXysReS7dVoo+JAiKd3wLVPfpN3fuXKfTksDsw7hN50MLKpt1RDN/PN0mVLvlFN1 u4ciX4vfPzlIihO7TcjIgeZltITIHXyKqb+so= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QlYQYIjOvFUGV9u7dpq2U2XXQsFEp9E3/SIg8yeU14c=; b=Dk/Y31nXZ02xjXy9OemPlfzeeOR/4F0V+8dD1+fCkvDREFlw1cq0iZj72qNURp8zKV CquQjKP50Lf5AQxDy8eKOvPRQXjVGBrp6FMpxyYDDXBxKqedl/n2KNJG4s5127/tc+Wy kEGifnQjc0TTV+T5MrTdmQqURVJaBKhCjvGt7QzK870I+1iimxeCzCF+CqB48p1HUu+l sW04cngdGxmyPVRas32ZkO+QkSAhzBirlq7QBfufQaLICtmimHI4mfBmQE0HSnF4E1Ft XYiP9V8BW1TcdcW6N8xOpqy3gzqLnmsbfRIYIqS5jDxWSu+PXfobEuMOFrOZwyayBQQi ScEw== X-Gm-Message-State: AOAM533F6PzECFjwz1SsOh/cSRWQEkjmRCJAFhy6AWOn+q0oAV1qI4IQ OpXYuMMLsds0W/+rYMALRHCOTQ== X-Google-Smtp-Source: ABdhPJwgG5kTouSLHoe+Vwf59Jl4L2D9kVPzpdismtc1CdZVXS5GKmSp1sJsBJe70lDLPVNI7C9smA== X-Received: by 2002:a65:490c:: with SMTP id p12mr7783319pgs.98.1607624583260; Thu, 10 Dec 2020 10:23:03 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id a10sm6898376pfi.168.2020.12.10.10.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Dec 2020 10:23:02 -0800 (PST) From: Douglas Anderson To: Stephen Boyd Cc: Taniya Das , vbadigan@codeaurora.org, Douglas Anderson , Andy Gross , Bjorn Andersson , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] clk: qcom: gcc-sc7180: Use floor ops for sdcc clks Date: Thu, 10 Dec 2020 10:22:38 -0800 Message-Id: <20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid> X-Mailer: git-send-email 2.29.2.576.ga3fc446d84-goog MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org I would repeat the same commit message that was in commit 5e4b7e82d497 ("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks") but it seems silly to do so when you could just go read that commit. NOTE: this is actually extra terrible because we're missing the 50 MHz rate in the table (see the next patch AKA ("clk: qcom: gcc-sc7180: Add 50 MHz clock rate for SDC2")). That means then when you run an older SD card it'll try to clock it at 100 MHz when it's only specced to run at 50 MHz max. As you can probably guess that doesn't work super well. Signed-off-by: Douglas Anderson Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180") Reviewed-by: Bjorn Andersson --- Taniya: can you please update whatever process is used to generate these clock files to use floor for SD card clocks. I hope you can also scour through these files looking for similar problems on other SoCs and submit patches for them. drivers/clk/qcom/gcc-sc7180.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index 68d8f7aaf64e..b080739ab0c3 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -642,7 +642,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = { .name = "gcc_sdcc1_ice_core_clk_src", .parent_data = gcc_parent_data_0, .num_parents = 4, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -666,7 +666,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { .name = "gcc_sdcc2_apps_clk_src", .parent_data = gcc_parent_data_5, .num_parents = 5, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; From patchwork Thu Dec 10 18:22:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 11965887 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16C16C433FE for ; Thu, 10 Dec 2020 18:24:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C198723E1D for ; Thu, 10 Dec 2020 18:24:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393039AbgLJSYW (ORCPT ); Thu, 10 Dec 2020 13:24:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393033AbgLJSYD (ORCPT ); Thu, 10 Dec 2020 13:24:03 -0500 Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FEAFC0617A6 for ; Thu, 10 Dec 2020 10:23:05 -0800 (PST) Received: by mail-pg1-x542.google.com with SMTP id w16so4972734pga.9 for ; Thu, 10 Dec 2020 10:23:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V8NX24ubqKWwH6xcjmH3A9pX91w8R968uRF5N8yhVWE=; b=X1NfbcczKoiYmOYzwW198suAQMOFZglPRX7eTrZfPsVcAbxctN96ddIgRSk+VptxUW rm/bjqHurs7HwEsywnBWkhhSNVsem3OCFjT4bN7/GOjLVJdoa4XEVqi5IlLd1L7CecD9 hEdbHq99Ys+fdrvB2QgmOmW30beJfWKf26cRM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V8NX24ubqKWwH6xcjmH3A9pX91w8R968uRF5N8yhVWE=; b=cX3BhylAIkHAtxkc7+8gRB6giaJXRiz6S2qhZrosiReRPxQtRtRo5GcT3K5JQcXxyy aNijfd22bNg2kSEa28Me5B3zXxa5tqUjI9T+iWE2a6573cz5GYK+QauG07AnuOasF5aY ZM7k1KHHbLECzSeKbLBKgSp+g3BG4Jp+3GVb038Nsg2r9PQ/ZmnC2lTw8KB/iT+3m7f0 QWOJY7CcIofy0Bk8aGXnJVjT54npUjrTHfMw/62IwFLqWw5c5wK0jDCjWKbNhBLIuDdY hDDxCZn1rddf5spbjkNO85G0FPT+fRcUeZwWKTA0c8USfZUtVNQvLllILL6ql/vR9RJ3 rsbg== X-Gm-Message-State: AOAM532cMEdUBxPjFkYpOY9tuNa51JFp0nwm80rysEn5w91+mxX6YFLd brfKdNdVvrFCfCzlasIf9rfjWA== X-Google-Smtp-Source: ABdhPJzc1Cqx+KcUzhvwKx11PppWAktpydpvH6zqRuG+56ah0c3TI6CMKpRwNO7UMWe+aI5oW56wPg== X-Received: by 2002:a17:90a:f412:: with SMTP id ch18mr9070061pjb.69.1607624584641; Thu, 10 Dec 2020 10:23:04 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:42b0:34ff:fe3d:58e6]) by smtp.gmail.com with ESMTPSA id a10sm6898376pfi.168.2020.12.10.10.23.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Dec 2020 10:23:04 -0800 (PST) From: Douglas Anderson To: Stephen Boyd Cc: Taniya Das , vbadigan@codeaurora.org, Douglas Anderson , Andy Gross , Bjorn Andersson , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] clk: qcom: gcc-sc7180: Add 50 MHz clock rate for SDC2 Date: Thu, 10 Dec 2020 10:22:39 -0800 Message-Id: <20201210102234.2.I26dcc0cee374f5571d9929c9985f463773167e68@changeid> X-Mailer: git-send-email 2.29.2.576.ga3fc446d84-goog In-Reply-To: <20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid> References: <20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 50 MHz is an incredibly common clock rate for SD cards to run at. It's "high speed" mode in SD (not very fast these days, but it used to be) or: #define HIGH_SPEED_MAX_DTR 50000000 If we don't support this then older "high speed" cards can only run at 25 MHz or at half their normal speed. There doesn't seem to be any reason to skip this clock rate, so add it. Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180") Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson --- drivers/clk/qcom/gcc-sc7180.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index b080739ab0c3..d82d725ac231 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -651,6 +651,7 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { F(9600000, P_BI_TCXO, 2, 0, 0), F(19200000, P_BI_TCXO, 1, 0, 0), F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), + F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), F(100000000, P_GPLL0_OUT_EVEN, 3, 0, 0), F(202000000, P_GPLL7_OUT_MAIN, 4, 0, 0), { }