From patchwork Thu Dec 17 05:28:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 11979081 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64A10C4361B for ; Thu, 17 Dec 2020 05:30:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0588D23434 for ; Thu, 17 Dec 2020 05:30:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0588D23434 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:60656 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kplsF-0006gR-H6 for qemu-devel@archiver.kernel.org; Thu, 17 Dec 2020 00:30:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50044) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kplqI-0005Zx-4s; Thu, 17 Dec 2020 00:28:46 -0500 Received: from mail-qt1-x835.google.com ([2607:f8b0:4864:20::835]:34809) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kplqG-0006Rg-28; Thu, 17 Dec 2020 00:28:45 -0500 Received: by mail-qt1-x835.google.com with SMTP id 7so19413594qtp.1; Wed, 16 Dec 2020 21:28:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=EXChrC5gkzfVYI7erB3OTiU4nPjdhy+eCp+7MHWO3+E=; b=bo6xk9EM3d78QcVmnt9i5Rj+CgadpEvCoWTiyaXv6IH443GpUrN9XDaACbRZjrBBJ2 6Cc9zF8fE4LGcTkZFpBJQiK3v4DNTQy85m6/1hj8rfWIUlldpMOvP8nnDu8yrkMZ5dEo +qq1dztVmXAbgvDNVDfSEtwb4QEKNboXx0Hopj5MRDJfodzhTCW3pDggLalxtcQ1ngG5 GGjCiajzTNF0NOuiQTxCuvnU2XVtLhsYqRMNsGocNgesOOT7k9AdsnAuUulfESGUWEJq 4Ke8z7m7dDn3Gui0gkXO3VaifDOBviJRdcFWHduomNlp22Pq2UZNme96ezjhrRfmHUyF /Mgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EXChrC5gkzfVYI7erB3OTiU4nPjdhy+eCp+7MHWO3+E=; b=DxIkoGAPedANlnXd7kjJl86qObRtsKgPGerh4r/IH/UbzVbwVdt5cuednMzxFiE5pE KLGH/eIujBm35PmrKxfmtHHyTejfTfYNY3hxB2pFlnXzIAwPbUQ7vntOH84G7pZEksUT Ttg4FJ5PN3R/i89TDO+Okw5V3juxGha/oN1W5XYBhslCZ5YBOS+7x66lCQZMI6IRVTqr GVnAiIllEffaKdjSuQ1s8U37gtGZHD+KNTOHI+inm63KJOhiSO9ae73GIrWWIACRKlvI kvcJsrEc5GND5+aHtDOe1WJU3X9Gqb9TX44jEMnGFsRucXyfBt436SA/tbyVU4G/Xgt5 Jdzw== X-Gm-Message-State: AOAM533/suwJZjTnIzLYeZVs6ZSK7XvlbTe5i9RlQi3qDwdPl9HfhXkO Cc4fnacX5RlAOSrK1rtDBPo= X-Google-Smtp-Source: ABdhPJwS4TwN5Rxz004PAEBXm2iEO6g4Sl8MlONkZQrCI0bwk1kG8LAUrhwKWjouvJKKQEji+M4M4w== X-Received: by 2002:ac8:5441:: with SMTP id d1mr2660193qtq.384.1608182922215; Wed, 16 Dec 2020 21:28:42 -0800 (PST) Received: from pek-vx-bsp2.wrs.com (unknown-124-94.windriver.com. [147.11.124.94]) by smtp.gmail.com with ESMTPSA id i13sm2674072qkk.83.2020.12.16.21.28.39 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Dec 2020 21:28:41 -0800 (PST) From: Bin Meng To: Peter Maydell , Jean-Christophe Dubois , Alistair Francis , qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/2] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Date: Thu, 17 Dec 2020 13:28:32 +0800 Message-Id: <1608182913-54603-1-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.7.4 Received-SPF: pass client-ip=2607:f8b0:4864:20::835; envelope-from=bmeng.cn@gmail.com; helo=mail-qt1-x835.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng For the ECSPIx_CONREG register BURST_LENGTH field, the manual says: 0x020 A SPI burst contains the 1 LSB in first word and all 32 bits in second word. 0x021 A SPI burst contains the 2 LSB in first word and all 32 bits in second word. Current logic uses either s->burst_length or 32, whichever smaller, to determine how many bits it should read from the tx fifo each time. For example, for a 48 bit burst length, current logic transfers the first 32 bit from the first word in the tx fifo, followed by a 16 bit from the second word in the tx fifo, which is wrong. The correct logic should be: transfer the first 16 bit from the first word in the tx fifo, followed by a 32 bit from the second word in the tx fifo. With this change, SPI flash can be successfully probed by U-Boot on imx6 sabrelite board. => sf probe SF: Detected sst25vf016b with page size 256 Bytes, erase size 4 KiB, total 2 MiB Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller") Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- hw/ssi/imx_spi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 85c172e..509fb9f 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -178,7 +178,10 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) DPRINTF("data tx:0x%08x\n", tx); - tx_burst = MIN(s->burst_length, 32); + tx_burst = s->burst_length % 32; + if (tx_burst == 0) { + tx_burst = 32; + } rx = 0; From patchwork Thu Dec 17 05:28:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 11979083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78075C4361B for ; Thu, 17 Dec 2020 05:30:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0BFC223434 for ; Thu, 17 Dec 2020 05:30:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0BFC223434 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:60734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kplsM-0006iZ-U6 for qemu-devel@archiver.kernel.org; Thu, 17 Dec 2020 00:30:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:50056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kplqL-0005bL-3x; Thu, 17 Dec 2020 00:28:49 -0500 Received: from mail-qv1-xf2d.google.com ([2607:f8b0:4864:20::f2d]:44731) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kplqI-0006SY-J8; Thu, 17 Dec 2020 00:28:48 -0500 Received: by mail-qv1-xf2d.google.com with SMTP id d11so12776251qvo.11; Wed, 16 Dec 2020 21:28:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SOssY3xDk4ALFrqhJCocmmiqoBMCXjnTjoStBiOMek4=; b=px2bI0hJROlnAP2Auy2e7Qk0hSHSb5u74ECThzkpvPrhcEQnJcUu6PsOo2QZ59saOL /wdIdPUyDf2ALmDIGRSc8g7gKquoLKvYT+LVrUijNjZyjecPkdfuksxQ3yIk1aW+v2S/ ZuSUx2jndm280nWbtX2SFJIsc4FzucFEPRS97nbzw4bzZ+e5jBlQaAehc6Z9QlXqJ09V mZSUmLpLJzGIB2/hmeeXrEB+aaaXg/vPT3+ZMQ49zyhaSay2s7nrgjUhABDnZCuOV0mS d91lDfq+jJPIFxZlY+vvWqEohphCJS0i/zPBmImML8WTZP5kU/2+pr8Ws15dZ/yqPxMM QrPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SOssY3xDk4ALFrqhJCocmmiqoBMCXjnTjoStBiOMek4=; b=KumEcujQ8Echax2gYZ1yr9J1+6BEhFpi17rCaLvFV2DA/xt7DK2nGtYffZhEMKUz7w ONgFbBHXWcBkDfvPyHWjdUTxqPSTaEaZcw1pDCq4lAVHELB/FzUTBmZ6gx7tsbP9z3wU +1u1BrEozdMr1TFPQozx5ajTkPjtSOqmvq/p7oXUFWjGQtSSKgfZ104FFq3cmQvd0n/e IM5kIHjtOW5DuvtQWFCZBFFR+h/69d8af1rwAbBUQgHcXH1TfhikDR8api2IhBKZjA9Y zsDaOLEVUrgLJhvB8W8Qmi9DcrXVbVmqDEcoogMfb+LqZCGafpEYe8OqdKd2/pCntLxl PW+Q== X-Gm-Message-State: AOAM533DYgP2zJuH+XjiVc8BcmHlY6M4NTUSZRCvpDgshjOEgY/1/Yr5 WTqhcFB9T6Ua6TI+gedm9MM= X-Google-Smtp-Source: ABdhPJwv6RjWoNHPhFrnNCo+W+1FU2iuK1nSFmuWg4AbrYQyJFQ0lu/oL6qxUqTH8U964aH4UjPCFA== X-Received: by 2002:a0c:df94:: with SMTP id w20mr46171146qvl.33.1608182925249; Wed, 16 Dec 2020 21:28:45 -0800 (PST) Received: from pek-vx-bsp2.wrs.com (unknown-124-94.windriver.com. [147.11.124.94]) by smtp.gmail.com with ESMTPSA id i13sm2674072qkk.83.2020.12.16.21.28.42 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Dec 2020 21:28:44 -0800 (PST) From: Bin Meng To: Peter Maydell , Jean-Christophe Dubois , Alistair Francis , qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/2] hw/ssi: imx_spi: Correct tx and rx fifo endianness Date: Thu, 17 Dec 2020 13:28:33 +0800 Message-Id: <1608182913-54603-2-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608182913-54603-1-git-send-email-bmeng.cn@gmail.com> References: <1608182913-54603-1-git-send-email-bmeng.cn@gmail.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::f2d; envelope-from=bmeng.cn@gmail.com; helo=mail-qv1-xf2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng The endianness of data exchange between tx and rx fifo is incorrect. Earlier bytes are supposed to show up on MSB and later bytes on LSB, ie: in big endian. The manual does not explicitly say this, but the U-Boot and Linux driver codes have a swap on the data transferred to tx fifo and from rx fifo. With this change, U-Boot read from / write to SPI flash tests pass. => sf test 1ff000 1000 SPI flash test: 0 erase: 0 ticks, 4096000 KiB/s 32768.000 Mbps 1 check: 3 ticks, 1333 KiB/s 10.664 Mbps 2 write: 235 ticks, 17 KiB/s 0.136 Mbps 3 read: 2 ticks, 2000 KiB/s 16.000 Mbps Test passed 0 erase: 0 ticks, 4096000 KiB/s 32768.000 Mbps 1 check: 3 ticks, 1333 KiB/s 10.664 Mbps 2 write: 235 ticks, 17 KiB/s 0.136 Mbps 3 read: 2 ticks, 2000 KiB/s 16.000 Mbps Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller") Signed-off-by: Bin Meng --- hw/ssi/imx_spi.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 509fb9f..71f0902 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -156,13 +156,14 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) { uint32_t tx; uint32_t rx; + uint32_t data; + uint8_t byte; DPRINTF("Begin: TX Fifo Size = %d, RX Fifo Size = %d\n", fifo32_num_used(&s->tx_fifo), fifo32_num_used(&s->rx_fifo)); while (!fifo32_is_empty(&s->tx_fifo)) { int tx_burst = 0; - int index = 0; if (s->burst_length <= 0) { s->burst_length = imx_spi_burst_length(s); @@ -183,10 +184,18 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) tx_burst = 32; } + data = 0; + for (int i = 0; i < tx_burst / 8; i++) { + byte = tx & 0xff; + tx = tx >> 8; + data = (data << 8) | byte; + } + tx = data; + rx = 0; while (tx_burst > 0) { - uint8_t byte = tx & 0xff; + byte = tx & 0xff; DPRINTF("writing 0x%02x\n", (uint32_t)byte); @@ -196,12 +205,11 @@ static void imx_spi_flush_txfifo(IMXSPIState *s) DPRINTF("0x%02x read\n", (uint32_t)byte); tx = tx >> 8; - rx |= (byte << (index * 8)); + rx = (rx << 8) | byte; /* Remove 8 bits from the actual burst */ tx_burst -= 8; s->burst_length -= 8; - index++; } DPRINTF("data rx:0x%08x\n", rx);