From patchwork Fri Dec 18 03:53:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD031C2BBCF for ; Fri, 18 Dec 2020 03:55:32 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A43A723A77 for ; Fri, 18 Dec 2020 03:55:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A43A723A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=j0vR1CbJFIu13kuHofC4kIolzaQuhNJ/KUoZ3pM8H5E=; b=NyyOIBCwChKTZxX8Y1uAR9Ddo E/Ldbiw/wzaRIvuqpqIcZbrCRbPU3SY1cv5Dosc3/eWUCuNe8Y4uU6J4nyy+aG3pxrYuQXVcrK/Or 3XT1Cro4lk1KXk1JtdbO9BS9vL3/RIO4e0naBrDtyN+NjyCy6iq1BYTO/+FOejzdAIIqX6IMa3Xit 6rk9N/aUPAIQ6h6NiSNcOjhD4o2XgfEPbhHiv+Kw/IFkhfKoDWEHk6Q49ex1IUzVRSSJWrTBm98xY ssQQehRQJq9fNRvWSAjEVP5XP2t8t9P1iWch05tzUxowJzI2lNGXs95//KdNpQxFa0o6oKG7A7aq+ E2JpStZog==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qG-0007Vn-U3; Fri, 18 Dec 2020 03:54:08 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6q8-0007U0-PA for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:02 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 9A56F5C00D2; Thu, 17 Dec 2020 22:54:00 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=KSRPuSjoX18Mr PCxVgf/9kBU5TXFu4khlyApjlCo9JI=; b=YjdWUNlQYS6a9dNPvKJS2BT0ZEzgP /GlOZFxrMToXygI+5uIkRWkGK5J62FIKTY464DZ6wFzRsS2KS7LAr32do80FUagq G0223L8zQaSnvlivIjn0lSIdu0/MXUYbgD95iYBT2gxxPVRT2OHnQvfjzQO1GvJE R64NlMgo1Kfq29xplxho2EXTaZrKfC1ERU4pw4bWM2kJPYdury8tLnAA6bh+ousE 6BhMEb1Yjmbk0uBoqoAu3xuMZ4q/bDbfEdV6p8Z44qVB9rQri/3/MR8nTiMBCj2Y j+Lb3c9C68Mfpf+RFHGfYo67Mvx5LUgKMA+L/MaWkjOmdOHHDKtQu4qmg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=KSRPuSjoX18MrPCxVgf/9kBU5TXFu4khlyApjlCo9JI=; b=C9sy6sj4 xHYbfPv3CW2uqQKgIF9ZN7RFoXNEbYcaHF5lXabUK54xEbZMctHIcQFjfztoO0vP Iyp2syFr8gcG/KVitXmD3kQHenU/WtaFUGirqu5iASHtc2gSv6Z5m4rIjVTsZ0tM kJGKChfs0JgWHGaxWwbXt7opu4j1BxkPjMZbhM96RutLca0Xbr4WpMfcLt17p4We 5mYi8rstXFNHZLowNk0cUzFDH5En9eQVdcS0tKbnIMXs2EU3eZjUHIkJea/N/Boq 64Oco7Z8r3vSikwRZv28YsOuFW5gCjSXMZsbWCC10yvVCeur0FN7CxkjuU+BrjIf JYsP/6cix3HjiQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id ECA781080067; Thu, 17 Dec 2020 22:53:55 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 1/6] mmc: core: Add helper for parsing clock phase properties Date: Fri, 18 Dec 2020 14:23:33 +1030 Message-Id: <20201218035338.1130849-2-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225400_889500_96A702AC X-CRM114-Status: GOOD ( 13.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drivers for MMC hosts that accept phase corrections can take advantage of the helper by embedding an instance of struct mmc_clk_phase_map in their private data and invoking mmc_of_parse_clk_phase() to extract phase parameters. It is the responsibility of the host driver to translate and apply the extracted values to hardware as required. Signed-off-by: Andrew Jeffery --- drivers/mmc/core/host.c | 44 ++++++++++++++++++++++++++++++++++++++++ include/linux/mmc/host.h | 13 ++++++++++++ 2 files changed, 57 insertions(+) diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index 96b2ca1f1b06..74e853bb6948 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -163,6 +163,50 @@ static void mmc_retune_timer(struct timer_list *t) mmc_retune_needed(host); } +static void mmc_of_parse_timing_phase(struct device *dev, const char *prop, + struct mmc_clk_phase *phase) +{ + int degrees[2] = {0}; + int rc; + + rc = device_property_read_u32_array(dev, prop, degrees, 2); + phase->valid = !rc; + if (phase->valid) { + phase->in_deg = degrees[0]; + phase->out_deg = degrees[1]; + } +} + +void +mmc_of_parse_clk_phase(struct mmc_host *host, struct mmc_clk_phase_map *map) +{ + struct device *dev = host->parent; + + mmc_of_parse_timing_phase(dev, "clk-phase-legacy", + &map->phase[MMC_TIMING_LEGACY]); + mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs", + &map->phase[MMC_TIMING_MMC_HS]); + mmc_of_parse_timing_phase(dev, "clk-phase-sd-hs", + &map->phase[MMC_TIMING_SD_HS]); + mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12", + &map->phase[MMC_TIMING_UHS_SDR12]); + mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25", + &map->phase[MMC_TIMING_UHS_SDR25]); + mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50", + &map->phase[MMC_TIMING_UHS_SDR50]); + mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104", + &map->phase[MMC_TIMING_UHS_SDR104]); + mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50", + &map->phase[MMC_TIMING_UHS_DDR50]); + mmc_of_parse_timing_phase(dev, "clk-phase-mmc-ddr52", + &map->phase[MMC_TIMING_MMC_DDR52]); + mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs200", + &map->phase[MMC_TIMING_MMC_HS200]); + mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs400", + &map->phase[MMC_TIMING_MMC_HS400]); +} +EXPORT_SYMBOL(mmc_of_parse_clk_phase); + /** * mmc_of_parse() - parse host's device-tree node * @host: host whose node should be parsed. diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 01bba36545c5..8cf686d98a68 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -79,6 +79,17 @@ struct mmc_ios { bool enhanced_strobe; /* hs400es selection */ }; +struct mmc_clk_phase { + bool valid; + u16 in_deg; + u16 out_deg; +}; + +#define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1) +struct mmc_clk_phase_map { + struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES]; +}; + struct mmc_host; struct mmc_host_ops { @@ -490,6 +501,8 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *); int mmc_add_host(struct mmc_host *); void mmc_remove_host(struct mmc_host *); void mmc_free_host(struct mmc_host *); +void mmc_of_parse_clk_phase(struct mmc_host *host, + struct mmc_clk_phase_map *map); int mmc_of_parse(struct mmc_host *host); int mmc_of_parse_voltage(struct device_node *np, u32 *mask); From patchwork Fri Dec 18 03:53:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00ABDC2BBD4 for ; Fri, 18 Dec 2020 03:55:47 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F2CC23A77 for ; Fri, 18 Dec 2020 03:55:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9F2CC23A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=W0yaTnWeCiiR+nFuT99MjAedol4Yz+JyKHGR8aJC+R4=; b=N8yEiBVe9PqCZMsn57BW5bkzy uH/8vVcU4yVn+18EnCT0ELlqic87GjoXh+8qt0yZ8xvG3NBDO6sVWKBw97G2jE78K5V7DlxLDPKV5 qbVcZ+KGTG9sFAfEng7mJryNdsMbR+G1vk7pdTq81Tg/tSoAKWOo2tq9wrUDwhTJHc2DEXYzqwxpz 7zlK3jbpLak5iF2Sv9neHg++uk9HXjClO+rHay1xwn03Qlx1TBWpy9Dyp8rFXW4S94AQxF4WEbHZt iWyvzk6qn1wUhrPmg0eoe74tPS7HIIGWh4U2ahFrLm64sZ/ezZmJDdxFoAlJq/ub7XHwmHmNxt32Z BR9IUWDnw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qX-0007Zx-9H; Fri, 18 Dec 2020 03:54:25 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qE-0007VI-Ki for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:10 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 6EC145C00F7; Thu, 17 Dec 2020 22:54:06 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=724ecEhRDXWgZ Zicro86oSLISUtE1mGbQqChDaE7fZo=; b=gT1zKlWZJ59VVo3ZH2+P+VaPrBxt7 6DpWjriPJInpk9n6lzLmZsH1vk2AcuR50Uu2kX36gshlakBnaggaU2sNyV/h/pCY LO8f53BTMRTRopyjWqC6lqTS7pdPt6th4L7pdHWuARVxK+eFhmYD4PQ1zk6rdgWp fvKOL0smPajBvHYQaJhDsElL6PgGSP4k6X8JeDvEj0C18Z3ch0R8YgT4DuqLr+Iz x7zxciaFSC/IclRAtKLUtK+20zAREmvFonRhNgLmIiF6FWB+Dczf3HWwxq/wpOB8 mF2qLPiJRjyPAjm55fMQAbHx2PlqR0wDQARWpltYhFRpo4iNZ3d9YXCjQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=724ecEhRDXWgZZicro86oSLISUtE1mGbQqChDaE7fZo=; b=az2WPMsu EhEL+R+IjaasLlAdSFBtN1NDTzOo1fx2ihnbKQyv07jhfIXsutZLKNKfaFLS9mKw +r/LQJWpKeL0RL7qODDFYRcWlSIerFvQ3bAWW/LIQ/KFTmeANVNHkai7cbMuZJgt 63R9ZT+wAYL8tzGmVDGRR4KFyKlV0/k8Ue4pc3iTpSiNn7nZHAI7Pai1Y7v7p+39 eoIhdyrD89BRIfdyTQQgOFY3INbSAru+HuTyFFlL/ZjsvqZDbJaqvfVfS24qRlO0 FuPCdwGd7Hiqd1pUQw5x15MGA/nlh0V/K4I5DiZK/VkmF41ST3agB965dBUrwApc eOZrHXe1VNW2yg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id 14E08108005F; Thu, 17 Dec 2020 22:54:00 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 2/6] mmc: sdhci-of-aspeed: Expose clock phase controls Date: Fri, 18 Dec 2020 14:23:34 +1030 Message-Id: <20201218035338.1130849-3-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225406_851808_B923C94A X-CRM114-Status: GOOD ( 25.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Aspeed SD/eMMC controllers expose configurable clock phase correction by inserting delays of up to 15 logic elements in length into the bus clock path. The hardware supports independent configuration for both bus directions on a per-slot basis. The timing delay per element encoded in the driver was experimentally determined by scope measurements. The phase controls for both slots are grouped together in a single register of the global register block of the SD/MMC controller(s), which drives the use of a locking scheme between the SDHCIs and the global register set. Signed-off-by: Andrew Jeffery --- drivers/mmc/host/sdhci-of-aspeed.c | 216 +++++++++++++++++++++++++++-- 1 file changed, 208 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index 4f008ba3280e..b1a14e7dda82 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -16,9 +17,19 @@ #include "sdhci-pltfm.h" -#define ASPEED_SDC_INFO 0x00 -#define ASPEED_SDC_S1MMC8 BIT(25) -#define ASPEED_SDC_S0MMC8 BIT(24) +#define ASPEED_SDC_INFO 0x00 +#define ASPEED_SDC_S1_MMC8 BIT(25) +#define ASPEED_SDC_S0_MMC8 BIT(24) +#define ASPEED_SDC_PHASE 0xf4 +#define ASPEED_SDC_S1_PHASE_IN GENMASK(25, 21) +#define ASPEED_SDC_S0_PHASE_IN GENMASK(20, 16) +#define ASPEED_SDC_S1_PHASE_OUT GENMASK(15, 11) +#define ASPEED_SDC_S1_PHASE_IN_EN BIT(10) +#define ASPEED_SDC_S1_PHASE_OUT_EN GENMASK(9, 8) +#define ASPEED_SDC_S0_PHASE_OUT GENMASK(7, 3) +#define ASPEED_SDC_S0_PHASE_IN_EN BIT(2) +#define ASPEED_SDC_S0_PHASE_OUT_EN GENMASK(1, 0) +#define ASPEED_SDC_PHASE_MAX 31 struct aspeed_sdc { struct clk *clk; @@ -28,9 +39,36 @@ struct aspeed_sdc { void __iomem *regs; }; +struct aspeed_sdhci_tap_param { + bool valid; + +#define ASPEED_SDHCI_TAP_PARAM_INVERT_CLK BIT(4) + u8 in; + u8 out; +}; + +struct aspeed_sdhci_tap_desc { + u32 tap_mask; + u32 enable_mask; + u8 enable_value; +}; + +struct aspeed_sdhci_phase_desc { + struct aspeed_sdhci_tap_desc in; + struct aspeed_sdhci_tap_desc out; +}; + +struct aspeed_sdhci_pdata { + const struct aspeed_sdhci_phase_desc *phase_desc; + size_t nr_phase_descs; +}; + struct aspeed_sdhci { + const struct aspeed_sdhci_pdata *pdata; struct aspeed_sdc *parent; u32 width_mask; + struct mmc_clk_phase_map phase_map; + const struct aspeed_sdhci_phase_desc *phase_desc; }; static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc, @@ -50,10 +88,118 @@ static void aspeed_sdc_configure_8bit_mode(struct aspeed_sdc *sdc, spin_unlock(&sdc->lock); } +static u32 +aspeed_sdc_set_phase_tap(const struct aspeed_sdhci_tap_desc *desc, + u8 tap, bool enable, u32 reg) +{ + reg &= ~(desc->enable_mask | desc->tap_mask); + if (enable) { + reg |= tap << __ffs(desc->tap_mask); + reg |= desc->enable_value << __ffs(desc->enable_mask); + } + + return reg; +} + +static void +aspeed_sdc_set_phase_taps(struct aspeed_sdc *sdc, + const struct aspeed_sdhci_phase_desc *desc, + const struct aspeed_sdhci_tap_param *taps) +{ + u32 reg; + + spin_lock(&sdc->lock); + reg = readl(sdc->regs + ASPEED_SDC_PHASE); + + reg = aspeed_sdc_set_phase_tap(&desc->in, taps->in, taps->valid, reg); + reg = aspeed_sdc_set_phase_tap(&desc->out, taps->out, taps->valid, reg); + + writel(reg, sdc->regs + ASPEED_SDC_PHASE); + spin_unlock(&sdc->lock); +} + +#define PICOSECONDS_PER_SECOND 1000000000000ULL +#define ASPEED_SDHCI_NR_TAPS 15 +/* Measured value with *handwave* environmentals and static loading */ +#define ASPEED_SDHCI_MAX_TAP_DELAY_PS 1253 +static int aspeed_sdhci_phase_to_tap(struct device *dev, unsigned long rate_hz, + int phase_deg) +{ + u64 phase_period_ps; + u64 prop_delay_ps; + u64 clk_period_ps; + unsigned int tap; + u8 inverted; + + phase_deg %= 360; + + if (phase_deg >= 180) { + inverted = ASPEED_SDHCI_TAP_PARAM_INVERT_CLK; + phase_deg -= 180; + dev_dbg(dev, + "Inverting clock to reduce phase correction from %d to %d degrees\n", + phase_deg + 180, phase_deg); + } else { + inverted = 0; + } + + prop_delay_ps = ASPEED_SDHCI_MAX_TAP_DELAY_PS / ASPEED_SDHCI_NR_TAPS; + clk_period_ps = div_u64(PICOSECONDS_PER_SECOND, (u64)rate_hz); + phase_period_ps = div_u64((u64)phase_deg * clk_period_ps, 360ULL); + + tap = div_u64(phase_period_ps, prop_delay_ps); + if (tap > ASPEED_SDHCI_NR_TAPS) { + dev_warn(dev, + "Requested out of range phase tap %d for %d degrees of phase compensation at %luHz, clamping to tap %d\n", + tap, phase_deg, rate_hz, ASPEED_SDHCI_NR_TAPS); + tap = ASPEED_SDHCI_NR_TAPS; + } + + return inverted | tap; +} + +static void +aspeed_sdhci_phases_to_taps(struct device *dev, unsigned long rate, + const struct mmc_clk_phase *phases, + struct aspeed_sdhci_tap_param *taps) +{ + taps->valid = phases->valid; + + if (!phases->valid) + return; + + taps->in = aspeed_sdhci_phase_to_tap(dev, rate, phases->in_deg); + taps->out = aspeed_sdhci_phase_to_tap(dev, rate, phases->out_deg); +} + +static void +aspeed_sdhci_configure_phase(struct sdhci_host *host, unsigned long rate) +{ + struct aspeed_sdhci_tap_param _taps = {0}, *taps = &_taps; + struct mmc_clk_phase *params; + struct aspeed_sdhci *sdhci; + struct device *dev; + + dev = host->mmc->parent; + sdhci = sdhci_pltfm_priv(sdhci_priv(host)); + + if (!sdhci->phase_desc) + return; + + params = &sdhci->phase_map.phase[host->timing]; + aspeed_sdhci_phases_to_taps(dev, rate, params, taps); + aspeed_sdc_set_phase_taps(sdhci->parent, sdhci->phase_desc, taps); + dev_dbg(dev, + "Using taps [%d, %d] for [%d, %d] degrees of phase correction at %luHz (%d)\n", + taps->in & ASPEED_SDHCI_NR_TAPS, + taps->out & ASPEED_SDHCI_NR_TAPS, + params->in_deg, params->out_deg, rate, host->timing); +} + static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pltfm_host *pltfm_host; - unsigned long parent; + unsigned long parent, bus; int div; u16 clk; @@ -69,13 +215,17 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) clock = host->max_clk; for (div = 2; div < 256; div *= 2) { - if ((parent / div) <= clock) + bus = parent / div; + if (bus <= clock) break; } + div >>= 1; clk = div << SDHCI_DIVIDER_SHIFT; + aspeed_sdhci_configure_phase(host, bus); + sdhci_enable_clk(host, clk); } @@ -157,6 +307,7 @@ static inline int aspeed_sdhci_calculate_slot(struct aspeed_sdhci *dev, static int aspeed_sdhci_probe(struct platform_device *pdev) { + const struct aspeed_sdhci_pdata *aspeed_pdata; struct sdhci_pltfm_host *pltfm_host; struct aspeed_sdhci *dev; struct sdhci_host *host; @@ -164,12 +315,15 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) int slot; int ret; + aspeed_pdata = of_device_get_match_data(&pdev->dev); + host = sdhci_pltfm_init(pdev, &aspeed_sdhci_pdata, sizeof(*dev)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); dev = sdhci_pltfm_priv(pltfm_host); + dev->pdata = aspeed_pdata; dev->parent = dev_get_drvdata(pdev->dev.parent); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -180,8 +334,17 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) else if (slot >= 2) return -EINVAL; - dev_info(&pdev->dev, "Configuring for slot %d\n", slot); - dev->width_mask = !slot ? ASPEED_SDC_S0MMC8 : ASPEED_SDC_S1MMC8; + if (dev->pdata && slot < dev->pdata->nr_phase_descs) { + dev->phase_desc = &dev->pdata->phase_desc[slot]; + } else { + dev_info(&pdev->dev, + "Phase control not supported for slot %d\n", slot); + dev->phase_desc = NULL; + } + + dev->width_mask = !slot ? ASPEED_SDC_S0_MMC8 : ASPEED_SDC_S1_MMC8; + + dev_info(&pdev->dev, "Configured for slot %d\n", slot); sdhci_get_of_property(pdev); @@ -199,6 +362,9 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) if (ret) goto err_sdhci_add; + if (dev->phase_desc) + mmc_of_parse_clk_phase(host->mmc, &dev->phase_map); + ret = sdhci_add_host(host); if (ret) goto err_sdhci_add; @@ -230,10 +396,44 @@ static int aspeed_sdhci_remove(struct platform_device *pdev) return 0; } +static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = { + /* SDHCI/Slot 0 */ + [0] = { + .in = { + .tap_mask = ASPEED_SDC_S0_PHASE_IN, + .enable_mask = ASPEED_SDC_S0_PHASE_IN_EN, + .enable_value = 1, + }, + .out = { + .tap_mask = ASPEED_SDC_S0_PHASE_OUT, + .enable_mask = ASPEED_SDC_S0_PHASE_OUT_EN, + .enable_value = 3, + }, + }, + /* SDHCI/Slot 1 */ + [1] = { + .in = { + .tap_mask = ASPEED_SDC_S1_PHASE_IN, + .enable_mask = ASPEED_SDC_S1_PHASE_IN_EN, + .enable_value = 1, + }, + .out = { + .tap_mask = ASPEED_SDC_S1_PHASE_OUT, + .enable_mask = ASPEED_SDC_S1_PHASE_OUT_EN, + .enable_value = 3, + }, + }, +}; + +static const struct aspeed_sdhci_pdata ast2600_sdhci_pdata = { + .phase_desc = ast2600_sdhci_phase, + .nr_phase_descs = ARRAY_SIZE(ast2600_sdhci_phase), +}; + static const struct of_device_id aspeed_sdhci_of_match[] = { { .compatible = "aspeed,ast2400-sdhci", }, { .compatible = "aspeed,ast2500-sdhci", }, - { .compatible = "aspeed,ast2600-sdhci", }, + { .compatible = "aspeed,ast2600-sdhci", .data = &ast2600_sdhci_pdata, }, { } }; From patchwork Fri Dec 18 03:53:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EE72C1B0D8 for ; Fri, 18 Dec 2020 03:55:51 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CD2B723A77 for ; Fri, 18 Dec 2020 03:55:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CD2B723A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5Kaimh15YBUf3zRTCh2ulw30VIyhUQohNhuM6C89deE=; b=RGHuLi0F5sCY0aFVWbFoMAUdB DmWtdF5KnfKWzOlhElgH0f4W9oVC5OfMj6K/vsgWyOZZIfW3U3E8smGgK1VBqS056A7/KGuaXl9a+ SHknXOzgedIvfWRacdWtPhdqQ+Zflz3yjoZtV6Tvx1sFJY/d4isoIY7WHppe8Pb5r5JNxRpg+XDib 7V5O22EyPfSLvSp0lbh4+gl8lBD69pHKRwzP9NiWxHtNsxUk2J8ic+go42yfmRogBexfwbrjMmUA8 u2gMy/mE8AvOfAbVs/QNAzv1jF2l21PN4NlY3Pn1BoLuCAPVCyxD2tWmTluVG3kDA2EDwrSFXextq yf3mw1CKA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qk-0007fI-D7; Fri, 18 Dec 2020 03:54:38 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qK-0007Wv-Q4 for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:20 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 3B2D35C00F5; Thu, 17 Dec 2020 22:54:12 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=Q1VncEwVP5Sn+ LVJVlCf4rK+C+OhdnQWKLcdmzYhx+k=; b=k1SXvNzpHK19iAEYL4EhT92jU0tE+ j+tTsE1qJVJrktXaAG3YxAUa5C1ZHK6fGMbPegvhZMvF9aetvq9XOctZcLnYvWG4 Av45N5UKvUJRz0dyAqiFrMAuDVxyS4KL0hPG28Al8SIaDNgFUNjY/N4YA4A/jxJ8 vyPIOAf7VJT71ySUSF5vi4Z20dJi5XZfwYacSOO4Vy3f5zj57Jbam2ndOTSkEFTx o6aeZITT6u7VALxh87FW91iYk2hYH0wHAfyjxA9iZxblEEl656yMTPRtUZ4CtGFp 4/5T9afX7k5OEiHv88pfS8UkStVxD6qdQe1/QSmKDxg5pPvgI+qHl+cYA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=Q1VncEwVP5Sn+LVJVlCf4rK+C+OhdnQWKLcdmzYhx+k=; b=N2qIFdmQ BXhUnaLOsrHV0QaUMw9ZEvQhJ+pLZrViOR5l2si3bQrFmTD8bPGM73pOLUP2Z3zp SBTPmfIMZURhClrVlxzAxSOmS8WfM37kHb9R8sdXuIjurT85vdtdZc6hnBRekXTG l77OyYYccLXf9O55uV9qOOQE35OrLByxIOuChobAE4ASTNGuu66Gx0ZOptcHu1ou DaSEQgTb5R6BpVuYi0k+lXpu7ozXqxT7oHsW2thDEPdspQ03XYB7XY6sR7ah4V/S sf8SMhrb8/TtP0ak0aZ9tUZddJi7vVAMczXtJMnzClgHQilYT7cnoVBDTeOU/XcU 1m/jiLIAFcx63w== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id 55003108005B; Thu, 17 Dec 2020 22:54:07 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 3/6] mmc: sdhci-of-aspeed: Add AST2600 bus clock support Date: Fri, 18 Dec 2020 14:23:35 +1030 Message-Id: <20201218035338.1130849-4-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225412_992718_DFA42E72 X-CRM114-Status: GOOD ( 19.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The AST2600 can achieve HS200 speeds with a change to the bus clock divisor behaviour. The divisor can also be more accurate with respect to the requested clock rate, but keep the one-hot behaviour for backwards compatibility with the AST2400 and AST2500. Signed-off-by: Andrew Jeffery --- drivers/mmc/host/sdhci-of-aspeed.c | 37 ++++++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c index b1a14e7dda82..4b30f6a1178e 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -59,6 +59,7 @@ struct aspeed_sdhci_phase_desc { }; struct aspeed_sdhci_pdata { + unsigned int clk_div_start; const struct aspeed_sdhci_phase_desc *phase_desc; size_t nr_phase_descs; }; @@ -200,10 +201,13 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pltfm_host *pltfm_host; unsigned long parent, bus; + struct aspeed_sdhci *sdhci; int div; u16 clk; pltfm_host = sdhci_priv(host); + sdhci = sdhci_pltfm_priv(pltfm_host); + parent = clk_get_rate(pltfm_host->clk); sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); @@ -214,7 +218,23 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) if (WARN_ON(clock > host->max_clk)) clock = host->max_clk; - for (div = 2; div < 256; div *= 2) { + /* + * Regarding the AST2600: + * + * If (EMMC12C[7:6], EMMC12C[15:8] == 0) then + * period of SDCLK = period of SDMCLK. + * + * If (EMMC12C[7:6], EMMC12C[15:8] != 0) then + * period of SDCLK = period of SDMCLK * 2 * (EMMC12C[7:6], EMMC[15:8]) + * + * If you keep EMMC12C[7:6] = 0 and EMMC12C[15:8] as one-hot, + * 0x1/0x2/0x4/etc, you will find it is compatible to AST2400 or AST2500 + * + * Keep the one-hot behaviour for backwards compatibility except for + * supporting the value 0 in (EMMC12C[7:6], EMMC12C[15:8]), and capture + * the 0-value capability in clk_div_start. + */ + for (div = sdhci->pdata->clk_div_start; div < 256; div *= 2) { bus = parent / div; if (bus <= clock) break; @@ -316,6 +336,10 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) int ret; aspeed_pdata = of_device_get_match_data(&pdev->dev); + if (!aspeed_pdata) { + dev_err(&pdev->dev, "Missing platform configuration data\n"); + return -EINVAL; + } host = sdhci_pltfm_init(pdev, &aspeed_sdhci_pdata, sizeof(*dev)); if (IS_ERR(host)) @@ -334,7 +358,7 @@ static int aspeed_sdhci_probe(struct platform_device *pdev) else if (slot >= 2) return -EINVAL; - if (dev->pdata && slot < dev->pdata->nr_phase_descs) { + if (slot < dev->pdata->nr_phase_descs) { dev->phase_desc = &dev->pdata->phase_desc[slot]; } else { dev_info(&pdev->dev, @@ -396,6 +420,10 @@ static int aspeed_sdhci_remove(struct platform_device *pdev) return 0; } +static const struct aspeed_sdhci_pdata ast2400_sdhci_pdata = { + .clk_div_start = 2, +}; + static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = { /* SDHCI/Slot 0 */ [0] = { @@ -426,13 +454,14 @@ static const struct aspeed_sdhci_phase_desc ast2600_sdhci_phase[] = { }; static const struct aspeed_sdhci_pdata ast2600_sdhci_pdata = { + .clk_div_start = 1, .phase_desc = ast2600_sdhci_phase, .nr_phase_descs = ARRAY_SIZE(ast2600_sdhci_phase), }; static const struct of_device_id aspeed_sdhci_of_match[] = { - { .compatible = "aspeed,ast2400-sdhci", }, - { .compatible = "aspeed,ast2500-sdhci", }, + { .compatible = "aspeed,ast2400-sdhci", .data = &ast2400_sdhci_pdata, }, + { .compatible = "aspeed,ast2500-sdhci", .data = &ast2400_sdhci_pdata, }, { .compatible = "aspeed,ast2600-sdhci", .data = &ast2600_sdhci_pdata, }, { } }; From patchwork Fri Dec 18 03:53:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CACC3C2BBCF for ; Fri, 18 Dec 2020 03:56:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82F5923A77 for ; Fri, 18 Dec 2020 03:56:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82F5923A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=udIhQTfNaCSrIO4/f5gz+6FT5Ahsub3Kr/22gxByRRE=; b=nWOnQ+gDozlrIbr9Kcrs3A54j pmY0Eikupx8+kbIya5lA8ZREVmocB+EYSWuyzbaAlWOor2HxNs5r4Tg//U92209kdIxw5JzTXsaaa 9kPft/8MGYgIKLcGNRO8lT8aiDUZBfMvSq7INGCb6w2a/izYn+Ecw18cIy6Sfr9816anFGMVPTIeA iB0Y5eivc8AAhwQ9Cx8ngAQPgWok+Hhn/5JpiyXeihuVTHgo1S4tnCppiLFBwySeMCkY6fpWICcNp 5qZiR45TRwTA7Dri3nnDZd2ew5AJe2iZvkWYXgF/KJBEMc6GTXiEEvheretBri29wJJAXkcplqVYr BgMgUDPKQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qq-0007gr-91; Fri, 18 Dec 2020 03:54:44 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qR-0007YZ-Fq for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:25 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 31A925C00F4; Thu, 17 Dec 2020 22:54:18 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=hVMm4VwyoVE0E 1Ux9HqgKQndPgPApnbPx+tXCVQwpSw=; b=gpfMTTE/U32PUFTes52Qgv/CR1mk1 NM/zsiRxFC67rlwIMMCd1Cp+DC2svIhE34KdjXUmIvKBVMvsRPK03xZNOkeANFn7 ix9Mrld8yp12wVz/xCvOpnSkDcDquynTISCHRqaeta/GkPCqgHV5NgqHGURsBWLt ohkAuohjyHH4W9wd7JXutrpWGYqQwYGz6PLgAHJg8Vbx5TCY7SyDrxB+SCyoeTEl rvxGgkR3ezjVvSVacDTP7XBBwS9hS7WtR5ygfVIVeapWlopaDsEVMop9waSwxytA aBYzDGOgAcFCwo6tcTUzM5GSSTA4Z0w8asuAP1mPk01QTgDU3XYzadwNg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=hVMm4VwyoVE0E1Ux9HqgKQndPgPApnbPx+tXCVQwpSw=; b=F5F/Oran E546fmjMkcj/dza/pZykL3+pY2l7lq+wwrCZhbGusjYqfBtbC65qNBu8rjxQizvQ MDaFDv0QetwqiLRJ7kKjlyjYk+07+CJdC6dF7oOIufqjvSH/S2hNNtpbQ9YQPhLl QW/XgXbHtuSrIEejyl7jNJWqPXQiKkxv1v+QE8hStrOS6UYujizTBeZRiZOFUozb khNFg7G8ENcu+rxomGDNYXIKd4ccqdiFDCQQY7o2oAnls/uX8PxIPIJhSJgcTmqG gyLP7vidFAViSrpntTR5dlKpoAbh8YrWcvbxDctjWaWlD9Jpidv5hk37bfPuM3PT /to6a8vcDGroeA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id D1B951080057; Thu, 17 Dec 2020 22:54:12 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 4/6] mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations Date: Fri, 18 Dec 2020 14:23:36 +1030 Message-Id: <20201218035338.1130849-5-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225419_677651_E432172F X-CRM114-Status: GOOD ( 17.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Converting degrees of phase to logic delays is irritating to test on hardware, so lets exercise the function using KUnit. Signed-off-by: Andrew Jeffery --- drivers/mmc/host/Kconfig | 14 ++++ drivers/mmc/host/Makefile | 1 + drivers/mmc/host/sdhci-of-aspeed-test.c | 100 ++++++++++++++++++++++++ 3 files changed, 115 insertions(+) create mode 100644 drivers/mmc/host/sdhci-of-aspeed-test.c diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 596f32637315..d6f00d1d6251 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -168,6 +168,20 @@ config MMC_SDHCI_OF_ASPEED If unsure, say N. +config MMC_SDHCI_OF_ASPEED_TEST + bool "Tests for the ASPEED SDHCI driver" + depends on MMC_SDHCI_OF_ASPEED && KUNIT=y + help + Enable KUnit tests for the ASPEED SDHCI driver. Select this + option only if you will boot the kernel for the purpose of running + unit tests (e.g. under UML or qemu). + + The KUnit tests generally exercise parts of the driver that do not + directly touch the hardware, for example, the phase correction + calculations. + + If unsure, say N. + config MMC_SDHCI_OF_AT91 tristate "SDHCI OF support for the Atmel SDMMC controller" depends on MMC_SDHCI_PLTFM diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 451c25fc2c69..3ee59d5802cf 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -90,6 +90,7 @@ obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o obj-$(CONFIG_MMC_SDHCI_OF_ARASAN) += sdhci-of-arasan.o obj-$(CONFIG_MMC_SDHCI_OF_ASPEED) += sdhci-of-aspeed.o +obj-$(CONFIG_MMC_SDHCI_OF_ASPEED_TEST) += sdhci-of-aspeed-test.o obj-$(CONFIG_MMC_SDHCI_OF_AT91) += sdhci-of-at91.o obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o diff --git a/drivers/mmc/host/sdhci-of-aspeed-test.c b/drivers/mmc/host/sdhci-of-aspeed-test.c new file mode 100644 index 000000000000..fb79b278fb81 --- /dev/null +++ b/drivers/mmc/host/sdhci-of-aspeed-test.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* Copyright (C) 2020 IBM Corp. */ + +#include + +#include "sdhci-of-aspeed.c" + +static void aspeed_sdhci_phase_ddr52(struct kunit *test) +{ + int rate = 52000000; + + KUNIT_EXPECT_EQ(test, 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 0)); + KUNIT_EXPECT_EQ(test, 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 1)); + KUNIT_EXPECT_EQ(test, 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 2)); + KUNIT_EXPECT_EQ(test, 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 3)); + KUNIT_EXPECT_EQ(test, 2, + aspeed_sdhci_phase_to_tap(NULL, rate, 4)); + KUNIT_EXPECT_EQ(test, 3, + aspeed_sdhci_phase_to_tap(NULL, rate, 5)); + KUNIT_EXPECT_EQ(test, 14, + aspeed_sdhci_phase_to_tap(NULL, rate, 23)); + KUNIT_EXPECT_EQ(test, 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 24)); + KUNIT_EXPECT_EQ(test, 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 25)); + + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 180)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 181)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 182)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 183)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 2, + aspeed_sdhci_phase_to_tap(NULL, rate, 184)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 3, + aspeed_sdhci_phase_to_tap(NULL, rate, 185)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 14, + aspeed_sdhci_phase_to_tap(NULL, rate, 203)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 204)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 205)); +} + +static void aspeed_sdhci_phase_hs200(struct kunit *test) +{ + int rate = 200000000; + + KUNIT_EXPECT_EQ(test, 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 0)); + KUNIT_EXPECT_EQ(test, 0, + aspeed_sdhci_phase_to_tap(NULL, rate, 5)); + KUNIT_EXPECT_EQ(test, 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 6)); + KUNIT_EXPECT_EQ(test, 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 7)); + KUNIT_EXPECT_EQ(test, 14, + aspeed_sdhci_phase_to_tap(NULL, rate, 89)); + KUNIT_EXPECT_EQ(test, 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 90)); + KUNIT_EXPECT_EQ(test, 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 91)); + KUNIT_EXPECT_EQ(test, 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 96)); + + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK, + aspeed_sdhci_phase_to_tap(NULL, rate, 180)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK, + aspeed_sdhci_phase_to_tap(NULL, rate, 185)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 186)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 1, + aspeed_sdhci_phase_to_tap(NULL, rate, 187)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 14, + aspeed_sdhci_phase_to_tap(NULL, rate, 269)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 270)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 271)); + KUNIT_EXPECT_EQ(test, (int)ASPEED_SDHCI_TAP_PARAM_INVERT_CLK | 15, + aspeed_sdhci_phase_to_tap(NULL, rate, 276)); +} + +static struct kunit_case aspeed_sdhci_test_cases[] = { + KUNIT_CASE(aspeed_sdhci_phase_ddr52), + KUNIT_CASE(aspeed_sdhci_phase_hs200), + {} +}; + +static struct kunit_suite aspeed_sdhci_test_suite = { + .name = "sdhci-of-aspeed", + .test_cases = aspeed_sdhci_test_cases, +}; +kunit_test_suite(aspeed_sdhci_test_suite); From patchwork Fri Dec 18 03:53:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 983A5C4361B for ; Fri, 18 Dec 2020 03:56:05 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 435A323A77 for ; Fri, 18 Dec 2020 03:56:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 435A323A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kIxbdxKpjXR+6a4H8u76edVbnUieDUkjZ5cNetpzqaY=; b=saIz55w+OcoEtewlwdfZvTdtB 1Z4hTiSewXNmYf1szgqlJWSEOcEC9tlNQjl7cggN3GA8CP3xsvOBR6lxxhL7EJ2cxj+PqG2amYY08 0qw0hRMbRiLIvcen8nOXB+rvrrjngsxOEFQNrA9q7Jqsf0/XQo/BTY7r6dP5YWR/M+C0x9xL9fcGD UVS/IihHygN0rgkqmGQlQK1L+t/uh1CZPqtYjOhZ4QWKx+nImSp6N9ZD9+5WSdIh+caEY+u2v22Cj LlYGcxVzev4yP3080LGOSLGSHG4QhJ0GB6ak9IHw/bbLKPJr16Jjt9QDaxF2MYdV463TlTGlGpUgS Ki68Bw5CA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6r2-0007l4-6a; Fri, 18 Dec 2020 03:54:56 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qX-0007bP-Pp for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:30 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 71C3C5C010D; Thu, 17 Dec 2020 22:54:25 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=3IBtn55EkJHpw BMNVFMzrRkc/Dri1oJfvyFIx80EIec=; b=I599+f2ishGKydUibrqBNovepABuc Klh68PJWbwbq/NchtlJvvkqhhsL+KbS7LKOIHaVMjoXqA2GZiDMBJ1lqVMz2jcye Ho2HEs9bj3jHFwbwnIYXXVs+4To+VeO28JzsmrGd+QlOjo/nVAPFqgJDiVqhpEkT l6JtRsRgE1oOfpjrPdj/BW/tV4dhLqVJf4T8jtXLPKgErxj1oEGR7t/mK9wUoBjS bbWlmOwo9YKo02PhbOl+sxQwFJMOM1PmupgbbQnRM5zqTAqcx765y2BPyvW8htuN j6+Iu9wU2VZVSuFyWT+rrBRDg9XV57Gb2YW9QCkRVKravRUIicfmEje6g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=3IBtn55EkJHpwBMNVFMzrRkc/Dri1oJfvyFIx80EIec=; b=No0JzjlS VUq20GiuVnRLf97riXOVRZ/jmJXwEQfL/5F6LSAS0l4JxiMMEpwvAFqc5c6lZotL JnIjyCSzMOS4QPUEevFMabkPObLQViCYAT4RjU1QQyqQzsrHNcCILM5uHstppJ2z 9UoS5bJBbcrdj1zAvG8zEzOU6tK74UY3GzlCNXPhXw1TsWTzjwEfB3hEEe7aIutV ii/oImwla6tCOCiCsMHx19bzZ0m1hH6lTi90WK5U87f7jmgM3PANY58ZfFJU9DP9 9EhFCoBTqeMjLQSVmP2Csp8l+7a3ASXHZKC1/PIeqpXSygRsDnMyBWakaCGtCQQi YZr08Cv1GRKPTw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgepvdenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id B02D4108005B; Thu, 17 Dec 2020 22:54:18 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 5/6] MAINTAINERS: Add entry for the ASPEED SD/MMC driver Date: Fri, 18 Dec 2020 14:23:37 +1030 Message-Id: <20201218035338.1130849-6-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225425_960719_E008819C X-CRM114-Status: UNSURE ( 9.33 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add myself as the maintainer. Signed-off-by: Andrew Jeffery --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index e451dcce054f..eae4322aae67 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2826,6 +2826,15 @@ F: Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic. F: drivers/irqchip/irq-aspeed-scu-ic.c F: include/dt-bindings/interrupt-controller/aspeed-scu-ic.h +ASPEED SD/MMC DRIVER +M: Andrew Jeffery +L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) +L: openbmc@lists.ozlabs.org (moderated for non-subscribers) +L: linux-mmc@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +F: drivers/mmc/host/sdhci-of-aspeed* + ASPEED VIDEO ENGINE DRIVER M: Eddie James L: linux-media@vger.kernel.org From patchwork Fri Dec 18 03:53:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11981111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BB70C4361B for ; Fri, 18 Dec 2020 03:56:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1858623A77 for ; Fri, 18 Dec 2020 03:56:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1858623A77 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Xx/pzH5kyqBcn74ZE2mnLGq1q8J0bQE+sbN779NgO9M=; b=HHa4AVa2RoAZGxTXe/RSrCkQQ I1OqcsDqdsk5Do1MXPOPy+j+feuA3BkNsU3nRGdhhM4dqFd4rQsnfZFdPNXaWQpHaBPdEe22kXBuO YBZ4sXPdDixbzuXVp0aKtB/b2J7RDBIMQJ0rEPbCoppFBFwjWfcehoLQGBH/phIT8EJw9dYNJrea4 5OSSJyQebbcPyIbr5QOuFct/FGUuOIxQUc3WI6agsbe2KixxLdnDmctqgD3yPyEVQtNOIdGOUFhje ddKgGXTdiE0BPz2ejd1hPBlQMa3isxVxLTJPCzuTijfgI6Vf8ByfR2s4rXmpFkiJhetbqjLRw/xt+ DJ1/ccx/A==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6r6-0007n0-Q3; Fri, 18 Dec 2020 03:55:00 +0000 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kq6qc-0007cb-ON for linux-arm-kernel@lists.infradead.org; Fri, 18 Dec 2020 03:54:32 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 945275C0115; Thu, 17 Dec 2020 22:54:30 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 17 Dec 2020 22:54:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=Q1FwOOJn9VJrF xg4mu6zSOR772E69sWYabsnaXN/CgI=; b=dqc7UpKHs8arqoIaKPwepMkO+ZqbE 74vwIesaPS2J60ELgm9Ggg65Q2TqpZ8RRU+X1nWN6cO6SvAF3xrZWNnmwsD+wO46 BKeGZ3roRDy31zwvBR/zJsVn1l1YQYMEEIEAxwpYjRlQ7k22GabHkBGOA7CNGNRm IT/VnGwSBuiZedloqDNkYzjTE2gWgdqsqymFk7vSgF/OYc9vQixDt1nM62qDNrWw jSaSg7EPx4UYGaTvFl/2o3zFeS8PqAbQ0SkKTh5naXCkaXKnmuQhD/2BTChqvM+v Kae7/kjWdlaq6IaHoUTO5rRgq0TlrniKNZbFemuHGnkeHoDKKo26cmQdg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=Q1FwOOJn9VJrFxg4mu6zSOR772E69sWYabsnaXN/CgI=; b=OF9XOxZu oR7r0fVEWhGVNhedSC1BYAJ2Ao/7t+R3BhpwgG0uHJh7pZnMpvYc2gvFWGU4IwIP O2pzwG0fbseOrBS1w7xkoXOjTNVhJoY5g/8CZSSQwYjUd8mKnKgBgNchqcXwHcOH a65GluG3jdSqET6HKsRmgFMunLPfKJ5zVRVjYCfNiZUxqzqsnkktWV9gtHqohLiu kCkBD7RoQSLhSYaA5cNM+iDObA4ha2UJFPFsiGlzUVvFcd/9ZDhsc7XDOKO1IIy8 3Cq0Xy2+b4KGRuxTAYH2qV0PpcIRhuD5PSfkSj+cdr+FZypZCGNtlUimRmwzjgUo OkV3pDQoAgDECQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudelhedgieegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecuggftrfgrthhtvghrnhepjefgvdevheetkeevgeegleelgfelte etjeffleffvdduudevieffgeetleevhfetnecukfhppeduvddtrddvtddrjeejrddvuddu necuvehluhhsthgvrhfuihiivgepfeenucfrrghrrghmpehmrghilhhfrhhomheprghnug hrvgifsegrjhdrihgurdgruh X-ME-Proxy: Received: from localhost.localdomain (unknown [120.20.77.211]) by mail.messagingengine.com (Postfix) with ESMTPA id E5FF7108005B; Thu, 17 Dec 2020 22:54:25 -0500 (EST) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH v6 6/6] ARM: dts: rainier: Add eMMC clock phase compensation Date: Fri, 18 Dec 2020 14:23:38 +1030 Message-Id: <20201218035338.1130849-7-andrew@aj.id.au> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201218035338.1130849-1-andrew@aj.id.au> References: <20201218035338.1130849-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_225431_155190_AE71AC06 X-CRM114-Status: GOOD ( 10.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, ulf.hansson@linaro.org, ryan_chen@aspeedtech.com, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, robh+dt@kernel.org, joel@jms.id.au, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Determined by scope measurements at speed. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index 21ae880c7530..ab8d37d49f30 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -186,6 +186,7 @@ &pinctrl_emmc_default { &emmc { status = "okay"; + clk-phase-mmc-hs200 = <180>, <180>; }; &fsim0 {