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Wed, 01 Aug 2018 03:04:10 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, linus.walleij@linaro.org Subject: [PATCH 1/5] meson_sm: add TEST_N pin direction call Date: Wed, 1 Aug 2018 12:04:08 +0200 Message-Id: <1533117848-28194-1-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180801_030424_280457_3B47A15D X-CRM114-Status: GOOD ( 13.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic Meson GX and AXG has a Secure Monitor call to change the TEST_N pin gpio direction, add it in the supported call list. Signed-off-by: Neil Armstrong --- drivers/firmware/meson/meson_sm.c | 1 + include/linux/firmware/meson/meson_sm.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/firmware/meson/meson_sm.c b/drivers/firmware/meson/meson_sm.c index 0ec2ca8..f407001 100644 --- a/drivers/firmware/meson/meson_sm.c +++ b/drivers/firmware/meson/meson_sm.c @@ -48,6 +48,7 @@ struct meson_sm_chip gxbb_chip = { CMD(SM_EFUSE_READ, 0x82000030), CMD(SM_EFUSE_WRITE, 0x82000031), CMD(SM_EFUSE_USER_MAX, 0x82000033), + CMD(SM_TEST_N_DIR, 0x82000046), { /* sentinel */ }, }, }; diff --git a/include/linux/firmware/meson/meson_sm.h b/include/linux/firmware/meson/meson_sm.h index 37a5eae..133b1c3 100644 --- a/include/linux/firmware/meson/meson_sm.h +++ b/include/linux/firmware/meson/meson_sm.h @@ -17,6 +17,7 @@ enum { SM_EFUSE_READ, SM_EFUSE_WRITE, SM_EFUSE_USER_MAX, + SM_TEST_N_DIR, }; struct meson_sm_firmware; From patchwork Wed Aug 1 10:00:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 10552019 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C671115E9 for ; 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Wed, 01 Aug 2018 03:00:30 -0700 (PDT) Received: from bender.baylibre.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id u7-v6sm6317067wmd.46.2018.08.01.03.00.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Aug 2018 03:00:29 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, linus.walleij@linaro.org Subject: [PATCH 2/5] pinctrl: meson: Add support to set direction with a secure monitor call Date: Wed, 1 Aug 2018 12:00:20 +0200 Message-Id: <1533117623-27856-3-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180801_030042_954496_599E80CA X-CRM114-Status: GOOD ( 19.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic Meson GX and AXG SoCs needs to do a Secure Monitor call to set the TEST_N pin direction. This patch adds a "smc" boolean to the bank structure to differentiate the TEST_N bank and call the Secure Monitor in the _input/_output functions. Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 1 + drivers/pinctrl/meson/pinctrl-meson.c | 31 ++++++++++++++++++++++++++----- drivers/pinctrl/meson/pinctrl-meson.h | 10 +++++++++- 3 files changed, 36 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index c80951d..1b90470 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -8,6 +8,7 @@ menuconfig PINCTRL_MESON select GPIOLIB select OF_GPIO select REGMAP_MMIO + select MESON_SM if PINCTRL_MESON diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 29a458d..8e445aa 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -54,6 +54,7 @@ #include #include #include +#include #include "../core.h" #include "../pinctrl-utils.h" @@ -99,8 +100,14 @@ static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin, { struct meson_reg_desc *desc = &bank->regs[reg_type]; - *reg = desc->reg * 4; - *bit = desc->bit + pin - bank->first; + /* TEST_N pin direction needs to be set using a Secure Monitor call */ + if (reg_type == REG_DIR && bank->smc) { + *reg = desc->reg; + *bit = desc->bit; + } else { + *reg = desc->reg * 4; + *bit = desc->bit + pin - bank->first; + } } static int meson_get_groups_count(struct pinctrl_dev *pcdev) @@ -342,6 +349,12 @@ static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) meson_calc_reg_and_bit(bank, gpio, REG_DIR, ®, &bit); + /* TEST_N pin direction needs to be set using a Secure Monitor call */ + if (bank->smc) { + u32 smc_ret = 0; + return meson_sm_call(reg, &smc_ret, 0, 0, 0, 0, 0); + } + return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit)); } @@ -358,9 +371,17 @@ static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, return ret; meson_calc_reg_and_bit(bank, gpio, REG_DIR, ®, &bit); - ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0); - if (ret) - return ret; + /* TEST_N pin direction needs to be set using a Secure Monitor call */ + if (bank->smc) { + u32 smc_ret = 0; + ret = meson_sm_call(reg, &smc_ret, bit, 0, 0, 0, 0); + if (ret) + return ret; + } else { + ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0); + if (ret) + return ret; + } meson_calc_reg_and_bit(bank, gpio, REG_OUT, ®, &bit); return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 12a39110..d32e9a9 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -92,6 +92,7 @@ struct meson_bank { const char *name; unsigned int first; unsigned int last; + bool smc; /* Direction needs to use a Secure Monitor call */ int irq_first; int irq_last; struct meson_reg_desc regs[NUM_REG]; @@ -131,11 +132,12 @@ struct meson_pinctrl { .num_groups = ARRAY_SIZE(fn ## _groups), \ } -#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ +#define __BANK(n, f, l, sm, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ { \ .name = n, \ .first = f, \ .last = l, \ + .smc = sm, \ .irq_first = fi, \ .irq_last = li, \ .regs = { \ @@ -147,6 +149,12 @@ struct meson_pinctrl { }, \ } +#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ + __BANK(n, f, l, false, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) + +#define BANK_SMC(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ + __BANK(n, f, l, true, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) + #define MESON_PIN(x) PINCTRL_PIN(x, #x) /* Common pmx functions */ From patchwork Wed Aug 1 10:00:21 2018 Content-Type: text/plain; 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Wed, 01 Aug 2018 03:00:31 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, linus.walleij@linaro.org Subject: [PATCH 3/5] meson: pinctrl-gxbb: add support for TEST_N pin Date: Wed, 1 Aug 2018 12:00:21 +0200 Message-Id: <1533117623-27856-4-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180801_030040_110394_7BAE8913 X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic Meson GXBB SoCs needs a Secure Monitor call to set the TEST_N direction, add a special bank to support this pin. Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 2c97a2e0..c0954be 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -15,6 +15,7 @@ #include #include "pinctrl-meson.h" #include "pinctrl-meson8-pmx.h" +#include static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOZ_0), @@ -823,6 +824,9 @@ static struct meson_bank meson_gxbb_periphs_banks[] = { static struct meson_bank meson_gxbb_aobus_banks[] = { /* name first last irq pullen pull dir out in */ BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), + /* This PIN Direction must be set using a SMC call, so dir reg offset is the sm call */ + BANK_SMC("TEST", GPIO_TEST_N, GPIO_TEST_N, + -1, -1, 0, 30, 0, 14, SM_TEST_N_DIR, 1, 0, 31, 1, 31), }; static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { From patchwork Wed Aug 1 10:00:22 2018 Content-Type: text/plain; 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Wed, 01 Aug 2018 03:00:32 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, linus.walleij@linaro.org Subject: [PATCH 4/5] meson: pinctrl-gxl: add support for TEST_N pin Date: Wed, 1 Aug 2018 12:00:22 +0200 Message-Id: <1533117623-27856-5-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180801_030045_346831_4F72340B X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic Meson GXL & GXM SoCs needs a Secure Monitor call to set the TEST_N direction, add a special bank to support this pin. Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 7dae1d7..d4dc42f 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -15,6 +15,7 @@ #include #include "pinctrl-meson.h" #include "pinctrl-meson8-pmx.h" +#include static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { MESON_PIN(GPIOZ_0), @@ -808,6 +809,9 @@ static struct meson_bank meson_gxl_periphs_banks[] = { static struct meson_bank meson_gxl_aobus_banks[] = { /* name first last irq pullen pull dir out in */ BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), + /* This PIN Direction must be set using a SMC call, so dir reg offset is the sm call */ + BANK_SMC("TEST", GPIO_TEST_N, GPIO_TEST_N, + -1, -1, 0, 30, 0, 14, SM_TEST_N_DIR, 1, 0, 31, 1, 31), }; static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { From patchwork Wed Aug 1 10:00:23 2018 Content-Type: text/plain; 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Wed, 01 Aug 2018 03:00:33 -0700 (PDT) From: Neil Armstrong To: khilman@baylibre.com, linus.walleij@linaro.org Subject: [PATCH 5/5] meson: pinctrl-axg: add support for TEST_N pin Date: Wed, 1 Aug 2018 12:00:23 +0200 Message-Id: <1533117623-27856-6-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> References: <1533117623-27856-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180801_030040_107766_078FB56C X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Amlogic Meson AXG SoCs needs a Secure Monitor call to set the TEST_N direction, add a special bank to support this pin. Signed-off-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson-axg.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c index 46a0918..12615d8 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-axg.c +++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c @@ -10,6 +10,7 @@ #include #include "pinctrl-meson.h" #include "pinctrl-meson-axg-pmx.h" +#include static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = { MESON_PIN(GPIOZ_0), @@ -1006,6 +1007,9 @@ static struct meson_bank meson_axg_periphs_banks[] = { static struct meson_bank meson_axg_aobus_banks[] = { /* name first last irq pullen pull dir out in */ BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), + /* This PIN Direction must be set using a SMC call, so dir reg offset is the sm call */ + BANK_SMC("TEST", GPIO_TEST_N, GPIO_TEST_N, + -1, -1, 0, 30, 0, 14, SM_TEST_N_DIR, 1, 0, 31, 1, 31), }; static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {