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Mon, 21 Dec 2020 00:36:59 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/7] perf arm-spe: Remove unused enum value ARM_SPE_PER_CPU_MMAPS Date: Mon, 21 Dec 2020 16:35:51 +0800 Message-Id: <20201221083557.27642-2-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033702_248335_DD7660A1 X-CRM114-Status: GOOD ( 13.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The enum value 'ARM_SPE_PER_CPU_MMAPS' is never used so remove it. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.h | 1 - 1 file changed, 1 deletion(-) diff --git a/tools/perf/util/arm-spe.h b/tools/perf/util/arm-spe.h index 98d3235781c3..105ce0ea0a01 100644 --- a/tools/perf/util/arm-spe.h +++ b/tools/perf/util/arm-spe.h @@ -11,7 +11,6 @@ enum { ARM_SPE_PMU_TYPE, - ARM_SPE_PER_CPU_MMAPS, ARM_SPE_AUXTRACE_PRIV_MAX, }; From patchwork Mon Dec 21 08:35:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 11984341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6066C433E0 for ; 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Mon, 21 Dec 2020 00:37:03 -0800 (PST) Received: from localhost ([45.137.216.7]) by smtp.gmail.com with ESMTPSA id a18sm15449664pfg.107.2020.12.21.00.37.02 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 21 Dec 2020 00:37:03 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/7] perf arm-spe: Store TSC parameters in auxtrace info Date: Mon, 21 Dec 2020 16:35:52 +0800 Message-Id: <20201221083557.27642-3-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033705_762675_FE06CBA6 X-CRM114-Status: GOOD ( 18.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The TSC parameters are used for conversion between arch timer counter and kernel timestamp, this patch stores the parameters into the struct perf_record_auxtrace_info, and it is saved in perf data file. Signed-off-by: Leo Yan --- tools/perf/arch/arm64/util/arm-spe.c | 23 +++++++++++++++++++++++ tools/perf/util/arm-spe.h | 6 ++++++ 2 files changed, 29 insertions(+) diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c index 414c8a5584b1..dd940cf16f49 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -15,7 +15,9 @@ #include "../../../util/event.h" #include "../../../util/evsel.h" #include "../../../util/evlist.h" +#include "../../../util/mmap.h" #include "../../../util/session.h" +#include "../../../util/tsc.h" #include // page_size #include "../../../util/pmu.h" #include "../../../util/debug.h" @@ -47,6 +49,9 @@ static int arm_spe_info_fill(struct auxtrace_record *itr, struct arm_spe_recording *sper = container_of(itr, struct arm_spe_recording, itr); struct perf_pmu *arm_spe_pmu = sper->arm_spe_pmu; + struct perf_event_mmap_page *pc; + struct perf_tsc_conversion tc = { .time_mult = 0, }; + int err; if (priv_size != ARM_SPE_AUXTRACE_PRIV_SIZE) return -EINVAL; @@ -54,8 +59,26 @@ static int arm_spe_info_fill(struct auxtrace_record *itr, if (!session->evlist->core.nr_mmaps) return -EINVAL; + pc = session->evlist->mmap[0].core.base; + if (pc) { + err = perf_read_tsc_conversion(pc, &tc); + if (err) { + if (err != -EOPNOTSUPP) + return err; + } + + if (!tc.time_mult) + ui__warning("Arm SPE: arch timer not available\n"); + } + auxtrace_info->type = PERF_AUXTRACE_ARM_SPE; auxtrace_info->priv[ARM_SPE_PMU_TYPE] = arm_spe_pmu->type; + auxtrace_info->priv[ARM_SPE_TIME_SHIFT] = tc.time_shift; + auxtrace_info->priv[ARM_SPE_TIME_MULT] = tc.time_mult; + auxtrace_info->priv[ARM_SPE_TIME_ZERO] = tc.time_zero; + auxtrace_info->priv[ARM_SPE_TIME_CYCLES] = tc.time_cycles; + auxtrace_info->priv[ARM_SPE_TIME_MASK] = tc.time_mask; + auxtrace_info->priv[ARM_SPE_CAP_USER_TIME_SHORT] = tc.cap_user_time_short; return 0; } diff --git a/tools/perf/util/arm-spe.h b/tools/perf/util/arm-spe.h index 105ce0ea0a01..5bf3e838d226 100644 --- a/tools/perf/util/arm-spe.h +++ b/tools/perf/util/arm-spe.h @@ -11,6 +11,12 @@ enum { ARM_SPE_PMU_TYPE, + ARM_SPE_TIME_SHIFT, + ARM_SPE_TIME_MULT, + ARM_SPE_TIME_ZERO, + ARM_SPE_TIME_CYCLES, + ARM_SPE_TIME_MASK, + ARM_SPE_CAP_USER_TIME_SHORT, ARM_SPE_AUXTRACE_PRIV_MAX, }; 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Mon, 21 Dec 2020 00:37:06 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/7] perf arm-spe: Dump TSC parameters Date: Mon, 21 Dec 2020 16:35:53 +0800 Message-Id: <20201221083557.27642-4-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033710_533497_C7F943B3 X-CRM114-Status: GOOD ( 18.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The TSC parameters are stored in auxtrace info, this patch dumps these parameters for reporting the raw data. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 8901a1656a41..a504ceec2de6 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -26,6 +26,7 @@ #include "symbol.h" #include "thread.h" #include "thread-stack.h" +#include "tsc.h" #include "tool.h" #include "util/synthetic-events.h" @@ -45,6 +46,8 @@ struct arm_spe { struct machine *machine; u32 pmu_type; + struct perf_tsc_conversion tc; + u8 timeless_decoding; u8 data_queued; @@ -722,14 +725,23 @@ static bool arm_spe_evsel_is_auxtrace(struct perf_session *session, static const char * const arm_spe_info_fmts[] = { [ARM_SPE_PMU_TYPE] = " PMU Type %"PRId64"\n", + [ARM_SPE_TIME_SHIFT] = " Time Shift %"PRIu64"\n", + [ARM_SPE_TIME_MULT] = " Time Muliplier %"PRIu64"\n", + [ARM_SPE_TIME_ZERO] = " Time Zero %"PRIu64"\n", + [ARM_SPE_TIME_CYCLES] = " Time Cycles %"PRIu64"\n", + [ARM_SPE_TIME_MASK] = " Time Mask %#"PRIx64"\n", + [ARM_SPE_CAP_USER_TIME_SHORT] = " Cap Time Short %"PRId64"\n", }; static void arm_spe_print_info(__u64 *arr) { + int i; + if (!dump_trace) return; - fprintf(stdout, arm_spe_info_fmts[ARM_SPE_PMU_TYPE], arr[ARM_SPE_PMU_TYPE]); + for (i = 0; i < ARM_SPE_AUXTRACE_PRIV_MAX; i++) + fprintf(stdout, arm_spe_info_fmts[i], arr[i]); } struct arm_spe_synth { @@ -934,6 +946,12 @@ int arm_spe_process_auxtrace_info(union perf_event *event, spe->machine = &session->machines.host; /* No kvm support */ spe->auxtrace_type = auxtrace_info->type; spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE]; + spe->tc.time_shift = auxtrace_info->priv[ARM_SPE_TIME_SHIFT]; + spe->tc.time_mult = auxtrace_info->priv[ARM_SPE_TIME_MULT]; + spe->tc.time_zero = auxtrace_info->priv[ARM_SPE_TIME_ZERO]; + spe->tc.time_cycles = auxtrace_info->priv[ARM_SPE_TIME_CYCLES]; + spe->tc.time_mask = auxtrace_info->priv[ARM_SPE_TIME_MASK]; + spe->tc.cap_user_time_short = auxtrace_info->priv[ARM_SPE_CAP_USER_TIME_SHORT]; spe->timeless_decoding = arm_spe__is_timeless_decoding(spe); spe->auxtrace.process_event = arm_spe_process_event; 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Mon, 21 Dec 2020 00:37:10 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/7] perf arm-spe: Convert event kernel time to counter value Date: Mon, 21 Dec 2020 16:35:54 +0800 Message-Id: <20201221083557.27642-5-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033712_749370_ADC0FE68 X-CRM114-Status: GOOD ( 17.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When handle a perf event, Arm SPE decoder needs to decide if this perf event is earlier or later than the samples from Arm SPE trace data; to do comparision, it needs to use the same unit for the time. This patch converts the event kernel time to arch timer's counter value, thus it can be used to compare with counter value contained in Arm SPE Timestamp packet. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index a504ceec2de6..bc512c3479f7 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -588,7 +588,7 @@ static int arm_spe_process_event(struct perf_session *session, } if (sample->time && (sample->time != (u64) -1)) - timestamp = sample->time; + timestamp = perf_time_to_tsc(sample->time, &spe->tc); else timestamp = 0; From patchwork Mon Dec 21 08:35:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 11984347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02CE2C433E0 for ; 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Mon, 21 Dec 2020 00:37:14 -0800 (PST) Received: from localhost ([45.137.216.7]) by smtp.gmail.com with ESMTPSA id gb9sm1002019pjb.40.2020.12.21.00.37.13 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 21 Dec 2020 00:37:13 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/7] perf arm-spe: Assign kernel time to synthesized event Date: Mon, 21 Dec 2020 16:35:55 +0800 Message-Id: <20201221083557.27642-6-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033716_315413_ED8E4868 X-CRM114-Status: GOOD ( 17.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In current code, it assigns the arch timer counter to the synthesized samples Arm SPE trace, thus the samples don't contain the kernel time but only contain the raw counter value. To fix the issue, this patch converts the timer counter to kernel time and assigns it to sample timestamp. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index bc512c3479f7..2b008b973387 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -232,7 +232,7 @@ static void arm_spe_prep_sample(struct arm_spe *spe, struct arm_spe_record *record = &speq->decoder->record; if (!spe->timeless_decoding) - sample->time = speq->timestamp; + sample->time = tsc_to_perf_time(record->timestamp, &spe->tc); sample->ip = record->from_ip; sample->cpumode = arm_spe_cpumode(spe, sample->ip); From patchwork Mon Dec 21 08:35:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 11984349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C22D3C433DB for ; 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Mon, 21 Dec 2020 00:37:17 -0800 (PST) Received: from localhost ([45.137.216.7]) by smtp.gmail.com with ESMTPSA id x15sm15980340pfa.80.2020.12.21.00.37.16 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 21 Dec 2020 00:37:17 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 6/7] perf arm-spe: Bail out if the trace is later than perf event Date: Mon, 21 Dec 2020 16:35:56 +0800 Message-Id: <20201221083557.27642-7-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033721_099441_E3C41BDE X-CRM114-Status: GOOD ( 22.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org It's possible that record in Arm SPE trace is later than perf event and vice versa. This asks to correlate the perf events and Arm SPE synthesized events to be processed in the manner of correct timing. To achieve the time ordering, this patch reverses the flow, it firstly calls arm_spe_sample() and then calls arm_spe_decode(). By comparing the timestamp value and detect the perf event is coming earlier than Arm SPE trace data, it bails out from the decoding loop, the last record is pushed into auxtrace stack and is deferred to generate sample. To track the timestamp, everytime it updates timestamp for the latest record. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 37 ++++++++++++++++++++++++++++++++++--- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 2b008b973387..6bf2e4ff5342 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -353,12 +353,36 @@ static int arm_spe_sample(struct arm_spe_queue *speq) static int arm_spe_run_decoder(struct arm_spe_queue *speq, u64 *timestamp) { struct arm_spe *spe = speq->spe; + struct arm_spe_record *record; int ret; if (!spe->kernel_start) spe->kernel_start = machine__kernel_start(spe->machine); while (1) { + /* + * The usual logic is firstly to decode the packets, and then + * based the record to synthesize sample; but here the flow is + * reversed: it calls arm_spe_sample() for synthesizing samples + * prior to arm_spe_decode(). + * + * Two reasons for this code logic: + * 1. Firstly, when setup queue in arm_spe__setup_queue(), it + * has decoded trace data and generated a record, but the record + * is left to generate sample until run to here, so it's correct + * to synthesize sample for the left record. + * 2. After decoding trace data, it needs to compare the record + * timestamp with the coming perf event, if the record timestamp + * is later than the perf event, it needs bail out and pushs the + * record into auxtrace heap, thus the record can be deferred to + * synthesize sample until run to here at the next time; so this + * can correlate samples between Arm SPE trace data and other + * perf events with correct time ordering. + */ + ret = arm_spe_sample(speq); + if (ret) + return ret; + ret = arm_spe_decode(speq->decoder); if (!ret) { pr_debug("No data or all data has been processed.\n"); @@ -372,10 +396,17 @@ static int arm_spe_run_decoder(struct arm_spe_queue *speq, u64 *timestamp) if (ret < 0) continue; - ret = arm_spe_sample(speq); - if (ret) - return ret; + record = &speq->decoder->record; + /* Update timestamp for the last record */ + if (record->timestamp > speq->timestamp) + speq->timestamp = record->timestamp; + + /* + * If the timestamp of the queue is later than timestamp of the + * coming perf event, bail out so can allow the perf event to + * be processed ahead. + */ if (!spe->timeless_decoding && speq->timestamp >= *timestamp) { *timestamp = speq->timestamp; return 0; From patchwork Mon Dec 21 08:35:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 11984351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE395C433E0 for ; Mon, 21 Dec 2020 08:38:59 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8B32722BF3 for ; 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Mon, 21 Dec 2020 00:37:20 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Ian Rogers , James Clark , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 7/7] perf arm-spe: Don't wait for PERF_RECORD_EXIT event Date: Mon, 21 Dec 2020 16:35:57 +0800 Message-Id: <20201221083557.27642-8-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201221083557.27642-1-leo.yan@linaro.org> References: <20201221083557.27642-1-leo.yan@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_033723_117836_AED988AA X-CRM114-Status: GOOD ( 16.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Leo Yan MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When decode Arm SPE trace, it waits for PERF_RECORD_EXIT event (the last perf event) for processing trace data, which is needless and even might cause logic error, e.g. it might fail to correlate perf events with Arm SPE events correctly. So this patch removes the condition checking for PERF_RECORD_EXIT event. Signed-off-by: Leo Yan --- tools/perf/util/arm-spe.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 6bf2e4ff5342..7b7812eea117 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -636,11 +636,7 @@ static int arm_spe_process_event(struct perf_session *session, sample->time); } } else if (timestamp) { - if (event->header.type == PERF_RECORD_EXIT) { - err = arm_spe_process_queues(spe, timestamp); - if (err) - return err; - } + err = arm_spe_process_queues(spe, timestamp); } return err;