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Signed-off-by: Alice Guo Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- Changes for v9: - add additionalProperties for "^soc@[0-9a-f]+$" - add examples Changes for v8: - match soc node with regular expression Changes for v7: - change to a separate schema file Changes for v6: - none Changes for v5: - correct the error of using allOf Changes for v4: - use allOf to limit new version DTS files for i.MX8M to include "fsl,imx8m*-soc", nvmem-cells and nvmem-cells-names Changes for v3: - put it into Documentation/devicetree/bindings/arm/fsl.yaml - modify the description of nvmem-cells - use "make ARCH=arm64 dtbs_check" to make sure it is right Changes for v2: - remove the subject prefix "LF-2571-1" .../bindings/soc/imx/imx8m-soc.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/imx8m-soc.yaml -- 2.17.1 diff --git a/Documentation/devicetree/bindings/soc/imx/imx8m-soc.yaml b/Documentation/devicetree/bindings/soc/imx/imx8m-soc.yaml new file mode 100644 index 000000000000..effcc72f9425 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/imx8m-soc.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/imx8m-soc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Series SoC + +maintainers: + - Alice Guo + +description: | + NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be + obtained. + +select: + properties: + compatible: + contains: + enum: + - fsl,imx8mm + - fsl,imx8mn + - fsl,imx8mp + - fsl,imx8mq + required: + - compatible + +patternProperties: + "^soc@[0-9a-f]+$": + type: object + properties: + compatible: + items: + - enum: + - fsl,imx8mm-soc + - fsl,imx8mn-soc + - fsl,imx8mp-soc + - fsl,imx8mq-soc + - const: simple-bus + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + + dma-ranges: true + + nvmem-cells: + maxItems: 1 + description: Phandle to the SOC Unique ID provided by a nvmem node + + nvmem-cell-names: + const: soc_unique_id + + required: + - compatible + - nvmem-cells + - nvmem-cell-names + + additionalProperties: + type: object + +additionalProperties: true + +examples: + - | + / { + model = "FSL i.MX8MM EVK board"; + compatible = "fsl,imx8mm-evk", "fsl,imx8mm"; + #address-cells = <2>; + #size-cells = <2>; + + soc@0 { + compatible = "fsl,imx8mm-soc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mm_uid>; + nvmem-cell-names = "soc_unique_id"; + }; + }; + +... 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IPV:NLI; SFV:NSPM; H:AM6PR04MB6053.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(39860400002)(346002)(366004)(136003)(376002)(396003)(66946007)(26005)(2906002)(316002)(8936002)(6486002)(86362001)(66476007)(52116002)(66556008)(8676002)(6506007)(4326008)(478600001)(956004)(2616005)(5660300002)(1076003)(6666004)(83380400001)(16526019)(6512007)(186003)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: VAxN9/8p1z17Rpzcnn3CYZl7cwgBtqBvic/cZs0wtbyS1j3vZ7YGRS3eU5sQX/DJNWB6/vZ6pOCj7m5kSxdrURDIGQDZuyLG1j3flebr46Wuwls9co1tKuG9jSmMv/JDdqsif0yWFMOmcA+GKOUjutbMNv+jzNk7ylYuwd+Vw6O0+Z6BVsL7XUtum3fIK3ItZ0GHmv21gly9TS6C1kJl46iTY3ogUT4zIEW9BdHNnDbmsCCfdbDBsqgG5M3xpMK525vdrsfbmAuZlqIbgqDM+eZgUBxSzeLBfcbFcZeivProxMJMPkp2+fCXf7Ms10ns62SbOV3fmnH2IZnTZhROrH4MtkEFyWWCcB0kz+ChJ23zVR2+kR33uv2CWZvS4+sad8OOn/l2+JlRZq8KjehGwNEGiteo/DetKrK3+yelIXeFZh2n8boU4gY6viOLF+oGG1uNxCKmgnTvp9+lXU5WcBW/g3FeaCMq0XcdukiXFEVO6JQ4/NfICirlHymGootjUTkuS0YHTSma55sNY90j542tTuMm7d7ogVhXLGgIT57BWYC72PhhbrIdl+wYxuKwn+5L5E2MWUt/KnMnEY3BOXR7vfctB5FO+Epb44aZ/+st4h8h8n5uX9LKUVjNysVshBiu+xNss42m+SUf9cEuQ+derhABOCE8UWVx0i+JMNvRmMp84/g4JB6CNuApb0YbgNdgkDiXfVNixgmOtzq0fdAiQNMwvhvAly75+JCPR0ipNL1Cz0NJdvQRfslNFmYTKp8gUroFskgY7ovHAfWYlrBbVXvpo3oM0Z9of5t5JLluVVGzPkNdeB6n3pbdAduwGgpYIBsRAtOgUj9fwJGjo1lbzDdlb+dQir1AqCqTx6j3KrrTT/Pe7LbW5jzdqEW21nT0EeKTI+uJfQq8P+TME11P+DBZg9MCkqyTbV7HLX2+nSexVsH8vIEOx8+Slkw7d4HY/p8yhXk6u8F0fR4GoV11TsEHJVKSrzo8XmOYYTwhX2fxfMlTfgfrQyXyHv1c X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB6053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 08:11:27.8736 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: ff521b05-76dd-4c47-abb4-08d8a6512eb7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dszi+9mYntsah/UwED1OaEgHa1LxDjb/iscw2NwWoUQCVwL52ntPYLlQA+/h2cG5l2jaGbyQCPWpxK6F4+Ciqg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0402MB3752 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201222_031132_594677_0DC01E5A X-CRM114-Status: GOOD ( 12.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Alice Guo Add compatible string to .dtsi files for binding of imx8_soc_info and device. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v9: - none Changes for v8: - none Changes for v7: - none Changes for v6: - leave only the changelog under '---' Changes for v5: - none Changes for v4: - change subject and commit message - add Reviewed-by Changes for v3: - none Changes for v2: - remove the subject prefix "LF-2571-2" arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index c824f2615fe8..d457ce815e68 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -257,7 +257,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mm-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index ee1790230490..db50e6e01ac5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -241,7 +241,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mn-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ecccfbb4f5ad..ec6ac523ecfc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -218,7 +218,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mp-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index a841a023e8e0..9b6d9307e5d7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -286,7 +286,7 @@ }; soc@0 { - compatible = "simple-bus"; + compatible = "fsl,imx8mq-soc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; From patchwork Tue Dec 22 08:10:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alice Guo (OSS)" X-Patchwork-Id: 11986111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5E62C433E6 for ; Tue, 22 Dec 2020 08:13:17 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B72822573 for ; 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Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v9: - re-add Reviewed-by because it was lost in v8 Changes for v8: - lost Reviewed-by carelessly Changes for v7: - add Reviewed-by Changes for v6: - leave only the changelog under '---' Changes for v5: - change underscore of device node to hyphen Changes for v4: - delete "stuff" in subject and commit message - add detailed description Changes for v3: - convert register addresses and sizes to hex Changes for v2: - remove the subject prefix "LF-2571-3" arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++ 4 files changed, 24 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index d457ce815e68..9bee6f1889a4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -261,6 +261,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mm_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -518,6 +520,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mm_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index db50e6e01ac5..b344fdc16534 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -245,6 +245,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mn_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -531,6 +533,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mn_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ec6ac523ecfc..9401e92f1c84 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -222,6 +222,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mp_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -328,6 +330,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mp_uid: unique-id@420 { + reg = <0x8 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9b6d9307e5d7..a2a885f1a07a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -291,6 +291,8 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>; + nvmem-cells = <&imx8mq_uid>; + nvmem-cell-names = "soc_unique_id"; bus@30000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; @@ -555,6 +557,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mq_uid: soc-uid@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; 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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=oss.nxp.com; Received: from AM6PR04MB6053.eurprd04.prod.outlook.com (2603:10a6:20b:b9::10) by AM6PR0402MB3752.eurprd04.prod.outlook.com (2603:10a6:209:23::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.25; Tue, 22 Dec 2020 08:11:36 +0000 Received: from AM6PR04MB6053.eurprd04.prod.outlook.com ([fe80::78fe:9b7a:a2ac:9631]) by AM6PR04MB6053.eurprd04.prod.outlook.com ([fe80::78fe:9b7a:a2ac:9631%7]) with mapi id 15.20.3676.033; Tue, 22 Dec 2020 08:11:36 +0000 From: "Alice Guo (OSS)" To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, krzk@kernel.org Subject: [PATCH v9 4/4] soc: imx8m: change to use platform driver Date: Tue, 22 Dec 2020 16:10:57 +0800 Message-Id: <20201222081057.26401-4-alice.guo@oss.nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201222081057.26401-1-alice.guo@oss.nxp.com> References: <20201222081057.26401-1-alice.guo@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR0601CA0022.apcprd06.prod.outlook.com (2603:1096:3::32) To AM6PR04MB6053.eurprd04.prod.outlook.com (2603:10a6:20b:b9::10) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from nxf55104-OptiPlex-7060.ap.freescale.net (119.31.174.71) by SG2PR0601CA0022.apcprd06.prod.outlook.com (2603:1096:3::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3676.29 via Frontend Transport; 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Using nvmem API requires to support driver defer probe and thus change soc-imx8m.c to use platform driver. The other reason is that directly reading ocotp register causes kexec kernel hang because the 1st kernel running will disable unused clks after kernel boots up, and then ocotp clk will be disabled even if bootloader enables it. When kexec kernel, ocotp clk needs to be enabled before reading ocotp registers, and nvmem API with platform driver supported can accomplish this. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v9: - re-add Reviewed-by because it was lost in v8 Changes for v8: - lost Reviewed-by carelessly Changes for v7: - solve the problem "drivers/soc/imx/soc-imx8m.c:174:34: warning: unused variable" Changes for v6: - leave only the changelog under '---' Changes for v5: - add cleanup part "of_node_put" - add note to explain that why device_initcall still exists Changes for v4: - delete "__maybe_unused" - delete MODULE_DEVICE_TABLE(of, imx8m_soc_match); - rename match table "fsl,imx8m*"is actually a machine compabile and "fsl,imx8m*-soc" is a compabile of soc@0 - delete "flag" and change to determine whether the pointer is NULL - ues of_find_matching_node_and_match() - delete of_match_ptr() Changes for v3: - keep the original way which uses device_initcall to read soc unique ID - add the other way which uses module_platform_driver and nvmem API, so that it will not break the old version DTBs Changes for v2: - remove the subject prefix "LF-2571-4" drivers/soc/imx/soc-imx8m.c | 87 ++++++++++++++++++++++++++++++++----- 1 file changed, 75 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c index cc57a384d74d..d5c86ae32903 100644 --- a/drivers/soc/imx/soc-imx8m.c +++ b/drivers/soc/imx/soc-imx8m.c @@ -5,6 +5,8 @@ #include #include +#include +#include #include #include #include @@ -29,7 +31,7 @@ struct imx8_soc_data { char *name; - u32 (*soc_revision)(void); + u32 (*soc_revision)(struct device *dev); }; static u64 soc_uid; @@ -50,7 +52,7 @@ static u32 imx8mq_soc_revision_from_atf(void) static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; #endif -static u32 __init imx8mq_soc_revision(void) +static u32 __init imx8mq_soc_revision(struct device *dev) { struct device_node *np; void __iomem *ocotp_base; @@ -75,9 +77,20 @@ static u32 __init imx8mq_soc_revision(void) rev = REV_B1; } - soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); - soc_uid <<= 32; - soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); + if (dev) { + int ret = 0; + + ret = nvmem_cell_read_u64(dev, "soc_unique_id", &soc_uid); + if (ret) { + iounmap(ocotp_base); + of_node_put(np); + return ret; + } + } else { + soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); + soc_uid <<= 32; + soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); + } iounmap(ocotp_base); of_node_put(np); @@ -107,7 +120,7 @@ static void __init imx8mm_soc_uid(void) of_node_put(np); } -static u32 __init imx8mm_soc_revision(void) +static u32 __init imx8mm_soc_revision(struct device *dev) { struct device_node *np; void __iomem *anatop_base; @@ -125,7 +138,15 @@ static u32 __init imx8mm_soc_revision(void) iounmap(anatop_base); of_node_put(np); - imx8mm_soc_uid(); + if (dev) { + int ret = 0; + + ret = nvmem_cell_read_u64(dev, "soc_unique_id", &soc_uid); + if (ret) + return ret; + } else { + imx8mm_soc_uid(); + } return rev; } @@ -150,7 +171,7 @@ static const struct imx8_soc_data imx8mp_soc_data = { .soc_revision = imx8mm_soc_revision, }; -static __maybe_unused const struct of_device_id imx8_soc_match[] = { +static __maybe_unused const struct of_device_id imx8_machine_match[] = { { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, }, { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, }, { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, }, @@ -158,12 +179,20 @@ static __maybe_unused const struct of_device_id imx8_soc_match[] = { { } }; +static __maybe_unused const struct of_device_id imx8_soc_match[] = { + { .compatible = "fsl,imx8mq-soc", .data = &imx8mq_soc_data, }, + { .compatible = "fsl,imx8mm-soc", .data = &imx8mm_soc_data, }, + { .compatible = "fsl,imx8mn-soc", .data = &imx8mn_soc_data, }, + { .compatible = "fsl,imx8mp-soc", .data = &imx8mp_soc_data, }, + { } +}; + #define imx8_revision(soc_rev) \ soc_rev ? \ kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ "unknown" -static int __init imx8_soc_init(void) +static int imx8_soc_info(struct platform_device *pdev) { struct soc_device_attribute *soc_dev_attr; struct soc_device *soc_dev; @@ -182,7 +211,10 @@ static int __init imx8_soc_init(void) if (ret) goto free_soc; - id = of_match_node(imx8_soc_match, of_root); + if (pdev) + id = of_match_node(imx8_soc_match, pdev->dev.of_node); + else + id = of_match_node(imx8_machine_match, of_root); if (!id) { ret = -ENODEV; goto free_soc; @@ -191,8 +223,16 @@ static int __init imx8_soc_init(void) data = id->data; if (data) { soc_dev_attr->soc_id = data->name; - if (data->soc_revision) - soc_rev = data->soc_revision(); + if (data->soc_revision) { + if (pdev) { + soc_rev = data->soc_revision(&pdev->dev); + ret = soc_rev; + if (ret < 0) + goto free_soc; + } else { + soc_rev = data->soc_revision(NULL); + } + } } soc_dev_attr->revision = imx8_revision(soc_rev); @@ -230,4 +270,27 @@ static int __init imx8_soc_init(void) kfree(soc_dev_attr); return ret; } + +/* Retain device_initcall is for backward compatibility with DTS. */ +static int __init imx8_soc_init(void) +{ + int ret = 0; + + if (of_find_matching_node_and_match(NULL, imx8_soc_match, NULL)) + return 0; + + ret = imx8_soc_info(NULL); + return ret; +} device_initcall(imx8_soc_init); + +static struct platform_driver imx8_soc_info_driver = { + .probe = imx8_soc_info, + .driver = { + .name = "imx8_soc_info", + .of_match_table = imx8_soc_match, + }, +}; + +module_platform_driver(imx8_soc_info_driver); +MODULE_LICENSE("GPL v2");