From patchwork Thu Dec 24 17:04:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989699 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EAE6C433DB for ; Thu, 24 Dec 2020 17:07:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6BDBD22288 for ; Thu, 24 Dec 2020 17:07:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728463AbgLXRGH (ORCPT ); Thu, 24 Dec 2020 12:06:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728039AbgLXRGH (ORCPT ); Thu, 24 Dec 2020 12:06:07 -0500 Received: from mail-il1-x12f.google.com (mail-il1-x12f.google.com [IPv6:2607:f8b0:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A084C061573; Thu, 24 Dec 2020 09:05:27 -0800 (PST) Received: by mail-il1-x12f.google.com with SMTP id w17so2427128ilj.8; Thu, 24 Dec 2020 09:05:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Cscvb+iV0cTVUXsER3fqU+Aouxqzhaf8csA4Jzg4/vY=; b=LKwenKmc68uaJtfE5Ov1WAbDbE8Qm9Cdjr9HNWu02yK3bMMhc8yJP0Q3MvwqD/qYhD hH7DsQv6HRmPVvT5jos3trpPY2RJuEKKEnemb+qDNgOGik0sgyAwfV1gKz8VCCletluF qWYSB2LTznOB4qdj4XOhrp5s3BshLKQo3xUsA24ortJTo4EivDsFVERkJj70DucK1g+Y YI8CdjzS+wNCoO5BCm1zvzYKNv4D49BtyJSdfhOS7ckz49mcldX06zDeCvq6I3aEyt0w 4vuDRnYUMSpgLsp2jINM4HXNuZXELxKZM2z4nYI+8Cc1T/Sc9SgDQoGcEI/d0VcWF54r RdTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Cscvb+iV0cTVUXsER3fqU+Aouxqzhaf8csA4Jzg4/vY=; b=Rr+YDlgSXURZJvKe81ihHKNoVz/EzdQXLHWn6aSloTas+8noKUN1YAQ/thvRet/1e9 HCbsaEayO/hzWDkGhB3SEShsXDqvaeA6oyvH15vfBSJ2nFONLJ2inbp+ru0lqLb07K5S ddhFe0Y2WNMZQbQrpPGzq1bZqwe3P/jxo04D4yNGQfb7po/BRSZVxlc0RvhEeRJagRF9 mAJwA/AZIPTddags6KHL/+41SQfkMsZHmrNCvWWGxFkbpgi5kNV9maM2YLQoocEADmEq jPrkzZ1ynDTgTkq4jFH1LkfrfMN8xYhKwyGcsYdZfGFYnM1SzjnQXoLI7q6NWTXIPTyW 3/MA== X-Gm-Message-State: AOAM531gjskIntt1tLFIXIRl8YtNhG2LBB0DMAXCI3t1w7CJ3tOzRMcV CggYY+VCTf9bAQPv6XcICPqJORy2gT4= X-Google-Smtp-Source: ABdhPJySsXcTNSwJup1rLaeM9loH5F1aU/FNU78D6OvBIJW0Oqelj0yIWgkDkM7q3u/eECJUo1Ob2Q== X-Received: by 2002:a92:9f59:: with SMTP id u86mr30535429ili.205.1608829526376; Thu, 24 Dec 2020 09:05:26 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:f45d:df49:9a4c:4914]) by smtp.gmail.com with ESMTPSA id f20sm9732965ilr.85.2020.12.24.09.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Dec 2020 09:05:25 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 1/9] arm64: dts: renesas: beacon kit: Configure programmable clocks Date: Thu, 24 Dec 2020 11:04:54 -0600 Message-Id: <20201224170502.2254683-1-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org When the board was added, clock drivers were being updated done at the same time to allow the versaclock driver to properly configure the modes. Unfortunately, the updates were not applied to the board files at the time they should have been, so do it now. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Limit the changes to the versaclocks chips. diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index cc0e7ce8e503..46a3ba895330 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { backlight_lvds: backlight-lvds { @@ -347,12 +348,36 @@ versaclock6_bb: clock-controller@6a { #clock-cells = <1>; clocks = <&x304_clk>; clock-names = "xin"; - /* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */ + assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>, <&versaclock6_bb 3>, <&versaclock6_bb 4>; assigned-clock-rates = <24000000>, <24000000>, <24000000>, <24576000>; + + OUT1 { + idt,mode = ; + idt,voltage-microvolt = <1800000>; + idt,slew-percent = <100>; + }; + + OUT2 { + idt,mode = ; + idt,voltage-microvolt = <1800000>; + idt,slew-percent = <100>; + }; + + OUT3 { + idt,mode = ; + idt,voltage-microvolt = <3300000>; + idt,slew-percent = <100>; + }; + + OUT4 { + idt,mode = ; + idt,voltage-microvolt = <3300000>; + idt,slew-percent = <100>; + }; }; }; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index e6885d50bb62..ade2f58ad99b 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -4,6 +4,7 @@ */ #include +#include / { memory@48000000 { @@ -169,7 +170,32 @@ versaclock5: versaclock_som@6a { <&versaclock5 2>, <&versaclock5 3>, <&versaclock5 4>; + assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>; + + OUT1 { + idt,mode = ; + idt,voltage-microvolt = <1800000>; + idt,slew-percent = <100>; + }; + + OUT2 { + idt,mode = ; + idt,voltage-microvolt = <1800000>; + idt,slew-percent = <100>; + }; + + OUT3 { + idt,mode = ; + idt,voltage-microvolt = <1800000>; + idt,slew-percent = <100>; + }; + + OUT4 { + idt,mode = ; + idt,voltage-microvolt = <3300000>; + idt,slew-percent = <100>; + }; }; }; From patchwork Thu Dec 24 17:04:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989693 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B2D5C433E9 for ; Thu, 24 Dec 2020 17:06:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D828C22288 for ; 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Thu, 24 Dec 2020 09:05:27 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 2/9] arm64: dts: renesas: beacon kit: Fix Audio Clock sources Date: Thu, 24 Dec 2020 11:04:55 -0600 Message-Id: <20201224170502.2254683-2-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The SoC was expecting two clock sources with different frequencies. One to support 44.1KHz and one to support 48KHz. With the newly added ability to configure the programmably clock, configure both clocks. Assign the rcar-sound clocks to reference the versaclock instead of the fixed clock. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Go from fixed-factor-clock to just redefining the rcar-sound node to reference the versaclock instead of the audio_clk_a. diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 46a3ba895330..4e86d308d07e 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -223,12 +223,6 @@ x304_clk: x304-clock { }; }; -&audio_clk_a { - clock-frequency = <24576000>; - assigned-clocks = <&versaclock6_bb 4>; - assigned-clock-rates = <24576000>; -}; - &audio_clk_b { clock-frequency = <22579200>; }; @@ -574,7 +568,7 @@ sound_pins: sound { }; sound_clk_pins: sound_clk { - groups = "audio_clk_a_a"; + groups = "audio_clk_a_a", "audio_clk_b_a"; function = "audio_clk"; }; @@ -625,23 +619,6 @@ &rcar_sound { status = "okay"; - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A774A1_CLK_S0D4>; - ports { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts index 2c5b057c30c6..25eeac411f12 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts @@ -27,3 +27,24 @@ chosen { stdout-path = "serial0:115200n8"; }; }; + +/* Reference versaclock instead of audio_clk_a */ +&rcar_sound { + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&versaclock6_bb 4>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A774A1_CLK_S0D4>; +}; From patchwork Thu Dec 24 17:04:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989701 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9CC2C433E9 for ; Thu, 24 Dec 2020 17:07:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9AF0C22518 for ; Thu, 24 Dec 2020 17:07:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728864AbgLXRGM (ORCPT ); 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Thu, 24 Dec 2020 09:05:29 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 3/9] arm64: dts: renesas: beacon: Configure Audio CODEC clocks Date: Thu, 24 Dec 2020 11:04:56 -0600 Message-Id: <20201224170502.2254683-3-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org With the newly added configurable clock options, the audio CODEC can configure the mclk automatically. Add the reference to the versaclock. Since the devices on I2C5 can communicate at 400KHz, let's also increase that too Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Remove the un-used clock-names reference. Base on: https://patchwork.kernel.org/project/alsa-devel/patch/20201217162740.1452000-1-aford173@gmail.com/ diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 4e86d308d07e..dc5e05d7a792 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -385,13 +385,14 @@ &i2c0 { &i2c5 { status = "okay"; - clock-frequency = <100000>; + clock-frequency = <400000>; pinctrl-0 = <&i2c5_pins>; pinctrl-names = "default"; codec: wm8962@1a { compatible = "wlf,wm8962"; reg = <0x1a>; + clocks = <&versaclock6_bb 3>; DCVDD-supply = <®_audio>; DBVDD-supply = <®_audio>; AVDD-supply = <®_audio>; From patchwork Thu Dec 24 17:04:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989697 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10004C43333 for ; Thu, 24 Dec 2020 17:06:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D788F229CA for ; Thu, 24 Dec 2020 17:06:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728901AbgLXRGN (ORCPT ); Thu, 24 Dec 2020 12:06:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728891AbgLXRGM (ORCPT ); Thu, 24 Dec 2020 12:06:12 -0500 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A32D3C0613C1; Thu, 24 Dec 2020 09:05:32 -0800 (PST) Received: by mail-io1-xd36.google.com with SMTP id i18so2493653ioa.1; Thu, 24 Dec 2020 09:05:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1TmoWv7xD1jRspjs+2ARKsLutJXEqRLYfp6/Y4HPquQ=; b=H6WXRTdELBeLeFkSqi616GkML1oc9hRYi3OQGOZIzjU7EXPBTya8+UaDb/vz+P9/uG jpz5DtDRzIdMkW9NaMnSyCL9DojeOPvp6p8irKRvaDsyj10l6ZtdtFe4pILulcJS7EdZ KJoVXkSPsWreZw3vNhivZzuxyGgTfsXNTwgBCSU4FiAIOPqvA+evtabCqoNmRJMTyxOj eXsIpyV/BGSm4siykghhLIq3KqVEfS2ZGl+f0jW/MRoIgGJqNBFaj1RH7sOwx7g4gbF2 jYCB/qMg4G3IIPF4e/OSLcI3g1m2COY4WLabbJmtaBLmzHnO2JrWRtOV3/B3Hp7/nhwQ g8uA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1TmoWv7xD1jRspjs+2ARKsLutJXEqRLYfp6/Y4HPquQ=; b=cHU4ZIZg4k9NqaEAlIZr7/Om+t0jCneINRJRA+vg2fVIeENPxAdl5r/GKaun89/Dan CltkwDpr1/EYWST4+5gFU5tOV5P0VJiWOMGMNJChKFuYmBUikJiUu+2mLjuiSLKNfJn+ MFLSNszuGW3Kj3llJ7r+P3zaQwR0TMBxgNvSTVCs1/x4rIFMW0BwqQN8nSwfML6JvHSg UIe3oJufnJhoqi3Isg1wxztkxia7ojUaCeMfDawQbxgf2uA4Re9JHhuesDxq7nUWSe7q 0sKfSi1k6eY55F7R8L7baGGq1CVw3GJ17T4fe8XO3g19CnPsUzwvZijbjX8YoAldszNz yCcg== X-Gm-Message-State: AOAM533pnlbnG9pAkHh0RZls4Rr0OKhHP6zdPk0szMZMstLZUEDex0Rl DHj3zoj2OL5/yEOtdO1Na4gtpBpos58= X-Google-Smtp-Source: ABdhPJwRO4LdZ7sLyo1lqzETNpZw16iwUzwMt3nX310N4/gLff+4tR0MkbIhSXj0iXI4jydYoUEtsA== X-Received: by 2002:a05:6602:3154:: with SMTP id m20mr26128758ioy.188.1608829531703; Thu, 24 Dec 2020 09:05:31 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:f45d:df49:9a4c:4914]) by smtp.gmail.com with ESMTPSA id f20sm9732965ilr.85.2020.12.24.09.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Dec 2020 09:05:31 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 4/9] arm64: dts: renesas: beacon: Better describe keys Date: Thu, 24 Dec 2020 11:04:57 -0600 Message-Id: <20201224170502.2254683-4-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The keys on the baseboard are laid out in an diamond pattern, up, down, left, right and center. Update the descriptions to make it easier to read. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Make keycode match the key name. diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index dc5e05d7a792..a54ec36c69e4 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -40,38 +40,38 @@ hdmi0_con: endpoint { keys { compatible = "gpio-keys"; - key-1 { + key-1 { /* S19 */ gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "Switch-1"; + linux,code = ; + label = "Up"; wakeup-source; debounce-interval = <20>; }; - key-2 { + key-2 { /*S20 */ gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "Switch-2"; + linux,code = ; + label = "Left"; wakeup-source; debounce-interval = <20>; }; - key-3 { + key-3 { /* S21 */ gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "Switch-3"; + linux,code = ; + label = "Down"; wakeup-source; debounce-interval = <20>; }; - key-4 { + key-4 { /* S22 */ gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "Switch-4"; + linux,code = ; + label = "Right"; wakeup-source; debounce-interval = <20>; }; - key-5 { + key-5 { /* S23 */ gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; - linux,code = ; - label = "Switch-4"; + linux,code = ; + label = "Center"; wakeup-source; debounce-interval = <20>; }; From patchwork Thu Dec 24 17:04:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989695 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A74A8C4332E for ; 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Thu, 24 Dec 2020 09:05:33 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:f45d:df49:9a4c:4914]) by smtp.gmail.com with ESMTPSA id f20sm9732965ilr.85.2020.12.24.09.05.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Dec 2020 09:05:32 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 5/9] arm64: dts: renesas: beacon: Cleanup USB References Date: Thu, 24 Dec 2020 11:04:58 -0600 Message-Id: <20201224170502.2254683-5-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The programmable versaclock is used for the usb_extal reference clock for the EHCI driver instead of a fixed-clock. Because the versaclock needs to be enabled, the clock reference needs to be added to the clocks list. For the USB3 Phy, the perferred clock reference is usb3s_clk, so remove the usb_extal reference. Signed-off-by: Adam Ford --- V2: Split this off into its own patch. diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index a54ec36c69e4..3b3efaf749bb 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -263,12 +263,22 @@ &du_out_rgb { &ehci0 { dr_mode = "otg"; status = "okay"; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>; }; &ehci1 { status = "okay"; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; + clocks = <&cpg CPG_MOD 702>, <&versaclock5 3>; +}; + +&gpio6 { + + usb_hub_reset { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "usb-hub-reset"; + }; }; &hdmi0 { diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index ade2f58ad99b..a6f7193e4d97 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -75,15 +75,6 @@ &extalr_clk { clock-frequency = <32768>; }; -&gpio6 { - usb_hub_reset { - gpio-hog; - gpios = <10 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "usb-hub-reset"; - }; -}; - &hscif0 { pinctrl-0 = <&hscif0_pins>; pinctrl-names = "default"; @@ -315,16 +306,12 @@ &sdhi3 { vmmc-supply = <®_3p3v>; vqmmc-supply = <®_1p8v>; bus-width = <8>; - mmc-hs200-1_8v; + mmc-hs400-1_8v; non-removable; fixed-emmc-driver-type = <1>; status = "okay"; }; -&usb_extal_clk { - clock-frequency = <50000000>; -}; - &usb3s0_clk { clock-frequency = <100000000>; }; From patchwork Thu Dec 24 17:04:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989707 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36CC1C4360C for ; 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Thu, 24 Dec 2020 09:05:35 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:f45d:df49:9a4c:4914]) by smtp.gmail.com with ESMTPSA id f20sm9732965ilr.85.2020.12.24.09.05.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Dec 2020 09:05:34 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 6/9] arm64: dts: renesas: beacon-rzg2m-kit: Rearange SoC unique functions Date: Thu, 24 Dec 2020 11:04:59 -0600 Message-Id: <20201224170502.2254683-6-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Fix missing entries in dts file. diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 3b3efaf749bb..a6aa0b815c46 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -241,21 +241,6 @@ &can1 { status = "okay"; }; -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; - &du_out_rgb { remote-endpoint = <&rgb_panel>; }; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index a6f7193e4d97..b34ffa1e77fa 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -13,11 +13,6 @@ memory@48000000 { reg = <0x0 0x48000000 0x0 0x78000000>; }; - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; - osc_32k: osc_32k { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts index 25eeac411f12..501cb05da228 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts @@ -26,6 +26,26 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", + "dclkin.0", "dclkin.1", "dclkin.2"; }; /* Reference versaclock instead of audio_clk_a */ From patchwork Thu Dec 24 17:05:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989709 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20D86C43603 for ; Thu, 24 Dec 2020 17:07:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EA5DD22518 for ; Thu, 24 Dec 2020 17:07:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728986AbgLXRGs (ORCPT ); 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Thu, 24 Dec 2020 09:05:36 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 7/9] arm64: dts: renesas: Introduce r8a774b1-beacon-rzg2n-kit Date: Thu, 24 Dec 2020 11:05:00 -0600 Message-Id: <20201224170502.2254683-7-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Beacon EmebeddedWorks is introducing a new kit based on the RZ/G2N SoC from Renesas. The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio. The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM as the RZ/G2M. This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains the base memory node, so an additional memory node isn't necessary. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Add missing du node entries. diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index dffefe030a76..cf7e2f77e4ea 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb +dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-beacon-rzg2n-kit.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex-idk-1110wr.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts b/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts new file mode 100644 index 000000000000..71763f4402a7 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020, Compass Electronics Group, LLC + */ + +/dts-v1/; + +#include "r8a774b1.dtsi" +#include "beacon-renesom-som.dtsi" +#include "beacon-renesom-baseboard.dtsi" + +/ { + model = "Beacon Embedded Works RZ/G2N Development Kit"; + compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1"; + + aliases { + serial0 = &scif2; + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif0; + serial4 = &hscif2; + serial5 = &scif5; + serial6 = &scif4; + ethernet0 = &avb; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +}; + +/* Reference versaclock instead of audio_clk_a */ +&rcar_sound { + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&versaclock6_bb 4>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A774B1_CLK_S0D4>; +}; From patchwork Thu Dec 24 17:05:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989703 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A268C43331 for ; Thu, 24 Dec 2020 17:07:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6313322288 for ; Thu, 24 Dec 2020 17:07:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729057AbgLXRGv (ORCPT ); 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Thu, 24 Dec 2020 09:05:37 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 8/9] arm64: dts: renesas: Introduce r8a774e1-beacon-rzg2h-kit Date: Thu, 24 Dec 2020 11:05:01 -0600 Message-Id: <20201224170502.2254683-8-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org eacon EmebeddedWorks is introducing a new kit based on the RZ/G2H SoC from Renesas. The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio. The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM files as the RZ/G2M and RZ/G2N kits. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: Add missing du node entries diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index cf7e2f77e4ea..5c68de184501 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874.dtb dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874-idk-2121wr.dtb dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874-mipi-2.1.dtb +dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-beacon-rzg2h-kit.dtb dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h.dtb dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h-ex.dtb dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h-ex-idk-1110wr.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts b/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts new file mode 100644 index 000000000000..273f062f2909 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020, Compass Electronics Group, LLC + */ + +/dts-v1/; + +#include "r8a774e1.dtsi" +#include "beacon-renesom-som.dtsi" +#include "beacon-renesom-baseboard.dtsi" + +/ { + model = "Beacon Embedded Works RZ/G2H Development Kit"; + compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1"; + + aliases { + serial0 = &scif2; + serial1 = &hscif0; + serial2 = &hscif1; + serial3 = &scif0; + serial4 = &hscif2; + serial5 = &scif5; + serial6 = &scif4; + ethernet0 = &avb; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x80000000>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock5 1>, + <&x302_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +}; + +/* Reference versaclock instead of audio_clk_a */ +&rcar_sound { + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&versaclock6_bb 4>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A774E1_CLK_S0D4>; +}; From patchwork Thu Dec 24 17:05:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 11989705 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B980DC43217 for ; Thu, 24 Dec 2020 17:07:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9087C2251F for ; Thu, 24 Dec 2020 17:07:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729048AbgLXRGu (ORCPT ); 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Thu, 24 Dec 2020 09:05:39 -0800 (PST) From: Adam Ford To: linux-renesas-soc@vger.kernel.org Cc: aford@beaconembedded.com, Adam Ford , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 9/9] arm64: dts: renesas: beacon: Increase sdhi speeds Date: Thu, 24 Dec 2020 11:05:02 -0600 Message-Id: <20201224170502.2254683-9-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201224170502.2254683-1-aford173@gmail.com> References: <20201224170502.2254683-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The eMMC can run at hs400 and the WiFi chip can run at sdr104. Set the respective flags to push the sdhi faster. Signed-off-by: Adam Ford Reviewed-by: Geert Uytterhoeven --- V2: New to series diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index b34ffa1e77fa..56bdd80e36d0 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -271,8 +271,9 @@ &scif2 { }; &sdhi2 { - pinctrl-names = "default"; pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins>; + pinctrl-names = "default", "state_uhs"; bus-width = <4>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_1p8v>; @@ -281,6 +282,8 @@ &sdhi2 { pm-ignore-notify; keep-power-in-suspend; mmc-pwrseq = <&wlan_pwrseq>; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; #address-cells = <1>; #size-cells = <0>;