From patchwork Thu Dec 31 12:52:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= X-Patchwork-Id: 11994105 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A651C433E0 for ; Thu, 31 Dec 2020 12:57:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CA6C2223E0 for ; Thu, 31 Dec 2020 12:57:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726827AbgLaM5Y (ORCPT ); Thu, 31 Dec 2020 07:57:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726681AbgLaM5Y (ORCPT ); Thu, 31 Dec 2020 07:57:24 -0500 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACEEBC061575 for ; Thu, 31 Dec 2020 04:56:43 -0800 (PST) Received: by mail-lf1-x134.google.com with SMTP id o13so43921567lfr.3 for ; Thu, 31 Dec 2020 04:56:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HqPa+eSb1i120AMX7628+OZX72DaTmZR2XhkwMhxnoo=; b=Z2jlENieXu2sTs0dWwVc8R1DkL+ugfLSeRI50PMsZkcVCTX0lfitT7QkCck9HifIJM KRq8lhFqsAIIr1BHh4FI4EMph6ikOGYgO1CUvEZH1uqYpvSDPf/8/AYikEiFOIMMGJo0 m3vlFPGXLhpXbBwdY69ZtSojO9jTU9YKRkOrWJSNn+2Kvnj3HVhHRA/FQGaYNNRDfPPc WuEGY7gZ+nbuyRz8lFqn4P4avWCnvdVLA55nAuiqXXKLmut5omfnuCp8vssmfgk52OTa FVVw0+z4Oj1RbCtl8dYEiszg9xpXutWfGQ/a117SWldos/+qqssZwvwpeyEIvtsCOCBQ ZgZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HqPa+eSb1i120AMX7628+OZX72DaTmZR2XhkwMhxnoo=; b=O7RzcwYKwh3x0YwKLad6bTgOTwwqe2qJE9INulkbBfl5QBZX2iCmjI/bjfnbehhW7P 6lpqX3Ge8T+EBTa1d+lRV93FaL7fkqi70pE72z8iHvKiz8Dp+iOj9nOomThCn4qt9WWf NAy+wvGJ8Oz6CMsz58tNaO/DJdGsKiQZ2n03m4efG4PmhHxv07ZarnrbhDOxbIgylUfX 8usSa9KWWfW4YV7Sc/gAIsymEI9Bheg6+MxT+8Tirs4APl2WL3Cs0e7HagRSCTX88u9y zR+D9tuUNKsAmbJSYFOZbd9tvVdFjO7tjAiq2scKWEytc3a4VDgP0YMTtu1cUGoVJcXg BkYg== X-Gm-Message-State: AOAM5318V5+bFzDzbZLfbayweovM0wnDvMmiQTH5AJbIQsIk76WV1qGf t33p9WpARDjFuEwClpsePSs= X-Google-Smtp-Source: ABdhPJyH/NNfh0wGnXnj9m2lUan3jD6U6aSodbEMiBEGoJRzGAJeskJg5pHdh+XZ3V0lvlP/LGxeDQ== X-Received: by 2002:a19:705:: with SMTP id 5mr23847313lfh.478.1609419402180; Thu, 31 Dec 2020 04:56:42 -0800 (PST) Received: from localhost.localdomain (85-76-98-107-nat.elisa-mobile.fi. [85.76.98.107]) by smtp.gmail.com with ESMTPSA id r201sm6230659lff.268.2020.12.31.04.56.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Dec 2020 04:56:41 -0800 (PST) From: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= To: Shawn Lin , Heiko Stuebner Cc: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas Subject: [RFC PATCH 1/3] PCI: rockchip: provide workaround for bus scan crash with optional delay Date: Thu, 31 Dec 2020 14:52:12 +0200 Message-Id: <20201231125214.25733-2-nuumiofi@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201231125214.25733-1-nuumiofi@gmail.com> References: <20201231125214.25733-1-nuumiofi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Some PCIe devices cause Rockchip PCIe controller to crash in bus scan. Crash may be avoided by delaying bus scan by time given from command line or from device tree. Needed amount of delay varies from device to device. Delay doesn't have to be exact. It just has to be long enough. The following lists few problematic PCIe devices with delays needed for stable bus scan surviving 100 sequential reboots in test loop executed on RockPro64 (RK3399 single-board computer): - LSI 9201-8i / SAS2008 chipset [1000:0072]: 725 ms - LSI 9302-8i / SAS3008 chipset [1000:0097]: 575 ms (1) - HP H220 / SAS2308 chipset [1000:0087]: 800 ms (2) - IBM ServeRAID M5110 / SAS2208 chipset [1000:005b]: 1050 ms (3) 1) mpt3sas module has soft lockup bug on shutdown but device is usable 2) has infrequent crash on mpt3sas module load (2 of 662 reboots in all test sessions with this device crashed on module load) 3) megaraid_sas module crashes on load so device remains unusable (bus scan tested with module being blacklisted) Side effect of delay, if set, is that it slows down system startup by the amount of delay. Log excerpt showing a crash happening always on unpatched kernel with problematic PCIe devices listed above rendering them unusable: [ 1.240649] SError Interrupt on CPU5, code 0xbf000002 -- SError [ 1.240653] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 5.10.2-stable #1 [ 1.240656] Hardware name: Pine64 RockPro64 v2.0 (DT) [ 1.240659] pstate: 60000085 (nZCv daIf -PAN -UAO -TCO BTYPE=--) [ 1.240661] pc : rockchip_pcie_rd_conf+0x178/0x268 [ 1.240664] lr : rockchip_pcie_rd_conf+0x1b8/0x268 [ 1.240666] sp : ffff8000119db850 [ 1.240669] x29: ffff8000119db850 x28: 0000000000000000 [ 1.240676] x27: 0000000000000000 x26: 0000000000000000 [ 1.240682] x25: ffff8000119db984 x24: 0000000000000000 [ 1.240688] x23: 0000000000000000 x22: ffff000040ba0b80 [ 1.240694] x21: ffff8000119db8d4 x20: 0000000000000004 [ 1.240700] x19: 0000000000100000 x18: ffffffffffffffff [ 1.240706] x17: 0000000031cae143 x16: 000000008c75157c [ 1.240712] x15: ffff800011729908 x14: ffff000040c87a1c [ 1.240718] x13: ffff000040c87293 x12: 0000000000000038 [ 1.240724] x11: 0000000005f5e0ff x10: 7f7f7f7f7f7f7f7f [ 1.240729] x9 : 0000000001001d87 x8 : 000000000000ea60 [ 1.240735] x7 : ffff8000119db984 x6 : 0000000000000000 [ 1.240741] x5 : 0000000000000000 x4 : 0000000000c00008 [ 1.240747] x3 : ffff800017000000 x2 : 000000000080000a [ 1.240753] x1 : 0000000000000000 x0 : ffff800014000000 [ 1.240759] Kernel panic - not syncing: Asynchronous SError Interrupt [ 1.240763] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 5.10.2-stable #1 [ 1.240765] Hardware name: Pine64 RockPro64 v2.0 (DT) [ 1.240768] Call trace: [ 1.240770] dump_backtrace+0x0/0x1e8 [ 1.240772] show_stack+0x18/0x60 [ 1.240775] dump_stack+0xd8/0x130 [ 1.240777] panic+0x15c/0x380 [ 1.240779] add_taint+0x0/0xb0 [ 1.240782] arm64_serror_panic+0x78/0x88 [ 1.240784] do_serror+0x3c/0x68 [ 1.240787] el1_error+0x84/0x104 [ 1.240789] rockchip_pcie_rd_conf+0x178/0x268 [ 1.240791] pci_bus_read_config_dword+0xa4/0x150 [ 1.240794] pci_bus_generic_read_dev_vendor_id+0x30/0x1b0 [ 1.240797] pci_bus_read_dev_vendor_id+0x4c/0x78 [ 1.240800] pci_scan_single_device+0x80/0x100 [ 1.240802] pci_scan_slot+0x38/0x130 [ 1.240805] pci_scan_child_bus_extend+0x58/0x348 [ 1.240807] pci_scan_bridge_extend+0x304/0x5a0 [ 1.240810] pci_scan_child_bus_extend+0x20c/0x348 [ 1.240812] pci_scan_root_bus_bridge+0x64/0xf0 [ 1.240815] pci_host_probe+0x18/0xc8 [ 1.240817] rockchip_pcie_probe+0x34c/0x4b8 [ 1.240820] platform_drv_probe+0x54/0xa8 [ 1.240822] really_probe+0x29c/0x4f8 [ 1.240824] driver_probe_device+0xfc/0x168 [ 1.240827] device_driver_attach+0x74/0x80 [ 1.240829] __driver_attach+0xb8/0x168 [ 1.240832] bus_for_each_dev+0x7c/0xd8 [ 1.240834] driver_attach+0x24/0x30 [ 1.240837] bus_add_driver+0x15c/0x240 [ 1.240839] driver_register+0x64/0x120 [ 1.240841] __platform_driver_register+0x44/0x50 [ 1.240844] rockchip_pcie_driver_init+0x1c/0x28 [ 1.240846] do_one_initcall+0x60/0x1d8 [ 1.240849] kernel_init_freeable+0x234/0x2b4 [ 1.240851] kernel_init+0x14/0x118 [ 1.240854] ret_from_fork+0x10/0x34 [ 1.240878] SMP: stopping secondary CPUs [ 1.240881] Kernel Offset: disabled [ 1.240883] CPU features: 0x0240022,2100200c [ 1.240886] Memory Limit: none Signed-off-by: Jari Hämäläinen --- .../admin-guide/kernel-parameters.txt | 8 ++++++++ drivers/pci/controller/pcie-rockchip-host.c | 18 ++++++++++++++++++ drivers/pci/controller/pcie-rockchip.c | 5 +++++ drivers/pci/controller/pcie-rockchip.h | 2 ++ 4 files changed, 33 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index c722ec19cd00..fda9bb9c85c3 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3823,6 +3823,14 @@ nomsi Do not use MSI for native PCIe PME signaling (this makes all PCIe root ports use INTx for all services). + pcie_rockchip_host.bus_scan_delay_ms= + [PCIE] delay before PCIe bus scan in milliseconds. + If set to greater than or equal to 0 this parameter will + override delay set in device tree. Values less than 0 + are ignored. This parameter provides a workaround for + some devices causing a crash in bus scan. + Default: -1 + pcmv= [HW,PCMCIA] BadgePAD 4 pd_ignore_unused diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c index f1d08a1b1591..14733c92b25c 100644 --- a/drivers/pci/controller/pcie-rockchip-host.c +++ b/drivers/pci/controller/pcie-rockchip-host.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -39,6 +40,9 @@ #include "../pci.h" #include "pcie-rockchip.h" +static int bus_scan_delay_ms = -1; +module_param(bus_scan_delay_ms, int, 0444); + static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) { u32 status; @@ -941,6 +945,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pci_host_bridge *bridge; int err; + u32 delay = 0; if (!dev->of_node) return -ENODEV; @@ -992,6 +997,19 @@ static int rockchip_pcie_probe(struct platform_device *pdev) bridge->sysdata = rockchip; bridge->ops = &rockchip_pcie_ops; + /* + * Work around a crash caused by some devices on bus scan by applying a + * delay if one is given. Prefer command line value over device tree. + */ + if (bus_scan_delay_ms >= 0) + delay = bus_scan_delay_ms; + else + delay = rockchip->bus_scan_delay_ms; + if (delay > 0) { + dev_info(dev, "delay bus scan for %u ms\n", delay); + msleep(delay); + } + err = pci_host_probe(bridge); if (err < 0) goto err_remove_irq_domain; diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index 904dec0d3a88..2e49e9204894 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -149,6 +149,11 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) return PTR_ERR(rockchip->clk_pcie_pm); } + err = of_property_read_u32(node, "rockchip,bus-scan-delay-ms", + &rockchip->bus_scan_delay_ms); + if (err) + rockchip->bus_scan_delay_ms = 0; + return 0; } EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt); diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 1650a5087450..18f37820b35b 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -300,6 +300,8 @@ struct rockchip_pcie { phys_addr_t msg_bus_addr; bool is_rc; struct resource *mem_res; + /* bus scan delay for crash causing devices' workaround */ + u32 bus_scan_delay_ms; }; static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg) From patchwork Thu Dec 31 12:52:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= X-Patchwork-Id: 11994109 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E912C433E6 for ; Thu, 31 Dec 2020 12:57:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E4D7622473 for ; Thu, 31 Dec 2020 12:57:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726655AbgLaM5Z (ORCPT ); Thu, 31 Dec 2020 07:57:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726681AbgLaM5Z (ORCPT ); Thu, 31 Dec 2020 07:57:25 -0500 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD680C061799 for ; Thu, 31 Dec 2020 04:56:44 -0800 (PST) Received: by mail-lf1-x12d.google.com with SMTP id y19so43728298lfa.13 for ; Thu, 31 Dec 2020 04:56:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0fBv2gpwapqGxc4UK93YsXY43KDSuwDEMOo2qzk7zYQ=; b=cacK2IEW77bys+SQJVCBhRtYkSAF0cwGhG3GelH7XRMPehnLWlQClM9v5WDgj7a2ox xTNDJaU0h1iBZ/x/oQKWFzqNppks2r62ysNcyEXYlPKJFPu1rxhPgcHtWKzZDU2uhuAz HEERNFCx7hETSdItud9NdD7Rdvos/vjHKnmbfcVBtZgXO4GtdlOrEP8FyqzPA7GovKPt oLTiqpfSUgMscXfOdIAtbhAGeP7KoA+xCNFlq1iH0L6ywM2l1SG66RJbC91R1FkQ3rIw DrMVhZe58RDlHpnxEcFgprPJrGLztGkimnkdBUYPIzFQ9QN9lykdwprxqYjs3ecA4Z/J gxdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0fBv2gpwapqGxc4UK93YsXY43KDSuwDEMOo2qzk7zYQ=; b=eUeBAe320A0LyWPvmp11AkC4sgYAsHA6ztfmjO+rRwYSpQxWNRcJ6GjFvC96QzHGXx BTOvrleGdt4XUwZqzy5X9DXf34Cs2oLkNcHHnY5hZcWNAstCuh+B9Yf1pWi5itOABtZj m5xEIrZmn19IntDFYrBSf27w1lgCtEA6n4Ag4FIWNeP2y42sf3v1qvM6d7R9fCgI1ugm 5UFpTdgXcEapNKOqZpmXVNm1BsK8oDdQfkxHGnIdsu8WuNW4R2+60Z7ohzDw5caIFB+B CjOEasYq2Dltdd8uyfljxeE0Q4N47Fi5CHOjan4raY90BT6hgQGrIPefE9G1dgkAEnfg nq9Q== X-Gm-Message-State: AOAM533KrYF+K3STcJ9ofOnXXERqZuoOP9r8564g2Cf/6iZT/5p4RAhC WQ6GUmge44yHf1O+YAyw6PforcnSJ9QGfQ== X-Google-Smtp-Source: ABdhPJytSeX7EP+EU6g5Sis28jEYMyZJYLpLxGKAemzBn5XLYv0gEYWx4YEFfQ/33Dzzrm2KvqU3/A== X-Received: by 2002:a05:651c:11c4:: with SMTP id z4mr29662150ljo.443.1609419403419; Thu, 31 Dec 2020 04:56:43 -0800 (PST) Received: from localhost.localdomain (85-76-98-107-nat.elisa-mobile.fi. [85.76.98.107]) by smtp.gmail.com with ESMTPSA id r201sm6230659lff.268.2020.12.31.04.56.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Dec 2020 04:56:42 -0800 (PST) From: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= To: Shawn Lin , Heiko Stuebner Cc: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas Subject: [RFC PATCH 2/3] dt-bindings: PCI: rockchip: document bus-scan-delay-ms workaround property Date: Thu, 31 Dec 2020 14:52:13 +0200 Message-Id: <20201231125214.25733-3-nuumiofi@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201231125214.25733-1-nuumiofi@gmail.com> References: <20201231125214.25733-1-nuumiofi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org New "rockchip,bus-scan-delay-ms" property can be used to set a delay before PCIe bus scan as a workaround for some problematic devices causing a crash in bus scan. Signed-off-by: Jari Hämäläinen --- Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt index af34c65773fd..394bdf562d58 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt +++ b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt @@ -57,6 +57,8 @@ Optional Property: using 24MHz OSC for RC's PHY. - ep-gpios: contain the entry for pre-reset GPIO - num-lanes: number of lanes to use +- rockchip,bus-scan-delay-ms: delay before PCIe bus scan in milliseconds. + Provides a workaround for some devices causing a crash in bus scan. - vpcie12v-supply: The phandle to the 12v regulator to use for PCIe. - vpcie3v3-supply: The phandle to the 3.3v regulator to use for PCIe. - vpcie1v8-supply: The phandle to the 1.8v regulator to use for PCIe. @@ -106,6 +108,7 @@ pcie0: pcie@f8000000 { <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; reset-names = "core", "mgmt", "mgmt-sticky", "pipe", "pm", "pclk", "aclk"; + rockchip,bus-scan-delay-ms = <1100>; /* deprecated legacy PHY model */ phys = <&pcie_phy>; phy-names = "pcie-phy"; From patchwork Thu Dec 31 12:52:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= X-Patchwork-Id: 11994107 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41808C433E9 for ; Thu, 31 Dec 2020 12:57:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0BE8B223E4 for ; Thu, 31 Dec 2020 12:57:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726855AbgLaM51 (ORCPT ); Thu, 31 Dec 2020 07:57:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726681AbgLaM50 (ORCPT ); Thu, 31 Dec 2020 07:57:26 -0500 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01F3BC06179B for ; Thu, 31 Dec 2020 04:56:46 -0800 (PST) Received: by mail-lf1-x12d.google.com with SMTP id h205so43878094lfd.5 for ; Thu, 31 Dec 2020 04:56:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PTGZ/ohUNRbTjFJ7AFoie+4oyvbYi7rty13LxXQOIG0=; b=Lf0G4YG3IoEWxS/gyi5qqLOEhbBDzk3GDQcwcRoBjp5/J2rV6AJGVm4hHrn61odt0X zgAqspSfCw4J5dqcg6KBwNYyC5TTQgOKSLaHoItJ9I59qvb+HD6gvumWUjk+3G57WrhD 1qYwV4YoXxF+xTVO1mnrMiMAxfkdKZng31iQLy7bsrpkII2LHWx+oiTh74p+87HB/J2t ncnN77q1Bgw+BACCZ3YtyRHxcalQXfO1D43mHQrT3RPaLrZFsd/GdKrX257dVfSd87KA JOmvyg16kUYstz7BYFk75PQr1ldN8wM4/1CL4kfW2pehU1KVowHEhKmtem7YkTK7jXgG u/6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PTGZ/ohUNRbTjFJ7AFoie+4oyvbYi7rty13LxXQOIG0=; b=RqSiAOe6Lyvd5g7BUxk4wDjnksDzE8IseOzfTvIehpbwD0jSeQSoX004kNnI+oqr7I WnAO0E8UzHcmAf4TBQf9Yt3fLYkW7zuIXMDy6i72ZCZdPvhUgGCAJa7W7dr5WfgiOmaw lbNgrLBxDaSzljqmCRmzGXANk/C516IL53PdUGJNFwDn6UU1AEmwD9nJKumqA499fa6b jnOwzCSetMW5ivjmkATv0eU2z/hbF6hxf8pK+pOosiUZaK2RYs04QAH+RspftpryEFoU Y0uZrTBSuaDU8df+c6p3V1aibMOFN7713CbgvC0Ei7qt7uUSXO0YqNBesOUpS/eh+mqU lYtQ== X-Gm-Message-State: AOAM532vT6VT2ciiZaCk4AogtuatI9odAuvT83jh5Wnp3MepVfNLzz/3 21Y9VuTUSl2+Jvl84Xir0/2sDKpthL+/RA== X-Google-Smtp-Source: ABdhPJwsuh+AlYXEreFhiUSUiyUTRlt7hw+lOYUvGYBH1wcBcIVgcMWBYHI196hJYL1VzrrQYqVygw== X-Received: by 2002:a2e:b5d9:: with SMTP id g25mr29328125ljn.471.1609419404582; Thu, 31 Dec 2020 04:56:44 -0800 (PST) Received: from localhost.localdomain (85-76-98-107-nat.elisa-mobile.fi. [85.76.98.107]) by smtp.gmail.com with ESMTPSA id r201sm6230659lff.268.2020.12.31.04.56.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Dec 2020 04:56:44 -0800 (PST) From: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= To: Shawn Lin , Heiko Stuebner Cc: =?utf-8?b?SmFyaSBIw6Rtw6Rsw6RpbmVu?= , linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org, Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas Subject: [RFC PATCH 3/3] arm64: dts: rockchip: use bus-scan-delay-ms workaround with RockPro64 PCIe Date: Thu, 31 Dec 2020 14:52:14 +0200 Message-Id: <20201231125214.25733-4-nuumiofi@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201231125214.25733-1-nuumiofi@gmail.com> References: <20201231125214.25733-1-nuumiofi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add delay before RockPro64 PCIe bus scan as a workaround for some devices causing a crash like many LSI SAS controller based RAID controllers and host bus adapters. As a side effect this slows down system startup by the amount of delay even with devices that don't need the delay to work. Signed-off-by: Jari Hämäläinen --- arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi index 6e553ff47534..256c357c069e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi @@ -546,6 +546,7 @@ &pcie0 { num-lanes = <4>; pinctrl-names = "default"; pinctrl-0 = <&pcie_perst>; + rockchip,bus-scan-delay-ms = <1100>; vpcie12v-supply = <&vcc12v_dcin>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay";