From patchwork Fri Jan 8 01:51:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 12005557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37E51C433E0 for ; Fri, 8 Jan 2021 01:52:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E9B0823435 for ; Fri, 8 Jan 2021 01:52:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729741AbhAHBwD (ORCPT ); Thu, 7 Jan 2021 20:52:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729548AbhAHBwC (ORCPT ); Thu, 7 Jan 2021 20:52:02 -0500 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FE28C0612F4 for ; Thu, 7 Jan 2021 17:51:22 -0800 (PST) Received: by mail-pg1-x52d.google.com with SMTP id i7so6620918pgc.8 for ; Thu, 07 Jan 2021 17:51:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=/9yRUK3ifPn4jWkGqxydFEM9X/uNu0aPyF+TlRNBzFw=; b=qaEUGAlhSBJJz0k547jBxG2kJxrjPzoD7C87YteZVKHStDtMmN+mdXS7ljLfYPMX8D bSfj32/jzcvyHmod0BtAVPfUIQR7Jz5xH9mvv+Uizi9FK6+zV0hPsVt96gGUcmc4FtJZ /TQB7biXj6E5+tSYoP6WPTU/pAqBQSjUZob4Ciy2Jy6lqvV5fPH0DrlRVs0g5sX4ZcJS qS0XxVbe9MD2W35BDeRfnD3FiWiGGS65C4IOpt1HOhfxDWL+RE/ONCaxy0oXkSV6ce5G ThoJmGcKGaO4Ygo8wBftsDtjGcCi2RnUSxD6GTPHOcEa+LGu2V/mPoyK7Sfo7jvK/1hB IRFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/9yRUK3ifPn4jWkGqxydFEM9X/uNu0aPyF+TlRNBzFw=; b=fEjmprNhjJbKGBiuuzxkMmiLWlwL0wQI//JeAHQmRLFJkJIrw5yiOZ1xtU7TUhjDDu e6IT1lZAMgYo1gpa3mcJRBmiT1/PY+y3X8pqSaEGWU1uKEgXt+FzgJRdEWGD6IlyqtJ4 GfGh306Mq2LataqbCVzLjVDOhjDywkPx/6wfcbazn1/QHuBW5kVAMame4hK5W8Ajucn8 GS5GxMsUPeBLj1YaMl1eJ4YMPesOCBlDiTDrNDYLoMnbs08qvu4ep3DYjhZvDXtxj6SD kJAIIlXPn93Nz1Hk6pDdU19HIE4iAblCDl3uLUDfKZCWOge27c8hrDjTOv537E4b6EG6 9Mpg== X-Gm-Message-State: AOAM533PrmCy27O86kYdGP5ragtksdDbUk4RpLJV6DuHZmbkDKArCaxS jJ7LbXtoigNXQpgx4Ql7LPE5xg== X-Google-Smtp-Source: ABdhPJyreAjnxcrKczefp93YqgxrjjRc2/Fen+5GwEWM9pqajXC5EAzflLZ2kqmzioOVLu7KUBwrBw== X-Received: by 2002:a62:5844:0:b029:1a8:b9dc:77bf with SMTP id m65-20020a6258440000b02901a8b9dc77bfmr1422210pfb.39.1610070682061; Thu, 07 Jan 2021 17:51:22 -0800 (PST) Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id fw12sm6142756pjb.43.2021.01.07.17.51.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 17:51:20 -0800 (PST) From: John Stultz To: lkml Cc: Yu Chen , Felipe Balbi , Tejas Joglekar , Yang Fei , YongQin Liu , Andrzej Pietrasiewicz , Thinh Nguyen , Jun Li , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-usb@vger.kernel.org, John Stultz Subject: [PATCH v3 1/2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD Date: Fri, 8 Jan 2021 01:51:14 +0000 Message-Id: <20210108015115.27920-1-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Yu Chen Just resending this, as discussion died out a bit and I'm not sure how to make further progress. See here for debug data that was requested last time around: https://lore.kernel.org/lkml/CALAqxLXdnaUfJKx0aN9xWwtfWVjMWigPpy2aqsNj56yvnbU80g@mail.gmail.com/ With the current dwc3 code on the HiKey960 we often see the COREIDLE flag get stuck off in __dwc3_gadget_start(), which seems to prevent the reset irq and causes the USB gadget to fail to initialize. We had seen occasional initialization failures with older kernels but with recent 5.x era kernels it seemed to be becoming much more common, so I dug back through some older trees and realized I dropped this quirk from Yu Chen during upstreaming as I couldn't provide a proper rational for it and it didn't seem to be necessary. I now realize I was wrong. After resubmitting the quirk, Thinh Nguyen pointed out that it shouldn't be a quirk at all and it is actually mentioned in the programming guide that it should be done when switching modes in DRD. So, to avoid these !COREIDLE lockups seen on HiKey960, this patch issues GCTL soft reset when switching modes if the controller is in DRD mode. Cc: Felipe Balbi Cc: Tejas Joglekar Cc: Yang Fei Cc: YongQin Liu Cc: Andrzej Pietrasiewicz Cc: Thinh Nguyen Cc: Jun Li Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org Signed-off-by: Yu Chen Signed-off-by: John Stultz --- v2: * Rework to always call the GCTL soft reset in DRD mode, rather then using a quirk as suggested by Thinh Nguyen v3: * Move GCTL soft reset under the spinlock as suggested by Thinh Nguyen --- drivers/usb/dwc3/core.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 841daec70b6e..b6a6b90eb2d5 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -114,10 +114,24 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) dwc->current_dr_role = mode; } +static void dwc3_gctl_core_soft_reset(struct dwc3 *dwc) +{ + int reg; + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg |= (DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc = work_to_dwc(work); unsigned long flags; + int hw_mode; int ret; u32 reg; @@ -156,6 +170,11 @@ static void __dwc3_set_mode(struct work_struct *work) spin_lock_irqsave(&dwc->lock, flags); + /* Execute a GCTL Core Soft Reset when switch mode in DRD*/ + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD) + dwc3_gctl_core_soft_reset(dwc); + dwc3_set_prtcap(dwc, dwc->desired_dr_role); spin_unlock_irqrestore(&dwc->lock, flags); From patchwork Fri Jan 8 01:51:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 12005559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C042C433E6 for ; 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Thu, 07 Jan 2021 17:51:23 -0800 (PST) Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id fw12sm6142756pjb.43.2021.01.07.17.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 17:51:22 -0800 (PST) From: John Stultz To: lkml Cc: John Stultz , Felipe Balbi , Tejas Joglekar , Yang Fei , YongQin Liu , Andrzej Pietrasiewicz , Thinh Nguyen , Jun Li , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-usb@vger.kernel.org Subject: [PATCH v3 2/2] usb: dwc3: Fix DRD mode change sequence following programming guide Date: Fri, 8 Jan 2021 01:51:15 +0000 Message-Id: <20210108015115.27920-2-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210108015115.27920-1-john.stultz@linaro.org> References: <20210108015115.27920-1-john.stultz@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org In reviewing the previous patch, Thinh Nguyen pointed out that the DRD mode change sequence should be like the following when switching from host -> device according to the programming guide (for all DRD IPs): 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(device) 3. Soft reset with DCTL.CSftRst 4. Then follow up with the initializing registers sequence The current code does: a. Soft reset with DCTL.CSftRst on driver probe b. Reset controller with GCTL.CoreSoftReset (added in previous patch) c. Set GCTL.PrtCapDir(device) d. < missing DCTL.CSftRst > e. Then follow up with initializing registers sequence So this patch adds the DCTL.CSftRst soft reset that was currently missing from the dwc3 mode switching. Cc: Felipe Balbi Cc: Tejas Joglekar Cc: Yang Fei Cc: YongQin Liu Cc: Andrzej Pietrasiewicz Cc: Thinh Nguyen Cc: Jun Li Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org Signed-off-by: John Stultz --- Feedback would be appreciated. I'm a little worried I should be conditionalizing the DCTL.CSftRst on DRD mode controllers, but I'm really not sure what the right thing to do is for non-DRD mode controllers. --- drivers/usb/dwc3/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index b6a6b90eb2d5..71f8b07ecb99 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -40,6 +40,8 @@ #define DWC3_DEFAULT_AUTOSUSPEND_DELAY 5000 /* ms */ +static int dwc3_core_soft_reset(struct dwc3 *dwc); + /** * dwc3_get_dr_mode - Validates and sets dr_mode * @dwc: pointer to our context structure @@ -177,6 +179,7 @@ static void __dwc3_set_mode(struct work_struct *work) dwc3_set_prtcap(dwc, dwc->desired_dr_role); + dwc3_core_soft_reset(dwc); spin_unlock_irqrestore(&dwc->lock, flags); switch (dwc->desired_dr_role) {