From patchwork Fri Jan 15 15:51:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B16DDC433DB for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 5AAF523884; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 687432339D for ; Fri, 15 Jan 2021 15:51:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 687432339D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNs-0003NL-NR; Fri, 15 Jan 2021 16:51:32 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNs-0008LK-6s; Fri, 15 Jan 2021 16:51:32 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de Subject: [PATCH v2 1/7] ARM: drop efm32 platform Date: Fri, 15 Jan 2021 16:51:24 +0100 Message-Id: <20210115155130.185010-2-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org I didn't touch this code since it served as a platform to introduce ARMv7-M support to Linux. The only known machine that runs Linux has only 4 MiB of RAM (that originally only exists to hold the display's framebuffer). There are no known users and no further use foreseeable, so drop the code. Signed-off-by: Uwe Kleine-König --- arch/arm/Kconfig | 10 +- arch/arm/Kconfig.debug | 17 --- arch/arm/Makefile | 1 - arch/arm/boot/dts/Makefile | 2 - arch/arm/boot/dts/efm32gg-dk3750.dts | 88 ------------- arch/arm/boot/dts/efm32gg.dtsi | 177 --------------------------- arch/arm/configs/efm32_defconfig | 98 --------------- arch/arm/include/debug/efm32.S | 45 ------- arch/arm/mach-efm32/Makefile | 2 - arch/arm/mach-efm32/Makefile.boot | 4 - arch/arm/mach-efm32/dtmachine.c | 16 --- arch/arm/mm/Kconfig | 1 - 12 files changed, 1 insertion(+), 460 deletions(-) delete mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts delete mode 100644 arch/arm/boot/dts/efm32gg.dtsi delete mode 100644 arch/arm/configs/efm32_defconfig delete mode 100644 arch/arm/include/debug/efm32.S delete mode 100644 arch/arm/mach-efm32/Makefile delete mode 100644 arch/arm/mach-efm32/Makefile.boot delete mode 100644 arch/arm/mach-efm32/dtmachine.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 138248999df7..d31f3d74ce9b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -727,14 +727,6 @@ source "arch/arm/mach-zx/Kconfig" source "arch/arm/mach-zynq/Kconfig" # ARMv7-M architecture -config ARCH_EFM32 - bool "Energy Micro efm32" - depends on ARM_SINGLE_ARMV7M - select GPIOLIB - help - Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko - processors. - config ARCH_LPC18XX bool "NXP LPC18xx/LPC43xx" depends on ARM_SINGLE_ARMV7M @@ -1552,7 +1544,7 @@ config ARM_MODULE_PLTS config FORCE_MAX_ZONEORDER int "Maximum zone order" default "12" if SOC_AM33XX - default "9" if SA1111 || ARCH_EFM32 + default "9" if SA1111 default "11" help The kernel memory allocator divides physically contiguous memory diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 4ff04201a8cc..46458f9f99fc 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1456,20 +1456,6 @@ choice options; the platform specific options are deprecated and will be soon removed. - config DEBUG_LL_UART_EFM32 - bool "Kernel low-level debugging via efm32 UART" - depends on ARCH_EFM32 - help - Say Y here if you want the debug print routines to direct - their output to an UART or USART port on efm32 based - machines. Use the following addresses for DEBUG_UART_PHYS: - - 0x4000c000 | USART0 - 0x4000c400 | USART1 - 0x4000c800 | USART2 - 0x4000e000 | UART0 - 0x4000e400 | UART1 - config DEBUG_LL_UART_PL01X bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART" help @@ -1587,7 +1573,6 @@ config DEBUG_LL_INCLUDE default "debug/meson.S" if DEBUG_MESON_UARTAO default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X default "debug/exynos.S" if DEBUG_EXYNOS_UART - default "debug/efm32.S" if DEBUG_LL_UART_EFM32 default "debug/icedcc.S" if DEBUG_ICEDCC default "debug/imx.S" if DEBUG_IMX1_UART || \ DEBUG_IMX25_UART || \ @@ -1682,7 +1667,6 @@ config DEBUG_UART_PHYS default 0x20201000 if DEBUG_BCM2835 default 0x3e000000 if DEBUG_BCM_KONA_UART default 0x3f201000 if DEBUG_BCM2836 - default 0x4000e400 if DEBUG_LL_UART_EFM32 default 0x40010000 if STM32MP1_DEBUG_UART default 0x40011000 if STM32F4_DEBUG_UART || STM32F7_DEBUG_UART || \ STM32H7_DEBUG_UART @@ -1768,7 +1752,6 @@ config DEBUG_UART_PHYS default 0xfffff200 if DEBUG_AT91_RM9200_DBGU depends on ARCH_EP93XX || \ DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ - DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \ DEBUG_R7S9210_SCIF2 || DEBUG_R7S9210_SCIF4 || \ diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4aaec9599e8a..c1cf77805e9a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -168,7 +168,6 @@ machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor machine-$(CONFIG_ARCH_DOVE) += dove -machine-$(CONFIG_ARCH_EFM32) += efm32 machine-$(CONFIG_ARCH_EP93XX) += ep93xx machine-$(CONFIG_ARCH_EXYNOS) += exynos machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3d1ea0b25168..325e167d3404 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -177,8 +177,6 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \ da850-lego-ev3.dtb dtb-$(CONFIG_ARCH_DIGICOLOR) += \ cx92755_equinox.dtb -dtb-$(CONFIG_ARCH_EFM32) += \ - efm32gg-dk3750.dtb dtb-$(CONFIG_ARCH_EXYNOS3) += \ exynos3250-artik5-eval.dtb \ exynos3250-monk.dtb \ diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts deleted file mode 100644 index adfa559a488b..000000000000 --- a/arch/arm/boot/dts/efm32gg-dk3750.dts +++ /dev/null @@ -1,88 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device tree for EFM32GG-DK3750 development board. - * - * Documentation available from - * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf - */ - -/dts-v1/; -#include "efm32gg.dtsi" - -/ { - model = "Energy Micro Giant Gecko Development Kit"; - compatible = "efm32,dk3750"; - - chosen { - bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0"; - }; - - memory@88000000 { - device_type = "memory"; - reg = <0x88000000 0x400000>; - }; - - soc { - adc@40002000 { - status = "ok"; - }; - - i2c@4000a000 { - energymicro,location = <3>; - status = "ok"; - - temp@48 { - compatible = "st,stds75"; - reg = <0x48>; - }; - - eeprom@50 { - compatible = "microchip,24c02", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; - - spi0: spi@4000c000 { /* USART0 */ - cs-gpios = <&gpio 68 1>; // E4 - energymicro,location = <1>; - status = "ok"; - - microsd@0 { - compatible = "mmc-spi-slot"; - spi-max-frequency = <100000>; - voltage-ranges = <3200 3400>; - broken-cd; - reg = <0>; - }; - }; - - spi1: spi@4000c400 { /* USART1 */ - cs-gpios = <&gpio 51 1>; // D3 - energymicro,location = <1>; - status = "ok"; - - ks8851@0 { - compatible = "ks8851"; - spi-max-frequency = <6000000>; - reg = <0>; - interrupt-parent = <&boardfpga>; - interrupts = <4>; - }; - }; - - uart4: uart@4000e400 { /* UART1 */ - energymicro,location = <2>; - status = "ok"; - }; - - boardfpga: boardfpga@80000000 { - compatible = "efm32board"; - reg = <0x80000000 0x400>; - irq-gpios = <&gpio 64 1>; - interrupt-controller; - #interrupt-cells = <1>; - status = "ok"; - }; - }; -}; diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi deleted file mode 100644 index 8a58e49144cc..000000000000 --- a/arch/arm/boot/dts/efm32gg.dtsi +++ /dev/null @@ -1,177 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device tree for Energy Micro EFM32 Giant Gecko SoC. - * - * Documentation available from - * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf - */ - -#include "armv7-m.dtsi" -#include "dt-bindings/clock/efm32-cmu.h" - -/ { - #address-cells = <1>; - #size-cells = <1>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - }; - - soc { - adc: adc@40002000 { - compatible = "energymicro,efm32-adc"; - reg = <0x40002000 0x400>; - interrupts = <7>; - clocks = <&cmu clk_HFPERCLKADC0>; - status = "disabled"; - }; - - gpio: gpio@40006000 { - compatible = "energymicro,efm32-gpio"; - reg = <0x40006000 0x1000>; - interrupts = <1 11>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - clocks = <&cmu clk_HFPERCLKGPIO>; - status = "ok"; - }; - - i2c0: i2c@4000a000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-i2c"; - reg = <0x4000a000 0x400>; - interrupts = <9>; - clocks = <&cmu clk_HFPERCLKI2C0>; - clock-frequency = <100000>; - status = "disabled"; - }; - - i2c1: i2c@4000a400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-i2c"; - reg = <0x4000a400 0x400>; - interrupts = <10>; - clocks = <&cmu clk_HFPERCLKI2C1>; - clock-frequency = <100000>; - status = "disabled"; - }; - - spi0: spi@4000c000 { /* USART0 */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-spi"; - reg = <0x4000c000 0x400>; - interrupts = <3 4>; - clocks = <&cmu clk_HFPERCLKUSART0>; - status = "disabled"; - }; - - spi1: spi@4000c400 { /* USART1 */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-spi"; - reg = <0x4000c400 0x400>; - interrupts = <15 16>; - clocks = <&cmu clk_HFPERCLKUSART1>; - status = "disabled"; - }; - - spi2: spi@4000c800 { /* USART2 */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-spi"; - reg = <0x4000c800 0x400>; - interrupts = <18 19>; - clocks = <&cmu clk_HFPERCLKUSART2>; - status = "disabled"; - }; - - uart0: uart@4000c000 { /* USART0 */ - compatible = "energymicro,efm32-uart"; - reg = <0x4000c000 0x400>; - interrupts = <3 4>; - clocks = <&cmu clk_HFPERCLKUSART0>; - status = "disabled"; - }; - - uart1: uart@4000c400 { /* USART1 */ - compatible = "energymicro,efm32-uart"; - reg = <0x4000c400 0x400>; - interrupts = <15 16>; - clocks = <&cmu clk_HFPERCLKUSART1>; - status = "disabled"; - }; - - uart2: uart@4000c800 { /* USART2 */ - compatible = "energymicro,efm32-uart"; - reg = <0x4000c800 0x400>; - interrupts = <18 19>; - clocks = <&cmu clk_HFPERCLKUSART2>; - status = "disabled"; - }; - - uart3: uart@4000e000 { /* UART0 */ - compatible = "energymicro,efm32-uart"; - reg = <0x4000e000 0x400>; - interrupts = <20 21>; - clocks = <&cmu clk_HFPERCLKUART0>; - status = "disabled"; - }; - - uart4: uart@4000e400 { /* UART1 */ - compatible = "energymicro,efm32-uart"; - reg = <0x4000e400 0x400>; - interrupts = <22 23>; - clocks = <&cmu clk_HFPERCLKUART1>; - status = "disabled"; - }; - - timer0: timer@40010000 { - compatible = "energymicro,efm32-timer"; - reg = <0x40010000 0x400>; - interrupts = <2>; - clocks = <&cmu clk_HFPERCLKTIMER0>; - }; - - timer1: timer@40010400 { - compatible = "energymicro,efm32-timer"; - reg = <0x40010400 0x400>; - interrupts = <12>; - clocks = <&cmu clk_HFPERCLKTIMER1>; - }; - - timer2: timer@40010800 { - compatible = "energymicro,efm32-timer"; - reg = <0x40010800 0x400>; - interrupts = <13>; - clocks = <&cmu clk_HFPERCLKTIMER2>; - }; - - timer3: timer@40010c00 { - compatible = "energymicro,efm32-timer"; - reg = <0x40010c00 0x400>; - interrupts = <14>; - clocks = <&cmu clk_HFPERCLKTIMER3>; - }; - - cmu: cmu@400c8000 { - compatible = "efm32gg,cmu"; - reg = <0x400c8000 0x400>; - interrupts = <32>; - #clock-cells = <1>; - }; - }; -}; diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig deleted file mode 100644 index 46213f0530c4..000000000000 --- a/arch/arm/configs/efm32_defconfig +++ /dev/null @@ -1,98 +0,0 @@ -CONFIG_HIGH_RES_TIMERS=y -CONFIG_LOG_BUF_SHIFT=12 -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -# CONFIG_UID16 is not set -# CONFIG_BASE_FULL is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -# CONFIG_SIGNALFD is not set -# CONFIG_EVENTFD is not set -# CONFIG_AIO is not set -CONFIG_EMBEDDED=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_MMU is not set -CONFIG_ARM_SINGLE_ARMV7M=y -CONFIG_ARCH_EFM32=y -CONFIG_SET_MEM_PARAM=y -CONFIG_DRAM_BASE=0x88000000 -CONFIG_DRAM_SIZE=0x00400000 -CONFIG_FLASH_MEM_BASE=0x8c000000 -CONFIG_FLASH_SIZE=0x01000000 -CONFIG_PREEMPT=y -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_XIP_KERNEL=y -CONFIG_XIP_PHYS_ADDR=0x8c000000 -CONFIG_BINFMT_FLAT=y -CONFIG_BINFMT_SHARED_FLAT=y -# CONFIG_COREDUMP is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -# CONFIG_WIRELESS is not set -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -# CONFIG_FW_LOADER is not set -CONFIG_MTD=y -CONFIG_MTD_BLOCK_RO=y -CONFIG_MTD_ROM=y -CONFIG_MTD_UCLINUX=y -# CONFIG_BLK_DEV is not set -CONFIG_NETDEVICES=y -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -CONFIG_KS8851=y -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_DEVKMEM is not set -CONFIG_SERIAL_EFM32_UART=y -CONFIG_SERIAL_EFM32_UART_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -# CONFIG_I2C_COMPAT is not set -CONFIG_I2C_EFM32=y -CONFIG_SPI=y -CONFIG_SPI_EFM32=y -CONFIG_GPIO_SYSFS=y -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_SPI=y -CONFIG_EXT2_FS=y -# CONFIG_FILE_LOCKING is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_ROMFS_FS=y -CONFIG_ROMFS_BACKED_BY_MTD=y -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_INFO=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_FTRACE is not set diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S deleted file mode 100644 index b0083d6e31e8..000000000000 --- a/arch/arm/include/debug/efm32.S +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2013 Pengutronix - * Uwe Kleine-Koenig - */ - -#define UARTn_CMD 0x000c -#define UARTn_CMD_TXEN 0x0004 - -#define UARTn_STATUS 0x0010 -#define UARTn_STATUS_TXC 0x0020 -#define UARTn_STATUS_TXBL 0x0040 - -#define UARTn_TXDATA 0x0034 - - .macro addruart, rx, tmp, tmp2 - ldr \rx, =(CONFIG_DEBUG_UART_PHYS) - - /* - * enable TX. The driver might disable it to save energy. We - * don't care about disabling at the end as during debug power - * consumption isn't that important. - */ - ldr \tmp, =(UARTn_CMD_TXEN) - str \tmp, [\rx, #UARTn_CMD] - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #UARTn_TXDATA] - .endm - - .macro waituartcts,rd,rx - .endm - - .macro waituarttxrdy,rd,rx -1001: ldr \rd, [\rx, #UARTn_STATUS] - tst \rd, #UARTn_STATUS_TXBL - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, UARTn_STATUS] - tst \rd, #UARTn_STATUS_TXC - bne 1001b - .endm diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile deleted file mode 100644 index dede3fa55a76..000000000000 --- a/arch/arm/mach-efm32/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -obj-y += dtmachine.o diff --git a/arch/arm/mach-efm32/Makefile.boot b/arch/arm/mach-efm32/Makefile.boot deleted file mode 100644 index cec195d4fcba..000000000000 --- a/arch/arm/mach-efm32/Makefile.boot +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# Empty file waiting for deletion once Makefile.boot isn't needed any more. -# Patch waits for application at -# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 . diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c deleted file mode 100644 index e9364b843641..000000000000 --- a/arch/arm/mach-efm32/dtmachine.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include - -#include - -#include - -static const char *const efm32gg_compat[] __initconst = { - "efm32,dk3750", - NULL -}; - -DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)") - .dt_compat = efm32gg_compat, - .restart = armv7m_restart, -MACHINE_END diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 02692fbe2db5..35f43d0aa056 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -638,7 +638,6 @@ config CPU_V7M_NUM_IRQ int "Number of external interrupts connected to the NVIC" depends on CPU_V7M default 90 if ARCH_STM32 - default 38 if ARCH_EFM32 default 112 if SOC_VF610 default 240 help From patchwork Fri Jan 15 15:51:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023177 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0C93C433E9 for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 6D80C2389B; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 866442388E for ; Fri, 15 Jan 2021 15:51:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 866442388E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNs-0003NM-PD; Fri, 15 Jan 2021 16:51:32 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNs-0008LN-Ee; Fri, 15 Jan 2021 16:51:32 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson , Michael Turquette , Stephen Boyd List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-clk@vger.kernel.org Subject: [PATCH v2 2/7] clk: Drop unused efm32gg driver Date: Fri, 15 Jan 2021 16:51:25 +0100 Message-Id: <20210115155130.185010-3-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org Support for this machine was just removed, so drop the now unused clk driver, too. Signed-off-by: Uwe Kleine-König --- drivers/clk/Makefile | 1 - drivers/clk/clk-efm32gg.c | 84 --------------------------------------- 2 files changed, 85 deletions(-) delete mode 100644 drivers/clk/clk-efm32gg.c diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index dbdc590e7de3..a1197d753d82 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o -obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o obj-$(CONFIG_ARCH_SPARX5) += clk-sparx5.o obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c deleted file mode 100644 index 85beaacb4088..000000000000 --- a/drivers/clk/clk-efm32gg.c +++ /dev/null @@ -1,84 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2013 Pengutronix - * Uwe Kleine-Koenig - */ -#include -#include -#include -#include -#include - -#include - -#define CMU_HFPERCLKEN0 0x44 -#define CMU_MAX_CLKS 37 - -static struct clk_hw_onecell_data *clk_data; - -static void __init efm32gg_cmu_init(struct device_node *np) -{ - int i; - void __iomem *base; - struct clk_hw **hws; - - clk_data = kzalloc(struct_size(clk_data, hws, CMU_MAX_CLKS), - GFP_KERNEL); - - if (!clk_data) - return; - - hws = clk_data->hws; - - for (i = 0; i < CMU_MAX_CLKS; ++i) - hws[i] = ERR_PTR(-ENOENT); - - base = of_iomap(np, 0); - if (!base) { - pr_warn("Failed to map address range for efm32gg,cmu node\n"); - return; - } - - hws[clk_HFXO] = clk_hw_register_fixed_rate(NULL, "HFXO", NULL, 0, - 48000000); - - hws[clk_HFPERCLKUSART0] = clk_hw_register_gate(NULL, "HFPERCLK.USART0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL); - hws[clk_HFPERCLKUSART1] = clk_hw_register_gate(NULL, "HFPERCLK.USART1", - "HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL); - hws[clk_HFPERCLKUSART2] = clk_hw_register_gate(NULL, "HFPERCLK.USART2", - "HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL); - hws[clk_HFPERCLKUART0] = clk_hw_register_gate(NULL, "HFPERCLK.UART0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL); - hws[clk_HFPERCLKUART1] = clk_hw_register_gate(NULL, "HFPERCLK.UART1", - "HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL); - hws[clk_HFPERCLKTIMER0] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL); - hws[clk_HFPERCLKTIMER1] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER1", - "HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL); - hws[clk_HFPERCLKTIMER2] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER2", - "HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL); - hws[clk_HFPERCLKTIMER3] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER3", - "HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL); - hws[clk_HFPERCLKACMP0] = clk_hw_register_gate(NULL, "HFPERCLK.ACMP0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL); - hws[clk_HFPERCLKACMP1] = clk_hw_register_gate(NULL, "HFPERCLK.ACMP1", - "HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL); - hws[clk_HFPERCLKI2C0] = clk_hw_register_gate(NULL, "HFPERCLK.I2C0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL); - hws[clk_HFPERCLKI2C1] = clk_hw_register_gate(NULL, "HFPERCLK.I2C1", - "HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL); - hws[clk_HFPERCLKGPIO] = clk_hw_register_gate(NULL, "HFPERCLK.GPIO", - "HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL); - hws[clk_HFPERCLKVCMP] = clk_hw_register_gate(NULL, "HFPERCLK.VCMP", - "HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL); - hws[clk_HFPERCLKPRS] = clk_hw_register_gate(NULL, "HFPERCLK.PRS", - "HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL); - hws[clk_HFPERCLKADC0] = clk_hw_register_gate(NULL, "HFPERCLK.ADC0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL); - hws[clk_HFPERCLKDAC0] = clk_hw_register_gate(NULL, "HFPERCLK.DAC0", - "HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL); - - of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data); -} -CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init); From patchwork Fri Jan 15 15:51:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C1A1C433E6 for ; Fri, 15 Jan 2021 15:51:37 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 94D36238A1; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82F242388B for ; Fri, 15 Jan 2021 15:51:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82F242388B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNt-0003NN-0I; Fri, 15 Jan 2021 16:51:33 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNs-0008LQ-Lf; Fri, 15 Jan 2021 16:51:32 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson , Daniel Lezcano , Thomas Gleixner List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/7] clocksource: Drop unused efm32 timer code Date: Fri, 15 Jan 2021 16:51:26 +0100 Message-Id: <20210115155130.185010-4-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org Support for this machine was just removed, so drop the now unused timer code, too. Signed-off-by: Uwe Kleine-König --- drivers/clocksource/Kconfig | 9 - drivers/clocksource/Makefile | 1 - drivers/clocksource/timer-efm32.c | 278 ------------------------------ 3 files changed, 288 deletions(-) delete mode 100644 drivers/clocksource/timer-efm32.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 14c7c4712478..1416a32140c5 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -242,15 +242,6 @@ config INTEGRATOR_AP_TIMER help Enables support for the Integrator-AP timer. -config CLKSRC_EFM32 - bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 - depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) - select CLKSRC_MMIO - default ARCH_EFM32 - help - Support to use the timers of EFM32 SoCs as clock source and clock - event device. - config CLKSRC_LPC32XX bool "Clocksource for LPC32XX" if COMPILE_TEST depends on HAS_IOMEM diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 3c75cbbf8533..08173383f2d9 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_VT8500_TIMER) += timer-vt8500.o obj-$(CONFIG_NSPIRE_TIMER) += timer-zevio.o obj-$(CONFIG_BCM_KONA_TIMER) += bcm_kona_timer.o obj-$(CONFIG_CADENCE_TTC_TIMER) += timer-cadence-ttc.o -obj-$(CONFIG_CLKSRC_EFM32) += timer-efm32.o obj-$(CONFIG_CLKSRC_STM32) += timer-stm32.o obj-$(CONFIG_CLKSRC_STM32_LP) += timer-stm32-lp.o obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o diff --git a/drivers/clocksource/timer-efm32.c b/drivers/clocksource/timer-efm32.c deleted file mode 100644 index 441a4b916841..000000000000 --- a/drivers/clocksource/timer-efm32.c +++ /dev/null @@ -1,278 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2013 Pengutronix - * Uwe Kleine-Koenig - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define TIMERn_CTRL 0x00 -#define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24) -#define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10) -#define TIMERn_CTRL_CLKSEL(val) (((val) & 0x3) << 16) -#define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0) -#define TIMERn_CTRL_OSMEN 0x00000010 -#define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0) -#define TIMERn_CTRL_MODE_UP TIMERn_CTRL_MODE(0) -#define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1) - -#define TIMERn_CMD 0x04 -#define TIMERn_CMD_START 0x00000001 -#define TIMERn_CMD_STOP 0x00000002 - -#define TIMERn_IEN 0x0c -#define TIMERn_IF 0x10 -#define TIMERn_IFS 0x14 -#define TIMERn_IFC 0x18 -#define TIMERn_IRQ_UF 0x00000002 - -#define TIMERn_TOP 0x1c -#define TIMERn_CNT 0x24 - -struct efm32_clock_event_ddata { - struct clock_event_device evtdev; - void __iomem *base; - unsigned periodic_top; -}; - -static int efm32_clock_event_shutdown(struct clock_event_device *evtdev) -{ - struct efm32_clock_event_ddata *ddata = - container_of(evtdev, struct efm32_clock_event_ddata, evtdev); - - writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); - return 0; -} - -static int efm32_clock_event_set_oneshot(struct clock_event_device *evtdev) -{ - struct efm32_clock_event_ddata *ddata = - container_of(evtdev, struct efm32_clock_event_ddata, evtdev); - - writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); - writel_relaxed(TIMERn_CTRL_PRESC_1024 | - TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | - TIMERn_CTRL_OSMEN | - TIMERn_CTRL_MODE_DOWN, - ddata->base + TIMERn_CTRL); - return 0; -} - -static int efm32_clock_event_set_periodic(struct clock_event_device *evtdev) -{ - struct efm32_clock_event_ddata *ddata = - container_of(evtdev, struct efm32_clock_event_ddata, evtdev); - - writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); - writel_relaxed(ddata->periodic_top, ddata->base + TIMERn_TOP); - writel_relaxed(TIMERn_CTRL_PRESC_1024 | - TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | - TIMERn_CTRL_MODE_DOWN, - ddata->base + TIMERn_CTRL); - writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); - return 0; -} - -static int efm32_clock_event_set_next_event(unsigned long evt, - struct clock_event_device *evtdev) -{ - struct efm32_clock_event_ddata *ddata = - container_of(evtdev, struct efm32_clock_event_ddata, evtdev); - - writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); - writel_relaxed(evt, ddata->base + TIMERn_CNT); - writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); - - return 0; -} - -static irqreturn_t efm32_clock_event_handler(int irq, void *dev_id) -{ - struct efm32_clock_event_ddata *ddata = dev_id; - - writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC); - - ddata->evtdev.event_handler(&ddata->evtdev); - - return IRQ_HANDLED; -} - -static struct efm32_clock_event_ddata clock_event_ddata = { - .evtdev = { - .name = "efm32 clockevent", - .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, - .set_state_shutdown = efm32_clock_event_shutdown, - .set_state_periodic = efm32_clock_event_set_periodic, - .set_state_oneshot = efm32_clock_event_set_oneshot, - .set_next_event = efm32_clock_event_set_next_event, - .rating = 200, - }, -}; - -static int __init efm32_clocksource_init(struct device_node *np) -{ - struct clk *clk; - void __iomem *base; - unsigned long rate; - int ret; - - clk = of_clk_get(np, 0); - if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - pr_err("failed to get clock for clocksource (%d)\n", ret); - goto err_clk_get; - } - - ret = clk_prepare_enable(clk); - if (ret) { - pr_err("failed to enable timer clock for clocksource (%d)\n", - ret); - goto err_clk_enable; - } - rate = clk_get_rate(clk); - - base = of_iomap(np, 0); - if (!base) { - ret = -EADDRNOTAVAIL; - pr_err("failed to map registers for clocksource\n"); - goto err_iomap; - } - - writel_relaxed(TIMERn_CTRL_PRESC_1024 | - TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | - TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL); - writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD); - - ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer", - DIV_ROUND_CLOSEST(rate, 1024), 200, 16, - clocksource_mmio_readl_up); - if (ret) { - pr_err("failed to init clocksource (%d)\n", ret); - goto err_clocksource_init; - } - - return 0; - -err_clocksource_init: - - iounmap(base); -err_iomap: - - clk_disable_unprepare(clk); -err_clk_enable: - - clk_put(clk); -err_clk_get: - - return ret; -} - -static int __init efm32_clockevent_init(struct device_node *np) -{ - struct clk *clk; - void __iomem *base; - unsigned long rate; - int irq; - int ret; - - clk = of_clk_get(np, 0); - if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - pr_err("failed to get clock for clockevent (%d)\n", ret); - goto err_clk_get; - } - - ret = clk_prepare_enable(clk); - if (ret) { - pr_err("failed to enable timer clock for clockevent (%d)\n", - ret); - goto err_clk_enable; - } - rate = clk_get_rate(clk); - - base = of_iomap(np, 0); - if (!base) { - ret = -EADDRNOTAVAIL; - pr_err("failed to map registers for clockevent\n"); - goto err_iomap; - } - - irq = irq_of_parse_and_map(np, 0); - if (!irq) { - ret = -ENOENT; - pr_err("failed to get irq for clockevent\n"); - goto err_get_irq; - } - - writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN); - - clock_event_ddata.base = base; - clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ); - - clockevents_config_and_register(&clock_event_ddata.evtdev, - DIV_ROUND_CLOSEST(rate, 1024), - 0xf, 0xffff); - - ret = request_irq(irq, efm32_clock_event_handler, IRQF_TIMER, - "efm32 clockevent", &clock_event_ddata); - if (ret) { - pr_err("Failed setup irq\n"); - goto err_setup_irq; - } - - return 0; - -err_setup_irq: -err_get_irq: - - iounmap(base); -err_iomap: - - clk_disable_unprepare(clk); -err_clk_enable: - - clk_put(clk); -err_clk_get: - - return ret; -} - -/* - * This function asserts that we have exactly one clocksource and one - * clock_event_device in the end. - */ -static int __init efm32_timer_init(struct device_node *np) -{ - static int has_clocksource, has_clockevent; - int ret = 0; - - if (!has_clocksource) { - ret = efm32_clocksource_init(np); - if (!ret) { - has_clocksource = 1; - return 0; - } - } - - if (!has_clockevent) { - ret = efm32_clockevent_init(np); - if (!ret) { - has_clockevent = 1; - return 0; - } - } - - return ret; -} -TIMER_OF_DECLARE(efm32compat, "efm32,timer", efm32_timer_init); -TIMER_OF_DECLARE(efm32, "energymicro,efm32-timer", efm32_timer_init); From patchwork Fri Jan 15 15:51:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EB65C433E0 for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 55711238E8; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6876423884 for ; Fri, 15 Jan 2021 15:51:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6876423884 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNt-0003Nc-88; Fri, 15 Jan 2021 16:51:33 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNs-0008LT-TR; Fri, 15 Jan 2021 16:51:32 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson , Mark Brown List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-spi@vger.kernel.org Subject: [PATCH v2 4/7] spi: Drop unused efm32 bus driver Date: Fri, 15 Jan 2021 16:51:27 +0100 Message-Id: <20210115155130.185010-5-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org Support for this machine was just removed, so drop the now unused spi bus driver, too. Signed-off-by: Uwe Kleine-König --- drivers/spi/Kconfig | 7 - drivers/spi/Makefile | 1 - drivers/spi/spi-efm32.c | 462 ------------------------ include/linux/platform_data/efm32-spi.h | 15 - 4 files changed, 485 deletions(-) delete mode 100644 drivers/spi/spi-efm32.c delete mode 100644 include/linux/platform_data/efm32-spi.h diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index aadaea052f51..d3375aa6e292 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -292,13 +292,6 @@ config SPI_DLN2 This driver can also be built as a module. If so, the module will be called spi-dln2. -config SPI_EFM32 - tristate "EFM32 SPI controller" - depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) - select SPI_BITBANG - help - Driver for the spi controller found on Energy Micro's EFM32 SoCs. - config SPI_EP93XX tristate "Cirrus Logic EP93xx SPI controller" depends on ARCH_EP93XX || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6fea5821662e..5a21b5cc8015 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -42,7 +42,6 @@ spi-dw-$(CONFIG_SPI_DW_DMA) += spi-dw-dma.o obj-$(CONFIG_SPI_DW_BT1) += spi-dw-bt1.o obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o obj-$(CONFIG_SPI_DW_PCI) += spi-dw-pci.o -obj-$(CONFIG_SPI_EFM32) += spi-efm32.o obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o obj-$(CONFIG_SPI_FALCON) += spi-falcon.o obj-$(CONFIG_SPI_FSI) += spi-fsi.o diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c deleted file mode 100644 index ea6e4a7b3feb..000000000000 --- a/drivers/spi/spi-efm32.c +++ /dev/null @@ -1,462 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012-2013 Uwe Kleine-Koenig for Pengutronix - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRIVER_NAME "efm32-spi" - -#define MASK_VAL(mask, val) ((val << __ffs(mask)) & mask) - -#define REG_CTRL 0x00 -#define REG_CTRL_SYNC 0x0001 -#define REG_CTRL_CLKPOL 0x0100 -#define REG_CTRL_CLKPHA 0x0200 -#define REG_CTRL_MSBF 0x0400 -#define REG_CTRL_TXBIL 0x1000 - -#define REG_FRAME 0x04 -#define REG_FRAME_DATABITS__MASK 0x000f -#define REG_FRAME_DATABITS(n) ((n) - 3) - -#define REG_CMD 0x0c -#define REG_CMD_RXEN 0x0001 -#define REG_CMD_RXDIS 0x0002 -#define REG_CMD_TXEN 0x0004 -#define REG_CMD_TXDIS 0x0008 -#define REG_CMD_MASTEREN 0x0010 - -#define REG_STATUS 0x10 -#define REG_STATUS_TXENS 0x0002 -#define REG_STATUS_TXC 0x0020 -#define REG_STATUS_TXBL 0x0040 -#define REG_STATUS_RXDATAV 0x0080 - -#define REG_CLKDIV 0x14 - -#define REG_RXDATAX 0x18 -#define REG_RXDATAX_RXDATA__MASK 0x01ff -#define REG_RXDATAX_PERR 0x4000 -#define REG_RXDATAX_FERR 0x8000 - -#define REG_TXDATA 0x34 - -#define REG_IF 0x40 -#define REG_IF_TXBL 0x0002 -#define REG_IF_RXDATAV 0x0004 - -#define REG_IFS 0x44 -#define REG_IFC 0x48 -#define REG_IEN 0x4c - -#define REG_ROUTE 0x54 -#define REG_ROUTE_RXPEN 0x0001 -#define REG_ROUTE_TXPEN 0x0002 -#define REG_ROUTE_CLKPEN 0x0008 -#define REG_ROUTE_LOCATION__MASK 0x0700 -#define REG_ROUTE_LOCATION(n) MASK_VAL(REG_ROUTE_LOCATION__MASK, (n)) - -struct efm32_spi_ddata { - struct spi_bitbang bitbang; - - spinlock_t lock; - - struct clk *clk; - void __iomem *base; - unsigned int rxirq, txirq; - struct efm32_spi_pdata pdata; - - /* irq data */ - struct completion done; - const u8 *tx_buf; - u8 *rx_buf; - unsigned tx_len, rx_len; -}; - -#define ddata_to_dev(ddata) (&(ddata->bitbang.master->dev)) -#define efm32_spi_vdbg(ddata, format, arg...) \ - dev_vdbg(ddata_to_dev(ddata), format, ##arg) - -static void efm32_spi_write32(struct efm32_spi_ddata *ddata, - u32 value, unsigned offset) -{ - writel_relaxed(value, ddata->base + offset); -} - -static u32 efm32_spi_read32(struct efm32_spi_ddata *ddata, unsigned offset) -{ - return readl_relaxed(ddata->base + offset); -} - -static int efm32_spi_setup_transfer(struct spi_device *spi, - struct spi_transfer *t) -{ - struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master); - - unsigned bpw = t->bits_per_word ?: spi->bits_per_word; - unsigned speed = t->speed_hz ?: spi->max_speed_hz; - unsigned long clkfreq = clk_get_rate(ddata->clk); - u32 clkdiv; - - efm32_spi_write32(ddata, REG_CTRL_SYNC | REG_CTRL_MSBF | - (spi->mode & SPI_CPHA ? REG_CTRL_CLKPHA : 0) | - (spi->mode & SPI_CPOL ? REG_CTRL_CLKPOL : 0), REG_CTRL); - - efm32_spi_write32(ddata, - REG_FRAME_DATABITS(bpw), REG_FRAME); - - if (2 * speed >= clkfreq) - clkdiv = 0; - else - clkdiv = 64 * (DIV_ROUND_UP(2 * clkfreq, speed) - 4); - - if (clkdiv > (1U << 21)) - return -EINVAL; - - efm32_spi_write32(ddata, clkdiv, REG_CLKDIV); - efm32_spi_write32(ddata, REG_CMD_MASTEREN, REG_CMD); - efm32_spi_write32(ddata, REG_CMD_RXEN | REG_CMD_TXEN, REG_CMD); - - return 0; -} - -static void efm32_spi_tx_u8(struct efm32_spi_ddata *ddata) -{ - u8 val = 0; - - if (ddata->tx_buf) { - val = *ddata->tx_buf; - ddata->tx_buf++; - } - - ddata->tx_len--; - efm32_spi_write32(ddata, val, REG_TXDATA); - efm32_spi_vdbg(ddata, "%s: tx 0x%x\n", __func__, val); -} - -static void efm32_spi_rx_u8(struct efm32_spi_ddata *ddata) -{ - u32 rxdata = efm32_spi_read32(ddata, REG_RXDATAX); - efm32_spi_vdbg(ddata, "%s: rx 0x%x\n", __func__, rxdata); - - if (ddata->rx_buf) { - *ddata->rx_buf = rxdata; - ddata->rx_buf++; - } - - ddata->rx_len--; -} - -static void efm32_spi_filltx(struct efm32_spi_ddata *ddata) -{ - while (ddata->tx_len && - ddata->tx_len + 2 > ddata->rx_len && - efm32_spi_read32(ddata, REG_STATUS) & REG_STATUS_TXBL) { - efm32_spi_tx_u8(ddata); - } -} - -static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -{ - struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master); - int ret = -EBUSY; - - spin_lock_irq(&ddata->lock); - - if (ddata->tx_buf || ddata->rx_buf) - goto out_unlock; - - ddata->tx_buf = t->tx_buf; - ddata->rx_buf = t->rx_buf; - ddata->tx_len = ddata->rx_len = - t->len * DIV_ROUND_UP(t->bits_per_word, 8); - - efm32_spi_filltx(ddata); - - reinit_completion(&ddata->done); - - efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); - - spin_unlock_irq(&ddata->lock); - - wait_for_completion(&ddata->done); - - spin_lock_irq(&ddata->lock); - - ret = t->len - max(ddata->tx_len, ddata->rx_len); - - efm32_spi_write32(ddata, 0, REG_IEN); - ddata->tx_buf = ddata->rx_buf = NULL; - -out_unlock: - spin_unlock_irq(&ddata->lock); - - return ret; -} - -static irqreturn_t efm32_spi_rxirq(int irq, void *data) -{ - struct efm32_spi_ddata *ddata = data; - irqreturn_t ret = IRQ_NONE; - - spin_lock(&ddata->lock); - - while (ddata->rx_len > 0 && - efm32_spi_read32(ddata, REG_STATUS) & - REG_STATUS_RXDATAV) { - efm32_spi_rx_u8(ddata); - - ret = IRQ_HANDLED; - } - - if (!ddata->rx_len) { - u32 ien = efm32_spi_read32(ddata, REG_IEN); - - ien &= ~REG_IF_RXDATAV; - - efm32_spi_write32(ddata, ien, REG_IEN); - - complete(&ddata->done); - } - - spin_unlock(&ddata->lock); - - return ret; -} - -static irqreturn_t efm32_spi_txirq(int irq, void *data) -{ - struct efm32_spi_ddata *ddata = data; - - efm32_spi_vdbg(ddata, - "%s: txlen = %u, rxlen = %u, if=0x%08x, stat=0x%08x\n", - __func__, ddata->tx_len, ddata->rx_len, - efm32_spi_read32(ddata, REG_IF), - efm32_spi_read32(ddata, REG_STATUS)); - - spin_lock(&ddata->lock); - - efm32_spi_filltx(ddata); - - efm32_spi_vdbg(ddata, "%s: txlen = %u, rxlen = %u\n", - __func__, ddata->tx_len, ddata->rx_len); - - if (!ddata->tx_len) { - u32 ien = efm32_spi_read32(ddata, REG_IEN); - - ien &= ~REG_IF_TXBL; - - efm32_spi_write32(ddata, ien, REG_IEN); - efm32_spi_vdbg(ddata, "disable TXBL\n"); - } - - spin_unlock(&ddata->lock); - - return IRQ_HANDLED; -} - -static u32 efm32_spi_get_configured_location(struct efm32_spi_ddata *ddata) -{ - u32 reg = efm32_spi_read32(ddata, REG_ROUTE); - - return (reg & REG_ROUTE_LOCATION__MASK) >> __ffs(REG_ROUTE_LOCATION__MASK); -} - -static void efm32_spi_probe_dt(struct platform_device *pdev, - struct spi_master *master, struct efm32_spi_ddata *ddata) -{ - struct device_node *np = pdev->dev.of_node; - u32 location; - int ret; - - ret = of_property_read_u32(np, "energymicro,location", &location); - - if (ret) - /* fall back to wrongly namespaced property */ - ret = of_property_read_u32(np, "efm32,location", &location); - - if (ret) - /* fall back to old and (wrongly) generic property "location" */ - ret = of_property_read_u32(np, "location", &location); - - if (!ret) { - dev_dbg(&pdev->dev, "using location %u\n", location); - } else { - /* default to location configured in hardware */ - location = efm32_spi_get_configured_location(ddata); - - dev_info(&pdev->dev, "fall back to location %u\n", location); - } - - ddata->pdata.location = location; -} - -static int efm32_spi_probe(struct platform_device *pdev) -{ - struct efm32_spi_ddata *ddata; - struct resource *res; - int ret; - struct spi_master *master; - struct device_node *np = pdev->dev.of_node; - - if (!np) - return -EINVAL; - - master = spi_alloc_master(&pdev->dev, sizeof(*ddata)); - if (!master) { - dev_dbg(&pdev->dev, - "failed to allocate spi master controller\n"); - return -ENOMEM; - } - platform_set_drvdata(pdev, master); - - master->dev.of_node = pdev->dev.of_node; - - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); - master->use_gpio_descriptors = true; - - ddata = spi_master_get_devdata(master); - - ddata->bitbang.master = master; - ddata->bitbang.setup_transfer = efm32_spi_setup_transfer; - ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; - - spin_lock_init(&ddata->lock); - init_completion(&ddata->done); - - ddata->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(ddata->clk)) { - ret = PTR_ERR(ddata->clk); - dev_err(&pdev->dev, "failed to get clock: %d\n", ret); - goto err; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - ret = -ENODEV; - dev_err(&pdev->dev, "failed to determine base address\n"); - goto err; - } - - if (resource_size(res) < 0x60) { - ret = -EINVAL; - dev_err(&pdev->dev, "memory resource too small\n"); - goto err; - } - - ddata->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(ddata->base)) { - ret = PTR_ERR(ddata->base); - goto err; - } - - ret = platform_get_irq(pdev, 0); - if (ret <= 0) - goto err; - - ddata->rxirq = ret; - - ret = platform_get_irq(pdev, 1); - if (ret <= 0) - ret = ddata->rxirq + 1; - - ddata->txirq = ret; - - ret = clk_prepare_enable(ddata->clk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable clock (%d)\n", ret); - goto err; - } - - efm32_spi_probe_dt(pdev, master, ddata); - - efm32_spi_write32(ddata, 0, REG_IEN); - efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN | - REG_ROUTE_CLKPEN | - REG_ROUTE_LOCATION(ddata->pdata.location), REG_ROUTE); - - ret = request_irq(ddata->rxirq, efm32_spi_rxirq, - 0, DRIVER_NAME " rx", ddata); - if (ret) { - dev_err(&pdev->dev, "failed to register rxirq (%d)\n", ret); - goto err_disable_clk; - } - - ret = request_irq(ddata->txirq, efm32_spi_txirq, - 0, DRIVER_NAME " tx", ddata); - if (ret) { - dev_err(&pdev->dev, "failed to register txirq (%d)\n", ret); - goto err_free_rx_irq; - } - - ret = spi_bitbang_start(&ddata->bitbang); - if (ret) { - dev_err(&pdev->dev, "spi_bitbang_start failed (%d)\n", ret); - - free_irq(ddata->txirq, ddata); -err_free_rx_irq: - free_irq(ddata->rxirq, ddata); -err_disable_clk: - clk_disable_unprepare(ddata->clk); -err: - spi_master_put(master); - } - - return ret; -} - -static int efm32_spi_remove(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct efm32_spi_ddata *ddata = spi_master_get_devdata(master); - - spi_bitbang_stop(&ddata->bitbang); - - efm32_spi_write32(ddata, 0, REG_IEN); - - free_irq(ddata->txirq, ddata); - free_irq(ddata->rxirq, ddata); - clk_disable_unprepare(ddata->clk); - spi_master_put(master); - - return 0; -} - -static const struct of_device_id efm32_spi_dt_ids[] = { - { - .compatible = "energymicro,efm32-spi", - }, { - /* doesn't follow the "vendor,device" scheme, don't use */ - .compatible = "efm32,spi", - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(of, efm32_spi_dt_ids); - -static struct platform_driver efm32_spi_driver = { - .probe = efm32_spi_probe, - .remove = efm32_spi_remove, - - .driver = { - .name = DRIVER_NAME, - .of_match_table = efm32_spi_dt_ids, - }, -}; -module_platform_driver(efm32_spi_driver); - -MODULE_AUTHOR("Uwe Kleine-Koenig "); -MODULE_DESCRIPTION("EFM32 SPI driver"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/include/linux/platform_data/efm32-spi.h b/include/linux/platform_data/efm32-spi.h deleted file mode 100644 index a2c56fcd0534..000000000000 --- a/include/linux/platform_data/efm32-spi.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __LINUX_PLATFORM_DATA_EFM32_SPI_H__ -#define __LINUX_PLATFORM_DATA_EFM32_SPI_H__ - -#include - -/** - * struct efm32_spi_pdata - * @location: pinmux location for the I/O pins (to be written to the ROUTE - * register) - */ -struct efm32_spi_pdata { - u8 location; -}; -#endif /* ifndef __LINUX_PLATFORM_DATA_EFM32_SPI_H__ */ From patchwork Fri Jan 15 15:51:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023181 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01603C4332B for ; Fri, 15 Jan 2021 15:51:37 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 877D523888; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6239238A1 for ; Fri, 15 Jan 2021 15:51:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6239238A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNt-0003Ny-JG; Fri, 15 Jan 2021 16:51:33 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNt-0008LW-8S; Fri, 15 Jan 2021 16:51:33 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson , Wolfram Sang List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-i2c@vger.kernel.org Subject: [PATCH v2 5/7] i2c: Drop unused efm32 bus driver Date: Fri, 15 Jan 2021 16:51:28 +0100 Message-Id: <20210115155130.185010-6-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org Support for this machine was just removed, so drop the now unused i2c bus driver, too. Signed-off-by: Uwe Kleine-König --- drivers/i2c/busses/Kconfig | 7 - drivers/i2c/busses/Makefile | 1 - drivers/i2c/busses/i2c-efm32.c | 469 --------------------------------- 3 files changed, 477 deletions(-) delete mode 100644 drivers/i2c/busses/i2c-efm32.c diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index d4d60ad0eda0..fd919f9339d6 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -586,13 +586,6 @@ config I2C_DIGICOLOR This driver can also be built as a module. If so, the module will be called i2c-digicolor. -config I2C_EFM32 - tristate "EFM32 I2C controller" - depends on ARCH_EFM32 || COMPILE_TEST - help - This driver supports the i2c block found in Energy Micro's EFM32 - SoCs. - config I2C_EG20T tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C" depends on PCI && (X86_32 || MIPS || COMPILE_TEST) diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 683c49faca05..894ff95885b8 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -58,7 +58,6 @@ i2c-designware-platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-bayt obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o i2c-designware-pci-y := i2c-designware-pcidrv.o obj-$(CONFIG_I2C_DIGICOLOR) += i2c-digicolor.o -obj-$(CONFIG_I2C_EFM32) += i2c-efm32.o obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o obj-$(CONFIG_I2C_EMEV2) += i2c-emev2.o obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o diff --git a/drivers/i2c/busses/i2c-efm32.c b/drivers/i2c/busses/i2c-efm32.c deleted file mode 100644 index f6e13ceeb2b3..000000000000 --- a/drivers/i2c/busses/i2c-efm32.c +++ /dev/null @@ -1,469 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2014 Uwe Kleine-Koenig for Pengutronix - */ -#include -#include -#include -#include -#include -#include -#include - -#define DRIVER_NAME "efm32-i2c" - -#define MASK_VAL(mask, val) ((val << __ffs(mask)) & mask) - -#define REG_CTRL 0x00 -#define REG_CTRL_EN 0x00001 -#define REG_CTRL_SLAVE 0x00002 -#define REG_CTRL_AUTOACK 0x00004 -#define REG_CTRL_AUTOSE 0x00008 -#define REG_CTRL_AUTOSN 0x00010 -#define REG_CTRL_ARBDIS 0x00020 -#define REG_CTRL_GCAMEN 0x00040 -#define REG_CTRL_CLHR__MASK 0x00300 -#define REG_CTRL_BITO__MASK 0x03000 -#define REG_CTRL_BITO_OFF 0x00000 -#define REG_CTRL_BITO_40PCC 0x01000 -#define REG_CTRL_BITO_80PCC 0x02000 -#define REG_CTRL_BITO_160PCC 0x03000 -#define REG_CTRL_GIBITO 0x08000 -#define REG_CTRL_CLTO__MASK 0x70000 -#define REG_CTRL_CLTO_OFF 0x00000 - -#define REG_CMD 0x04 -#define REG_CMD_START 0x00001 -#define REG_CMD_STOP 0x00002 -#define REG_CMD_ACK 0x00004 -#define REG_CMD_NACK 0x00008 -#define REG_CMD_CONT 0x00010 -#define REG_CMD_ABORT 0x00020 -#define REG_CMD_CLEARTX 0x00040 -#define REG_CMD_CLEARPC 0x00080 - -#define REG_STATE 0x08 -#define REG_STATE_BUSY 0x00001 -#define REG_STATE_MASTER 0x00002 -#define REG_STATE_TRANSMITTER 0x00004 -#define REG_STATE_NACKED 0x00008 -#define REG_STATE_BUSHOLD 0x00010 -#define REG_STATE_STATE__MASK 0x000e0 -#define REG_STATE_STATE_IDLE 0x00000 -#define REG_STATE_STATE_WAIT 0x00020 -#define REG_STATE_STATE_START 0x00040 -#define REG_STATE_STATE_ADDR 0x00060 -#define REG_STATE_STATE_ADDRACK 0x00080 -#define REG_STATE_STATE_DATA 0x000a0 -#define REG_STATE_STATE_DATAACK 0x000c0 - -#define REG_STATUS 0x0c -#define REG_STATUS_PSTART 0x00001 -#define REG_STATUS_PSTOP 0x00002 -#define REG_STATUS_PACK 0x00004 -#define REG_STATUS_PNACK 0x00008 -#define REG_STATUS_PCONT 0x00010 -#define REG_STATUS_PABORT 0x00020 -#define REG_STATUS_TXC 0x00040 -#define REG_STATUS_TXBL 0x00080 -#define REG_STATUS_RXDATAV 0x00100 - -#define REG_CLKDIV 0x10 -#define REG_CLKDIV_DIV__MASK 0x001ff -#define REG_CLKDIV_DIV(div) MASK_VAL(REG_CLKDIV_DIV__MASK, (div)) - -#define REG_SADDR 0x14 -#define REG_SADDRMASK 0x18 -#define REG_RXDATA 0x1c -#define REG_RXDATAP 0x20 -#define REG_TXDATA 0x24 -#define REG_IF 0x28 -#define REG_IF_START 0x00001 -#define REG_IF_RSTART 0x00002 -#define REG_IF_ADDR 0x00004 -#define REG_IF_TXC 0x00008 -#define REG_IF_TXBL 0x00010 -#define REG_IF_RXDATAV 0x00020 -#define REG_IF_ACK 0x00040 -#define REG_IF_NACK 0x00080 -#define REG_IF_MSTOP 0x00100 -#define REG_IF_ARBLOST 0x00200 -#define REG_IF_BUSERR 0x00400 -#define REG_IF_BUSHOLD 0x00800 -#define REG_IF_TXOF 0x01000 -#define REG_IF_RXUF 0x02000 -#define REG_IF_BITO 0x04000 -#define REG_IF_CLTO 0x08000 -#define REG_IF_SSTOP 0x10000 - -#define REG_IFS 0x2c -#define REG_IFC 0x30 -#define REG_IFC__MASK 0x1ffcf - -#define REG_IEN 0x34 - -#define REG_ROUTE 0x38 -#define REG_ROUTE_SDAPEN 0x00001 -#define REG_ROUTE_SCLPEN 0x00002 -#define REG_ROUTE_LOCATION__MASK 0x00700 -#define REG_ROUTE_LOCATION(n) MASK_VAL(REG_ROUTE_LOCATION__MASK, (n)) - -struct efm32_i2c_ddata { - struct i2c_adapter adapter; - - struct clk *clk; - void __iomem *base; - unsigned int irq; - u8 location; - unsigned long frequency; - - /* transfer data */ - struct completion done; - struct i2c_msg *msgs; - size_t num_msgs; - size_t current_word, current_msg; - int retval; -}; - -static u32 efm32_i2c_read32(struct efm32_i2c_ddata *ddata, unsigned offset) -{ - return readl(ddata->base + offset); -} - -static void efm32_i2c_write32(struct efm32_i2c_ddata *ddata, - unsigned offset, u32 value) -{ - writel(value, ddata->base + offset); -} - -static void efm32_i2c_send_next_msg(struct efm32_i2c_ddata *ddata) -{ - struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; - - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_START); - efm32_i2c_write32(ddata, REG_TXDATA, i2c_8bit_addr_from_msg(cur_msg)); -} - -static void efm32_i2c_send_next_byte(struct efm32_i2c_ddata *ddata) -{ - struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; - - if (ddata->current_word >= cur_msg->len) { - /* cur_msg completely transferred */ - ddata->current_word = 0; - ddata->current_msg += 1; - - if (ddata->current_msg >= ddata->num_msgs) { - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); - complete(&ddata->done); - } else { - efm32_i2c_send_next_msg(ddata); - } - } else { - efm32_i2c_write32(ddata, REG_TXDATA, - cur_msg->buf[ddata->current_word++]); - } -} - -static void efm32_i2c_recv_next_byte(struct efm32_i2c_ddata *ddata) -{ - struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; - - cur_msg->buf[ddata->current_word] = efm32_i2c_read32(ddata, REG_RXDATA); - ddata->current_word += 1; - if (ddata->current_word >= cur_msg->len) { - /* cur_msg completely transferred */ - ddata->current_word = 0; - ddata->current_msg += 1; - - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_NACK); - - if (ddata->current_msg >= ddata->num_msgs) { - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); - complete(&ddata->done); - } else { - efm32_i2c_send_next_msg(ddata); - } - } else { - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ACK); - } -} - -static irqreturn_t efm32_i2c_irq(int irq, void *dev_id) -{ - struct efm32_i2c_ddata *ddata = dev_id; - struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; - u32 irqflag = efm32_i2c_read32(ddata, REG_IF); - u32 state = efm32_i2c_read32(ddata, REG_STATE); - - efm32_i2c_write32(ddata, REG_IFC, irqflag & REG_IFC__MASK); - - switch (state & REG_STATE_STATE__MASK) { - case REG_STATE_STATE_IDLE: - /* arbitration lost? */ - ddata->retval = -EAGAIN; - complete(&ddata->done); - break; - case REG_STATE_STATE_WAIT: - /* - * huh, this shouldn't happen. - * Reset hardware state and get out - */ - ddata->retval = -EIO; - efm32_i2c_write32(ddata, REG_CMD, - REG_CMD_STOP | REG_CMD_ABORT | - REG_CMD_CLEARTX | REG_CMD_CLEARPC); - complete(&ddata->done); - break; - case REG_STATE_STATE_START: - /* "caller" is expected to send an address */ - break; - case REG_STATE_STATE_ADDR: - /* wait for Ack or NAck of slave */ - break; - case REG_STATE_STATE_ADDRACK: - if (state & REG_STATE_NACKED) { - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); - ddata->retval = -ENXIO; - complete(&ddata->done); - } else if (cur_msg->flags & I2C_M_RD) { - /* wait for slave to send first data byte */ - } else { - efm32_i2c_send_next_byte(ddata); - } - break; - case REG_STATE_STATE_DATA: - if (cur_msg->flags & I2C_M_RD) { - efm32_i2c_recv_next_byte(ddata); - } else { - /* wait for Ack or Nack of slave */ - } - break; - case REG_STATE_STATE_DATAACK: - if (state & REG_STATE_NACKED) { - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); - complete(&ddata->done); - } else { - efm32_i2c_send_next_byte(ddata); - } - } - - return IRQ_HANDLED; -} - -static int efm32_i2c_master_xfer(struct i2c_adapter *adap, - struct i2c_msg *msgs, int num) -{ - struct efm32_i2c_ddata *ddata = i2c_get_adapdata(adap); - int ret; - - if (ddata->msgs) - return -EBUSY; - - ddata->msgs = msgs; - ddata->num_msgs = num; - ddata->current_word = 0; - ddata->current_msg = 0; - ddata->retval = -EIO; - - reinit_completion(&ddata->done); - - dev_dbg(&ddata->adapter.dev, "state: %08x, status: %08x\n", - efm32_i2c_read32(ddata, REG_STATE), - efm32_i2c_read32(ddata, REG_STATUS)); - - efm32_i2c_send_next_msg(ddata); - - wait_for_completion(&ddata->done); - - if (ddata->current_msg >= ddata->num_msgs) - ret = ddata->num_msgs; - else - ret = ddata->retval; - - return ret; -} - -static u32 efm32_i2c_functionality(struct i2c_adapter *adap) -{ - return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; -} - -static const struct i2c_algorithm efm32_i2c_algo = { - .master_xfer = efm32_i2c_master_xfer, - .functionality = efm32_i2c_functionality, -}; - -static u32 efm32_i2c_get_configured_location(struct efm32_i2c_ddata *ddata) -{ - u32 reg = efm32_i2c_read32(ddata, REG_ROUTE); - - return (reg & REG_ROUTE_LOCATION__MASK) >> - __ffs(REG_ROUTE_LOCATION__MASK); -} - -static int efm32_i2c_probe(struct platform_device *pdev) -{ - struct efm32_i2c_ddata *ddata; - struct resource *res; - unsigned long rate; - struct device_node *np = pdev->dev.of_node; - u32 location, frequency; - int ret; - u32 clkdiv; - - ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); - if (!ddata) - return -ENOMEM; - platform_set_drvdata(pdev, ddata); - - init_completion(&ddata->done); - strlcpy(ddata->adapter.name, pdev->name, sizeof(ddata->adapter.name)); - ddata->adapter.owner = THIS_MODULE; - ddata->adapter.algo = &efm32_i2c_algo; - ddata->adapter.dev.parent = &pdev->dev; - ddata->adapter.dev.of_node = pdev->dev.of_node; - i2c_set_adapdata(&ddata->adapter, ddata); - - ddata->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(ddata->clk)) { - ret = PTR_ERR(ddata->clk); - dev_err(&pdev->dev, "failed to get clock: %d\n", ret); - return ret; - } - - ddata->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); - if (IS_ERR(ddata->base)) - return PTR_ERR(ddata->base); - - if (resource_size(res) < 0x42) { - dev_err(&pdev->dev, "memory resource too small\n"); - return -EINVAL; - } - - ret = platform_get_irq(pdev, 0); - if (ret <= 0) { - if (!ret) - ret = -EINVAL; - return ret; - } - - ddata->irq = ret; - - ret = clk_prepare_enable(ddata->clk); - if (ret < 0) { - dev_err(&pdev->dev, "failed to enable clock (%d)\n", ret); - return ret; - } - - - ret = of_property_read_u32(np, "energymicro,location", &location); - - if (ret) - /* fall back to wrongly namespaced property */ - ret = of_property_read_u32(np, "efm32,location", &location); - - if (!ret) { - dev_dbg(&pdev->dev, "using location %u\n", location); - } else { - /* default to location configured in hardware */ - location = efm32_i2c_get_configured_location(ddata); - - dev_info(&pdev->dev, "fall back to location %u\n", location); - } - - ddata->location = location; - - ret = of_property_read_u32(np, "clock-frequency", &frequency); - if (!ret) { - dev_dbg(&pdev->dev, "using frequency %u\n", frequency); - } else { - frequency = I2C_MAX_STANDARD_MODE_FREQ; - dev_info(&pdev->dev, "defaulting to 100 kHz\n"); - } - ddata->frequency = frequency; - - rate = clk_get_rate(ddata->clk); - if (!rate) { - dev_err(&pdev->dev, "there is no input clock available\n"); - ret = -EINVAL; - goto err_disable_clk; - } - clkdiv = DIV_ROUND_UP(rate, 8 * ddata->frequency) - 1; - if (clkdiv >= 0x200) { - dev_err(&pdev->dev, - "input clock too fast (%lu) to divide down to bus freq (%lu)", - rate, ddata->frequency); - ret = -EINVAL; - goto err_disable_clk; - } - - dev_dbg(&pdev->dev, "input clock = %lu, bus freq = %lu, clkdiv = %lu\n", - rate, ddata->frequency, (unsigned long)clkdiv); - efm32_i2c_write32(ddata, REG_CLKDIV, REG_CLKDIV_DIV(clkdiv)); - - efm32_i2c_write32(ddata, REG_ROUTE, REG_ROUTE_SDAPEN | - REG_ROUTE_SCLPEN | - REG_ROUTE_LOCATION(ddata->location)); - - efm32_i2c_write32(ddata, REG_CTRL, REG_CTRL_EN | - REG_CTRL_BITO_160PCC | 0 * REG_CTRL_GIBITO); - - efm32_i2c_write32(ddata, REG_IFC, REG_IFC__MASK); - efm32_i2c_write32(ddata, REG_IEN, REG_IF_TXC | REG_IF_ACK | REG_IF_NACK - | REG_IF_ARBLOST | REG_IF_BUSERR | REG_IF_RXDATAV); - - /* to make bus idle */ - efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ABORT); - - ret = request_irq(ddata->irq, efm32_i2c_irq, 0, DRIVER_NAME, ddata); - if (ret < 0) { - dev_err(&pdev->dev, "failed to request irq (%d)\n", ret); - goto err_disable_clk; - } - - ret = i2c_add_adapter(&ddata->adapter); - if (ret) { - free_irq(ddata->irq, ddata); - -err_disable_clk: - clk_disable_unprepare(ddata->clk); - } - return ret; -} - -static int efm32_i2c_remove(struct platform_device *pdev) -{ - struct efm32_i2c_ddata *ddata = platform_get_drvdata(pdev); - - i2c_del_adapter(&ddata->adapter); - free_irq(ddata->irq, ddata); - clk_disable_unprepare(ddata->clk); - - return 0; -} - -static const struct of_device_id efm32_i2c_dt_ids[] = { - { - .compatible = "energymicro,efm32-i2c", - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(of, efm32_i2c_dt_ids); - -static struct platform_driver efm32_i2c_driver = { - .probe = efm32_i2c_probe, - .remove = efm32_i2c_remove, - - .driver = { - .name = DRIVER_NAME, - .of_match_table = efm32_i2c_dt_ids, - }, -}; -module_platform_driver(efm32_i2c_driver); - -MODULE_AUTHOR("Uwe Kleine-Koenig "); -MODULE_DESCRIPTION("EFM32 i2c driver"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" DRIVER_NAME); From patchwork Fri Jan 15 15:51:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36893C4332E for ; Fri, 15 Jan 2021 15:51:37 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 20C432339D; Fri, 15 Jan 2021 15:51:37 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C5C42388E for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C5C42388E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNt-0003O9-T3; Fri, 15 Jan 2021 16:51:33 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNt-0008LZ-Ht; Fri, 15 Jan 2021 16:51:33 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson , Greg Kroah-Hartman , Jiri Slaby List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-serial@vger.kernel.org Subject: [PATCH v2 6/7] tty: serial: Drop unused efm32 serial driver Date: Fri, 15 Jan 2021 16:51:29 +0100 Message-Id: <20210115155130.185010-7-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org Support for this machine was just removed, so drop the now unused UART driver, too. Signed-off-by: Uwe Kleine-König --- drivers/tty/serial/Kconfig | 13 - drivers/tty/serial/Makefile | 1 - drivers/tty/serial/efm32-uart.c | 852 ----------------------- include/linux/platform_data/efm32-uart.h | 19 - include/uapi/linux/serial_core.h | 3 - 5 files changed, 888 deletions(-) delete mode 100644 drivers/tty/serial/efm32-uart.c delete mode 100644 include/linux/platform_data/efm32-uart.h diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 34a2899e69c0..83f6ca4bf210 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -1295,14 +1295,6 @@ config SERIAL_AR933X_NR_UARTS Set this to the number of serial ports you want the driver to support. -config SERIAL_EFM32_UART - tristate "EFM32 UART/USART port" - depends on ARM && (ARCH_EFM32 || COMPILE_TEST) - select SERIAL_CORE - help - This driver support the USART and UART ports on - Energy Micro's efm32 SoCs. - config SERIAL_MPS2_UART_CONSOLE bool "MPS2 UART console support" depends on SERIAL_MPS2_UART @@ -1316,11 +1308,6 @@ config SERIAL_MPS2_UART help This driver support the UART ports on ARM MPS2. -config SERIAL_EFM32_UART_CONSOLE - bool "EFM32 UART/USART console support" - depends on SERIAL_EFM32_UART=y - select SERIAL_CORE_CONSOLE - config SERIAL_ARC tristate "ARC UART driver support" select SERIAL_CORE diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile index b85d53f9e9ff..ec2b74091f0c 100644 --- a/drivers/tty/serial/Makefile +++ b/drivers/tty/serial/Makefile @@ -73,7 +73,6 @@ obj-$(CONFIG_SERIAL_SIRFSOC) += sirfsoc_uart.o obj-$(CONFIG_SERIAL_TEGRA) += serial-tegra.o obj-$(CONFIG_SERIAL_TEGRA_TCU) += tegra-tcu.o obj-$(CONFIG_SERIAL_AR933X) += ar933x_uart.o -obj-$(CONFIG_SERIAL_EFM32_UART) += efm32-uart.o obj-$(CONFIG_SERIAL_ARC) += arc_uart.o obj-$(CONFIG_SERIAL_RP2) += rp2.o obj-$(CONFIG_SERIAL_FSL_LPUART) += fsl_lpuart.o diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c deleted file mode 100644 index f12f29cf4f31..000000000000 --- a/drivers/tty/serial/efm32-uart.c +++ /dev/null @@ -1,852 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define DRIVER_NAME "efm32-uart" -#define DEV_NAME "ttyefm" - -#define UARTn_CTRL 0x00 -#define UARTn_CTRL_SYNC 0x0001 -#define UARTn_CTRL_TXBIL 0x1000 - -#define UARTn_FRAME 0x04 -#define UARTn_FRAME_DATABITS__MASK 0x000f -#define UARTn_FRAME_DATABITS(n) ((n) - 3) -#define UARTn_FRAME_PARITY__MASK 0x0300 -#define UARTn_FRAME_PARITY_NONE 0x0000 -#define UARTn_FRAME_PARITY_EVEN 0x0200 -#define UARTn_FRAME_PARITY_ODD 0x0300 -#define UARTn_FRAME_STOPBITS_HALF 0x0000 -#define UARTn_FRAME_STOPBITS_ONE 0x1000 -#define UARTn_FRAME_STOPBITS_TWO 0x3000 - -#define UARTn_CMD 0x0c -#define UARTn_CMD_RXEN 0x0001 -#define UARTn_CMD_RXDIS 0x0002 -#define UARTn_CMD_TXEN 0x0004 -#define UARTn_CMD_TXDIS 0x0008 - -#define UARTn_STATUS 0x10 -#define UARTn_STATUS_TXENS 0x0002 -#define UARTn_STATUS_TXC 0x0020 -#define UARTn_STATUS_TXBL 0x0040 -#define UARTn_STATUS_RXDATAV 0x0080 - -#define UARTn_CLKDIV 0x14 - -#define UARTn_RXDATAX 0x18 -#define UARTn_RXDATAX_RXDATA__MASK 0x01ff -#define UARTn_RXDATAX_PERR 0x4000 -#define UARTn_RXDATAX_FERR 0x8000 -/* - * This is a software only flag used for ignore_status_mask and - * read_status_mask! It's used for breaks that the hardware doesn't report - * explicitly. - */ -#define SW_UARTn_RXDATAX_BERR 0x2000 - -#define UARTn_TXDATA 0x34 - -#define UARTn_IF 0x40 -#define UARTn_IF_TXC 0x0001 -#define UARTn_IF_TXBL 0x0002 -#define UARTn_IF_RXDATAV 0x0004 -#define UARTn_IF_RXOF 0x0010 - -#define UARTn_IFS 0x44 -#define UARTn_IFC 0x48 -#define UARTn_IEN 0x4c - -#define UARTn_ROUTE 0x54 -#define UARTn_ROUTE_LOCATION__MASK 0x0700 -#define UARTn_ROUTE_LOCATION(n) (((n) << 8) & UARTn_ROUTE_LOCATION__MASK) -#define UARTn_ROUTE_RXPEN 0x0001 -#define UARTn_ROUTE_TXPEN 0x0002 - -struct efm32_uart_port { - struct uart_port port; - unsigned int txirq; - struct clk *clk; - struct efm32_uart_pdata pdata; -}; -#define to_efm_port(_port) container_of(_port, struct efm32_uart_port, port) -#define efm_debug(efm_port, format, arg...) \ - dev_dbg(efm_port->port.dev, format, ##arg) - -static void efm32_uart_write32(struct efm32_uart_port *efm_port, - u32 value, unsigned offset) -{ - writel_relaxed(value, efm_port->port.membase + offset); -} - -static u32 efm32_uart_read32(struct efm32_uart_port *efm_port, - unsigned offset) -{ - return readl_relaxed(efm_port->port.membase + offset); -} - -static unsigned int efm32_uart_tx_empty(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - u32 status = efm32_uart_read32(efm_port, UARTn_STATUS); - - if (status & UARTn_STATUS_TXC) - return TIOCSER_TEMT; - else - return 0; -} - -static void efm32_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) -{ - /* sorry, neither handshaking lines nor loop functionallity */ -} - -static unsigned int efm32_uart_get_mctrl(struct uart_port *port) -{ - /* sorry, no handshaking lines available */ - return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; -} - -static void efm32_uart_stop_tx(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - u32 ien = efm32_uart_read32(efm_port, UARTn_IEN); - - efm32_uart_write32(efm_port, UARTn_CMD_TXDIS, UARTn_CMD); - ien &= ~(UARTn_IF_TXC | UARTn_IF_TXBL); - efm32_uart_write32(efm_port, ien, UARTn_IEN); -} - -static void efm32_uart_tx_chars(struct efm32_uart_port *efm_port) -{ - struct uart_port *port = &efm_port->port; - struct circ_buf *xmit = &port->state->xmit; - - while (efm32_uart_read32(efm_port, UARTn_STATUS) & - UARTn_STATUS_TXBL) { - if (port->x_char) { - port->icount.tx++; - efm32_uart_write32(efm_port, port->x_char, - UARTn_TXDATA); - port->x_char = 0; - continue; - } - if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) { - port->icount.tx++; - efm32_uart_write32(efm_port, xmit->buf[xmit->tail], - UARTn_TXDATA); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - } else - break; - } - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (!port->x_char && uart_circ_empty(xmit) && - efm32_uart_read32(efm_port, UARTn_STATUS) & - UARTn_STATUS_TXC) - efm32_uart_stop_tx(port); -} - -static void efm32_uart_start_tx(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - u32 ien; - - efm32_uart_write32(efm_port, - UARTn_IF_TXBL | UARTn_IF_TXC, UARTn_IFC); - ien = efm32_uart_read32(efm_port, UARTn_IEN); - efm32_uart_write32(efm_port, - ien | UARTn_IF_TXBL | UARTn_IF_TXC, UARTn_IEN); - efm32_uart_write32(efm_port, UARTn_CMD_TXEN, UARTn_CMD); - - efm32_uart_tx_chars(efm_port); -} - -static void efm32_uart_stop_rx(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - - efm32_uart_write32(efm_port, UARTn_CMD_RXDIS, UARTn_CMD); -} - -static void efm32_uart_break_ctl(struct uart_port *port, int ctl) -{ - /* not possible without fiddling with gpios */ -} - -static void efm32_uart_rx_chars(struct efm32_uart_port *efm_port) -{ - struct uart_port *port = &efm_port->port; - - while (efm32_uart_read32(efm_port, UARTn_STATUS) & - UARTn_STATUS_RXDATAV) { - u32 rxdata = efm32_uart_read32(efm_port, UARTn_RXDATAX); - int flag = 0; - - /* - * This is a reserved bit and I only saw it read as 0. But to be - * sure not to be confused too much by new devices adhere to the - * warning in the reference manual that reserved bits might - * read as 1 in the future. - */ - rxdata &= ~SW_UARTn_RXDATAX_BERR; - - port->icount.rx++; - - if ((rxdata & UARTn_RXDATAX_FERR) && - !(rxdata & UARTn_RXDATAX_RXDATA__MASK)) { - rxdata |= SW_UARTn_RXDATAX_BERR; - port->icount.brk++; - if (uart_handle_break(port)) - continue; - } else if (rxdata & UARTn_RXDATAX_PERR) - port->icount.parity++; - else if (rxdata & UARTn_RXDATAX_FERR) - port->icount.frame++; - - rxdata &= port->read_status_mask; - - if (rxdata & SW_UARTn_RXDATAX_BERR) - flag = TTY_BREAK; - else if (rxdata & UARTn_RXDATAX_PERR) - flag = TTY_PARITY; - else if (rxdata & UARTn_RXDATAX_FERR) - flag = TTY_FRAME; - else if (uart_handle_sysrq_char(port, - rxdata & UARTn_RXDATAX_RXDATA__MASK)) - continue; - - if ((rxdata & port->ignore_status_mask) == 0) - tty_insert_flip_char(&port->state->port, - rxdata & UARTn_RXDATAX_RXDATA__MASK, flag); - } -} - -static irqreturn_t efm32_uart_rxirq(int irq, void *data) -{ - struct efm32_uart_port *efm_port = data; - u32 irqflag = efm32_uart_read32(efm_port, UARTn_IF); - int handled = IRQ_NONE; - struct uart_port *port = &efm_port->port; - struct tty_port *tport = &port->state->port; - - spin_lock(&port->lock); - - if (irqflag & UARTn_IF_RXDATAV) { - efm32_uart_write32(efm_port, UARTn_IF_RXDATAV, UARTn_IFC); - efm32_uart_rx_chars(efm_port); - - handled = IRQ_HANDLED; - } - - if (irqflag & UARTn_IF_RXOF) { - efm32_uart_write32(efm_port, UARTn_IF_RXOF, UARTn_IFC); - port->icount.overrun++; - tty_insert_flip_char(tport, 0, TTY_OVERRUN); - - handled = IRQ_HANDLED; - } - - spin_unlock(&port->lock); - - tty_flip_buffer_push(tport); - - return handled; -} - -static irqreturn_t efm32_uart_txirq(int irq, void *data) -{ - struct efm32_uart_port *efm_port = data; - u32 irqflag = efm32_uart_read32(efm_port, UARTn_IF); - - /* TXBL doesn't need to be cleared */ - if (irqflag & UARTn_IF_TXC) - efm32_uart_write32(efm_port, UARTn_IF_TXC, UARTn_IFC); - - if (irqflag & (UARTn_IF_TXC | UARTn_IF_TXBL)) { - efm32_uart_tx_chars(efm_port); - return IRQ_HANDLED; - } else - return IRQ_NONE; -} - -static int efm32_uart_startup(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - int ret; - - ret = clk_enable(efm_port->clk); - if (ret) { - efm_debug(efm_port, "failed to enable clk\n"); - goto err_clk_enable; - } - port->uartclk = clk_get_rate(efm_port->clk); - - /* Enable pins at configured location */ - efm32_uart_write32(efm_port, - UARTn_ROUTE_LOCATION(efm_port->pdata.location) | - UARTn_ROUTE_RXPEN | UARTn_ROUTE_TXPEN, - UARTn_ROUTE); - - ret = request_irq(port->irq, efm32_uart_rxirq, 0, - DRIVER_NAME, efm_port); - if (ret) { - efm_debug(efm_port, "failed to register rxirq\n"); - goto err_request_irq_rx; - } - - /* disable all irqs */ - efm32_uart_write32(efm_port, 0, UARTn_IEN); - - ret = request_irq(efm_port->txirq, efm32_uart_txirq, 0, - DRIVER_NAME, efm_port); - if (ret) { - efm_debug(efm_port, "failed to register txirq\n"); - free_irq(port->irq, efm_port); -err_request_irq_rx: - - clk_disable(efm_port->clk); - } else { - efm32_uart_write32(efm_port, - UARTn_IF_RXDATAV | UARTn_IF_RXOF, UARTn_IEN); - efm32_uart_write32(efm_port, UARTn_CMD_RXEN, UARTn_CMD); - } - -err_clk_enable: - return ret; -} - -static void efm32_uart_shutdown(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - - efm32_uart_write32(efm_port, 0, UARTn_IEN); - free_irq(port->irq, efm_port); - - clk_disable(efm_port->clk); -} - -static void efm32_uart_set_termios(struct uart_port *port, - struct ktermios *new, struct ktermios *old) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - unsigned long flags; - unsigned baud; - u32 clkdiv; - u32 frame = 0; - - /* no modem control lines */ - new->c_cflag &= ~(CRTSCTS | CMSPAR); - - baud = uart_get_baud_rate(port, new, old, - DIV_ROUND_CLOSEST(port->uartclk, 16 * 8192), - DIV_ROUND_CLOSEST(port->uartclk, 16)); - - switch (new->c_cflag & CSIZE) { - case CS5: - frame |= UARTn_FRAME_DATABITS(5); - break; - case CS6: - frame |= UARTn_FRAME_DATABITS(6); - break; - case CS7: - frame |= UARTn_FRAME_DATABITS(7); - break; - case CS8: - frame |= UARTn_FRAME_DATABITS(8); - break; - } - - if (new->c_cflag & CSTOPB) - /* the receiver only verifies the first stop bit */ - frame |= UARTn_FRAME_STOPBITS_TWO; - else - frame |= UARTn_FRAME_STOPBITS_ONE; - - if (new->c_cflag & PARENB) { - if (new->c_cflag & PARODD) - frame |= UARTn_FRAME_PARITY_ODD; - else - frame |= UARTn_FRAME_PARITY_EVEN; - } else - frame |= UARTn_FRAME_PARITY_NONE; - - /* - * the 6 lowest bits of CLKDIV are dc, bit 6 has value 0.25. - * port->uartclk <= 14e6, so 4 * port->uartclk doesn't overflow. - */ - clkdiv = (DIV_ROUND_CLOSEST(4 * port->uartclk, 16 * baud) - 4) << 6; - - spin_lock_irqsave(&port->lock, flags); - - efm32_uart_write32(efm_port, - UARTn_CMD_TXDIS | UARTn_CMD_RXDIS, UARTn_CMD); - - port->read_status_mask = UARTn_RXDATAX_RXDATA__MASK; - if (new->c_iflag & INPCK) - port->read_status_mask |= - UARTn_RXDATAX_FERR | UARTn_RXDATAX_PERR; - if (new->c_iflag & (IGNBRK | BRKINT | PARMRK)) - port->read_status_mask |= SW_UARTn_RXDATAX_BERR; - - port->ignore_status_mask = 0; - if (new->c_iflag & IGNPAR) - port->ignore_status_mask |= - UARTn_RXDATAX_FERR | UARTn_RXDATAX_PERR; - if (new->c_iflag & IGNBRK) - port->ignore_status_mask |= SW_UARTn_RXDATAX_BERR; - - uart_update_timeout(port, new->c_cflag, baud); - - efm32_uart_write32(efm_port, UARTn_CTRL_TXBIL, UARTn_CTRL); - efm32_uart_write32(efm_port, frame, UARTn_FRAME); - efm32_uart_write32(efm_port, clkdiv, UARTn_CLKDIV); - - efm32_uart_write32(efm_port, UARTn_CMD_TXEN | UARTn_CMD_RXEN, - UARTn_CMD); - - spin_unlock_irqrestore(&port->lock, flags); -} - -static const char *efm32_uart_type(struct uart_port *port) -{ - return port->type == PORT_EFMUART ? "efm32-uart" : NULL; -} - -static void efm32_uart_release_port(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - - clk_unprepare(efm_port->clk); - clk_put(efm_port->clk); - iounmap(port->membase); -} - -static int efm32_uart_request_port(struct uart_port *port) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - int ret; - - port->membase = ioremap(port->mapbase, 60); - if (!efm_port->port.membase) { - ret = -ENOMEM; - efm_debug(efm_port, "failed to remap\n"); - goto err_ioremap; - } - - efm_port->clk = clk_get(port->dev, NULL); - if (IS_ERR(efm_port->clk)) { - ret = PTR_ERR(efm_port->clk); - efm_debug(efm_port, "failed to get clock\n"); - goto err_clk_get; - } - - ret = clk_prepare(efm_port->clk); - if (ret) { - clk_put(efm_port->clk); -err_clk_get: - - iounmap(port->membase); -err_ioremap: - return ret; - } - return 0; -} - -static void efm32_uart_config_port(struct uart_port *port, int type) -{ - if (type & UART_CONFIG_TYPE && - !efm32_uart_request_port(port)) - port->type = PORT_EFMUART; -} - -static int efm32_uart_verify_port(struct uart_port *port, - struct serial_struct *serinfo) -{ - int ret = 0; - - if (serinfo->type != PORT_UNKNOWN && serinfo->type != PORT_EFMUART) - ret = -EINVAL; - - return ret; -} - -static const struct uart_ops efm32_uart_pops = { - .tx_empty = efm32_uart_tx_empty, - .set_mctrl = efm32_uart_set_mctrl, - .get_mctrl = efm32_uart_get_mctrl, - .stop_tx = efm32_uart_stop_tx, - .start_tx = efm32_uart_start_tx, - .stop_rx = efm32_uart_stop_rx, - .break_ctl = efm32_uart_break_ctl, - .startup = efm32_uart_startup, - .shutdown = efm32_uart_shutdown, - .set_termios = efm32_uart_set_termios, - .type = efm32_uart_type, - .release_port = efm32_uart_release_port, - .request_port = efm32_uart_request_port, - .config_port = efm32_uart_config_port, - .verify_port = efm32_uart_verify_port, -}; - -static struct efm32_uart_port *efm32_uart_ports[5]; - -#ifdef CONFIG_SERIAL_EFM32_UART_CONSOLE -static void efm32_uart_console_putchar(struct uart_port *port, int ch) -{ - struct efm32_uart_port *efm_port = to_efm_port(port); - unsigned int timeout = 0x400; - u32 status; - - while (1) { - status = efm32_uart_read32(efm_port, UARTn_STATUS); - - if (status & UARTn_STATUS_TXBL) - break; - if (!timeout--) - return; - } - efm32_uart_write32(efm_port, ch, UARTn_TXDATA); -} - -static void efm32_uart_console_write(struct console *co, const char *s, - unsigned int count) -{ - struct efm32_uart_port *efm_port = efm32_uart_ports[co->index]; - u32 status = efm32_uart_read32(efm_port, UARTn_STATUS); - unsigned int timeout = 0x400; - - if (!(status & UARTn_STATUS_TXENS)) - efm32_uart_write32(efm_port, UARTn_CMD_TXEN, UARTn_CMD); - - uart_console_write(&efm_port->port, s, count, - efm32_uart_console_putchar); - - /* Wait for the transmitter to become empty */ - while (1) { - u32 status = efm32_uart_read32(efm_port, UARTn_STATUS); - if (status & UARTn_STATUS_TXC) - break; - if (!timeout--) - break; - } - - if (!(status & UARTn_STATUS_TXENS)) - efm32_uart_write32(efm_port, UARTn_CMD_TXDIS, UARTn_CMD); -} - -static void efm32_uart_console_get_options(struct efm32_uart_port *efm_port, - int *baud, int *parity, int *bits) -{ - u32 ctrl = efm32_uart_read32(efm_port, UARTn_CTRL); - u32 route, clkdiv, frame; - - if (ctrl & UARTn_CTRL_SYNC) - /* not operating in async mode */ - return; - - route = efm32_uart_read32(efm_port, UARTn_ROUTE); - if (!(route & UARTn_ROUTE_TXPEN)) - /* tx pin not routed */ - return; - - clkdiv = efm32_uart_read32(efm_port, UARTn_CLKDIV); - - *baud = DIV_ROUND_CLOSEST(4 * efm_port->port.uartclk, - 16 * (4 + (clkdiv >> 6))); - - frame = efm32_uart_read32(efm_port, UARTn_FRAME); - switch (frame & UARTn_FRAME_PARITY__MASK) { - case UARTn_FRAME_PARITY_ODD: - *parity = 'o'; - break; - case UARTn_FRAME_PARITY_EVEN: - *parity = 'e'; - break; - default: - *parity = 'n'; - } - - *bits = (frame & UARTn_FRAME_DATABITS__MASK) - - UARTn_FRAME_DATABITS(4) + 4; - - efm_debug(efm_port, "get_opts: options=%d%c%d\n", - *baud, *parity, *bits); -} - -static int efm32_uart_console_setup(struct console *co, char *options) -{ - struct efm32_uart_port *efm_port; - int baud = 115200; - int bits = 8; - int parity = 'n'; - int flow = 'n'; - int ret; - - if (co->index < 0 || co->index >= ARRAY_SIZE(efm32_uart_ports)) { - unsigned i; - for (i = 0; i < ARRAY_SIZE(efm32_uart_ports); ++i) { - if (efm32_uart_ports[i]) { - pr_warn("efm32-console: fall back to console index %u (from %hhi)\n", - i, co->index); - co->index = i; - break; - } - } - } - - efm_port = efm32_uart_ports[co->index]; - if (!efm_port) { - pr_warn("efm32-console: No port at %d\n", co->index); - return -ENODEV; - } - - ret = clk_prepare(efm_port->clk); - if (ret) { - dev_warn(efm_port->port.dev, - "console: clk_prepare failed: %d\n", ret); - return ret; - } - - efm_port->port.uartclk = clk_get_rate(efm_port->clk); - - if (options) - uart_parse_options(options, &baud, &parity, &bits, &flow); - else - efm32_uart_console_get_options(efm_port, - &baud, &parity, &bits); - - return uart_set_options(&efm_port->port, co, baud, parity, bits, flow); -} - -static struct uart_driver efm32_uart_reg; - -static struct console efm32_uart_console = { - .name = DEV_NAME, - .write = efm32_uart_console_write, - .device = uart_console_device, - .setup = efm32_uart_console_setup, - .flags = CON_PRINTBUFFER, - .index = -1, - .data = &efm32_uart_reg, -}; - -#else -#define efm32_uart_console (*(struct console *)NULL) -#endif /* ifdef CONFIG_SERIAL_EFM32_UART_CONSOLE / else */ - -static struct uart_driver efm32_uart_reg = { - .owner = THIS_MODULE, - .driver_name = DRIVER_NAME, - .dev_name = DEV_NAME, - .nr = ARRAY_SIZE(efm32_uart_ports), - .cons = &efm32_uart_console, -}; - -static int efm32_uart_probe_dt(struct platform_device *pdev, - struct efm32_uart_port *efm_port) -{ - struct device_node *np = pdev->dev.of_node; - u32 location; - int ret; - - if (!np) - return 1; - - ret = of_property_read_u32(np, "energymicro,location", &location); - - if (ret) - /* fall back to wrongly namespaced property */ - ret = of_property_read_u32(np, "efm32,location", &location); - - if (ret) - /* fall back to old and (wrongly) generic property "location" */ - ret = of_property_read_u32(np, "location", &location); - - if (!ret) { - if (location > 5) { - dev_err(&pdev->dev, "invalid location\n"); - return -EINVAL; - } - efm_debug(efm_port, "using location %u\n", location); - efm_port->pdata.location = location; - } else { - efm_debug(efm_port, "fall back to location 0\n"); - } - - ret = of_alias_get_id(np, "serial"); - if (ret < 0) { - dev_err(&pdev->dev, "failed to get alias id: %d\n", ret); - return ret; - } else { - efm_port->port.line = ret; - return 0; - } - -} - -static int efm32_uart_probe(struct platform_device *pdev) -{ - struct efm32_uart_port *efm_port; - struct resource *res; - unsigned int line; - int ret; - - efm_port = kzalloc(sizeof(*efm_port), GFP_KERNEL); - if (!efm_port) { - dev_dbg(&pdev->dev, "failed to allocate private data\n"); - return -ENOMEM; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - ret = -ENODEV; - dev_dbg(&pdev->dev, "failed to determine base address\n"); - goto err_get_base; - } - - if (resource_size(res) < 60) { - ret = -EINVAL; - dev_dbg(&pdev->dev, "memory resource too small\n"); - goto err_too_small; - } - - ret = platform_get_irq(pdev, 0); - if (ret <= 0) { - dev_dbg(&pdev->dev, "failed to get rx irq\n"); - goto err_get_rxirq; - } - - efm_port->port.irq = ret; - - ret = platform_get_irq(pdev, 1); - if (ret <= 0) - ret = efm_port->port.irq + 1; - - efm_port->txirq = ret; - - efm_port->port.dev = &pdev->dev; - efm_port->port.mapbase = res->start; - efm_port->port.type = PORT_EFMUART; - efm_port->port.iotype = UPIO_MEM32; - efm_port->port.fifosize = 2; - efm_port->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_EFM32_UART_CONSOLE); - efm_port->port.ops = &efm32_uart_pops; - efm_port->port.flags = UPF_BOOT_AUTOCONF; - - ret = efm32_uart_probe_dt(pdev, efm_port); - if (ret > 0) { - /* not created by device tree */ - const struct efm32_uart_pdata *pdata = dev_get_platdata(&pdev->dev); - - efm_port->port.line = pdev->id; - - if (pdata) - efm_port->pdata = *pdata; - } else if (ret < 0) - goto err_probe_dt; - - line = efm_port->port.line; - - if (line >= 0 && line < ARRAY_SIZE(efm32_uart_ports)) - efm32_uart_ports[line] = efm_port; - - ret = uart_add_one_port(&efm32_uart_reg, &efm_port->port); - if (ret) { - dev_dbg(&pdev->dev, "failed to add port: %d\n", ret); - - if (line >= 0 && line < ARRAY_SIZE(efm32_uart_ports)) - efm32_uart_ports[line] = NULL; -err_probe_dt: -err_get_rxirq: -err_too_small: -err_get_base: - kfree(efm_port); - } else { - platform_set_drvdata(pdev, efm_port); - dev_dbg(&pdev->dev, "\\o/\n"); - } - - return ret; -} - -static int efm32_uart_remove(struct platform_device *pdev) -{ - struct efm32_uart_port *efm_port = platform_get_drvdata(pdev); - unsigned int line = efm_port->port.line; - - uart_remove_one_port(&efm32_uart_reg, &efm_port->port); - - if (line >= 0 && line < ARRAY_SIZE(efm32_uart_ports)) - efm32_uart_ports[line] = NULL; - - kfree(efm_port); - - return 0; -} - -static const struct of_device_id efm32_uart_dt_ids[] = { - { - .compatible = "energymicro,efm32-uart", - }, { - /* doesn't follow the "vendor,device" scheme, don't use */ - .compatible = "efm32,uart", - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(of, efm32_uart_dt_ids); - -static struct platform_driver efm32_uart_driver = { - .probe = efm32_uart_probe, - .remove = efm32_uart_remove, - - .driver = { - .name = DRIVER_NAME, - .of_match_table = efm32_uart_dt_ids, - }, -}; - -static int __init efm32_uart_init(void) -{ - int ret; - - ret = uart_register_driver(&efm32_uart_reg); - if (ret) - return ret; - - ret = platform_driver_register(&efm32_uart_driver); - if (ret) - uart_unregister_driver(&efm32_uart_reg); - - pr_info("EFM32 UART/USART driver\n"); - - return ret; -} -module_init(efm32_uart_init); - -static void __exit efm32_uart_exit(void) -{ - platform_driver_unregister(&efm32_uart_driver); - uart_unregister_driver(&efm32_uart_reg); -} -module_exit(efm32_uart_exit); - -MODULE_AUTHOR("Uwe Kleine-Koenig "); -MODULE_DESCRIPTION("EFM32 UART/USART driver"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/include/linux/platform_data/efm32-uart.h b/include/linux/platform_data/efm32-uart.h deleted file mode 100644 index ccbb8f11db75..000000000000 --- a/include/linux/platform_data/efm32-uart.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * - * - */ -#ifndef __LINUX_PLATFORM_DATA_EFM32_UART_H__ -#define __LINUX_PLATFORM_DATA_EFM32_UART_H__ - -#include - -/** - * struct efm32_uart_pdata - * @location: pinmux location for the I/O pins (to be written to the ROUTE - * register) - */ -struct efm32_uart_pdata { - u8 location; -}; -#endif /* ifndef __LINUX_PLATFORM_DATA_EFM32_UART_H__ */ diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index 62c22045fe65..c4042dcfdc0c 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -208,9 +208,6 @@ /* Atheros AR933X SoC */ #define PORT_AR933X 99 -/* Energy Micro efm32 SoC */ -#define PORT_EFMUART 100 - /* ARC (Synopsys) on-chip UART */ #define PORT_ARC 101 From patchwork Fri Jan 15 15:51:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12023175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5A88C43381 for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 87CA2238EC; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [85.220.165.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3662B238E3 for ; Fri, 15 Jan 2021 15:51:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3662B238E3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=ukl@pengutronix.de Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l0RNu-0003OM-56; Fri, 15 Jan 2021 16:51:34 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l0RNt-0008Lc-Qt; Fri, 15 Jan 2021 16:51:33 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Arnd Bergmann , Olof Johansson List-Id: Cc: soc@kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/7] MAINTAINERS: Remove deleted platform efm32 Date: Fri, 15 Jan 2021 16:51:30 +0100 Message-Id: <20210115155130.185010-8-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> References: <20210115155130.185010-1-u.kleine-koenig@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: soc@kernel.org There are no files left to be maintained, to remove the maintainer entry, too. Signed-off-by: Uwe Kleine-König --- MAINTAINERS | 7 ------- 1 file changed, 7 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66428c9..93e56233c6de 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1807,13 +1807,6 @@ F: drivers/firmware/turris-mox-rwtm.c F: drivers/gpio/gpio-moxtet.c F: include/linux/moxtet.h -ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT -M: Uwe Kleine-König -R: Pengutronix Kernel Team -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Maintained -N: efm32 - ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6) M: Robert Jarzmik L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)