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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/21] tcg: Introduce target-specific page data for user-only Date: Fri, 15 Jan 2021 12:46:25 -1000 Message-Id: <20210115224645.1196742-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This data can be allocated by page_alloc_target_data() and released by page_set_flags(start, end, prot | PAGE_RESET). This data will be used to hold tag memory for AArch64 MTE. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v3: Add doc comments; tweak alloc so that the !PAGE_VALID case is clear. --- include/exec/cpu-all.h | 42 +++++++++++++++++++++++++++++++++------ accel/tcg/translate-all.c | 28 ++++++++++++++++++++++++++ linux-user/mmap.c | 4 +++- linux-user/syscall.c | 4 ++-- 4 files changed, 69 insertions(+), 9 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 4b5408c341..99a09ee137 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -264,15 +264,21 @@ extern intptr_t qemu_host_page_mask; #define PAGE_EXEC 0x0004 #define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) #define PAGE_VALID 0x0008 -/* original state of the write flag (used when tracking self-modifying - code */ +/* + * Original state of the write flag (used when tracking self-modifying code) + */ #define PAGE_WRITE_ORG 0x0010 -/* Invalidate the TLB entry immediately, helpful for s390x - * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() */ -#define PAGE_WRITE_INV 0x0040 +/* + * Invalidate the TLB entry immediately, helpful for s390x + * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() + */ +#define PAGE_WRITE_INV 0x0020 +/* For use with page_set_flags: page is being replaced; target_data cleared. */ +#define PAGE_RESET 0x0040 + #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) /* FIXME: Code that sets/uses this is broken and needs to go away. */ -#define PAGE_RESERVED 0x0020 +#define PAGE_RESERVED 0x0100 #endif /* Target-specific bits that will be used via page_get_flags(). */ #define PAGE_TARGET_1 0x0080 @@ -287,6 +293,30 @@ int walk_memory_regions(void *, walk_memory_regions_fn); int page_get_flags(target_ulong address); void page_set_flags(target_ulong start, target_ulong end, int flags); int page_check_range(target_ulong start, target_ulong len, int flags); + +/** + * page_alloc_target_data(address, size) + * @address: guest virtual address + * @size: size of data to allocate + * + * Allocate @size bytes of out-of-band data to associate with the + * guest page at @address. If the page is not mapped, NULL will + * be returned. If there is existing data associated with @address, + * no new memory will be allocated. + * + * The memory will be freed when the guest page is deallocated, + * e.g. with the munmap system call. + */ +void *page_alloc_target_data(target_ulong address, size_t size); + +/** + * page_get_target_data(address) + * @address: guest virtual address + * + * Return any out-of-bound memory assocated with the guest page + * at @address, as per page_alloc_target_data. + */ +void *page_get_target_data(target_ulong address); #endif CPUArchState *cpu_copy(CPUArchState *env); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index e9de6ff9dd..7bcb6663f1 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -113,6 +113,7 @@ typedef struct PageDesc { unsigned int code_write_count; #else unsigned long flags; + void *target_data; #endif #ifndef CONFIG_USER_ONLY QemuSpin lock; @@ -2740,6 +2741,7 @@ int page_get_flags(target_ulong address) void page_set_flags(target_ulong start, target_ulong end, int flags) { target_ulong addr, len; + bool reset_target_data; /* This function should never be called with addresses outside the guest address space. If this assert fires, it probably indicates @@ -2754,6 +2756,8 @@ void page_set_flags(target_ulong start, target_ulong end, int flags) if (flags & PAGE_WRITE) { flags |= PAGE_WRITE_ORG; } + reset_target_data = !(flags & PAGE_VALID) || (flags & PAGE_RESET); + flags &= ~PAGE_RESET; for (addr = start, len = end - start; len != 0; @@ -2767,10 +2771,34 @@ void page_set_flags(target_ulong start, target_ulong end, int flags) p->first_tb) { tb_invalidate_phys_page(addr, 0); } + if (reset_target_data && p->target_data) { + g_free(p->target_data); + p->target_data = NULL; + } p->flags = flags; } } +void *page_get_target_data(target_ulong address) +{ + PageDesc *p = page_find(address >> TARGET_PAGE_BITS); + return p ? p->target_data : NULL; +} + +void *page_alloc_target_data(target_ulong address, size_t size) +{ + PageDesc *p = page_find(address >> TARGET_PAGE_BITS); + void *ret = NULL; + + if (p->flags & PAGE_VALID) { + ret = p->target_data; + if (!ret) { + p->target_data = ret = g_malloc0(size); + } + } + return ret; +} + int page_check_range(target_ulong start, target_ulong len, int flags) { PageDesc *p; diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 810653c503..c693505b60 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -599,6 +599,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot, } } the_end1: + page_flags |= PAGE_RESET; page_set_flags(start, start + len, page_flags); the_end: trace_target_mmap_complete(start); @@ -792,7 +793,8 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size, new_addr = h2g(host_addr); prot = page_get_flags(old_addr); page_set_flags(old_addr, old_addr + old_size, 0); - page_set_flags(new_addr, new_addr + new_size, prot | PAGE_VALID); + page_set_flags(new_addr, new_addr + new_size, + prot | PAGE_VALID | PAGE_RESET); } tb_invalidate_phys_range(new_addr, new_addr + new_size); mmap_unlock(); diff --git a/linux-user/syscall.c b/linux-user/syscall.c index d182890ff0..bec2ab7769 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -4625,8 +4625,8 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env, raddr=h2g((unsigned long)host_raddr); page_set_flags(raddr, raddr + shm_info.shm_segsz, - PAGE_VALID | PAGE_READ | - ((shmflg & SHM_RDONLY)? 0 : PAGE_WRITE)); + PAGE_VALID | PAGE_RESET | PAGE_READ | + (shmflg & SHM_RDONLY ? 0 : PAGE_WRITE)); for (i = 0; i < N_SHM_REGIONS; i++) { if (!shm_regions[i].in_use) { From patchwork Fri Jan 15 22:46:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F34F8C433DB for ; Fri, 15 Jan 2021 22:49:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3AAF23128 for ; Fri, 15 Jan 2021 22:49:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A3AAF23128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55222 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Xub-0005q0-CR for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:49:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53490) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0Xrr-0003Vq-Sc for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:46:56 -0500 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:51024) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xrp-0005Bb-Fj for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:46:55 -0500 Received: by mail-pj1-x1031.google.com with SMTP id md11so5895553pjb.0 for ; Fri, 15 Jan 2021 14:46:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Kyzjq96nH0KWrOiii6echH6ofV70lplGMBMMhcVo2Uo=; b=NZ6mpl9ggtqxYOyKpx6AdJI2gAJf/R0znj6EoKUUuG9paOIxhpcg7T4sB1yAWe/V7Z IoUtTj8vvt2RTaVTsybm0o7IDQZcx0nKTs8oPVac9c4UW0dIZqqCKo5u9KBILg1Fvz5j uZkoLbN7RGAbn0umx2kmhRdVdByPHJURB91sIt74Js+4/uZS0RmeN6KZWXItCJ9f2eWQ s09YPG7CPAwFMW44echC5/bzf9e1izzo/1+XojkzBTzu/8nu121jLUHyHG+s6SwevA0K wxQBYmkwzxIcbwud1/2nHRHh+eMFATw5Ads8Q0NLm3EjC1X2qTQjpv2IakiTH2jIFJzO UrEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kyzjq96nH0KWrOiii6echH6ofV70lplGMBMMhcVo2Uo=; b=Dae+DrssnoLxUS3+198kNIXIdF4/Wi7zDDw3qz5uwCdOdFv2aoCdlzqqxTJDrEqxDf mpMLPOhJo+GS0a5AaMuAboxXoQY/tkQWd5zM+JFslKv4hii/fouw0g2g3IU4upMlX+0y kOpzh4NFGbz4do9wOt9tEodQPvfYoY5EFUjSFcyDStozGguYKibxKBfkvSKzzSgkdhEA RlOFZ7jOrAJnb2Oa1fjjlxyRX9RDTdl3Y1FSQpqSssqHE9fV/ttYzHWsEMaK0cbUyb/H 1g4h1cWNixqdXS8PyIT5RwdWAFxb1fXo8kR+B0Em9usi3ycmmbwffGWKCfOWUoJFQVKo z+5g== X-Gm-Message-State: AOAM530D3F3nY/4RH/sMePli+sr1PrQ7rOyAAHC38cCZhSr9HTMf0kXw 2o1/UfqeoH0Bb1QJ4iuEQ8IFEs4F2Hc/D8y0 X-Google-Smtp-Source: ABdhPJznzaXIC2NbX86/26pXEE79LmI62CMzc96YyvgrR+IOoSh/iFz7gP1yAbYIo475rF/1h3s3+g== X-Received: by 2002:a17:902:8642:b029:de:2bf1:b061 with SMTP id y2-20020a1709028642b02900de2bf1b061mr14643592plt.10.1610750812180; Fri, 15 Jan 2021 14:46:52 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/21] linux-user: Introduce PAGE_ANON Date: Fri, 15 Jan 2021 12:46:26 -1000 Message-Id: <20210115224645.1196742-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Record whether the backing page is anonymous, or if it has file backing. This will allow us to get close to the Linux AArch64 ABI for MTE, which allows tag memory only on ram-backed VMAs. The real ABI allows tag memory on files, when those files are on ram-backed filesystems, such as tmpfs. We will not be able to implement that in QEMU linux-user. Thankfully, anonymous memory for malloc arenas is the primary consumer of this feature, so this restricted version should still be of use. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 2 ++ linux-user/mmap.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 99a09ee137..c23c77589b 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -275,6 +275,8 @@ extern intptr_t qemu_host_page_mask; #define PAGE_WRITE_INV 0x0020 /* For use with page_set_flags: page is being replaced; target_data cleared. */ #define PAGE_RESET 0x0040 +/* For linux-user, indicates that the page is MAP_ANON. */ +#define PAGE_ANON 0x0080 #if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) /* FIXME: Code that sets/uses this is broken and needs to go away. */ diff --git a/linux-user/mmap.c b/linux-user/mmap.c index c693505b60..7fb4c628e1 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -599,6 +599,9 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot, } } the_end1: + if (flags & MAP_ANONYMOUS) { + page_flags |= PAGE_ANON; + } page_flags |= PAGE_RESET; page_set_flags(start, start + len, page_flags); the_end: From patchwork Fri Jan 15 22:46:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2053CC433E0 for ; Fri, 15 Jan 2021 22:52:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E78123128 for ; Fri, 15 Jan 2021 22:52:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E78123128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35674 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0XxQ-0000zo-HE for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:52:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53560) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0Xs0-0003XQ-BK for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:11 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]:44766) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xrr-0005Cc-0p for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:00 -0500 Received: by mail-pl1-x62d.google.com with SMTP id r4so5433205pls.11 for ; Fri, 15 Jan 2021 14:46:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Q6Vn8EuRt3zWEIGcR+Vsso1EpzS5NZb4Sjnv0xY+IUE=; b=PaMRsJ4AsTRmfgunMw9G8wCbtxV4VxB1Y1z9QfOjPTRXIaAdiK3IdR+RcWr7+RQjVV +5NEQMFyR4LvlAwjdEjoQ97GxyFyzv+Igw+PjGZnPtWaKBdm2i2I62Lt3mhEShKDLWKb RQVHuBB0r5K009sLlE/7GuVkX8lqY/NWLZKu9WwpBL0WTWSYLqokrupSOpy2itAf/I8r xzKYdyff9RMsNShrlrPEytol4MLV4QYtcmIHF9d17/OvZ34GN+wYxIRoVJy4rVvkegJ6 1DN2OBlmCZw2Q4pRc2GZ8uYn0/uzok7N19XV7hNiy5EMdYYwoHXDn/jPqInbKKV2oEaA Pm5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q6Vn8EuRt3zWEIGcR+Vsso1EpzS5NZb4Sjnv0xY+IUE=; b=uF5POL/xeVXnZavmKV0O7NRxVo4/Lx/zmIufbnWn4CyMwAY1WoVF+1DxzhxvTvLhIE 5ngwIFbQ4GNDfii2OEl8BjE2rtVRlGpz3SB2Zuvk5a+zZ8DGhAblCauXV/IP0o63+YnO Ks+rGI75HOllFtUB0ETHV0Hv/Gr7ZimE8m/ZFEcuYPXkPltznYhtxHHDxwA6A9kp5oYO 2vfunfckL5ol7XsIBH+QSmgroHX17X9eP/3BaPUHhEEbVKRpic3l6bsDTL0HOSPxBiUf wW7X03abWrTiWq+HLhkvSi/JZg5664PNlXVagyCtDQVfitqbUmrfErC3pCGhXBSPZRP1 Aicw== X-Gm-Message-State: AOAM531IuHLhZQ3EnRNVJcvxQ0F3pNsN7d25Hf4oYgAEay9d7/oHHd2P utcOpKjbrwQq0EXIqC7f9A8aUIEzIGMLifjr X-Google-Smtp-Source: ABdhPJz/yEGErCk7Zt/Jr61dhPZ59UrTF4umCcm5gp1WUGuNvi9T7g+4Ef3q+Jc0PjMiCJzrq2y4Zw== X-Received: by 2002:a17:902:8341:b029:dc:27b:be2d with SMTP id z1-20020a1709028341b02900dc027bbe2dmr15083974pln.30.1610750813805; Fri, 15 Jan 2021 14:46:53 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/21] exec: Use uintptr_t for guest_base Date: Fri, 15 Jan 2021 12:46:27 -1000 Message-Id: <20210115224645.1196742-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- include/exec/cpu-all.h | 2 +- bsd-user/main.c | 2 +- linux-user/main.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index c23c77589b..c52180e8e6 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -158,7 +158,7 @@ static inline void tswap64s(uint64_t *s) /* On some host systems the guest address space is reserved on the host. * This allows the guest address space to be offset to a convenient location. */ -extern unsigned long guest_base; +extern uintptr_t guest_base; extern bool have_guest_base; extern unsigned long reserved_va; diff --git a/bsd-user/main.c b/bsd-user/main.c index 65163e1396..5c8e6a4acd 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -41,7 +41,7 @@ int singlestep; unsigned long mmap_min_addr; -unsigned long guest_base; +uintptr_t guest_base; bool have_guest_base; unsigned long reserved_va; diff --git a/linux-user/main.c b/linux-user/main.c index bb4e55e8fc..2600245300 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -58,7 +58,7 @@ static const char *cpu_model; static const char *cpu_type; static const char *seed_optarg; unsigned long mmap_min_addr; -unsigned long guest_base; +uintptr_t guest_base; bool have_guest_base; /* From patchwork Fri Jan 15 22:46:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B2D3C433DB for ; Fri, 15 Jan 2021 22:57:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9515F23128 for ; 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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/21] exec: Use uintptr_t in cpu_ldst.h Date: Fri, 15 Jan 2021 12:46:28 -1000 Message-Id: <20210115224645.1196742-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- include/exec/cpu_ldst.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index ef54cb7e1f..3f9063aade 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -70,14 +70,14 @@ typedef uint64_t abi_ptr; #endif /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ -#define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base)) +#define g2h(x) ((void *)((uintptr_t)(abi_ptr)(x) + guest_base)) #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS #define guest_addr_valid(x) (1) #else #define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX) #endif -#define h2g_valid(x) guest_addr_valid((unsigned long)(x) - guest_base) +#define h2g_valid(x) guest_addr_valid((uintptr_t)(x) - guest_base) static inline int guest_range_valid(unsigned long start, unsigned long len) { @@ -85,7 +85,7 @@ static inline int guest_range_valid(unsigned long start, unsigned long len) } #define h2g_nocheck(x) ({ \ - unsigned long __ret = (unsigned long)(x) - guest_base; \ + uintptr_t __ret = (uintptr_t)(x) - guest_base; \ (abi_ptr)__ret; \ }) From patchwork Fri Jan 15 22:46:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024299 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41DABC433E0 for ; Fri, 15 Jan 2021 22:53:39 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D9C8623128 for ; Fri, 15 Jan 2021 22:53:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D9C8623128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38070 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0XyM-0001yN-2I for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:53:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53660) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0Xs6-0003Xw-T2 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:13 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]:36033) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xru-0005Dw-B0 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:09 -0500 Received: by mail-pl1-x62f.google.com with SMTP id e9so1287105plh.3 for ; Fri, 15 Jan 2021 14:46:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BPFkHBCfiYE2/tooUwU3w49LVJJCP7NOmKVnwS50G54=; b=cVKi/EO5fMAfl0J+r2MBksBLyMqvCDyxcwuWFw/B7d/QyOp3jq6CjIqXBdd5qtgeYx BK6B3yOo23/ugG7c2INs0jNR0Vpgxfmg7X/dgJONJOwZG2EU6r/OyikYnND6l+kcHJwU Qg3VKh7366OMoeOzo9TXybPAhNh83PeG4OODSM/JKNzefTkMGK+gE6WKwTEc9FahaYhD tVR0sK2xp7+e9GKKOoT+cVQZRXJUDBgWQRPocHFn//aVL8gxsF7dokk5sAs1wSDKJ46v fKjaJZjyLVJ3LNZQTzeMbdA2H8kL1k+I0hGZsjiJYj+Yh3kjp701dDTMqDzebEQoKXRM 4H1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BPFkHBCfiYE2/tooUwU3w49LVJJCP7NOmKVnwS50G54=; b=dpC368ri+fwTNwen1lv4zrIf0Vu6cY/43xVPSj1ZKAgvYbG5Fj0HSFYm9KYtDXQTzU blVG66alDBmjxaHQNLrDkI6AgPnIROeoIm4ppT82P3Xkb+o858jmIe59UsGYbx7UdrVR 8BupONV/il6SMHzVtZqzk7iAsmvPne9JY1lc6J2urJY5rha3rWdd9jRq7t+0PveeoPfs 7IrGc1fClhL3epElfhBUseJwYnTPvyb2Ktmi5Vzf/Jpy/g4gZrMPSkeOJ1K5npzvyAOK SUTXgW/WaSGVpB6NuXJKJrssTZRv7b3edh8DIHnCzHNUuXqyPUh5FBYAyOoTOufTSPFt eTMQ== X-Gm-Message-State: AOAM532p+rQnqzT5QydetM2OCYz9qo8pEyRgsto3j6m2ECKRDiugnH7Z 3IpZOJCiDAFkJZ+7Pv9GiFyDqsLhp3hCBJJS X-Google-Smtp-Source: ABdhPJyBOpOsu6OBJWbBU/auhm1HBzyzQEWFRl2H0VnP6d/hHQRD/m3916MQp2cwnQkSEk+D/k/9fw== X-Received: by 2002:a17:902:8d82:b029:dc:20b8:3c19 with SMTP id v2-20020a1709028d82b02900dc20b83c19mr14798262plo.29.1610750817019; Fri, 15 Jan 2021 14:46:57 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/21] exec: Improve types for guest_addr_valid Date: Fri, 15 Jan 2021 12:46:29 -1000 Message-Id: <20210115224645.1196742-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Return bool not int; pass abi_ulong not 'unsigned long'. All callers use abi_ulong already, so the change in type has no effect. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- include/exec/cpu_ldst.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 3f9063aade..5e8878ee9b 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -79,7 +79,7 @@ typedef uint64_t abi_ptr; #endif #define h2g_valid(x) guest_addr_valid((uintptr_t)(x) - guest_base) -static inline int guest_range_valid(unsigned long start, unsigned long len) +static inline bool guest_range_valid(abi_ulong start, abi_ulong len) { return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; } From patchwork Fri Jan 15 22:46:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EEAFC433E0 for ; Fri, 15 Jan 2021 22:53:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4E48923128 for ; Fri, 15 Jan 2021 22:53:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4E48923128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36810 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Xxt-0001Rw-CR for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:53:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53726) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsC-0003ZK-0F for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:17 -0500 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]:42969) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xrw-0005EB-FJ for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:14 -0500 Received: by mail-pg1-x534.google.com with SMTP id g15so6927498pgu.9 for ; Fri, 15 Jan 2021 14:46:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rr4uhte3iLsKjX8Cbli6gBSl01cB/KM2FqNYctfYPe4=; b=ZwiPCxB+pgxqBSVhiKyzXLXxQL2ZxeJzOVekdmh0Png2yTdh5LHtbGJfe4xgh5KT5j MONKrUNjyAZIo/Q1APKbecM5C3a2XWQ9n1SkdQYEIAjD3by8a1EfLqIC78kqEvzPy2Iw X/eFDlBpD3YCYzZa19NwkpOOx/Y3yf+HWoCgmgKo2BTMP+Trc3cJb3vfouNGqfVOHF2Y J5j3S2NZgFFGIVUnvR5Mzy56uZgnFXNcA5fWhPpPP37Eb9xSnyHYOAKi9+o1+1smjgD0 z6HBA6xwvzedCCq9CzuCJnhO++Kf0zAKKG6opn1QJNchgzU6sBesjQK/wu7znGiPrZRK 7YOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rr4uhte3iLsKjX8Cbli6gBSl01cB/KM2FqNYctfYPe4=; b=fvocsuirMti1xAdwBkMBLcM61BeENGLSNeVZOIOjcOsSiWEtEqyYxO8jYhUEbwu78l E2qFSku8qxDAAXgugjDS2CCOYmdJW+tztxMSHQOng6Zw87ihn6qxMVw6JBK395Ha5g0V jBtvDNVRizfendt1Mja/Y/mo6HTrCSXtYUYa7mSRWhu3T9EKUaHAdm1UYDCRYePHrTy1 XJvnbveKvMT7iK5aez8mzB/dLEAw+Bzfc5EENWyo3qmv2Dw+hAQ1YMESt9pdDR5m+K2Z sr9qaiQLFHfk/VZHIdsKl7V/5i7japDm43ka539/3EgfZCXMhCCHsaDU5DXIe1YNLHv8 D3PA== X-Gm-Message-State: AOAM5336ioucxHpnVxox26ZmbXxl2jI609vOkfLjBaF3loccH5vSy4dp +4JsawQIcSguPqef4av2lBYl0+PJ2wleX7OD X-Google-Smtp-Source: ABdhPJxcsT7aNJHrEI9kefNnsvCzOZVgUW1giA0hGvYOCmrvP2zkMcewy7L+kS2jcSFk2KJJ6Kc8Cg== X-Received: by 2002:aa7:9706:0:b029:19d:a2c6:aeb with SMTP id a6-20020aa797060000b029019da2c60aebmr14865467pfg.36.1610750818505; Fri, 15 Jan 2021 14:46:58 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:58 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/21] linux-user: Check for overflow in access_ok Date: Fri, 15 Jan 2021 12:46:30 -1000 Message-Id: <20210115224645.1196742-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Verify that addr + size - 1 does not wrap around. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index 534753ca12..a0f670832e 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -489,12 +489,19 @@ extern unsigned long guest_stack_size; #define VERIFY_READ 0 #define VERIFY_WRITE 1 /* implies read access */ -static inline int access_ok(int type, abi_ulong addr, abi_ulong size) +static inline bool access_ok(int type, abi_ulong addr, abi_ulong size) { - return guest_addr_valid(addr) && - (size == 0 || guest_addr_valid(addr + size - 1)) && - page_check_range((target_ulong)addr, size, - (type == VERIFY_READ) ? PAGE_READ : (PAGE_READ | PAGE_WRITE)) == 0; + if (!guest_addr_valid(addr)) { + return false; + } + if (size != 0 && + (addr + size - 1 < addr || + !guest_addr_valid(addr + size - 1))) { + return false; + } + return page_check_range((target_ulong)addr, size, + (type == VERIFY_READ) ? PAGE_READ : + (PAGE_READ | PAGE_WRITE)) == 0; } /* NOTE __get_user and __put_user use host pointers and don't check access. From patchwork Fri Jan 15 22:46:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDB52C433DB for ; Fri, 15 Jan 2021 23:03:00 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8378F23382 for ; Fri, 15 Jan 2021 23:03:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8378F23382 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55194 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y7P-0000u3-JM for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:02:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53738) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsC-0003ZL-8s for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:17 -0500 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]:40208) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs0-0005EL-2P for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:16 -0500 Received: by mail-pl1-x62c.google.com with SMTP id q4so5444449plr.7 for ; Fri, 15 Jan 2021 14:47:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qD60vJJte7K6bQArBY0DduIczHDfCgP2vdEmcn/7+GI=; b=YwlZV9wYAP5Rt/Z+Xt+EGN2PHf3ePFuoh8BcVKwFszB6IR8/OymngxewUfx0X8pjZ8 QQvfRKPY3qi3o3MQH6vejNAIvBoa+ZaC8E7cCs/k77dMnDp7eR6Ww6V2vtMrtxDEowlo o+dw87Dx3tAv1XLvTtH/HBSCoDy2z64DrCPajZ7tf2ZPX3OGUE3/lukbVPDX+uQ8uGrq f22EJjUFiSRXNyh+O9PraGYGWI5ffY76jdBR1rm8eF5//l+vlAla7h9LLzpXRmKILq1q x1KXup0FOSq++Kl0tlOogZNFskRAZ2a0imbe2c+/mRIhAUb4J6wUH2fWsXh3DLZI+G+q LTiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qD60vJJte7K6bQArBY0DduIczHDfCgP2vdEmcn/7+GI=; b=oLKPrd9veOUjtSYSONKNS1X5QF+i6cUUpuXfXItjuyp5lGR6ndEeHardP2JsNv667P uQmh7wK+Bf4ovLvRjBiOjHwQn5POVRhOYx/+z9QWS5Vc+tqR6UqvYBKPr20qO9RRsFhz fpjCk3j7VkA/3+bnHt4EOi0xdbjawYQGuTf66hVtVW6NYsNcFURHo7kr1mk1/bgMYDC8 16l5FPPRWF76hdvcpNeuvf2MXIswO8Tu7RhisztO/Jj/raoY+s4prssyPLXyutdWslqA W43X2tsIPKLfukZm0o2QiMvwV5rweWapK170dxBt2QbwvZqC0THyQv+Cr3wtoSz+q9dH AriQ== X-Gm-Message-State: AOAM531O9MIuRpQ5Ch3DH4E7llkMBXyWuedkrl+SNa3f5ZRoEFUW1sgR dXiHMOPZHk3NGb8WHGKa8ZIKDnpggxabjm+E X-Google-Smtp-Source: ABdhPJwgdAho/OdF+WELsY1fJDi903omlO+a51vggx3VfMy+YE8DCF3cIlTDCJ8rz1hbfLIvN1Fzeg== X-Received: by 2002:a17:902:7086:b029:dc:8d:feab with SMTP id z6-20020a1709027086b02900dc008dfeabmr14921287plk.22.1610750820068; Fri, 15 Jan 2021 14:47:00 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.46.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:46:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/21] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Date: Fri, 15 Jan 2021 12:46:31 -1000 Message-Id: <20210115224645.1196742-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These constants are only ever used with access_ok, and friends. Rather than translating them to PAGE_* bits, let them equal the PAGE_* bits to begin. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/qemu.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index a0f670832e..329a6de669 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -486,8 +486,8 @@ extern unsigned long guest_stack_size; /* user access */ -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 /* implies read access */ +#define VERIFY_READ PAGE_READ +#define VERIFY_WRITE (PAGE_READ | PAGE_WRITE) static inline bool access_ok(int type, abi_ulong addr, abi_ulong size) { @@ -499,9 +499,7 @@ static inline bool access_ok(int type, abi_ulong addr, abi_ulong size) !guest_addr_valid(addr + size - 1))) { return false; } - return page_check_range((target_ulong)addr, size, - (type == VERIFY_READ) ? PAGE_READ : - (PAGE_READ | PAGE_WRITE)) == 0; + return page_check_range((target_ulong)addr, size, type) == 0; } /* NOTE __get_user and __put_user use host pointers and don't check access. From patchwork Fri Jan 15 22:46:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EEB2C433DB for ; Fri, 15 Jan 2021 22:57:05 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9C6723128 for ; Fri, 15 Jan 2021 22:57:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A9C6723128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46512 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y1f-0005Wa-Ok for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:57:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53846) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsF-0003du-PV for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:19 -0500 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]:42960) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs1-0005FM-6J for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:19 -0500 Received: by mail-pg1-x52a.google.com with SMTP id g15so6927559pgu.9 for ; Fri, 15 Jan 2021 14:47:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cekQQRp0i5HZWYUW7TcRhFHir1r8zA6FY8NgWmITL0g=; b=jWLwcRYiTngZ/Nzz67lB7NXK3iTuCNdax0+JWEbw4ZbC3U3xoWG/MaR5AOW2OwF0BB wbAETgmrWBV8aZ6tqMm8j8Qjl0gIutGuAvU2+sBOBKrlcakQLADxK+jSwxefH69a4c/t vB7HG3edLYHC4TEXrRmyyME2Kkt/IfiVl1hIXRS/A+up3JLGmngS9I+mSFqrfqn3fYV7 4e7IPFPTegFAa6LcAiFwrONaKLXfNy5JjXM4CxrwYLyzaeFLhuLMv8Fc80XLtLju9U+V uNTczzPWKSv6Tc6jEDOE8LfeuqfZB6DF1xQWt4ZWCw9HNZdI/16zg20pL486EHWK4A0j JoTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cekQQRp0i5HZWYUW7TcRhFHir1r8zA6FY8NgWmITL0g=; b=phSy/9BWyjKWAIiZ1YFWxP4BNLwrjSOBSAlAaWEt6bXUOUOUgmY1Gr8dXy1gAsorlO Lzbb7/n4zx15VtBTh2jjG9aphsgv9BS4yU6SJI6pNCfGjAk82HCIwAp3FLoa70iltSuA qV2q9H5+9dGKj163Aa1IhWAFHT8cBkmGhxLU4Ss/qa50EApeSVxSsaXptu/vQ4/7TKzM opBqOnSEYDp6YpOhYQ4bzE4DvLxwdqXsHJWBDbGihxhzaydEyb9G6UFdnIhe9I453wX3 UOoxAMnc+YIJAlXWrJLv0/aeZDRipKK1UKIO2fCYyoXl1CyxfnDsNR8AxEohWdGW0Aij /jBA== X-Gm-Message-State: AOAM531O5OAVK4XyHtma2AHY7VHDRJ+RdlgQr/uyvEvzCu7Do5GfiZFD 7VugjfCDCVh1DzlEK4erOHTB1FxJGR2c9ypE X-Google-Smtp-Source: ABdhPJwybbMjXU099WikbW4ojpTd6f9K0ktxyEX6YnamUwcN+OFzbjsCekDghIjlNqKpLAraB9p9CA== X-Received: by 2002:a63:6305:: with SMTP id x5mr14466820pgb.216.1610750821621; Fri, 15 Jan 2021 14:47:01 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/21] bsd-user: Tidy VERIFY_READ/VERIFY_WRITE Date: Fri, 15 Jan 2021 12:46:32 -1000 Message-Id: <20210115224645.1196742-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These constants are only ever used with access_ok, and friends. Rather than translating them to PAGE_* bits, let them equal the PAGE_* bits to begin. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Reviewed-by: Warner Losh --- bsd-user/qemu.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index f8bb1e5459..4076adabd0 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -218,13 +218,12 @@ extern unsigned long x86_stack_size; /* user access */ -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 /* implies read access */ +#define VERIFY_READ PAGE_READ +#define VERIFY_WRITE (PAGE_READ | PAGE_WRITE) -static inline int access_ok(int type, abi_ulong addr, abi_ulong size) +static inline bool access_ok(int type, abi_ulong addr, abi_ulong size) { - return page_check_range((target_ulong)addr, size, - (type == VERIFY_READ) ? PAGE_READ : (PAGE_READ | PAGE_WRITE)) == 0; + return page_check_range((target_ulong)addr, size, type) == 0; } /* NOTE __get_user and __put_user use host pointers and don't check access. */ From patchwork Fri Jan 15 22:46:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 829EAC433E6 for ; Fri, 15 Jan 2021 22:57:07 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3D80D23128 for ; Fri, 15 Jan 2021 22:57:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3D80D23128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46690 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y1i-0005aw-9o for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:57:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53810) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsE-0003bB-Qz for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:18 -0500 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]:38703) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs2-0005FZ-RS for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:18 -0500 Received: by mail-pf1-x42a.google.com with SMTP id y205so583899pfc.5 for ; Fri, 15 Jan 2021 14:47:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4REF6cfdA8MQv8viPXefMUo/38x0z3uSDZzFVOD3Xwc=; b=yKJEbBv+SrFsgEnltc/TzCtw86pnuM6k14IqbwjELUAeVDqJ3li5/xF7UFZl6/sxkA yoABsgYO0PryhgXiatN2djfCWQaSm36thjzmLwcp0RGiZHjJmI1sawyRwW4QR0lwDFmk Fn+CgVCVbDdYNv6JTPClFC0Au3kM+t3LJvLoymZvDp4Hu2sdPMm8Xt7jp9tgAchii05j jsX9gyhDfZ9EMkzI6PRxvaKtjkanv8f77aw2EXXE12WascTVrohbA95VfyKejvuB4SkD 4t4Fx1bbDFqq8WBSFc0VBBhccVYOxdqeBd+5nyJtENFj6/mnWXp+BQGPWb4ivGkBZr6b hHuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4REF6cfdA8MQv8viPXefMUo/38x0z3uSDZzFVOD3Xwc=; b=BhN3gB5svPRmqtAxJ9Clk/oligGN9sb4ZTCqCtbDQ/W2Alh2qfCl1gdFV1mnEDyOeS jOeyC0/ddJpVH4OR98F5UscamkzwbhlxG+xBFOMremvBGZg3bPRHztkFNxXjhiQv/Gkj uEm3gp6HMVdn/RYWHcyO6m/3MtD7lDu82qIEjL98piA4xa6nXnKFKPzH1V6whRSwEOIk IFG0O5iOdlkxRRJciIDPE7K8NrZLP8y3NK+oE70IhWFHZs2ztVGVsIDMKifpHY376hlq Ltrc0nYMl9bXMACpU1O2fWpk3sOayi+uwtIhmJ/hSKC3Of9QOcjki1Wo/TOgXKLFuM7a rd7A== X-Gm-Message-State: AOAM533qcteu6I0M78NQmypfxulBykkR0vp0rK3KMUQGio1pzYTyI0Lf tXoIVw5rBbsj4iQvWhAQJwzj52a7Ig5IbDJJ X-Google-Smtp-Source: ABdhPJzwSYG1HID140ykj4hN5FW2T7+OXAR2XVNf+MOzV+xS6hSZJ+WQ0mOEIJu8DddEkVMG0Ca0Sg== X-Received: by 2002:a63:65c5:: with SMTP id z188mr14580822pgb.332.1610750823237; Fri, 15 Jan 2021 14:47:03 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/21] linux-user: Do not use guest_addr_valid for h2g_valid Date: Fri, 15 Jan 2021 12:46:33 -1000 Message-Id: <20210115224645.1196742-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is the only use of guest_addr_valid that does not begin with a guest address, but a host address being transformed to a guest address. We will shortly adjust guest_addr_valid to handle guest memory tags, and the host address should not be subjected to that. Move h2g_valid adjacent to the other h2g macros. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v3: Ditch type changes; retain true for HLB <= GAM (pmm). --- include/exec/cpu_ldst.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5e8878ee9b..4e6ef3d542 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -77,13 +77,16 @@ typedef uint64_t abi_ptr; #else #define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX) #endif -#define h2g_valid(x) guest_addr_valid((uintptr_t)(x) - guest_base) static inline bool guest_range_valid(abi_ulong start, abi_ulong len) { return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; } +#define h2g_valid(x) \ + (HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS || \ + (uintptr_t)(x) - guest_base <= GUEST_ADDR_MAX) + #define h2g_nocheck(x) ({ \ uintptr_t __ret = (uintptr_t)(x) - guest_base; \ (abi_ptr)__ret; \ From patchwork Fri Jan 15 22:46:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17820C433E0 for ; Fri, 15 Jan 2021 22:49:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B389723A5E for ; Fri, 15 Jan 2021 22:49:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B389723A5E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55264 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Xub-0005qw-C2 for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:49:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsF-0003eD-U2 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:19 -0500 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:47043) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs3-0005Fq-RX for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:19 -0500 Received: by mail-pg1-x52b.google.com with SMTP id c22so6905819pgg.13 for ; Fri, 15 Jan 2021 14:47:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XRNC7TN62/mhJ44h4TxsBn3p8qzX1+L1EKv8lKpxGuM=; b=O2doYa6yIz8jL6bI9AmMpYnadrmnXydclmOZtN9DK6QEVkOIFkl3snvVLj+rahu4LK 2dBT+zZvU5YuREnews9thuQFqdaM7u1Omeg1HpX92QUlm+RcQIehy4h/wsz0GPcglfva WPCqgy/7zuM7Oro7b0+kC0e0QaMx65b6jb4zXGuEjLBnfmR5sgQDoCw0EIYqGiWgO+wo vv51QNabKkqYElsendHDnly9fr7PsHs55rfPRFv4Doij21xLjcZ4cI8MEtE7Txux+R7A 0wpJa25sxhmCCTiWs/dofzZmktmertxL6nCucrfApOjxvhbJJRQQgKzlvMaXcDXrY18Z DE+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XRNC7TN62/mhJ44h4TxsBn3p8qzX1+L1EKv8lKpxGuM=; b=iD8gLr8F8aOEi1z6wHeT5+x4QPOXYR49Mpj0p2/l0lHs8zv4t94eGenqltFPjdWATA oCt5G2fwW12wmaBzx9/iu83AkcUAKYYQKrRxhy2eSkZDXKUgbMsD8S1xGRdjRHQXVhy3 ibe8nQj1Dwy6AiYOWQeFP1hCR/wLMw7cvs4RHMbnWUMF25vcBdWdcoc+e+cl9zrvyLNO PXxXS+LnEFLGM6LD156TLIBFR1Yq076Lpx6Q4eTZ9ItIsEfW/Udj547bl3Mv0tXbkm4Q BstMHZ3HZWLnzeT899M+jKxgdbpKRxyAuBKaS4fEi46a28Lb7eMO0VKHPfElzE7ZJnx5 v7Ag== X-Gm-Message-State: AOAM530L/1dXO2ajH3wWBTypWqUawocy27MpwiJbBBWYcB0S15oHQ0uT k5cm17QgBkXNdftCyMT20VhXHKu5bb6A99oB X-Google-Smtp-Source: ABdhPJxrhROru5/oDYFEUmXYHLDX2YylAEj61YMUt1A/l8K7e84OD6oh5jy2yaKo0YamASNyhQbLPA== X-Received: by 2002:a63:130b:: with SMTP id i11mr14736622pgl.300.1610750824862; Fri, 15 Jan 2021 14:47:04 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/21] linux-user: Fix guest_addr_valid vs reserved_va Date: Fri, 15 Jan 2021 12:46:34 -1000 Message-Id: <20210115224645.1196742-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We must always use GUEST_ADDR_MAX, because even 32-bit hosts can use -R to restrict the memory address of the guest. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- include/exec/cpu_ldst.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 4e6ef3d542..e62f4fba00 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -72,11 +72,10 @@ typedef uint64_t abi_ptr; /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ #define g2h(x) ((void *)((uintptr_t)(abi_ptr)(x) + guest_base)) -#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS -#define guest_addr_valid(x) (1) -#else -#define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX) -#endif +static inline bool guest_addr_valid(abi_ulong x) +{ + return x <= GUEST_ADDR_MAX; +} static inline bool guest_range_valid(abi_ulong start, abi_ulong len) { From patchwork Fri Jan 15 22:46:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53B1DC433E0 for ; Fri, 15 Jan 2021 23:03:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EBDB82399A for ; Fri, 15 Jan 2021 23:03:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EBDB82399A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y7Q-0000t1-0X for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:03:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53890) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsG-0003gn-SB for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:20 -0500 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:36592) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs6-0005G1-Mw for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:20 -0500 Received: by mail-pf1-x429.google.com with SMTP id b3so6421144pft.3 for ; Fri, 15 Jan 2021 14:47:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=X+LaZKuwwsvEvbJ+r5ztAOZO016eLRKSU8aYWIJf1AQ=; b=LcG7qzDJHtDNdykP4TizHyjuonvDePY1rRb+OzUOPSISfOdv6f99MecPmI4SQFsF/+ nl8ZcxYvz6Y0w6HeI1ml2PWZrOym7gftokPucD4W7IZ2EdcVB0OT5JIGYAnNBj0q7FmV Amejm4HesUHbbbSrgcxzQEvrP6mzc80yj8xrXqmSpUhp9AeT21VjsXB6tXyXgmqhRh6H U/J33hGJT1lE+amylRe5H/zivAw+xyw340BVXyvl9Kg1hN0jR5c41MvjaqhN7KVIMGrG XxcXUGr2pISM4z2cDkUFctVz8btNmF698Iy+p6kyzd5W0uPduXLNK7q/fEuYGxmI8O0k 5C9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=X+LaZKuwwsvEvbJ+r5ztAOZO016eLRKSU8aYWIJf1AQ=; b=KaWcRjQEkSEfKa9wKRipaXO3hcKUT7YX5NR0Pvx5hm2NFkZCP4BGYhoatZPlgzE6La 5aIBjqXqzTcFeMcN3OMc8hYimpNYhhcTd7iF57farJ9adtS+i2tfslOMx6NaaevtqmCs jPQXZkUXhYY7JokT7TfI+nRFdUbV/T5qp1gjQ+VOeEWy0BimXB5h4+w3i0G2XpGiS6S1 wmE5zpJtqj+QQX67NxuBs47iNbBfwmspJ7bz8KPCxp87uoYHnZx5ZbhZM1wtBoCNz38P OuNJbpbAOVrg6ITuLXoEf1HYnX6xn0e1egmsucIUl3c+9jPtPvHBlInNYlmt0Fp1RHF5 HEDw== X-Gm-Message-State: AOAM532eeVbNxuaFwG0J8ClZUnsizV0g9aF4sLvEzjQcoR86Pf4a3Anv UKv7zCL85cbnZfu9XYntEKt2b1ubCaFvE1My X-Google-Smtp-Source: ABdhPJzwOvTLazBZPSJKsjMWwkS/+c08OWJK8hkFYuOuyJ3RQTjE+5fr+AWDq+gvDLSF+3w2wI1A/A== X-Received: by 2002:a63:574b:: with SMTP id h11mr14885891pgm.25.1610750826381; Fri, 15 Jan 2021 14:47:06 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/21] exec: Add support for TARGET_TAGGED_ADDRESSES Date: Fri, 15 Jan 2021 12:46:35 -1000 Message-Id: <20210115224645.1196742-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The AArch64 Linux ABI has always enabled TBI, but has historically required that pointer tags be removed before a syscall. This has changed in the lead-up to ARMv8.5-MTE, in a way that affects the ABI generically and not specifically to MTE. This patch allows the target to indicate that (1) there are tags and (2) whether or not they should be taken into account at the syscall level. Adjust g2h, guest_addr_valid, and guest_range_valid to ignore pointer tags, similar to how TIF_TAGGED_ADDR alters __range_ok in the arm64 kernel source. The prctl syscall is not not yet updated, so this change by itself has no visible effect. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index e62f4fba00..1df9b93e59 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -69,17 +69,31 @@ typedef uint64_t abi_ptr; #define TARGET_ABI_FMT_ptr "%"PRIx64 #endif +static inline abi_ptr untagged_addr(abi_ptr x) +{ +#ifdef TARGET_TAGGED_ADDRESSES + if (current_cpu) { + return cpu_untagged_addr(current_cpu, x); + } +#endif + return x; +} + /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ -#define g2h(x) ((void *)((uintptr_t)(abi_ptr)(x) + guest_base)) +static inline void *g2h(abi_ulong x) +{ + return (void *)((uintptr_t)untagged_addr(x) + guest_base); +} static inline bool guest_addr_valid(abi_ulong x) { - return x <= GUEST_ADDR_MAX; + return untagged_addr(x) <= GUEST_ADDR_MAX; } static inline bool guest_range_valid(abi_ulong start, abi_ulong len) { - return len - 1 <= GUEST_ADDR_MAX && start <= GUEST_ADDR_MAX - len + 1; + return len - 1 <= GUEST_ADDR_MAX && + untagged_addr(start) <= GUEST_ADDR_MAX - len + 1; } #define h2g_valid(x) \ From patchwork Fri Jan 15 22:46:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36E34C433E9 for ; Fri, 15 Jan 2021 23:03:02 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95CD523382 for ; Fri, 15 Jan 2021 23:03:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 95CD523382 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55238 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y7Q-0000ux-NB for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:03:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53886) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsG-0003gG-P2 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:20 -0500 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:39729) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs6-0005GJ-Mx for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:20 -0500 Received: by mail-pf1-x430.google.com with SMTP id m6so6406543pfm.6 for ; Fri, 15 Jan 2021 14:47:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kevGJM1Q+4BI+TG/qeyrIdbD80I/diyx5FwIEqL89Lg=; b=yjl20JCzeSyY0d+TkDuN3wwMZiKpjLRYjZZFtN5FAQY0IP+krpQQkm7x9J+ZgBtnBK RxpY5TF6YB2r1Se761rLFzK0PUICPe21i+qUv9AywzvwvirYPO8ExUFEPfxAw2a2w4HX mO/gjZUUlb8YtnY/Q38ocaXymemjMP+7AjZqixWpccHwCTIowIWQtuWy1uje5RiDUknM hbariWoPORK3SyQIa7arfgicB8ao+WktrsL+r8bd8auzMwOoZVNKX9ojUP1zHkXoiRFM /cxDqFlj4W/eO72nLzxjNFhd02m1tPbI6X+C8nJnxnlQguPPZ6C+Q8xNuSw7iiwrP/VI LlSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kevGJM1Q+4BI+TG/qeyrIdbD80I/diyx5FwIEqL89Lg=; b=GQP8fOu8wXUEWtfR3AGzjV8oYHgaJT8V4IbH5hn8/WYgn63hBfsWZzYT1b6uWITkVt 4TyHVyD4/AEGqKhTa4uTfefMMWhK5eR8xOGgA8tEZDCpVDXV1GWPTXigNlwkMki2skOu Eyl5KRPDY1zaWw9YyfI6LXDJY/ENWOEGaANNpPuYvohSKaCpqPJikqlZq4NzkJdO2exM oXybio4gPW/cQJ5XgoKGDwOhY6TkWJQbKgbZK8w3mZ6sGtOo3HwBmVgdSVEg+OAiHb7r tBo60k8l1MIqYFgD28TjzE2ozzLBUcMRCpDowPPY17j8RvSTnyVcYTWj1aCtA4qXgeX5 GTJQ== X-Gm-Message-State: AOAM530Zml0+QmIPlWSUCcVi65ZDTo4pJkCfSg/nuhU5er8CqEcIGgHO 4HfMqsQByrt3erWt/S5MZKWc6LP7+mBk+qER X-Google-Smtp-Source: ABdhPJyV4SgVfvjZsXZSxCadhQf89wBQz68zzBFY4Y27oBJ+wKCss2UjY+1HDCkPRs7oVPN61VZeTQ== X-Received: by 2002:a63:ea01:: with SMTP id c1mr14823034pgi.138.1610750827934; Fri, 15 Jan 2021 14:47:07 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/21] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE Date: Fri, 15 Jan 2021 12:46:36 -1000 Message-Id: <20210115224645.1196742-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is the prctl bit that controls whether syscalls accept tagged addresses. See Documentation/arm64/tagged-address-abi.rst in the linux kernel. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/aarch64/target_syscall.h | 4 ++++ target/arm/cpu-param.h | 3 +++ target/arm/cpu.h | 23 +++++++++++++++++++++++ linux-user/syscall.c | 25 +++++++++++++++++++++++++ target/arm/cpu.c | 3 +++ 5 files changed, 58 insertions(+) diff --git a/linux-user/aarch64/target_syscall.h b/linux-user/aarch64/target_syscall.h index 3194e6b009..820601dfcc 100644 --- a/linux-user/aarch64/target_syscall.h +++ b/linux-user/aarch64/target_syscall.h @@ -30,4 +30,8 @@ struct target_pt_regs { # define TARGET_PR_PAC_APDBKEY (1 << 3) # define TARGET_PR_PAC_APGAKEY (1 << 4) +#define TARGET_PR_SET_TAGGED_ADDR_CTRL 55 +#define TARGET_PR_GET_TAGGED_ADDR_CTRL 56 +# define TARGET_PR_TAGGED_ADDR_ENABLE (1UL << 0) + #endif /* AARCH64_TARGET_SYSCALL_H */ diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index 6321385b46..f922aa0650 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -20,6 +20,9 @@ #ifdef CONFIG_USER_ONLY #define TARGET_PAGE_BITS 12 +# ifdef TARGET_AARCH64 +# define TARGET_TAGGED_ADDRESSES +# endif #else /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index f3bca73d98..6ddfd9ebe6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -712,6 +712,10 @@ typedef struct CPUARMState { const struct arm_boot_info *boot_info; /* Store GICv3CPUState to access from this struct */ void *gicv3state; + +#ifdef TARGET_TAGGED_ADDRESSES + target_ulong untagged_addr_mask; +#endif } CPUARMState; static inline void set_feature(CPUARMState *env, int feature) @@ -3556,6 +3560,25 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) */ #define PAGE_BTI PAGE_TARGET_1 +#ifdef TARGET_TAGGED_ADDRESSES +/** + * cpu_untagged_addr: + * @cs: CPU context + * @x: tagged address + * + * Remove any address tag from @x. This is explicitly related to the + * linux syscall TIF_TAGGED_ADDR setting, not TBI in general. + * + * There should be a better place to put this, but we need this in + * include/exec/cpu_ldst.h, and not some place linux-user specific. + */ +static inline target_ulong cpu_untagged_addr(CPUState *cs, target_ulong x) +{ + ARMCPU *cpu = ARM_CPU(cs); + return x & cpu->env.untagged_addr_mask; +} +#endif + /* * Naming convention for isar_feature functions: * Functions which test 32-bit ID registers should have _aa32_ in diff --git a/linux-user/syscall.c b/linux-user/syscall.c index bec2ab7769..ebb4e2898c 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -10948,6 +10948,31 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, } } return -TARGET_EINVAL; + case TARGET_PR_SET_TAGGED_ADDR_CTRL: + { + abi_ulong valid_mask = TARGET_PR_TAGGED_ADDR_ENABLE; + CPUARMState *env = cpu_env; + + if ((arg2 & ~valid_mask) || arg3 || arg4 || arg5) { + return -TARGET_EINVAL; + } + env->untagged_addr_mask = (arg2 & TARGET_PR_TAGGED_ADDR_ENABLE + ? MAKE_64BIT_MASK(0, 56) : -1); + return 0; + } + case TARGET_PR_GET_TAGGED_ADDR_CTRL: + { + abi_long ret = 0; + CPUARMState *env = cpu_env; + + if (arg2 || arg3 || arg4 || arg5) { + return -TARGET_EINVAL; + } + if (env->untagged_addr_mask != -1) { + ret |= TARGET_PR_TAGGED_ADDR_ENABLE; + } + return ret; + } #endif /* AARCH64 */ case PR_GET_SECCOMP: case PR_SET_SECCOMP: diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8387e94b94..abc0affd00 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -208,6 +208,9 @@ static void arm_cpu_reset(DeviceState *dev) * Do not modify this without other changes. */ env->cp15.tcr_el[1].raw_tcr = (3ULL << 37); +# ifdef TARGET_TAGGED_ADDRESSES + env->untagged_addr_mask = -1; +# endif #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { From patchwork Fri Jan 15 22:46:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F265C433DB for ; Fri, 15 Jan 2021 23:07:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 081BF239E5 for ; Fri, 15 Jan 2021 23:07:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 081BF239E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35620 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0YC1-0004ev-4A for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:07:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53912) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsH-0003i9-MQ for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:21 -0500 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:38709) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0Xs6-0005GS-NP for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:21 -0500 Received: by mail-pf1-x430.google.com with SMTP id y205so584029pfc.5 for ; Fri, 15 Jan 2021 14:47:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tHmvo/lrgkE+wi7yTJ56b6ape2S0MwV/XIHtk24Q15o=; b=PVQmPkDZuObSBMkVwP5TC2YbQzB6YZQzbNKRTYz3x3rJSlCRRm0EoPoK+HCBeT+qJr urbUWkSE4m9Gr4Fq/sWX64x07lVAHJRHqAU/GEXnEDERyNBHqEtxng4fF+kWGLJV8stJ /QUkhOlXkY0dwVqvr8yqRy5T6kUj2KzXKPBcmzGrtKOqOz0hq9dvKCD7+372kFaB3OyF /Jzq9QAh4+6pz8D7bvPvV7BO+GV/cdoBEKrLGwmZ17KQjOQEmEgBhlPl4yQzpQhWyin0 TDppDi9gSmVa3mxyPXHEe4hCqFdmweQSGp2s08cMaBJUncCnCGcf5uBdgxrn8WtIGuFf oDLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tHmvo/lrgkE+wi7yTJ56b6ape2S0MwV/XIHtk24Q15o=; b=rKASMZn2r/FGW0i7bR86ZgeBUkHJGANhUqxx19TRV4Ax+U4vSjs2Ferv7+yIqQG/Fn F8vimgLJBEtoBdZbNfn/9BOrbvOAb3hgKwukCMnmIjhFLPxZE8M3z0alAVO1JdAZ0t8A ob4rXVnNm9m+TlLxvKXLnOnBEzN8AseSlIknhmRgVa4eCRzi4EhayydvX59E+uDKp2R/ 25IwAY2aE4TC2Zh/kyqK4OiV2j3QNWcUyKyEuokDyXu5fjUvnfi1RQrnPwvl4Bqckdt9 K6nb6ts1f7/7a9I9Qm49NsIQrOZYvqpiaexuQBi0rGnbUPFSCHJ9SLlR6Sty0oBv0Von GlZA== X-Gm-Message-State: AOAM531Thk+K+QA35mzWgAAW5Vt1bnIvVOm40w9Whb0Gb+K85TI+S/4D b1r6qQZEEijB0a33JToglvDuUe3q7IyI8nOv X-Google-Smtp-Source: ABdhPJxmkzpa1HqLyKXo1jEv5PkeolzXJStKFycCgTA6yyzP8JJmhDKGRCZYd3He+DjMj8wNPnfT2g== X-Received: by 2002:a63:d650:: with SMTP id d16mr14809092pgj.277.1610750829482; Fri, 15 Jan 2021 14:47:09 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 13/21] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Date: Fri, 15 Jan 2021 12:46:37 -1000 Message-Id: <20210115224645.1196742-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These prctl fields are required for the function of MTE. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/aarch64/target_syscall.h | 9 ++++++ linux-user/syscall.c | 44 +++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/linux-user/aarch64/target_syscall.h b/linux-user/aarch64/target_syscall.h index 820601dfcc..76f6c3391d 100644 --- a/linux-user/aarch64/target_syscall.h +++ b/linux-user/aarch64/target_syscall.h @@ -33,5 +33,14 @@ struct target_pt_regs { #define TARGET_PR_SET_TAGGED_ADDR_CTRL 55 #define TARGET_PR_GET_TAGGED_ADDR_CTRL 56 # define TARGET_PR_TAGGED_ADDR_ENABLE (1UL << 0) +/* MTE tag check fault modes */ +# define TARGET_PR_MTE_TCF_SHIFT 1 +# define TARGET_PR_MTE_TCF_NONE (0UL << TARGET_PR_MTE_TCF_SHIFT) +# define TARGET_PR_MTE_TCF_SYNC (1UL << TARGET_PR_MTE_TCF_SHIFT) +# define TARGET_PR_MTE_TCF_ASYNC (2UL << TARGET_PR_MTE_TCF_SHIFT) +# define TARGET_PR_MTE_TCF_MASK (3UL << TARGET_PR_MTE_TCF_SHIFT) +/* MTE tag inclusion mask */ +# define TARGET_PR_MTE_TAG_SHIFT 3 +# define TARGET_PR_MTE_TAG_MASK (0xffffUL << TARGET_PR_MTE_TAG_SHIFT) #endif /* AARCH64_TARGET_SYSCALL_H */ diff --git a/linux-user/syscall.c b/linux-user/syscall.c index ebb4e2898c..0316497636 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -10952,10 +10952,46 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, { abi_ulong valid_mask = TARGET_PR_TAGGED_ADDR_ENABLE; CPUARMState *env = cpu_env; + ARMCPU *cpu = env_archcpu(env); + + if (cpu_isar_feature(aa64_mte, cpu)) { + valid_mask |= TARGET_PR_MTE_TCF_MASK; + valid_mask |= TARGET_PR_MTE_TAG_MASK; + } if ((arg2 & ~valid_mask) || arg3 || arg4 || arg5) { return -TARGET_EINVAL; } + + if (cpu_isar_feature(aa64_mte, cpu)) { + switch (arg2 & TARGET_PR_MTE_TCF_MASK) { + case TARGET_PR_MTE_TCF_NONE: + case TARGET_PR_MTE_TCF_SYNC: + case TARGET_PR_MTE_TCF_ASYNC: + break; + default: + return -EINVAL; + } + + /* + * Write PR_MTE_TCF to SCTLR_EL1[TCF0]. + * Note that the syscall values are consistent with hw. + */ + env->cp15.sctlr_el[1] = + deposit64(env->cp15.sctlr_el[1], 38, 2, + arg2 >> TARGET_PR_MTE_TCF_SHIFT); + + /* + * Write PR_MTE_TAG to GCR_EL1[Exclude]. + * Note that the syscall uses an include mask, + * and hardware uses an exclude mask -- invert. + */ + env->cp15.gcr_el1 = + deposit64(env->cp15.gcr_el1, 0, 16, + ~arg2 >> TARGET_PR_MTE_TAG_SHIFT); + arm_rebuild_hflags(env); + } + env->untagged_addr_mask = (arg2 & TARGET_PR_TAGGED_ADDR_ENABLE ? MAKE_64BIT_MASK(0, 56) : -1); return 0; @@ -10964,6 +11000,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, { abi_long ret = 0; CPUARMState *env = cpu_env; + ARMCPU *cpu = env_archcpu(env); if (arg2 || arg3 || arg4 || arg5) { return -TARGET_EINVAL; @@ -10971,6 +11008,13 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, if (env->untagged_addr_mask != -1) { ret |= TARGET_PR_TAGGED_ADDR_ENABLE; } + if (cpu_isar_feature(aa64_mte, cpu)) { + /* See above. */ + ret |= (extract64(env->cp15.sctlr_el[1], 38, 2) + << TARGET_PR_MTE_TCF_SHIFT); + ret = deposit64(ret, TARGET_PR_MTE_TAG_SHIFT, 16, + ~env->cp15.gcr_el1); + } return ret; } #endif /* AARCH64 */ From patchwork Fri Jan 15 22:46:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BAAFC43381 for ; Fri, 15 Jan 2021 22:53:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D929F23A5E for ; Fri, 15 Jan 2021 22:53:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D929F23A5E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36906 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Xxt-0001U9-W2 for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 17:53:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53918) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsI-0003jz-4l for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:22 -0500 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]:47050) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0XsA-0005Gh-Pc for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:21 -0500 Received: by mail-pg1-x532.google.com with SMTP id c22so6905939pgg.13 for ; Fri, 15 Jan 2021 14:47:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Aw5WXq5wBceHp2TEFV1G5r+xP2Xi/95Oor9t7natYrU=; b=TRNBEliC4lszDOEMK8EhLcK6PoSmSf2epLNZnh2HMN0KHLfnhTYqIrg5n19LcnHcYO X5LWGeai2dFNEa0VW48kdSGco8lprPDs5g05WUS21cj7bkcbTQX5OoWGeT9YmP0sxTbR dqsZG/dpbjyGqD5/feVFHNc1x1m0h7q9SxvgcTaFuDh0BGkoJB4Y+n3uhjJgqXP5k6AI YkysG9Ymu7WKJDd6g+xNLrabt5lN0jKZurlA0IcO/aJiUGOidwv0cfC+7dVAsZLKvJu6 z2xqcebGgWceNyEVlk7sgy5OSpozg7kH0XODl8pMqniBCKUwu0pKKyAV4JNtSGRhR+Ta OUcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Aw5WXq5wBceHp2TEFV1G5r+xP2Xi/95Oor9t7natYrU=; b=gqweyIDiR7mUqY2LiMs85+EIOwmogMFIIrEl1Ifs66TI3UGnMyShcOtttqJHwAfWTe 34xKYi0iEKKPTFer3YaPvQHh4SuKip4a8SScpIg5riJigPDxqvZMfjpl0ndLD+V9t9Po yRXmZLdloBC3d11TP8YSqzC68qj82aQ2YUsrP0Aod8JglzRaylsSigyehKDTCOIsOCKt OLp55xHGhhFltaYLO5f82iUjjdN5rieULthsBjk+VINlwN7RmEsWNKGOmEW+0joj4sJm WEZDLAEYhD1sI0j2QOQheehl18y4g4eHl/1xlHXuhZk0ki7fqbSHgm8qlr/BaDYUNmbb xeYw== X-Gm-Message-State: AOAM533KtHRmNJoE9/4eZ4uVyqd3r7YBsKLckIOCjQKfQz84UB4kwg54 Gnac4oiW96Nq/HyGSPJrk6RPkC9/iB7Lozr5 X-Google-Smtp-Source: ABdhPJydAp/MPXTE4YA67A2AKhGy0uZJVWIbn5b0gsMOddc1djEHISEqIPH4zASAdVty4FpJPVHDNg== X-Received: by 2002:a65:6152:: with SMTP id o18mr15053560pgv.392.1610750831231; Fri, 15 Jan 2021 14:47:11 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/21] linux-user/aarch64: Implement PROT_MTE Date: Fri, 15 Jan 2021 12:46:38 -1000 Message-Id: <20210115224645.1196742-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2. Otherwise this does not yet have effect. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v3: Do not overlap PAGE_TARGET_2 with PAGE_RESERVED. --- include/exec/cpu-all.h | 1 + linux-user/syscall_defs.h | 1 + target/arm/cpu.h | 1 + linux-user/mmap.c | 22 ++++++++++++++-------- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index c52180e8e6..b2a72f70ec 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -284,6 +284,7 @@ extern intptr_t qemu_host_page_mask; #endif /* Target-specific bits that will be used via page_get_flags(). */ #define PAGE_TARGET_1 0x0080 +#define PAGE_TARGET_2 0x0200 #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index a00bfc2647..0d6bb1ff8b 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -1311,6 +1311,7 @@ struct target_winsize { #ifdef TARGET_AARCH64 #define TARGET_PROT_BTI 0x10 +#define TARGET_PROT_MTE 0x20 #endif /* Common */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 6ddfd9ebe6..e14c9a6277 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3559,6 +3559,7 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x) * AArch64 usage of the PAGE_TARGET_* bits for linux-user. */ #define PAGE_BTI PAGE_TARGET_1 +#define PAGE_MTE PAGE_TARGET_2 #ifdef TARGET_TAGGED_ADDRESSES /** diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 7fb4c628e1..34bd114f97 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -84,18 +84,24 @@ static int validate_prot_to_pageflags(int *host_prot, int prot) | (prot & PROT_EXEC ? PROT_READ : 0); #ifdef TARGET_AARCH64 - /* - * The PROT_BTI bit is only accepted if the cpu supports the feature. - * Since this is the unusual case, don't bother checking unless - * the bit has been requested. If set and valid, record the bit - * within QEMU's page_flags. - */ - if (prot & TARGET_PROT_BTI) { + { ARMCPU *cpu = ARM_CPU(thread_cpu); - if (cpu_isar_feature(aa64_bti, cpu)) { + + /* + * The PROT_BTI bit is only accepted if the cpu supports the feature. + * Since this is the unusual case, don't bother checking unless + * the bit has been requested. If set and valid, record the bit + * within QEMU's page_flags. + */ + if ((prot & TARGET_PROT_BTI) && cpu_isar_feature(aa64_bti, cpu)) { valid |= TARGET_PROT_BTI; page_flags |= PAGE_BTI; } + /* Similarly for the PROT_MTE bit. */ + if ((prot & TARGET_PROT_MTE) && cpu_isar_feature(aa64_mte, cpu)) { + valid |= TARGET_PROT_MTE; + page_flags |= PAGE_MTE; + } } #endif From patchwork Fri Jan 15 22:46:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A35AFC433E0 for ; Fri, 15 Jan 2021 23:08:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2738A239E5 for ; Fri, 15 Jan 2021 23:08:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2738A239E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0YCW-0005fT-AH for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:08:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53990) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsK-0003od-8n for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:24 -0500 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:36601) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0XsA-0005H4-Q6 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:23 -0500 Received: by mail-pf1-x432.google.com with SMTP id b3so6421282pft.3 for ; Fri, 15 Jan 2021 14:47:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0M+ib82Q9NUsY8Zir/mvOr8pifWIKMIlNlMsQviVw94=; b=bvYoZzrUkQF3jvfLh8Vq77cIFtMUsoVGfyRpQtnQ42H/oMcy7izIfTvfHYhUXnmbJ5 l/mUBjeAfRXpEmC/BZ14Xqk9FUfEGY/N1g7DqZfaQorz5EcGkUuhdmX1Dfw0H2HVfTo5 Cn66q2nzdpIWujmYUc8BaTW9sJip9HZt2juvh2K7K54OPpDJYBuozVX7opcd2Y8PDkRC YTfsklVWJimCl3oFPU0XpnI4M4r5uY1VXuU5Sp8FC4+3k/hr4ejxmpzdEebk3S0edNSH 6sN0zuxqjKs9AR+Q6UkmG3ZzD57qvopzs+arXjNCmkv7UueoG9BkchYeQJC2LvGWf4UB aCXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0M+ib82Q9NUsY8Zir/mvOr8pifWIKMIlNlMsQviVw94=; b=TLmscKKc4TInU3ARQk+wcffvR+kFmIhdmsPXj59Y+xvUgr6voR52DpRhFl57iZhMcF TMtjihGH4fbrB118yzdO5dy1w9Xd5JZxzTAX6HmLPwuferhjg6iRE3UcqXiTNSlEX7Pl dwXsuJH+mMRbOLYJb9n6r0JZyPNshdwu2/Zcg+DlIR7y0ETrxalz3lHzIx1QnynvMASH c+iatH1nafuotKay1nOMwPwiib9Dxf9CBDAnxsQ9qHHyLjWA70mHvm6ObK/RsSDnPgyL Qw/wnIe4a1I1vW460LvyDbU+Q6eHc0BQM95fehqz5SrlO8xoh+V6kfJ2hKYPH84KZL+n btyQ== X-Gm-Message-State: AOAM533Uyku/YP8DD3mEvaRlB4JSOpTMS8XTAIiCYJpHpbVdViHtO1m1 VZZd1GylcMiOTytxJlMldTPAerNs/a68tZoj X-Google-Smtp-Source: ABdhPJwvwxSmRRDNQZC74+OU5v9v/FpSewVFy9+aTH7hlGklYVpNXLikdI/1Kk7JKzZ0aq9uXqLsXA== X-Received: by 2002:a65:6116:: with SMTP id z22mr15091532pgu.264.1610750832944; Fri, 15 Jan 2021 14:47:12 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 15/21] target/arm: Split out syndrome.h from internals.h Date: Fri, 15 Jan 2021 12:46:39 -1000 Message-Id: <20210115224645.1196742-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move everything related to syndromes to a new file, which can be shared with linux-user. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/internals.h | 245 +----------------------------------- target/arm/syndrome.h | 273 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 274 insertions(+), 244 deletions(-) create mode 100644 target/arm/syndrome.h diff --git a/target/arm/internals.h b/target/arm/internals.h index 5460678756..1e60c0e0e8 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -26,6 +26,7 @@ #define TARGET_ARM_INTERNALS_H #include "hw/registerfields.h" +#include "syndrome.h" /* register banks for CPU modes */ #define BANK_USRSYS 0 @@ -256,250 +257,6 @@ static inline bool extended_addresses_enabled(CPUARMState *env) (arm_feature(env, ARM_FEATURE_LPAE) && (tcr->raw_tcr & TTBCR_EAE)); } -/* Valid Syndrome Register EC field values */ -enum arm_exception_class { - EC_UNCATEGORIZED = 0x00, - EC_WFX_TRAP = 0x01, - EC_CP15RTTRAP = 0x03, - EC_CP15RRTTRAP = 0x04, - EC_CP14RTTRAP = 0x05, - EC_CP14DTTRAP = 0x06, - EC_ADVSIMDFPACCESSTRAP = 0x07, - EC_FPIDTRAP = 0x08, - EC_PACTRAP = 0x09, - EC_CP14RRTTRAP = 0x0c, - EC_BTITRAP = 0x0d, - EC_ILLEGALSTATE = 0x0e, - EC_AA32_SVC = 0x11, - EC_AA32_HVC = 0x12, - EC_AA32_SMC = 0x13, - EC_AA64_SVC = 0x15, - EC_AA64_HVC = 0x16, - EC_AA64_SMC = 0x17, - EC_SYSTEMREGISTERTRAP = 0x18, - EC_SVEACCESSTRAP = 0x19, - EC_INSNABORT = 0x20, - EC_INSNABORT_SAME_EL = 0x21, - EC_PCALIGNMENT = 0x22, - EC_DATAABORT = 0x24, - EC_DATAABORT_SAME_EL = 0x25, - EC_SPALIGNMENT = 0x26, - EC_AA32_FPTRAP = 0x28, - EC_AA64_FPTRAP = 0x2c, - EC_SERROR = 0x2f, - EC_BREAKPOINT = 0x30, - EC_BREAKPOINT_SAME_EL = 0x31, - EC_SOFTWARESTEP = 0x32, - EC_SOFTWARESTEP_SAME_EL = 0x33, - EC_WATCHPOINT = 0x34, - EC_WATCHPOINT_SAME_EL = 0x35, - EC_AA32_BKPT = 0x38, - EC_VECTORCATCH = 0x3a, - EC_AA64_BKPT = 0x3c, -}; - -#define ARM_EL_EC_SHIFT 26 -#define ARM_EL_IL_SHIFT 25 -#define ARM_EL_ISV_SHIFT 24 -#define ARM_EL_IL (1 << ARM_EL_IL_SHIFT) -#define ARM_EL_ISV (1 << ARM_EL_ISV_SHIFT) - -static inline uint32_t syn_get_ec(uint32_t syn) -{ - return syn >> ARM_EL_EC_SHIFT; -} - -/* Utility functions for constructing various kinds of syndrome value. - * Note that in general we follow the AArch64 syndrome values; in a - * few cases the value in HSR for exceptions taken to AArch32 Hyp - * mode differs slightly, and we fix this up when populating HSR in - * arm_cpu_do_interrupt_aarch32_hyp(). - * The exception is FP/SIMD access traps -- these report extra information - * when taking an exception to AArch32. For those we include the extra coproc - * and TA fields, and mask them out when taking the exception to AArch64. - */ -static inline uint32_t syn_uncategorized(void) -{ - return (EC_UNCATEGORIZED << ARM_EL_EC_SHIFT) | ARM_EL_IL; -} - -static inline uint32_t syn_aa64_svc(uint32_t imm16) -{ - return (EC_AA64_SVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); -} - -static inline uint32_t syn_aa64_hvc(uint32_t imm16) -{ - return (EC_AA64_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); -} - -static inline uint32_t syn_aa64_smc(uint32_t imm16) -{ - return (EC_AA64_SMC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); -} - -static inline uint32_t syn_aa32_svc(uint32_t imm16, bool is_16bit) -{ - return (EC_AA32_SVC << ARM_EL_EC_SHIFT) | (imm16 & 0xffff) - | (is_16bit ? 0 : ARM_EL_IL); -} - -static inline uint32_t syn_aa32_hvc(uint32_t imm16) -{ - return (EC_AA32_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); -} - -static inline uint32_t syn_aa32_smc(void) -{ - return (EC_AA32_SMC << ARM_EL_EC_SHIFT) | ARM_EL_IL; -} - -static inline uint32_t syn_aa64_bkpt(uint32_t imm16) -{ - return (EC_AA64_BKPT << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); -} - -static inline uint32_t syn_aa32_bkpt(uint32_t imm16, bool is_16bit) -{ - return (EC_AA32_BKPT << ARM_EL_EC_SHIFT) | (imm16 & 0xffff) - | (is_16bit ? 0 : ARM_EL_IL); -} - -static inline uint32_t syn_aa64_sysregtrap(int op0, int op1, int op2, - int crn, int crm, int rt, - int isread) -{ - return (EC_SYSTEMREGISTERTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL - | (op0 << 20) | (op2 << 17) | (op1 << 14) | (crn << 10) | (rt << 5) - | (crm << 1) | isread; -} - -static inline uint32_t syn_cp14_rt_trap(int cv, int cond, int opc1, int opc2, - int crn, int crm, int rt, int isread, - bool is_16bit) -{ - return (EC_CP14RTTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14) - | (crn << 10) | (rt << 5) | (crm << 1) | isread; -} - -static inline uint32_t syn_cp15_rt_trap(int cv, int cond, int opc1, int opc2, - int crn, int crm, int rt, int isread, - bool is_16bit) -{ - return (EC_CP15RTTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14) - | (crn << 10) | (rt << 5) | (crm << 1) | isread; -} - -static inline uint32_t syn_cp14_rrt_trap(int cv, int cond, int opc1, int crm, - int rt, int rt2, int isread, - bool is_16bit) -{ - return (EC_CP14RRTTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | (opc1 << 16) - | (rt2 << 10) | (rt << 5) | (crm << 1) | isread; -} - -static inline uint32_t syn_cp15_rrt_trap(int cv, int cond, int opc1, int crm, - int rt, int rt2, int isread, - bool is_16bit) -{ - return (EC_CP15RRTTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | (opc1 << 16) - | (rt2 << 10) | (rt << 5) | (crm << 1) | isread; -} - -static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) -{ - /* AArch32 FP trap or any AArch64 FP/SIMD trap: TA == 0 coproc == 0xa */ - return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | 0xa; -} - -static inline uint32_t syn_simd_access_trap(int cv, int cond, bool is_16bit) -{ - /* AArch32 SIMD trap: TA == 1 coproc == 0 */ - return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | (cv << 24) | (cond << 20) | (1 << 5); -} - -static inline uint32_t syn_sve_access_trap(void) -{ - return EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT; -} - -static inline uint32_t syn_pactrap(void) -{ - return EC_PACTRAP << ARM_EL_EC_SHIFT; -} - -static inline uint32_t syn_btitrap(int btype) -{ - return (EC_BTITRAP << ARM_EL_EC_SHIFT) | btype; -} - -static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) -{ - return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; -} - -static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv, - int ea, int cm, int s1ptw, - int wnr, int fsc) -{ - return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | ARM_EL_IL - | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7) - | (wnr << 6) | fsc; -} - -static inline uint32_t syn_data_abort_with_iss(int same_el, - int sas, int sse, int srt, - int sf, int ar, - int ea, int cm, int s1ptw, - int wnr, int fsc, - bool is_16bit) -{ - return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | (is_16bit ? 0 : ARM_EL_IL) - | ARM_EL_ISV | (sas << 22) | (sse << 21) | (srt << 16) - | (sf << 15) | (ar << 14) - | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; -} - -static inline uint32_t syn_swstep(int same_el, int isv, int ex) -{ - return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22; -} - -static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr) -{ - return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22; -} - -static inline uint32_t syn_breakpoint(int same_el) -{ - return (EC_BREAKPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) - | ARM_EL_IL | 0x22; -} - -static inline uint32_t syn_wfx(int cv, int cond, int ti, bool is_16bit) -{ - return (EC_WFX_TRAP << ARM_EL_EC_SHIFT) | - (is_16bit ? 0 : (1 << ARM_EL_IL_SHIFT)) | - (cv << 24) | (cond << 20) | ti; -} - /* Update a QEMU watchpoint based on the information the guest has set in the * DBGWCR_EL1 and DBGWVR_EL1 registers. */ diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h new file mode 100644 index 0000000000..39a31260f2 --- /dev/null +++ b/target/arm/syndrome.h @@ -0,0 +1,273 @@ +/* + * QEMU ARM CPU -- syndrome functions and types + * + * Copyright (c) 2014 Linaro Ltd + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see + * + * + * This header defines functions, types, etc which need to be shared + * between different source files within target/arm/ but which are + * private to it and not required by the rest of QEMU. + */ + +#ifndef TARGET_ARM_SYNDROME_H +#define TARGET_ARM_SYNDROME_H + +/* Valid Syndrome Register EC field values */ +enum arm_exception_class { + EC_UNCATEGORIZED = 0x00, + EC_WFX_TRAP = 0x01, + EC_CP15RTTRAP = 0x03, + EC_CP15RRTTRAP = 0x04, + EC_CP14RTTRAP = 0x05, + EC_CP14DTTRAP = 0x06, + EC_ADVSIMDFPACCESSTRAP = 0x07, + EC_FPIDTRAP = 0x08, + EC_PACTRAP = 0x09, + EC_CP14RRTTRAP = 0x0c, + EC_BTITRAP = 0x0d, + EC_ILLEGALSTATE = 0x0e, + EC_AA32_SVC = 0x11, + EC_AA32_HVC = 0x12, + EC_AA32_SMC = 0x13, + EC_AA64_SVC = 0x15, + EC_AA64_HVC = 0x16, + EC_AA64_SMC = 0x17, + EC_SYSTEMREGISTERTRAP = 0x18, + EC_SVEACCESSTRAP = 0x19, + EC_INSNABORT = 0x20, + EC_INSNABORT_SAME_EL = 0x21, + EC_PCALIGNMENT = 0x22, + EC_DATAABORT = 0x24, + EC_DATAABORT_SAME_EL = 0x25, + EC_SPALIGNMENT = 0x26, + EC_AA32_FPTRAP = 0x28, + EC_AA64_FPTRAP = 0x2c, + EC_SERROR = 0x2f, + EC_BREAKPOINT = 0x30, + EC_BREAKPOINT_SAME_EL = 0x31, + EC_SOFTWARESTEP = 0x32, + EC_SOFTWARESTEP_SAME_EL = 0x33, + EC_WATCHPOINT = 0x34, + EC_WATCHPOINT_SAME_EL = 0x35, + EC_AA32_BKPT = 0x38, + EC_VECTORCATCH = 0x3a, + EC_AA64_BKPT = 0x3c, +}; + +#define ARM_EL_EC_SHIFT 26 +#define ARM_EL_IL_SHIFT 25 +#define ARM_EL_ISV_SHIFT 24 +#define ARM_EL_IL (1 << ARM_EL_IL_SHIFT) +#define ARM_EL_ISV (1 << ARM_EL_ISV_SHIFT) + +static inline uint32_t syn_get_ec(uint32_t syn) +{ + return syn >> ARM_EL_EC_SHIFT; +} + +/* + * Utility functions for constructing various kinds of syndrome value. + * Note that in general we follow the AArch64 syndrome values; in a + * few cases the value in HSR for exceptions taken to AArch32 Hyp + * mode differs slightly, and we fix this up when populating HSR in + * arm_cpu_do_interrupt_aarch32_hyp(). + * The exception is FP/SIMD access traps -- these report extra information + * when taking an exception to AArch32. For those we include the extra coproc + * and TA fields, and mask them out when taking the exception to AArch64. + */ +static inline uint32_t syn_uncategorized(void) +{ + return (EC_UNCATEGORIZED << ARM_EL_EC_SHIFT) | ARM_EL_IL; +} + +static inline uint32_t syn_aa64_svc(uint32_t imm16) +{ + return (EC_AA64_SVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); +} + +static inline uint32_t syn_aa64_hvc(uint32_t imm16) +{ + return (EC_AA64_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); +} + +static inline uint32_t syn_aa64_smc(uint32_t imm16) +{ + return (EC_AA64_SMC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); +} + +static inline uint32_t syn_aa32_svc(uint32_t imm16, bool is_16bit) +{ + return (EC_AA32_SVC << ARM_EL_EC_SHIFT) | (imm16 & 0xffff) + | (is_16bit ? 0 : ARM_EL_IL); +} + +static inline uint32_t syn_aa32_hvc(uint32_t imm16) +{ + return (EC_AA32_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); +} + +static inline uint32_t syn_aa32_smc(void) +{ + return (EC_AA32_SMC << ARM_EL_EC_SHIFT) | ARM_EL_IL; +} + +static inline uint32_t syn_aa64_bkpt(uint32_t imm16) +{ + return (EC_AA64_BKPT << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff); +} + +static inline uint32_t syn_aa32_bkpt(uint32_t imm16, bool is_16bit) +{ + return (EC_AA32_BKPT << ARM_EL_EC_SHIFT) | (imm16 & 0xffff) + | (is_16bit ? 0 : ARM_EL_IL); +} + +static inline uint32_t syn_aa64_sysregtrap(int op0, int op1, int op2, + int crn, int crm, int rt, + int isread) +{ + return (EC_SYSTEMREGISTERTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL + | (op0 << 20) | (op2 << 17) | (op1 << 14) | (crn << 10) | (rt << 5) + | (crm << 1) | isread; +} + +static inline uint32_t syn_cp14_rt_trap(int cv, int cond, int opc1, int opc2, + int crn, int crm, int rt, int isread, + bool is_16bit) +{ + return (EC_CP14RTTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14) + | (crn << 10) | (rt << 5) | (crm << 1) | isread; +} + +static inline uint32_t syn_cp15_rt_trap(int cv, int cond, int opc1, int opc2, + int crn, int crm, int rt, int isread, + bool is_16bit) +{ + return (EC_CP15RTTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | (opc2 << 17) | (opc1 << 14) + | (crn << 10) | (rt << 5) | (crm << 1) | isread; +} + +static inline uint32_t syn_cp14_rrt_trap(int cv, int cond, int opc1, int crm, + int rt, int rt2, int isread, + bool is_16bit) +{ + return (EC_CP14RRTTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | (opc1 << 16) + | (rt2 << 10) | (rt << 5) | (crm << 1) | isread; +} + +static inline uint32_t syn_cp15_rrt_trap(int cv, int cond, int opc1, int crm, + int rt, int rt2, int isread, + bool is_16bit) +{ + return (EC_CP15RRTTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | (opc1 << 16) + | (rt2 << 10) | (rt << 5) | (crm << 1) | isread; +} + +static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) +{ + /* AArch32 FP trap or any AArch64 FP/SIMD trap: TA == 0 coproc == 0xa */ + return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | 0xa; +} + +static inline uint32_t syn_simd_access_trap(int cv, int cond, bool is_16bit) +{ + /* AArch32 SIMD trap: TA == 1 coproc == 0 */ + return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | (cv << 24) | (cond << 20) | (1 << 5); +} + +static inline uint32_t syn_sve_access_trap(void) +{ + return EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT; +} + +static inline uint32_t syn_pactrap(void) +{ + return EC_PACTRAP << ARM_EL_EC_SHIFT; +} + +static inline uint32_t syn_btitrap(int btype) +{ + return (EC_BTITRAP << ARM_EL_EC_SHIFT) | btype; +} + +static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) +{ + return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; +} + +static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv, + int ea, int cm, int s1ptw, + int wnr, int fsc) +{ + return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | ARM_EL_IL + | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7) + | (wnr << 6) | fsc; +} + +static inline uint32_t syn_data_abort_with_iss(int same_el, + int sas, int sse, int srt, + int sf, int ar, + int ea, int cm, int s1ptw, + int wnr, int fsc, + bool is_16bit) +{ + return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | (is_16bit ? 0 : ARM_EL_IL) + | ARM_EL_ISV | (sas << 22) | (sse << 21) | (srt << 16) + | (sf << 15) | (ar << 14) + | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; +} + +static inline uint32_t syn_swstep(int same_el, int isv, int ex) +{ + return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22; +} + +static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr) +{ + return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22; +} + +static inline uint32_t syn_breakpoint(int same_el) +{ + return (EC_BREAKPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) + | ARM_EL_IL | 0x22; +} + +static inline uint32_t syn_wfx(int cv, int cond, int ti, bool is_16bit) +{ + return (EC_WFX_TRAP << ARM_EL_EC_SHIFT) | + (is_16bit ? 0 : (1 << ARM_EL_IL_SHIFT)) | + (cv << 24) | (cond << 20) | ti; +} + +#endif /* TARGET_ARM_SYNDROME_H */ From patchwork Fri Jan 15 22:46:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40A7AC433DB for ; Fri, 15 Jan 2021 23:02:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9FD7C23339 for ; Fri, 15 Jan 2021 23:02:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9FD7C23339 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:54014 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0Y6t-0000Gu-I9 for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:02:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsJ-0003nM-KF for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:23 -0500 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]:47068) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0XsC-0005HF-4N for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:23 -0500 Received: by mail-pf1-x42c.google.com with SMTP id w2so6387161pfc.13 for ; Fri, 15 Jan 2021 14:47:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ag2kKkF2C6qi/FIsLVctK/0CDxQoX8dZZ8rQ2H49Ggg=; b=RMZ8WirJTLlQAkxfN7eeHO/oagdgYHAAbW6NEu+iTKJ76HXJ89l0L+Oruiil3w0L6o 6uFT0xML2KItKLRleptMbWNVd2Q6fFlbPiiz7/bcTtV64YD2gQUqW26ucALoa37oAlAg CD2JAZxA3od2hCxjVkaWKEGt/Rb5JBXwbms6zfDMpNYNYPaJIF5MZkdGHDzWTDvfETpw 0MJ/FIm3AZdjjoZWHn3DlAgi89IEOSN/H3kdS925nP0HiDWcz5GI0BHKl+dc47cUhtA+ nzZ/+IlH81aF8aBoAOOksmo5k0lEyfVLhNPxU9BuwbVTpmidYWUEGv/zRnOumIW2tXX+ rojA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ag2kKkF2C6qi/FIsLVctK/0CDxQoX8dZZ8rQ2H49Ggg=; b=e4ePCjl/tdA9W7nUV5U5b8xeZA23z2qoKwAAZ1ct0K7qIfrJg7ltToNMkypdytufQL /+L3c61MjsOJL2D+LoLOCe9ijscvoAiqMkXNsF2AQmalj1WmQxMMofAQHz1SuZP6P9r7 bKHHdRkZ3PkomMFV6m7l3OCQHhUQ40aVvbAtL0SQuL1RHHFVIFQMyCg0A/aLc84QHwRa oUMOUoTicvrANK0NaoiA2uCUHSGSa2HydRoA6RNee6/OO7JMYpJxbtV+Efd2oNwwH0cq OkU+M+ZWRSFbTe8P+xZ0PNnNvtxm1LkdLKOmGfqwFw3BfPC2iW0E2IwhbOq7HekQ1vrV ljxg== X-Gm-Message-State: AOAM533rKb4fBZA2GIoubN+SUQzW1kCsPUjeaBVZW5NJ06teN8clEoyH ShGUQQoA2GKnGpxUenLcQFJqUViL8JpvAY/K X-Google-Smtp-Source: ABdhPJywB2cx8PPDH52lHqX7oPN8cbRCZQm2hK5rCFT5isUvNFb+bVbfShVughr0HhtEar2UuMNm7Q== X-Received: by 2002:a62:3386:0:b029:1ae:8580:99da with SMTP id z128-20020a6233860000b02901ae858099damr14821902pfz.61.1610750834718; Fri, 15 Jan 2021 14:47:14 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:14 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 16/21] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Date: Fri, 15 Jan 2021 12:46:40 -1000 Message-Id: <20210115224645.1196742-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" A proper syndrome is required to fill in the proper si_code. Use page_get_flags to determine permission vs translation for user-only. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- v3: Use syndrome.h, arm_deliver_fault. --- linux-user/aarch64/cpu_loop.c | 24 +++++++++++++++++++++--- target/arm/tlb_helper.c | 15 +++++++++------ 2 files changed, 30 insertions(+), 9 deletions(-) diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index bbe9fefca8..7811440c68 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -22,6 +22,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "qemu/guest-random.h" +#include "target/arm/syndrome.h" #define get_user_code_u32(x, gaddr, env) \ ({ abi_long __r = get_user_u32((x), (gaddr)); \ @@ -75,7 +76,7 @@ void cpu_loop(CPUARMState *env) { CPUState *cs = env_cpu(env); - int trapnr; + int trapnr, ec, fsc; abi_long ret; target_siginfo_t info; @@ -116,9 +117,26 @@ void cpu_loop(CPUARMState *env) case EXCP_DATA_ABORT: info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; info._sifields._sigfault._addr = env->exception.vaddress; + + /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */ + ec = syn_get_ec(env->exception.syndrome); + assert(ec == EC_DATAABORT || ec == EC_INSNABORT); + + /* Both EC have the same format for FSC, or close enough. */ + fsc = extract32(env->exception.syndrome, 0, 6); + switch (fsc) { + case 0x04 ... 0x07: /* Translation fault, level {0-3} */ + info.si_code = TARGET_SEGV_MAPERR; + break; + case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */ + case 0x0d ... 0x0f: /* Permission fault, level {1-3} */ + info.si_code = TARGET_SEGV_ACCERR; + break; + default: + g_assert_not_reached(); + } + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; case EXCP_DEBUG: diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index b35dc8a011..31015749fd 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -151,21 +151,24 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, bool probe, uintptr_t retaddr) { ARMCPU *cpu = ARM_CPU(cs); + ARMMMUFaultInfo fi = {}; #ifdef CONFIG_USER_ONLY - cpu->env.exception.vaddress = address; - if (access_type == MMU_INST_FETCH) { - cs->exception_index = EXCP_PREFETCH_ABORT; + int flags = page_get_flags(useronly_clean_ptr(address)); + if (flags & PAGE_VALID) { + fi.type = ARMFault_Permission; } else { - cs->exception_index = EXCP_DATA_ABORT; + fi.type = ARMFault_Translation; } - cpu_loop_exit_restore(cs, retaddr); + + /* now we have a real cpu fault */ + cpu_restore_state(cs, retaddr, true); + arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi); #else hwaddr phys_addr; target_ulong page_size; int prot, ret; MemTxAttrs attrs = {}; - ARMMMUFaultInfo fi = {}; ARMCacheAttrs cacheattrs = {}; /* From patchwork Fri Jan 15 22:46:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CE98C433E0 for ; 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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 17/21] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Date: Fri, 15 Jan 2021 12:46:41 -1000 Message-Id: <20210115224645.1196742-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/aarch64/target_signal.h | 2 ++ linux-user/aarch64/cpu_loop.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/linux-user/aarch64/target_signal.h b/linux-user/aarch64/target_signal.h index ddd73169f0..777fb667fe 100644 --- a/linux-user/aarch64/target_signal.h +++ b/linux-user/aarch64/target_signal.h @@ -21,5 +21,7 @@ typedef struct target_sigaltstack { #include "../generic/signal.h" +#define TARGET_SEGV_MTESERR 9 /* Synchronous ARM MTE exception */ + #define TARGET_ARCH_HAS_SETUP_FRAME #endif /* AARCH64_TARGET_SIGNAL_H */ diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 7811440c68..6867f0db2b 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -133,6 +133,9 @@ void cpu_loop(CPUARMState *env) case 0x0d ... 0x0f: /* Permission fault, level {1-3} */ info.si_code = TARGET_SEGV_ACCERR; break; + case 0x11: /* Synchronous Tag Check Fault */ + info.si_code = TARGET_SEGV_MTESERR; + break; default: g_assert_not_reached(); } From patchwork Fri Jan 15 22:46:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 607BAC433E0 for ; Fri, 15 Jan 2021 23:12:04 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CE17B23382 for ; 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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 18/21] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Date: Fri, 15 Jan 2021 12:46:42 -1000 Message-Id: <20210115224645.1196742-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- linux-user/aarch64/target_signal.h | 1 + linux-user/aarch64/cpu_loop.c | 34 +++++++++++++++++++++--------- target/arm/mte_helper.c | 10 +++++++++ 3 files changed, 35 insertions(+), 10 deletions(-) diff --git a/linux-user/aarch64/target_signal.h b/linux-user/aarch64/target_signal.h index 777fb667fe..18013e1b23 100644 --- a/linux-user/aarch64/target_signal.h +++ b/linux-user/aarch64/target_signal.h @@ -21,6 +21,7 @@ typedef struct target_sigaltstack { #include "../generic/signal.h" +#define TARGET_SEGV_MTEAERR 8 /* Asynchronous ARM MTE error */ #define TARGET_SEGV_MTESERR 9 /* Synchronous ARM MTE exception */ #define TARGET_ARCH_HAS_SETUP_FRAME diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 6867f0db2b..6160a401bd 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -72,6 +72,21 @@ put_user_u16(__x, (gaddr)); \ }) +static bool check_mte_async_fault(CPUARMState *env, target_siginfo_t *info) +{ + if (likely(env->cp15.tfsr_el[0] == 0)) { + return false; + } + + env->cp15.tfsr_el[0] = 0; + info->si_signo = TARGET_SIGSEGV; + info->si_errno = 0; + info->_sifields._sigfault._addr = 0; + info->si_code = TARGET_SEGV_MTEAERR; + queue_signal(env, info->si_signo, QEMU_SI_FAULT, info); + return true; +} + /* AArch64 main loop */ void cpu_loop(CPUARMState *env) { @@ -88,15 +103,13 @@ void cpu_loop(CPUARMState *env) switch (trapnr) { case EXCP_SWI: - ret = do_syscall(env, - env->xregs[8], - env->xregs[0], - env->xregs[1], - env->xregs[2], - env->xregs[3], - env->xregs[4], - env->xregs[5], - 0, 0); + if (check_mte_async_fault(env, &info)) { + ret = -TARGET_ERESTARTSYS; + } else { + ret = do_syscall(env, env->xregs[8], env->xregs[0], + env->xregs[1], env->xregs[2], env->xregs[3], + env->xregs[4], env->xregs[5], 0, 0); + } if (ret == -TARGET_ERESTARTSYS) { env->pc -= 4; } else if (ret != -TARGET_QEMU_ESIGRETURN) { @@ -104,7 +117,8 @@ void cpu_loop(CPUARMState *env) } break; case EXCP_INTERRUPT: - /* just indicate that signals should be handled asap */ + /* Just indicate that signals should be handled asap. */ + check_mte_async_fault(env, &info); break; case EXCP_UDEF: info.si_signo = TARGET_SIGILL; diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index 153bd1e9df..d55f8d1e1e 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -565,6 +565,16 @@ static void mte_check_fail(CPUARMState *env, uint32_t desc, select = 0; } env->cp15.tfsr_el[el] |= 1 << select; +#ifdef CONFIG_USER_ONLY + /* + * Stand in for a timer irq, setting _TIF_MTE_ASYNC_FAULT, + * which then sends a SIGSEGV when the thread is next scheduled. + * This cpu will return to the main loop at the end of the TB, + * which is rather sooner than "normal". But the alternative + * is waiting until the next syscall. + */ + qemu_cpu_kick(env_cpu(env)); +#endif break; default: From patchwork Fri Jan 15 22:46:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7066C433E0 for ; Fri, 15 Jan 2021 23:07:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 90F92239E5 for ; Fri, 15 Jan 2021 23:07:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 90F92239E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:34832 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0YBR-0004K8-NW for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:07:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54094) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsN-0003vm-4l for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:27 -0500 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:53100) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0XsH-0005Kc-32 for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:26 -0500 Received: by mail-pj1-x102e.google.com with SMTP id v1so5895757pjr.2 for ; Fri, 15 Jan 2021 14:47:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e1dRDYwqVg1e/BMj2WtrxEnKh4CuzKOtBUsWpusVo1U=; b=rIS9TFyK5NpMdRM+0ahyHi12GiHnDA7/L7VG4hDa8+RhC+6W/mOZ3zcgdrGjszWdXh h9j0UQn7wvuIl18f4TSY6gAfYxDwGftlZD1nluTKZMWOW7zJ5KfyZvNUMOPZhWV7Jsee g2XqRUaV9x/Ef/C9Nv+NqzpRF+F6Xn7mMQ4tDNCf1YDV3i9gD14/wFV4K7jSrFQgj8cw s790MCDblWSLhTXn1R82YFi9FsCF3rqvNv4F/blJcaYl8MBhPn9PDXewmxWS+2M6ybIq PkmUL0eThI3ZlUjZY8XBFJNpzwkxU4lhoRPd5J0ZPlRH8C/JgtuLX54tY9XVkOoznRrD IEyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e1dRDYwqVg1e/BMj2WtrxEnKh4CuzKOtBUsWpusVo1U=; b=ZMGKiGNkL6IUdQGcMjxraorCBMelJawVd63+Z0z+CrgykDryLmgsCNWc/4+TalSZPg HDH51j4nKEN2DlmPwcF6MIXMd92qjGPrMfMdvFzxsU96bIZQiRB+Xjr/8moSdR67K88P aXl54Dc4ghGKgOFv3a4lKC70pxWvZEPF0St239vW7vCx9OIR2Kg4PMwWIoLoFM6USjRi q/G25Mo0WA4MN0kdsc/hgbVZJ29md1Oupwm+6ERBrdxWfMzIFH7QXQD21eHJLF/a9kht VNy5aM0q2LdsJ/bUxffYArxLSo+iFY+Sjw2U63E6nu+ZKSGuF5vqQjKrWA9R1HPBm3fE kFFQ== X-Gm-Message-State: AOAM530ap9T+yv1LJNQULlOqf14X4yIgsUicAW4T/yadHQZ2GaGyXflg KNJWaQfgFCJdSAp94Djuv4vFhoBa84ghC+xF X-Google-Smtp-Source: ABdhPJwuj7hIwSs9bgKHluMX/wctZ0NkzG3nqZ7sKkhaDIdqqjsdVoHLqzZK97zkOh2NqRLmpWL5HA== X-Received: by 2002:a17:90a:5b18:: with SMTP id o24mr13093339pji.120.1610750839784; Fri, 15 Jan 2021 14:47:19 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:19 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 19/21] target/arm: Add allocation tag storage for user mode Date: Fri, 15 Jan 2021 12:46:43 -1000 Message-Id: <20210115224645.1196742-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the now-saved PAGE_ANON and PAGE_MTE bits, and the per-page saved data. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/mte_helper.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index d55f8d1e1e..1c569336ea 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -78,8 +78,33 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, int ptr_mmu_idx, int tag_size, uintptr_t ra) { #ifdef CONFIG_USER_ONLY - /* Tag storage not implemented. */ - return NULL; + uint64_t clean_ptr = useronly_clean_ptr(ptr); + int flags = page_get_flags(clean_ptr); + uint8_t *tags; + uintptr_t index; + + if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE : PAGE_READ))) { + /* SIGSEGV */ + arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access, + ptr_mmu_idx, false, ra); + g_assert_not_reached(); + } + + /* Require both MAP_ANON and PROT_MTE for the page. */ + if (!(flags & PAGE_ANON) || !(flags & PAGE_MTE)) { + return NULL; + } + + tags = page_get_target_data(clean_ptr); + if (tags == NULL) { + size_t alloc_size = TARGET_PAGE_SIZE >> (LOG2_TAG_GRANULE + 1); + tags = page_alloc_target_data(clean_ptr, alloc_size); + assert(tags != NULL); + } + + index = extract32(ptr, LOG2_TAG_GRANULE + 1, + TARGET_PAGE_BITS - LOG2_TAG_GRANULE - 1); + return tags + index; #else uintptr_t index; CPUIOTLBEntry *iotlbentry; From patchwork Fri Jan 15 22:46:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 411AEC433DB for ; Fri, 15 Jan 2021 23:10:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D76FB23382 for ; Fri, 15 Jan 2021 23:10:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D76FB23382 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:43650 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l0YEu-0007wu-RU for qemu-devel@archiver.kernel.org; Fri, 15 Jan 2021 18:10:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l0XsO-0003wA-2K for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:28 -0500 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]:40210) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l0XsI-0005L8-Fu for qemu-devel@nongnu.org; Fri, 15 Jan 2021 17:47:27 -0500 Received: by mail-pl1-x62d.google.com with SMTP id q4so5444842plr.7 for ; Fri, 15 Jan 2021 14:47:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NVTYVf4zlgciMSRy3E1kBUuwxIM3r8rkk5rLkXytMCY=; b=OLeFUxgqe2FDpmYwh92ezhGorgX6wh3bNBwRjXWeEmTrHXU0zjxMmP+wYf3OHzu/Rl AAwAJ7LksE7lsf/cOKZWZx3O8rNO9n8gWsFiFx0Y7A/tsh7JBH1i0UlaFInjQTaXQakV L2EB7jpeyrs41u1J0t8ft+IutoXl3q0so9VzpKXrFiARRhCdsny4rDLCiBLrOFFaclN1 VDWAVRvop6xxFXHDgJFIdK4OSAHwY23DEkliXTI54cEpGNAaQAxg0ECQzbvkkG28jqvo WH0ZDzWLzxfqv7kX8hTeohF7V9XmZQ/xLUUKo+c99exdddajS4FNUaK2wu5FTaDLlCHr N9IA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NVTYVf4zlgciMSRy3E1kBUuwxIM3r8rkk5rLkXytMCY=; b=j/Vk1+tgInVFqRseXRQ+fdRz36wrv+C5jpF+USlX2fBT3kF38uYan5fJ+nwYqrrp8w ZElmrvvZhvrwgkuEE4D7RAvBvBUKNVgtaE7crkLLpuZ0XzOm7hJZlvyb5GbeL7ncxmcR e1x+t/67iOYECLicBN3WSTuQR/kXjd6N3Qv7ushDyO5c/WtOjYr7QPMtaaqWJ3ajp8KH sMZp32jNkMvgvJNQfBxsEw2oXPtcw73EPvFhaD7hNIlr3qnloIJzfKUVbp1/WHZbWr3U YlqyY6zKu+/i6YJBbHyEJ7HuCBM0hZwadTdy96+CmgsnNKOGHbdUqgm5KgSf4OS6BpbS GCEw== X-Gm-Message-State: AOAM530ucMmpLvOwJuD6oSznenNXGcs8SrdakvEZdGbZnQqPHFxl0bYN FdM+aUph86dzGSA9NTjyySLyXKY3nUgBOcrQ X-Google-Smtp-Source: ABdhPJwbkoKSF44+p4nnsIgjWU4uiwueypBZfIyF3VKb7UaQhH6DD8fjmaSF6GP1TOWPLYY74dRBBg== X-Received: by 2002:a17:90b:8d7:: with SMTP id ds23mr5581444pjb.116.1610750841311; Fri, 15 Jan 2021 14:47:21 -0800 (PST) Received: from localhost.localdomain (rrcs-173-197-107-21.west.biz.rr.com. [173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:20 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 20/21] target/arm: Enable MTE for user-only Date: Fri, 15 Jan 2021 12:46:44 -1000 Message-Id: <20210115224645.1196742-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/cpu.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index abc0affd00..5e613a747a 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -208,6 +208,22 @@ static void arm_cpu_reset(DeviceState *dev) * Do not modify this without other changes. */ env->cp15.tcr_el[1].raw_tcr = (3ULL << 37); + + /* Enable MTE */ + if (cpu_isar_feature(aa64_mte, cpu)) { + /* Enable tag access, but leave TCF0 as No Effect (0). */ + env->cp15.sctlr_el[1] |= SCTLR_ATA0; + /* + * Exclude all tags, so that tag 0 is always used. + * This corresponds to Linux current->thread.gcr_incl = 0. + * + * Set RRND, so that helper_irg() will generate a seed later. + * Here in cpu_reset(), the crypto subsystem has not yet been + * initialized. + */ + env->cp15.gcr_el1 = 0x1ffff; + } + # ifdef TARGET_TAGGED_ADDRESSES env->untagged_addr_mask = -1; # endif From patchwork Fri Jan 15 22:46:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12024363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84447C433DB for ; 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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id s13sm9521700pfd.99.2021.01.15.14.47.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jan 2021 14:47:22 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 21/21] tests/tcg/aarch64: Add mte smoke tests Date: Fri, 15 Jan 2021 12:46:45 -1000 Message-Id: <20210115224645.1196742-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org> References: <20210115224645.1196742-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- tests/tcg/aarch64/mte.h | 53 +++++++++++++++++++++++++++++++ tests/tcg/aarch64/mte-1.c | 25 +++++++++++++++ tests/tcg/aarch64/mte-2.c | 42 ++++++++++++++++++++++++ tests/tcg/aarch64/mte-3.c | 47 +++++++++++++++++++++++++++ tests/tcg/aarch64/mte-4.c | 42 ++++++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 6 ++++ tests/tcg/configure.sh | 4 +++ 7 files changed, 219 insertions(+) create mode 100644 tests/tcg/aarch64/mte.h create mode 100644 tests/tcg/aarch64/mte-1.c create mode 100644 tests/tcg/aarch64/mte-2.c create mode 100644 tests/tcg/aarch64/mte-3.c create mode 100644 tests/tcg/aarch64/mte-4.c diff --git a/tests/tcg/aarch64/mte.h b/tests/tcg/aarch64/mte.h new file mode 100644 index 0000000000..038d33ab6c --- /dev/null +++ b/tests/tcg/aarch64/mte.h @@ -0,0 +1,53 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef PR_SET_TAGGED_ADDR_CTRL +# define PR_SET_TAGGED_ADDR_CTRL 55 +#endif +#ifndef PR_TAGGED_ADDR_ENABLE +# define PR_TAGGED_ADDR_ENABLE (1UL << 0) +#endif +#ifndef PR_MTE_TCF_SHIFT +# define PR_MTE_TCF_SHIFT 1 +# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) +# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT) +# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT) +# define PR_MTE_TAG_SHIFT 3 +#endif + +#ifndef PROT_MTE +# define PROT_MTE 0x20 +#endif + +#ifndef SEGV_MTEAERR +# define SEGV_MTEAERR 8 +# define SEGV_MTESERR 9 +#endif + +static void enable_mte(int tcf) +{ + int r = prctl(PR_SET_TAGGED_ADDR_CTRL, + PR_TAGGED_ADDR_ENABLE | tcf | (0xfffe << PR_MTE_TAG_SHIFT), + 0, 0, 0); + if (r < 0) { + perror("PR_SET_TAGGED_ADDR_CTRL"); + exit(2); + } +} + +static void *alloc_mte_mem(size_t size) +{ + void *p = mmap(NULL, size, PROT_READ | PROT_WRITE | PROT_MTE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (p == MAP_FAILED) { + perror("mmap PROT_MTE"); + exit(2); + } + return p; +} diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c new file mode 100644 index 0000000000..02bc978482 --- /dev/null +++ b/tests/tcg/aarch64/mte-1.c @@ -0,0 +1,25 @@ +/* + * Memory tagging, basic pass cases. + */ + +#include "mte.h" + +int main(int ac, char **av) +{ + int *p0, *p1, *p2; + long c; + + enable_mte(PR_MTE_TCF_NONE); + p0 = alloc_mte_mem(sizeof(*p0)); + + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1)); + assert(p1 != p0); + asm("subp %0,%1,%2" : "=r"(c) : "r"(p0), "r"(p1)); + assert(c == 0); + + asm("stg %0, [%0]" : : "r"(p1)); + asm("ldg %0, [%1]" : "=r"(p2) : "r"(p0), "0"(p0)); + assert(p1 == p2); + + return 0; +} diff --git a/tests/tcg/aarch64/mte-2.c b/tests/tcg/aarch64/mte-2.c new file mode 100644 index 0000000000..a05f5183cb --- /dev/null +++ b/tests/tcg/aarch64/mte-2.c @@ -0,0 +1,42 @@ +/* + * Memory tagging, basic fail cases. + */ + +#include "mte.h" + +void pass(int sig, siginfo_t *info, void *uc) +{ + assert(info->si_code == SEGV_MTESERR); + exit(0); +} + +int main(int ac, char **av) +{ + struct sigaction sa; + int *p0, *p1, *p2; + long excl = 1; + + enable_mte(PR_MTE_TCF_SYNC); + p0 = alloc_mte_mem(sizeof(*p0)); + + /* Create two differently tagged pointers. */ + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl)); + asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1)); + assert(excl != 1); + asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl)); + assert(p1 != p2); + + /* Store the tag from the first pointer. */ + asm("stg %0, [%0]" : : "r"(p1)); + + *p1 = 0; + + memset(&sa, 0, sizeof(sa)); + sa.sa_sigaction = pass; + sa.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &sa, NULL); + + *p2 = 0; + + abort(); +} diff --git a/tests/tcg/aarch64/mte-3.c b/tests/tcg/aarch64/mte-3.c new file mode 100644 index 0000000000..0d08b477cc --- /dev/null +++ b/tests/tcg/aarch64/mte-3.c @@ -0,0 +1,47 @@ +/* + * Memory tagging, basic fail cases. + */ + +#include "mte.h" + +void pass(int sig, siginfo_t *info, void *uc) +{ + assert(info->si_code == SEGV_MTEAERR); + exit(0); +} + +int main(int ac, char **av) +{ + struct sigaction sa; + int *p0, *p1, *p2; + long excl = 1; + + enable_mte(PR_MTE_TCF_ASYNC); + p0 = alloc_mte_mem(sizeof(*p0)); + + /* Create two differently tagged pointers. */ + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl)); + asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1)); + assert(excl != 1); + asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl)); + assert(p1 != p2); + + /* Store the tag from the first pointer. */ + asm("stg %0, [%0]" : : "r"(p1)); + + *p1 = 0; + + memset(&sa, 0, sizeof(sa)); + sa.sa_sigaction = pass; + sa.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &sa, NULL); + + /* + * Signal for async error will happen eventually. + * For a real kernel this should be after the next IRQ (e.g. timer). + * For qemu linux-user, we kick the cpu and exit at the next TB. + * In either case, loop until this happens (or killed by timeout). + */ + *p2 = 0; + while (1); +} diff --git a/tests/tcg/aarch64/mte-4.c b/tests/tcg/aarch64/mte-4.c new file mode 100644 index 0000000000..52aa6fae65 --- /dev/null +++ b/tests/tcg/aarch64/mte-4.c @@ -0,0 +1,42 @@ +/* + * Memory tagging, basic fail cases. + */ + +#include "mte.h" + +void __attribute__((noinline)) tagset(void *p, size_t size) +{ + size_t i; + for (i = 0; i < size; i += 16) { + asm("stg %0, [%0]" : : "r"(p + i)); + } +} + +void __attribute__((noinline)) tagcheck(void *p, size_t size) +{ + size_t i; + void *c; + + for (i = 0; i < size; i += 16) { + asm("ldg %0, [%1]" : "=r"(c) : "r"(p + i), "0"(p)); + assert(c == p); + } +} + +int main(int ac, char **av) +{ + size_t size = getpagesize() * 4; + long excl = 1; + int *p0, *p1; + + enable_mte(PR_MTE_TCF_ASYNC); + p0 = alloc_mte_mem(size); + + /* Tag the pointer. */ + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl)); + + tagset(p1, size); + tagcheck(p1, size); + + return 0; +} diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index d7d33e293c..bf53ad0087 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -35,6 +35,12 @@ endif # bti-2 tests PROT_BTI, so no special compiler support required. AARCH64_TESTS += bti-2 +# MTE Tests +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_ARMV8_MTE),) +AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 +mte-%: CFLAGS += -march=armv8.5-a+memtag +endif + # Semihosting smoke test for linux-user AARCH64_TESTS += semihosting run-semihosting: semihosting diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh index e1b70e25f2..ba8ac9a93e 100755 --- a/tests/tcg/configure.sh +++ b/tests/tcg/configure.sh @@ -244,6 +244,10 @@ for target in $target_list; do -mbranch-protection=standard -o $TMPE $TMPC; then echo "CROSS_CC_HAS_ARMV8_BTI=y" >> $config_target_mak fi + if do_compiler "$target_compiler" $target_compiler_cflags \ + -march=armv8.5-a+memtag -o $TMPE $TMPC; then + echo "CROSS_CC_HAS_ARMV8_MTE=y" >> $config_target_mak + fi ;; esac