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Sun, 17 Jan 2021 18:56:57 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, mdf@kernel.org, trix@redhat.com, robh+dt@kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, chinnikishore369@gmail.com Received: from [10.140.6.60] (port=41770 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l1Kit-0004GM-Q6; Sun, 17 Jan 2021 18:56:56 -0800 From: Nava kishore Manne To: , , , , , , , CC: , , Nava kishore Manne Subject: [PATCH 1/2] fpga: mgr: Adds secure BitStream loading support Date: Mon, 18 Jan 2021 08:20:57 +0530 Message-ID: <20210118025058.10051-1-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 00ccb55c-0fb1-4cb5-25a9-08d8bb5cb8dd X-MS-TrafficTypeDiagnostic: SA2PR02MB7660: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:169; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2021 02:56:58.5172 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00ccb55c-0fb1-4cb5-25a9-08d8bb5cb8dd X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT020.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR02MB7660 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org This commit adds secure flags to the framework to support secure BitStream Loading. Signed-off-by: Nava kishore Manne --- drivers/fpga/of-fpga-region.c | 10 ++++++++++ include/linux/fpga/fpga-mgr.h | 12 ++++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c index e405309baadc..3a5eb4808888 100644 --- a/drivers/fpga/of-fpga-region.c +++ b/drivers/fpga/of-fpga-region.c @@ -228,6 +228,16 @@ static struct fpga_image_info *of_fpga_region_parse_ov( if (of_property_read_bool(overlay, "encrypted-fpga-config")) info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM; + if (of_property_read_bool(overlay, "userkey-encrypted-fpga-config")) + info->flags |= FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM; + + if (of_property_read_bool(overlay, "ddrmem-authenticated-fpga-config")) + info->flags |= FPGA_MGR_DDR_MEM_AUTH_BITSTREAM; + + if (of_property_read_bool(overlay, + "securemem-authenticated-fpga-config")) + info->flags |= FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM; + if (!of_property_read_string(overlay, "firmware-name", &firmware_name)) { info->firmware_name = devm_kstrdup(dev, firmware_name, diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 2bc3030a69e5..2f7455a60666 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,12 +67,24 @@ enum fpga_mgr_states { * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed + * + * %FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM: indicates bitstream is encrypted with + * user key + * + * %FPGA_MGR_DDR_MEM_AUTH_BITSTREAM: do bitstream authentication using DDR + * memory if supported + * + * %FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM: do bitstream authentication using secure + * memory if supported */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) +#define FPGA_MGR_USERKEY_ENCRYPTED_BITSTREAM BIT(5) +#define FPGA_MGR_DDR_MEM_AUTH_BITSTREAM BIT(6) +#define FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM BIT(7) /** * struct fpga_image_info - information specific to a FPGA image From patchwork Mon Jan 18 02:50:58 2021 Content-Type: text/plain; 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Sun, 17 Jan 2021 18:57:00 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, mdf@kernel.org, trix@redhat.com, robh+dt@kernel.org, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, chinnikishore369@gmail.com Received: from [10.140.6.60] (port=41770 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l1Kix-0004GM-Dh; Sun, 17 Jan 2021 18:56:59 -0800 From: Nava kishore Manne To: , , , , , , , CC: , , Nava kishore Manne Subject: [PATCH 2/2] fpga: zynqmp: Adds secure BitStream loading support for Xilinx Date: Mon, 18 Jan 2021 08:20:58 +0530 Message-ID: <20210118025058.10051-2-nava.manne@xilinx.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210118025058.10051-1-nava.manne@xilinx.com> References: <20210118025058.10051-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a7824eb2-e925-478b-5d11-08d8bb5cc134 X-MS-TrafficTypeDiagnostic: SJ0PR02MB7440: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:89; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2021 02:57:12.5105 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a7824eb2-e925-478b-5d11-08d8bb5cc134 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT017.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR02MB7440 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org This commit adds secure BitStream Loading support for the Xilinx ZynqMp chip. Signed-off-by: Nava kishore Manne --- drivers/fpga/zynqmp-fpga.c | 8 ++++++++ include/linux/firmware/xlnx-zynqmp.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c index 125743c9797f..0ce34553944b 100644 --- a/drivers/fpga/zynqmp-fpga.c +++ b/drivers/fpga/zynqmp-fpga.c @@ -56,6 +56,14 @@ static int zynqmp_fpga_ops_write(struct fpga_manager *mgr, wmb(); /* ensure all writes are done before initiate FW call */ + if (priv->flags & FPGA_MGR_ENCRYPTED_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY; + + if (priv->flags & FPGA_MGR_DDR_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR; + else if (priv->flags & FPGA_MGR_SECURE_MEM_AUTH_BITSTREAM) + eemi_flags |= XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM; + if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 87114ee645b1..8a4038bf85e2 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -62,6 +62,9 @@ */ #define XILINX_ZYNQMP_PM_FPGA_FULL 0x0U #define XILINX_ZYNQMP_PM_FPGA_PARTIAL BIT(0) +#define XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_DDR BIT(1) +#define XILINX_ZYNQMP_PM_FPGA_AUTHENTICATION_OCM BIT(2) +#define XILINX_ZYNQMP_PM_FPGA_ENCRYPTION_DEVKEY BIT(4) enum pm_api_id { PM_GET_API_VERSION = 1,