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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id u17sm16189542wmj.35.2021.01.23.18.53.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Jan 2021 18:53:08 -0800 (PST) From: Leif Lindholm To: qemu-arm@nongnu.org Subject: [RFC PATCH 1/4] hw/intc: don't bail out gicv3 model init for revision 4 Date: Sun, 24 Jan 2021 02:53:03 +0000 Message-Id: <20210124025306.3949-2-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com> References: <20210124025306.3949-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=leif@nuviainc.com; helo=mail-wm1-x331.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Shashi Mallela , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" As a first step towards GICv4 compatibility, add support for gic revision 4 to GICv3 driver (i.e. don't bail out if revision 4 is encountered). Signed-off-by: Leif Lindholm --- hw/intc/arm_gicv3_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 58ef65f589..7365d24873 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -315,7 +315,7 @@ static void arm_gicv3_common_realize(DeviceState *dev, Error **errp) * conditions. However, in future it could be used, for example, if we * implement GICv4. */ - if (s->revision != 3) { + if (s->revision != 3 && s->revision != 4) { error_setg(errp, "unsupported GIC revision %d", s->revision); return; } From patchwork Sun Jan 24 02:53:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leif Lindholm X-Patchwork-Id: 12042013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 892EAC433E0 for ; Sun, 24 Jan 2021 02:57:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 345CD229CA for ; Sun, 24 Jan 2021 02:57:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 345CD229CA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=nuviainc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53976 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l3VbB-0003rn-A3 for qemu-devel@archiver.kernel.org; Sat, 23 Jan 2021 21:57:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55202) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l3VWc-0006jT-7X for qemu-devel@nongnu.org; Sat, 23 Jan 2021 21:53:14 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:35755) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l3VWZ-00039Y-90 for qemu-devel@nongnu.org; Sat, 23 Jan 2021 21:53:13 -0500 Received: by mail-wr1-x430.google.com with SMTP id l12so8834635wry.2 for ; Sat, 23 Jan 2021 18:53:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vCib2bK8ZRs2GnL3ZDKcV/vqIXCDzjV3kKl0ikqzRig=; b=LLMgbORQec2Dr4WSi01vJWcBOvpgSpJQ2j3cj/NkQnSiXBP9kzw6HoB+MtzPw6zqVO gvftycDy3K+tD1XWM8vIR0Q/3NiggDJOnzpk1LOW8n6SlI8sDuqS/9kheDr335tPxOki BoCFY12rRUPOP9Jer+05qAkJpEWYxD0pj/trXJYNfTpuNygLws1vP65r7emrWeANfio4 TqU4lwf3NgjjuULU6miWOBI3GgzJ/aJXL4Zr/QmT7NNzTKxGnVn54I6NN26jwd5QSBdW 6WFDUc8UBk2cW89q7B6jAx7e/X+Qj8hNDbwJssNXVB5z8IkAbnGj+cJhItpLCXr1DeZd kV7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vCib2bK8ZRs2GnL3ZDKcV/vqIXCDzjV3kKl0ikqzRig=; b=S7AiAA+KVculMg+6ChsI+xhh91uZ2G/hgLH0Rt16IXiSMzsQMh6MslTxRR8+4JOlOH HfaAsLdurp/Q0ZNeMaxmCkNu7yK/DwrL02xVEjHGa5ptgbca+dFD92xYrezLo4w5bVNe VnTyzSCHavlvja2OnYu3k7eahtTDR5Tyok2CXPW2bUzv8eVsFflwtjlm2PfYYh5pnXdd 6+jAT6CgbRHmh8npzdFAGrD2ICNOj1dZKVRCi1QyLleDL5ZBMFq1rGvDJn5OZ9dwsU42 ASXfvYPAPwDRhrukH/xkw2hRrW6ecY+ImL06mg8LsAo/K3K0zBrny02yzbRyMjMsV6xT UsPQ== X-Gm-Message-State: AOAM530AwxhiQfiFTe2Ywmfg0pIKIRCcGMgsqLL09v0cxj2n6K9k1HWg fIuOxK/V7Bbne4Xu3b1C/yhxgA== X-Google-Smtp-Source: ABdhPJyNzHATEC8dTuxFUFwDmfDzPV0676+iaT56j2ywiTDUteFdiwPgkdyO690XmVXalsZNHW+2bg== X-Received: by 2002:a5d:6588:: with SMTP id q8mr1091823wru.294.1611456790038; Sat, 23 Jan 2021 18:53:10 -0800 (PST) Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id u17sm16189542wmj.35.2021.01.23.18.53.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Jan 2021 18:53:09 -0800 (PST) From: Leif Lindholm To: qemu-arm@nongnu.org Subject: [RFC PATCH 2/4] hw/intc: add helper function to determine gicv3 redistributor size Date: Sun, 24 Jan 2021 02:53:04 +0000 Message-Id: <20210124025306.3949-3-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com> References: <20210124025306.3949-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=leif@nuviainc.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Shashi Mallela , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" GICv3 sets aside 128K for each redistributor block, whereas GICv4 sets aside 256K. To enable use of the gicv3 model for gicv4, abstract this away as the helper function gicv3_redist_size() and replace the current hardcoded locations with calls to this function. Signed-off-by: Leif Lindholm Reviewed-by: Peter Maydell --- hw/intc/arm_gicv3_common.c | 2 +- hw/intc/arm_gicv3_redist.c | 13 +++++++++---- include/hw/intc/arm_gicv3_common.h | 3 +++ 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 7365d24873..a8510b39a1 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -299,7 +299,7 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, memory_region_init_io(&s->iomem_redist[i], OBJECT(s), ops ? &ops[1] : NULL, s, name, - s->redist_region_count[i] * GICV3_REDIST_SIZE); + s->redist_region_count[i] * gicv3_redist_size(s)); sysbus_init_mmio(sbd, &s->iomem_redist[i]); g_free(name); } diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 8645220d61..544f4d82ff 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -14,6 +14,11 @@ #include "trace.h" #include "gicv3_internal.h" +int gicv3_redist_size(GICv3State *s) +{ + return (s->revision == 3 ? GICV3_REDIST_SIZE : GICV4_REDIST_SIZE); +} + static uint32_t mask_group(GICv3CPUState *cs, MemTxAttrs attrs) { /* Return a 32-bit mask which should be applied for this set of 32 @@ -429,8 +434,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data, * want to allow splitting of redistributor pages into several * blocks so we can support more CPUs. */ - cpuidx = offset / 0x20000; - offset %= 0x20000; + cpuidx = offset / gicv3_redist_size(s); + offset %= gicv3_redist_size(s); assert(cpuidx < s->num_cpu); cs = &s->cpu[cpuidx]; @@ -486,8 +491,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data, * want to allow splitting of redistributor pages into several * blocks so we can support more CPUs. */ - cpuidx = offset / 0x20000; - offset %= 0x20000; + cpuidx = offset / gicv3_redist_size(s); + offset %= gicv3_redist_size(s); assert(cpuidx < s->num_cpu); cs = &s->cpu[cpuidx]; diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 91491a2f66..ab88d14867 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -37,6 +37,7 @@ #define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL) #define GICV3_REDIST_SIZE 0x20000 +#define GICV4_REDIST_SIZE (GICV3_REDIST_SIZE + 0x20000) /* Number of SGI target-list bits */ #define GICV3_TARGETLIST_BITS 16 @@ -295,4 +296,6 @@ struct ARMGICv3CommonClass { void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, const MemoryRegionOps *ops, Error **errp); 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[82.27.183.148]) by smtp.gmail.com with ESMTPSA id u17sm16189542wmj.35.2021.01.23.18.53.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Jan 2021 18:53:10 -0800 (PST) From: Leif Lindholm To: qemu-arm@nongnu.org Subject: [RFC PATCH 3/4] hw/intc: set GICD_TYPER.DVIS for GICv4 Date: Sun, 24 Jan 2021 02:53:05 +0000 Message-Id: <20210124025306.3949-4-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com> References: <20210124025306.3949-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=leif@nuviainc.com; helo=mail-wr1-x42e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Shashi Mallela , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The VLPI frames are what make the redistributor size change, so ensure we state in GICD_TYPER that we have them. Signed-off-by: Leif Lindholm --- hw/intc/arm_gicv3_dist.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index b65f56f903..833deb0a74 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -387,6 +387,9 @@ static MemTxResult gicd_readl(GICv3State *s, hwaddr offset, *data = (1 << 25) | (1 << 24) | (sec_extn << 10) | (0xf << 19) | itlinesnumber; + if (s->revision == 4) { + *data |= (1 << 18);; + } return MEMTX_OK; } case GICD_IIDR: From patchwork Sun Jan 24 02:53:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leif Lindholm X-Patchwork-Id: 12042009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABA68C433E0 for ; Sun, 24 Jan 2021 02:56:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1E99A229CA for ; Sun, 24 Jan 2021 02:56:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1E99A229CA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=nuviainc.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46744 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l3VZa-0000lt-Re for qemu-devel@archiver.kernel.org; Sat, 23 Jan 2021 21:56:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55208) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l3VWc-0006kg-SL for qemu-devel@nongnu.org; Sat, 23 Jan 2021 21:53:14 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]:46922) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1l3VWa-0003Ai-NT for qemu-devel@nongnu.org; Sat, 23 Jan 2021 21:53:14 -0500 Received: by mail-wr1-x42a.google.com with SMTP id q7so8799731wre.13 for ; Sat, 23 Jan 2021 18:53:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hvTez/HngdMR8Bp4hJmsxx6LvZR0P6LerCwHXuYSqjg=; b=Rny/TWwVpFgoB+k7tCEU3sQr68GNvPhfpYKgn//MyeKMNTXcWtgyw394aFpYY14fo8 1RSjZor71rt6ZqXIAjbOSw7AjU52cGHZgnU3ewihfAEAqzsJOfz/UIXYbguwtdVTGOyu M+rYSylN8/A0VFGxIEM4hb2gFCUSJVwfGU2bl0JrZVR77i5V/7blYXPeFUiXsoONt1N/ KmbeWpL1QNkT2hVLV+1E1vZpjNMC3aruaaSlempNFmWcDGH1XOD3Kns4tiLofXeHrW9g K1g9qVI/Ln4gX7Dih+7OJLGDSgx2FJTHvQyvNCKQeszau80yaM2XK2zj4SeYRv+b9ZWN 6gXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hvTez/HngdMR8Bp4hJmsxx6LvZR0P6LerCwHXuYSqjg=; b=KyHjwP5xCqSpRVIo9tMZ9DVusZkE1Tmzy2iNk6X6I/rQAgP0S7Pr5uoh5lIcESVuEq Qo3jDJJZ8wx7QtUmcn9x6rLwFKFG44qQkU6NpcSkjhDmdsXUZO3k5h6jLoFVRf+2dYGZ BdyZDFYs9g1b1v3VrdaJdmqseTzDjLPt5vP7aHdWzuc0dJU7x1ZW73LThraV8cz4FGAN 4Msvkke7khYP/Ywwb34gPMtK4vjEk6034TqmC7X6CllH1xU2PAJoPa/r0Sq187dEFDoj 9WUfBDZzRnGteAK5DyEWEIuYAIKA1QicmgpW0jchKocXaEnSSmdBwLDPFJ6x9P02+XHp +6jQ== X-Gm-Message-State: AOAM5335bEnsazAjGUTu+7b9zALqIxmfrAg7TUmwXUl9+2ys1OjJ5rYc hr/yBSOvlNz09frSQV2PWovDPMyqJ4V+rx1P X-Google-Smtp-Source: ABdhPJwKQedSnOlWF1q62HU0eV7pFj9XlNbkKYzhcAaIXw0aSQu9lGu5EqssuDaJs+kL43/9zi05/Q== X-Received: by 2002:adf:dd83:: with SMTP id x3mr8134808wrl.421.1611456791456; Sat, 23 Jan 2021 18:53:11 -0800 (PST) Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id u17sm16189542wmj.35.2021.01.23.18.53.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Jan 2021 18:53:11 -0800 (PST) From: Leif Lindholm To: qemu-arm@nongnu.org Subject: [RFC PATCH 4/4] hw/intc: make gicv3_idreg() distinguish between gicv3/gicv4 Date: Sun, 24 Jan 2021 02:53:06 +0000 Message-Id: <20210124025306.3949-5-leif@nuviainc.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com> References: <20210124025306.3949-1-leif@nuviainc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=leif@nuviainc.com; helo=mail-wr1-x42a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Shashi Mallela , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Make gicv3_idreg() able to return either gicv3 or gicv4 data. Add a parameter to specify gic version. Signed-off-by: Leif Lindholm --- hw/intc/arm_gicv3_dist.c | 2 +- hw/intc/arm_gicv3_redist.c | 2 +- hw/intc/gicv3_internal.h | 12 ++++++++++-- 3 files changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 833deb0a74..d32a1d5f48 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -544,7 +544,7 @@ static MemTxResult gicd_readl(GICv3State *s, hwaddr offset, } case GICD_IDREGS ... GICD_IDREGS + 0x2f: /* ID registers */ - *data = gicv3_idreg(offset - GICD_IDREGS); + *data = gicv3_idreg(offset - GICD_IDREGS, s->revision); return MEMTX_OK; case GICD_SGIR: /* WO registers, return unknown value */ diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 544f4d82ff..faa68c9a71 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -239,7 +239,7 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwaddr offset, *data = cs->gicr_nsacr; return MEMTX_OK; case GICR_IDREGS ... GICR_IDREGS + 0x2f: - *data = gicv3_idreg(offset - GICR_IDREGS); + *data = gicv3_idreg(offset - GICR_IDREGS, cs->gic->revision); return MEMTX_OK; default: return MEMTX_ERROR; diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 05303a55c8..ded2df66eb 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -321,7 +321,7 @@ static inline uint32_t gicv3_iidr(void) return 0x43b; } -static inline uint32_t gicv3_idreg(int regoffset) +static inline uint32_t gicv3_idreg(int regoffset, int revision) { /* Return the value of the CoreSight ID register at the specified * offset from the first ID register (as found in the distributor @@ -331,7 +331,15 @@ static inline uint32_t gicv3_idreg(int regoffset) static const uint8_t gicd_ids[] = { 0x44, 0x00, 0x00, 0x00, 0x92, 0xB4, 0x3B, 0x00, 0x0D, 0xF0, 0x05, 0xB1 }; - return gicd_ids[regoffset / 4]; + static const uint8_t gicdv4_ids[] = { + 0x44, 0x00, 0x00, 0x00, 0x92, 0xB4, 0x4B, 0x00, 0x0D, 0xF0, 0x05, 0xB1 + }; + + if (revision == 3) { + return gicd_ids[regoffset / 4]; + } else { + return gicdv4_ids[regoffset / 4]; + } } /**