From patchwork Mon Jan 25 19:48:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ahmad Fatoum X-Patchwork-Id: 12044227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD23CC433E0 for ; Mon, 25 Jan 2021 19:50:31 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 821E820684 for ; Mon, 25 Jan 2021 19:50:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 821E820684 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=vNifobA/WMw65hdYdycCWl9NKqzORCi9Ud06/nAiNKg=; b=1c0GTRqIJMTFfWwgj6bd40xMvj uei2dDpuAKsMdIuymDvXm79PqpZkUJRHMsS01wG0990IRVPeTcwpngDCwNEgSv1u+JCNqMv8J6nGn ZaEnuszFWYQ+gTS1SZ09CzK0xK+Fm+QqXoHRKV2oBAZ6qTOF47MeSfpjQEn9LeESaGb94VonuteIe ilrHCwZYMUFHkWNvUagZpiVipZTH7HHJvw+8szi67O0zd6TQoFu0HAv+3TcFOwvnrglW+TUBXAfNv 6gpmXpE3Oe88HoVIiWXOCobQLuNWNq0hsNbMo9VdCRJBFj7vvj5QwYAxmBQvvX97QcVdAaZltlEsI A0fzOFUg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l47qu-0006o3-4t; Mon, 25 Jan 2021 19:48:44 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l47qq-0006mw-Mf for linux-arm-kernel@lists.infradead.org; Mon, 25 Jan 2021 19:48:41 +0000 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1l47qf-0006N0-C0; Mon, 25 Jan 2021 20:48:29 +0100 Received: from afa by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1l47qb-0007yC-C9; Mon, 25 Jan 2021 20:48:25 +0100 From: Ahmad Fatoum To: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Maxime Coquelin , Alexandre Torgue Subject: [PATCH v4] iio: adc: stm32-adc: enable timestamping for non-DMA usage Date: Mon, 25 Jan 2021 20:48:23 +0100 Message-Id: <20210125194824.30549-1-a.fatoum@pengutronix.de> X-Mailer: git-send-email 2.30.0 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: afa@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210125_144840_734213_139783F4 X-CRM114-Status: GOOD ( 20.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ahmad Fatoum , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrice Gasnier , kernel@pengutronix.de, Holger Assmann , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For non-DMA usage, we have an easy way to associate a timestamp with a sample: iio_pollfunc_store_time stores a timestamp in the primary trigger IRQ handler and stm32_adc_trigger_handler runs in the IRQ thread to push out the buffer along with the timestamp. For this to work, the driver needs to register an IIO_TIMESTAMP channel. Do this. For DMA, it's not as easy, because we don't push the buffers out of stm32_adc_trigger, but out of stm32_adc_dma_buffer_done, which runs in a tasklet scheduled after a DMA completion. Preferably, the DMA controller would copy us the timestamp into that buffer as well. Until this is implemented, restrict timestamping support to only PIO. For low-frequency sampling, PIO is probably good enough. Cc: Holger Assmann Acked-by: Fabrice Gasnier Signed-off-by: Ahmad Fatoum --- v3 -> v4: - descrease buffer size to correct size (Marc) v2 -> v3: - explicitly specify alignment (Jonathan) - increase buffer size to hold additional timestamp v1 -> v2: - Added comment about timestamping being PIO only (Fabrice) - Added missing DMA resource clean up in error path (Fabrice) - Added Fabrice's Acked-by --- drivers/iio/adc/stm32-adc.c | 39 +++++++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c index c067c994dae2..5ebbd28e45ca 100644 --- a/drivers/iio/adc/stm32-adc.c +++ b/drivers/iio/adc/stm32-adc.c @@ -177,7 +177,7 @@ struct stm32_adc_cfg { * @offset: ADC instance register offset in ADC block * @cfg: compatible configuration data * @completion: end of single conversion completion - * @buffer: data buffer + * @buffer: data buffer + 8 bytes for timestamp if enabled * @clk: clock for this adc instance * @irq: interrupt for this adc instance * @lock: spinlock @@ -200,7 +200,7 @@ struct stm32_adc { u32 offset; const struct stm32_adc_cfg *cfg; struct completion completion; - u16 buffer[STM32_ADC_MAX_SQ]; + u16 buffer[STM32_ADC_MAX_SQ + 4] __aligned(8); struct clk *clk; int irq; spinlock_t lock; /* interrupt lock */ @@ -1718,7 +1718,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev, } } -static int stm32_adc_chan_of_init(struct iio_dev *indio_dev) +static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping) { struct device_node *node = indio_dev->dev.of_node; struct stm32_adc *adc = iio_priv(indio_dev); @@ -1766,6 +1766,9 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev) return -EINVAL; } + if (timestamping) + num_channels++; + channels = devm_kcalloc(&indio_dev->dev, num_channels, sizeof(struct iio_chan_spec), GFP_KERNEL); if (!channels) @@ -1816,6 +1819,19 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev) stm32_adc_smpr_init(adc, channels[i].channel, smp); } + if (timestamping) { + struct iio_chan_spec *timestamp = &channels[scan_index]; + + timestamp->type = IIO_TIMESTAMP; + timestamp->channel = -1; + timestamp->scan_index = scan_index; + timestamp->scan_type.sign = 's'; + timestamp->scan_type.realbits = 64; + timestamp->scan_type.storagebits = 64; + + scan_index++; + } + indio_dev->num_channels = scan_index; indio_dev->channels = channels; @@ -1875,6 +1891,7 @@ static int stm32_adc_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; irqreturn_t (*handler)(int irq, void *p) = NULL; struct stm32_adc *adc; + bool timestamping = false; int ret; if (!pdev->dev.of_node) @@ -1931,16 +1948,22 @@ static int stm32_adc_probe(struct platform_device *pdev) if (ret < 0) return ret; - ret = stm32_adc_chan_of_init(indio_dev); - if (ret < 0) - return ret; - ret = stm32_adc_dma_request(dev, indio_dev); if (ret < 0) return ret; - if (!adc->dma_chan) + if (!adc->dma_chan) { + /* For PIO mode only, iio_pollfunc_store_time stores a timestamp + * in the primary trigger IRQ handler and stm32_adc_trigger_handler + * runs in the IRQ thread to push out buffer along with timestamp. + */ handler = &stm32_adc_trigger_handler; + timestamping = true; + } + + ret = stm32_adc_chan_of_init(indio_dev, timestamping); + if (ret < 0) + goto err_dma_disable; ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, handler,