From patchwork Tue Jan 26 20:08:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12048243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01259C433DB for ; Tue, 26 Jan 2021 20:08:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 92DC3221FB for ; Tue, 26 Jan 2021 20:08:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 92DC3221FB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C0EA389D4B; Tue, 26 Jan 2021 20:08:24 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF6D989D1D for ; Tue, 26 Jan 2021 20:08:22 +0000 (UTC) IronPort-SDR: NNa5Nz6vSpLH7WEo7XASBN17sjUWQ1tgxZN94UbQhPWNBIiSQZB3z1u5VSkv5wAmrepOaua1Aj DL3YJ11BBiQg== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="177393092" X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="177393092" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 12:08:22 -0800 IronPort-SDR: w6JbOUV45NS0YZL+c1XxNEqyAJWpQmUXHc5FgEeONMg5iZ2DZrWCnfzQBXsUiIy0dCkEblbn9w II7uvOMBwXjA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="573040965" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 12:08:21 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 12:08:03 -0800 Message-Id: <20210126200805.2499944-1-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Update cp_irq_count_cached when we handle reading the messages rather than writing a message to make sure the value is up to date and not stale from a previously handled CP_IRQ. AKE flow doesn't always respond to a read with a write msg. E.g. currently AKE_Send_Pairing_Info will "timeout" because we received a CP_IRQ for reading AKE_Send_H_Prime but no write occurred between that and reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale causing the wait to return right away rather than waiting for a new CP_IRQ. Signed-off-by: Juston Li --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index f372e25edab4..56a1a0ed20fe 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -442,8 +442,6 @@ static int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, void *buf, size_t size) { - struct intel_dp *dp = &dig_port->dp; - struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; unsigned int offset; u8 *byte = buf; ssize_t ret, bytes_to_write, len; @@ -459,8 +457,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, bytes_to_write = size - 1; byte++; - hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); - while (bytes_to_write) { len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ? DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write; @@ -508,6 +504,8 @@ static int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, u8 msg_id, void *buf, size_t size) { + struct intel_dp *dp = &dig_port->dp; + struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); unsigned int offset; u8 *byte = buf; @@ -523,6 +521,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, if (ret < 0) return ret; + hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); + if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) { ret = get_receiver_id_list_size(dig_port); if (ret < 0) From patchwork Tue Jan 26 20:08:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12048245 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62BAEC433E0 for ; Tue, 26 Jan 2021 20:08:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0409A221FC for ; Tue, 26 Jan 2021 20:08:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0409A221FC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 723A489D1D; Tue, 26 Jan 2021 20:08:26 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7651089D1D for ; Tue, 26 Jan 2021 20:08:24 +0000 (UTC) IronPort-SDR: N1KK6M4o797mdu8+xUOv3CYk03e7IraUkAYdAZtyIsvx5Xs2zVqCeXIdwB5rT+9ovupLVSsXyL KG4h1L5sCunQ== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="177393095" X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="177393095" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 12:08:24 -0800 IronPort-SDR: 0LdLdkThxwC6SJMeI0GhuDWnyJaflqbstezty1Hsf8mGp7H6cOoaJr23Bzi/J9T/gBuQHqkO5A addWYb5ko7Lg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="573040978" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 12:08:24 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 12:08:04 -0800 Message-Id: <20210126200805.2499944-2-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210126200805.2499944-1-juston.li@intel.com> References: <20210126200805.2499944-1-juston.li@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/3] drm/i915/hdcp: read RxInfo once when reading Send_Pairing_Info X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Previously when reading Send_Pairing_Info, RxInfo by itself was read once to retrieve the DEVICE_COUNT and then a second time when reading the RepeaterAuth_Send_ReceiverID_List which contains RxInfo. On a couple HDCP 2.2 docks, this second read attempt on RxInfo fails due to no Ack response. This behavior doesn't seem to be defined but regardless we can fix it by reading RxInfo once and storing it before reading the rest of RepeaterAuth_Send_ReceiverID_List once we know the size. Modify get_receiver_id_list_size() to read and store RxInfo in the message buffer and also parse DEVICE_COUNT so we know the size of RepeaterAuth_Send_ReceiverID_List. Afterwards, retrieve the rest of the message at the offset for seq_num_V. Signed-off-by: Juston Li --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 ++++++++++---------- include/drm/drm_dp_helper.h | 2 +- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 56a1a0ed20fe..e312aa8038ff 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -475,11 +475,10 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, } static -ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port) +ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte) { - u8 rx_info[HDCP_2_2_RXINFO_LEN]; - u32 dev_cnt; ssize_t ret; + u8 *rx_info = byte; ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_HDCP_2_2_REG_RXINFO_OFFSET, @@ -487,15 +486,11 @@ ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port) if (ret != HDCP_2_2_RXINFO_LEN) return ret >= 0 ? -EIO : ret; - dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 | + *dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 | HDCP_2_2_DEV_COUNT_LO(rx_info[1])); - if (dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT) - dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT; - - ret = sizeof(struct hdcp2_rep_send_receiverid_list) - - HDCP_2_2_RECEIVER_IDS_MAX_LEN + - (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN); + if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT) + *dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT; return ret; } @@ -504,13 +499,14 @@ static int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, u8 msg_id, void *buf, size_t size) { + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); struct intel_dp *dp = &dig_port->dp; struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); unsigned int offset; u8 *byte = buf; ssize_t ret, bytes_to_recv, len; const struct hdcp2_dp_msg_data *hdcp2_msg_data; + u32 dev_cnt; hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id); if (!hdcp2_msg_data) @@ -523,17 +519,22 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); + /* DP adaptation msgs has no msg_id */ + byte++; + if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) { - ret = get_receiver_id_list_size(dig_port); + ret = get_receiver_id_list_rx_info(dig_port, &dev_cnt, byte); if (ret < 0) return ret; - size = ret; + byte += ret; + size = sizeof(struct hdcp2_rep_send_receiverid_list) - + HDCP_2_2_RXINFO_LEN - HDCP_2_2_RECEIVER_IDS_MAX_LEN + + (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN); } - bytes_to_recv = size - 1; /* DP adaptation msgs has no msg_id */ - byte++; + bytes_to_recv = size - 1; while (bytes_to_recv) { len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ? diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index edffd1dcca3e..3b42392394ba 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1388,7 +1388,7 @@ enum drm_dp_phy { #define DP_HDCP_2_2_LC_INIT_OFFSET DP_HDCP_2_2_REG_RN_OFFSET #define DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET DP_HDCP_2_2_REG_LPRIME_OFFSET #define DP_HDCP_2_2_SKE_SEND_EKS_OFFSET DP_HDCP_2_2_REG_EDKEY_KS_OFFSET -#define DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET DP_HDCP_2_2_REG_RXINFO_OFFSET +#define DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET DP_HDCP_2_2_REG_SEQ_NUM_V_OFFSET #define DP_HDCP_2_2_REP_SEND_ACK_OFFSET DP_HDCP_2_2_REG_V_OFFSET #define DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET DP_HDCP_2_2_REG_SEQ_NUM_M_OFFSET #define DP_HDCP_2_2_REP_STREAM_READY_OFFSET DP_HDCP_2_2_REG_MPRIME_OFFSET From patchwork Tue Jan 26 20:08:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12048247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8081C433DB for ; Tue, 26 Jan 2021 20:08:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F657221FC for ; Tue, 26 Jan 2021 20:08:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9F657221FC Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CD4FF89D79; Tue, 26 Jan 2021 20:08:26 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5336189D79 for ; Tue, 26 Jan 2021 20:08:25 +0000 (UTC) IronPort-SDR: USi/VhrON1nUevgfPxtxa40cvAWPT5iV90GubmYMbHMb1/C9fvs1iIvKGTqEeJ0PaymxWtF2na TzrIaJ1HeZLg== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="177393097" X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="177393097" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 12:08:25 -0800 IronPort-SDR: rbNlbFeH/8/rEGThUq9EUQcMXt0dx332SOD15YHZmo9ysBGaNHOAplNd37kcJ2XFc43Ds1EyOj 78JsyVXq8eJg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="573040981" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 12:08:25 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 12:08:05 -0800 Message-Id: <20210126200805.2499944-3-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210126200805.2499944-1-juston.li@intel.com> References: <20210126200805.2499944-1-juston.li@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/3] drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Like the patch to disable QSES for HDCP 1.4 over MST https://patchwork.freedesktop.org/patch/415297/ the HDCP2.2 spec doesn't require QSES as well and we've seen QSES not supported on a couple HDCP2.2 docks so far (Dell WD19 and Lenovo LDC-G2) Remove it for now until we get a better idea of how widely supported QSES is and how to support it optionally. Signed-off-by: Juston Li Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 +------------------- 1 file changed, 1 insertion(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index e312aa8038ff..b7cb6948869e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -699,30 +699,6 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector, return 0; } -static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port, - struct intel_connector *connector) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - struct drm_dp_query_stream_enc_status_ack_reply reply; - struct intel_dp *intel_dp = &dig_port->dp; - int ret; - - ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, - connector->port, &reply); - if (ret) { - drm_dbg_kms(&i915->drm, - "[%s:%d] failed QSES ret=%d\n", - connector->base.name, connector->base.base.id, ret); - return false; - } - - drm_dbg_kms(&i915->drm, "[%s:%d] QSES stream auth: %d stream enc: %d\n", - connector->base.name, connector->base.base.id, - reply.auth_completed, reply.encryption_enabled); - - return reply.auth_completed && reply.encryption_enabled; -} - static bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port, struct intel_connector *connector) @@ -768,11 +744,6 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, return 0; } -/* - * DP v2.0 I.3.3 ignore the stream signature L' in QSES reply msg reply. - * I.3.5 MST source device may use a QSES msg to query downstream status - * for a particular stream. - */ static int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, struct intel_connector *connector) @@ -792,7 +763,7 @@ int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, return ret; } - return intel_dp_mst_get_qses_status(dig_port, connector) ? 0 : -EINVAL; + return 0; } static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {