From patchwork Mon Jan 25 15:18:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 12048293 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88831C433DB for ; Tue, 26 Jan 2021 20:21:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 59FAB22255 for ; Tue, 26 Jan 2021 20:21:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731904AbhAZFTq (ORCPT ); Tue, 26 Jan 2021 00:19:46 -0500 Received: from foss.arm.com ([217.140.110.172]:49698 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730115AbhAYPja (ORCPT ); Mon, 25 Jan 2021 10:39:30 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F3610176C; Mon, 25 Jan 2021 07:19:27 -0800 (PST) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7DD233F68F; Mon, 25 Jan 2021 07:19:25 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Chen-Yu Tsai Cc: Jernej Skrabec , Samuel Holland , Icenowy Zheng , Rob Herring , =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= , Shuosheng Huang , Yangtao Li , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Alexandre Torgue , "David S . Miller" , Giuseppe Cavallaro , Jakub Kicinski , Jose Abreu , netdev@vger.kernel.org Subject: [PATCH v4 14/21] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Date: Mon, 25 Jan 2021 15:18:04 +0000 Message-Id: <20210125151811.11871-15-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210125151811.11871-1-andre.przywara@arm.com> References: <20210125151811.11871-1-andre.przywara@arm.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The Allwinner H616 SoC has two EMAC controllers, with the second one being tied to the internal PHY, but also using a separate EMAC clock register. To tell the driver about which clock register to use, we add a parameter to our syscon phandle. The driver will use this value as an index into the regmap, so that we can address more than the first register, if needed. Signed-off-by: Andre Przywara --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c index 58e0511badba..c7951790ed98 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -1124,11 +1124,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) struct stmmac_resources stmmac_res; struct sunxi_priv_data *gmac; struct device *dev = &pdev->dev; + struct reg_field syscon_field; phy_interface_t interface; int ret; struct stmmac_priv *priv; struct net_device *ndev; struct regmap *regmap; + u32 syscon_idx = 0; ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) @@ -1190,8 +1192,12 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) return ret; } - gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, - *gmac->variant->syscon_field); + syscon_field = *gmac->variant->syscon_field; + ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, + &syscon_idx); + if (!ret) + syscon_field.reg += syscon_idx * sizeof(u32); + gmac->regmap_field = devm_regmap_field_alloc(dev, regmap, syscon_field); if (IS_ERR(gmac->regmap_field)) { ret = PTR_ERR(gmac->regmap_field); dev_err(dev, "Unable to map syscon register: %d\n", ret); @@ -1263,6 +1269,8 @@ static const struct of_device_id sun8i_dwmac_match[] = { .data = &emac_variant_a64 }, { .compatible = "allwinner,sun50i-h6-emac", .data = &emac_variant_h6 }, + { .compatible = "allwinner,sun50i-h616-emac", + .data = &emac_variant_h6 }, { } }; MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);