From patchwork Wed Jan 27 06:50:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12049045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06D20C433DB for ; Wed, 27 Jan 2021 06:51:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A596120724 for ; Wed, 27 Jan 2021 06:50:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A596120724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C1D5E6E578; Wed, 27 Jan 2021 06:50:58 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 42D946E578 for ; Wed, 27 Jan 2021 06:50:57 +0000 (UTC) IronPort-SDR: GQyEc+3PTLdd/xnDou/K5na26KGQhhpSHSLXgmBlo+CqdgklNZ7Bkr6KsSokvjaRT73StZmuJt AynBuKH67XBA== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="241555730" X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="241555730" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 22:50:56 -0800 IronPort-SDR: IHIfejJTaiICoFR5CA9psfkeXeyeQNHXpw5I8A8aaQrGvWyi4B1xTPUV/nWqP4UmkKgEmfnnTW k++YfBBiXSvg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="573175074" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 22:50:55 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 22:50:31 -0800 Message-Id: <20210127065034.2501119-1-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/4] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Vetter , seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS check, it was always a nice-to-have. After deploying this across various devices, we've determined that some MST bridge chips do not properly support this call for HDCP 1.4 (namely Synaptics and Realtek). I had considered creating a quirk for this, but I think it's more prudent to just disable the check entirely since I don't have an idea how widespread support is. Acked-by: Daniel Vetter Reviewed-by: Anshuman Gupta Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210106223909.34476-1-sean@poorly.run #v1 Changes in v2: -Rebased on -tip --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index f372e25edab4..4dba5bb15af5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -722,16 +722,6 @@ static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port, return reply.auth_completed && reply.encryption_enabled; } -static -bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port, - struct intel_connector *connector) -{ - if (!intel_dp_hdcp_check_link(dig_port, connector)) - return false; - - return intel_dp_mst_get_qses_status(dig_port, connector); -} - static int intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, bool enable) @@ -805,7 +795,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, .toggle_signalling = intel_dp_hdcp_toggle_signalling, .stream_encryption = intel_dp_mst_hdcp_stream_encryption, - .check_link = intel_dp_mst_hdcp_check_link, + .check_link = intel_dp_hdcp_check_link, .hdcp_capable = intel_dp_hdcp_capable, .write_2_2_msg = intel_dp_hdcp2_write_msg, .read_2_2_msg = intel_dp_hdcp2_read_msg, From patchwork Wed Jan 27 06:50:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12049047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C618C433E6 for ; Wed, 27 Jan 2021 06:51:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B235F20724 for ; Wed, 27 Jan 2021 06:51:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B235F20724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 24EEA6E57E; Wed, 27 Jan 2021 06:51:01 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 824906E578 for ; Wed, 27 Jan 2021 06:50:58 +0000 (UTC) IronPort-SDR: Hjyewyi8VRlKQZ0AxzeNaTWkdgkL96MKsmC7YDQkYOy8bMmOQ6QZ64+tEusxfHezVLyI9hEJ1B oZh4WruZT1tA== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="241555741" X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="241555741" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 22:50:58 -0800 IronPort-SDR: Ta9SavtmsMMJ0EAbM0OX0CGGrY9tbO7Zre2Dgg+/8rpGtdIrLvyLcYbmrTKiQ7xVhLatf8XSJG NuB6eY1M9v2A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="573175104" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 22:50:58 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 22:50:32 -0800 Message-Id: <20210127065034.2501119-2-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210127065034.2501119-1-juston.li@intel.com> References: <20210127065034.2501119-1-juston.li@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 2/4] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Update cp_irq_count_cached when we handle reading the messages rather than writing a message to make sure the value is up to date and not stale from a previously handled CP_IRQ. AKE flow doesn't always respond to a read with a write msg. E.g. currently AKE_Send_Pairing_Info will "timeout" because we received a CP_IRQ for reading AKE_Send_H_Prime but no write occurred between that and reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale causing the wait to return right away rather than waiting for a new CP_IRQ. Signed-off-by: Juston Li Acked-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 4dba5bb15af5..d1397af97f69 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -442,8 +442,6 @@ static int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, void *buf, size_t size) { - struct intel_dp *dp = &dig_port->dp; - struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; unsigned int offset; u8 *byte = buf; ssize_t ret, bytes_to_write, len; @@ -459,8 +457,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, bytes_to_write = size - 1; byte++; - hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); - while (bytes_to_write) { len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ? DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write; @@ -509,6 +505,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, u8 msg_id, void *buf, size_t size) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + struct intel_dp *dp = &dig_port->dp; + struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; unsigned int offset; u8 *byte = buf; ssize_t ret, bytes_to_recv, len; @@ -523,6 +521,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, if (ret < 0) return ret; + hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); + if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) { ret = get_receiver_id_list_size(dig_port); if (ret < 0) From patchwork Wed Jan 27 06:50:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12049049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F960C433E0 for ; Wed, 27 Jan 2021 06:51:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D89BC20724 for ; Wed, 27 Jan 2021 06:51:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D89BC20724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C6A66E580; Wed, 27 Jan 2021 06:51:04 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1AD0D6E57E for ; Wed, 27 Jan 2021 06:50:59 +0000 (UTC) IronPort-SDR: BsgFF1b2f/3ZEIQoL60tUiivYGOUTLYk9NEIdIHDFPq7gBfpjy+nszk4AHGONZwUDmguSMqpF3 1YiDXhDnFbEg== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="241555746" X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="241555746" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 22:50:58 -0800 IronPort-SDR: 6ExH7GIMoSvPJmKohT1JYb1Lg+NdV2l0jW/cTMltwpDK4+MSBAJzHkDwADiHcK4HhqgAgqav2q wURqVip3648w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="573175108" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 22:50:58 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 22:50:33 -0800 Message-Id: <20210127065034.2501119-3-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210127065034.2501119-1-juston.li@intel.com> References: <20210127065034.2501119-1-juston.li@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/4] drm/i915/hdcp: read RxInfo once when reading Send_Pairing_Info X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Previously when reading Send_Pairing_Info, RxInfo by itself was read once to retrieve the DEVICE_COUNT and then a second time when reading the RepeaterAuth_Send_ReceiverID_List which contains RxInfo. On a couple HDCP 2.2 docks, this second read attempt on RxInfo fails due to no Ack response. This behavior doesn't seem to be defined but regardless we can fix it by reading RxInfo once and storing it before reading the rest of RepeaterAuth_Send_ReceiverID_List once we know the size. Modify get_receiver_id_list_size() to read and store RxInfo in the message buffer and also parse DEVICE_COUNT so we know the size of RepeaterAuth_Send_ReceiverID_List. Afterwards, retrieve the rest of the message at the offset for seq_num_V. Changes in v2: - remove unnecessary moving of drm_i915_private from patch 1 Signed-off-by: Juston Li Acked-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 29 ++++++++++---------- include/drm/drm_dp_helper.h | 2 +- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index d1397af97f69..cd183944bc5a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -475,11 +475,10 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, } static -ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port) +ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte) { - u8 rx_info[HDCP_2_2_RXINFO_LEN]; - u32 dev_cnt; ssize_t ret; + u8 *rx_info = byte; ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_HDCP_2_2_REG_RXINFO_OFFSET, @@ -487,15 +486,11 @@ ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port) if (ret != HDCP_2_2_RXINFO_LEN) return ret >= 0 ? -EIO : ret; - dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 | + *dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 | HDCP_2_2_DEV_COUNT_LO(rx_info[1])); - if (dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT) - dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT; - - ret = sizeof(struct hdcp2_rep_send_receiverid_list) - - HDCP_2_2_RECEIVER_IDS_MAX_LEN + - (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN); + if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT) + *dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT; return ret; } @@ -511,6 +506,7 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, u8 *byte = buf; ssize_t ret, bytes_to_recv, len; const struct hdcp2_dp_msg_data *hdcp2_msg_data; + u32 dev_cnt; hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id); if (!hdcp2_msg_data) @@ -523,17 +519,22 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count); + /* DP adaptation msgs has no msg_id */ + byte++; + if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) { - ret = get_receiver_id_list_size(dig_port); + ret = get_receiver_id_list_rx_info(dig_port, &dev_cnt, byte); if (ret < 0) return ret; - size = ret; + byte += ret; + size = sizeof(struct hdcp2_rep_send_receiverid_list) - + HDCP_2_2_RXINFO_LEN - HDCP_2_2_RECEIVER_IDS_MAX_LEN + + (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN); } - bytes_to_recv = size - 1; /* DP adaptation msgs has no msg_id */ - byte++; + bytes_to_recv = size - 1; while (bytes_to_recv) { len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ? diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index edffd1dcca3e..3b42392394ba 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1388,7 +1388,7 @@ enum drm_dp_phy { #define DP_HDCP_2_2_LC_INIT_OFFSET DP_HDCP_2_2_REG_RN_OFFSET #define DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET DP_HDCP_2_2_REG_LPRIME_OFFSET #define DP_HDCP_2_2_SKE_SEND_EKS_OFFSET DP_HDCP_2_2_REG_EDKEY_KS_OFFSET -#define DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET DP_HDCP_2_2_REG_RXINFO_OFFSET +#define DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET DP_HDCP_2_2_REG_SEQ_NUM_V_OFFSET #define DP_HDCP_2_2_REP_SEND_ACK_OFFSET DP_HDCP_2_2_REG_V_OFFSET #define DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET DP_HDCP_2_2_REG_SEQ_NUM_M_OFFSET #define DP_HDCP_2_2_REP_STREAM_READY_OFFSET DP_HDCP_2_2_REG_MPRIME_OFFSET From patchwork Wed Jan 27 06:50:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juston Li X-Patchwork-Id: 12049051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 374EAC433E0 for ; Wed, 27 Jan 2021 06:51:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AFAE520724 for ; Wed, 27 Jan 2021 06:51:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AFAE520724 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 35AD96E581; Wed, 27 Jan 2021 06:51:08 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 84D4B6E581 for ; Wed, 27 Jan 2021 06:50:59 +0000 (UTC) IronPort-SDR: AMo/JR0sqXN30HLjyxILtwUCjVhR8ux0423JiSQLNXMj/qBYjYacSmaS5rg7NozbGCaORVZFiP OGitXgLOMM5g== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="241555749" X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="241555749" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 22:50:59 -0800 IronPort-SDR: C1lKsIyeadcEhjJ0MwNZqvnWI1oQVNRMnrLnJfS40OBJ0Tv807iqy3NpUY/CEr3kGR8WxpvqYx 0s4vW2/1XrxQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,378,1602572400"; d="scan'208";a="573175112" Received: from jhli-desk1.jf.intel.com ([10.54.74.156]) by orsmga005.jf.intel.com with ESMTP; 26 Jan 2021 22:50:59 -0800 From: Juston Li To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Jan 2021 22:50:34 -0800 Message-Id: <20210127065034.2501119-4-juston.li@intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210127065034.2501119-1-juston.li@intel.com> References: <20210127065034.2501119-1-juston.li@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 4/4] drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seanpaul@chromium.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Like the patch to disable QSES for HDCP 1.4 over MST https://patchwork.freedesktop.org/patch/415297/ the HDCP2.2 spec doesn't require QSES as well and we've seen QSES not supported on a couple HDCP2.2 docks so far (Dell WD19 and Lenovo LDC-G2) Remove it for now until we get a better idea of how widely supported QSES is and how to support it optionally. Signed-off-by: Juston Li Reviewed-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 +------------------- 1 file changed, 1 insertion(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index cd183944bc5a..5e9d0d8f7f84 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -699,30 +699,6 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector, return 0; } -static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port, - struct intel_connector *connector) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - struct drm_dp_query_stream_enc_status_ack_reply reply; - struct intel_dp *intel_dp = &dig_port->dp; - int ret; - - ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, - connector->port, &reply); - if (ret) { - drm_dbg_kms(&i915->drm, - "[%s:%d] failed QSES ret=%d\n", - connector->base.name, connector->base.base.id, ret); - return false; - } - - drm_dbg_kms(&i915->drm, "[%s:%d] QSES stream auth: %d stream enc: %d\n", - connector->base.name, connector->base.base.id, - reply.auth_completed, reply.encryption_enabled); - - return reply.auth_completed && reply.encryption_enabled; -} - static int intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, bool enable) @@ -758,11 +734,6 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, return 0; } -/* - * DP v2.0 I.3.3 ignore the stream signature L' in QSES reply msg reply. - * I.3.5 MST source device may use a QSES msg to query downstream status - * for a particular stream. - */ static int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, struct intel_connector *connector) @@ -782,7 +753,7 @@ int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, return ret; } - return intel_dp_mst_get_qses_status(dig_port, connector) ? 0 : -EINVAL; + return 0; } static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {