From patchwork Thu Jan 28 17:52:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12054307 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28333C433E6 for ; Thu, 28 Jan 2021 17:53:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED19F60235 for ; Thu, 28 Jan 2021 17:53:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231185AbhA1Rxe (ORCPT ); Thu, 28 Jan 2021 12:53:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231169AbhA1Rxc (ORCPT ); Thu, 28 Jan 2021 12:53:32 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D70BAC06178B for ; Thu, 28 Jan 2021 09:52:33 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id m22so8754859lfg.5 for ; Thu, 28 Jan 2021 09:52:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dk89QtY9XlOJ4lSbFodbDfjmlfoZzf3XCi+vMFHgHok=; b=s1b6iFGc1xAsquj/ntFQobMHzwwE5meOTZQpJqhMvbTul/jkfDwEK1qrboPMa+Fkm5 RZQd+TtVuZkdOBzfNuxrgdHp52dMKrhN4Yi8ZVzliMmYIsV5spFEakHA60kpuzlrK9Rh q+xU/xtzlYnKTjkvBHqssnAaCtRwOhTVPwL3am6aWD9NykDw6bq2lLpDE5Vrwcmv1/YL Wa3+d+aP6zu6Un/C4A3OQvO3r8JyhZV3vmNSNgScl6zoeuRQ+wkK26o215Vm0JEff3eR kaeA3Sg8dhp1Unrcx7PlZ2RFw3rLkVcLG+ptM23QANVF/beHNCCQoUANZP3gp3QJsfX6 7bqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dk89QtY9XlOJ4lSbFodbDfjmlfoZzf3XCi+vMFHgHok=; b=f1JpRqHMaWoPGVPuGCnHOOWIgtFKH7AcakEaF4wYfZLefNU7tKPyg6W/ndXs+v/xEK P0nKi9KDVJEQSF8CKc1mb7ucHhI9uTO2FtExRMItszaYkQ9TMWMEidAuypk9TSLPfFgZ 9L/W4BFxsIiDtl6BuYEgPeds82kgwqlAo2JfcnaERosHjm5N9V5FOe2m8M5vagX3oN7J jopxD1hnTndSCQl69BwzxZr9X9PCQdzx+/es4zYgHXMOJDVY+hUX4N4d9yADj6R3vCnX pG1LkGnL7WFyT+nkJUBmsVv+FU8dzUUfls0ZUkLTjE+vz/JI7ajwIpsax7cFW1h9zCvD QT1w== X-Gm-Message-State: AOAM5313UVx1xnnRjIEI+bUUuGYRqs/LU+1wDTPHgiaV145FwCihRfdJ WfBhfNOPpoOb06SfGkkpAXobQg== X-Google-Smtp-Source: ABdhPJyo2K236uryJLqqIFx/8azBYCs0C25xCGJzTLfpsPf6+ILq/A9q9sV2MRM7bRqrp9w6PBthFQ== X-Received: by 2002:a19:6555:: with SMTP id c21mr90981lfj.563.1611856352300; Thu, 28 Jan 2021 09:52:32 -0800 (PST) Received: from eriador.lan ([94.25.229.83]) by smtp.gmail.com with ESMTPSA id w10sm2216119ljj.37.2021.01.28.09.52.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 09:52:31 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 1/5] misc: qca639x: add support for QCA639x powerup sequence Date: Thu, 28 Jan 2021 20:52:21 +0300 Message-Id: <20210128175225.3102958-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Qualcomm QCA639x is a family of WiFi + Bluetooth SoCs, with BT part being controlled through the UART and WiFi being present on PCIe bus. Both blocks share common power sources. Add device driver handling power sequencing of QCA6390/1. Signed-off-by: Dmitry Baryshkov --- drivers/misc/Kconfig | 12 +++ drivers/misc/Makefile | 1 + drivers/misc/qcom-qca639x.c | 164 ++++++++++++++++++++++++++++++++++++ 3 files changed, 177 insertions(+) create mode 100644 drivers/misc/qcom-qca639x.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index e90c2524e46c..a14f67ab476c 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -255,6 +255,18 @@ config QCOM_FASTRPC applications DSP processor. Say M if you want to enable this module. +config QCOM_QCA639X + tristate "Qualcomm QCA639x WiFi/Bluetooth module support" + depends on REGULATOR && PM_GENERIC_DOMAINS + help + If you say yes to this option, support will be included for Qualcomm + QCA639x family of WiFi and Bluetooth SoCs. Note, this driver supports + only power control for this SoC, you still have to enable individual + Bluetooth and WiFi drivers. + + Say M here if you want to include support for QCA639x chips as a + module. This will build a module called "qcom-qca639x". + config SGI_GRU tristate "SGI GRU driver" depends on X86_UV && SMP diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index f65e8b18ecd8..bf21d5b1189f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o obj-$(CONFIG_PHANTOM) += phantom.o obj-$(CONFIG_QCOM_COINCELL) += qcom-coincell.o obj-$(CONFIG_QCOM_FASTRPC) += fastrpc.o +obj-$(CONFIG_QCOM_QCA639X) += qcom-qca639x.o obj-$(CONFIG_SENSORS_BH1770) += bh1770glc.o obj-$(CONFIG_SENSORS_APDS990X) += apds990x.o obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o diff --git a/drivers/misc/qcom-qca639x.c b/drivers/misc/qcom-qca639x.c new file mode 100644 index 000000000000..b34e08ff4a88 --- /dev/null +++ b/drivers/misc/qcom-qca639x.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Linaro Limited + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX_NUM_REGULATORS 8 + +static struct vreg { + const char *name; + unsigned int load_uA; +} vregs[MAX_NUM_REGULATORS] = { + /* 2.0 V */ + { "vddpcie2", 15000 }, + { "vddrfa3", 400000 }, + + /* 0.95 V */ + { "vddaon", 100000 }, + { "vddpmu", 1250000 }, + { "vddrfa1", 200000 }, + + /* 1.35 V */ + { "vddrfa2", 400000 }, + { "vddpcie1", 35000 }, + + /* 1.8 V */ + { "vddio", 20000 }, +}; + +struct qca639x_data { + struct regulator_bulk_data regulators[MAX_NUM_REGULATORS]; + size_t num_vregs; + struct device *dev; + struct pinctrl_state *active_state; + struct generic_pm_domain pd; +}; + +#define domain_to_data(domain) container_of(domain, struct qca639x_data, pd) + +static int qca639x_power_on(struct generic_pm_domain *domain) +{ + struct qca639x_data *data = domain_to_data(domain); + int ret; + + ret = regulator_bulk_enable(data->num_vregs, data->regulators); + if (ret) { + dev_err(data->dev, "Failed to enable regulators"); + return ret; + } + + /* Wait for 1ms before toggling enable pins. */ + usleep_range(1000, 2000); + + ret = pinctrl_select_state(data->dev->pins->p, data->active_state); + if (ret) { + dev_err(data->dev, "Failed to select active state"); + return ret; + } + + /* Wait for all power levels to stabilize */ + usleep_range(6000, 7000); + + return 0; +} + +static int qca639x_power_off(struct generic_pm_domain *domain) +{ + struct qca639x_data *data = domain_to_data(domain); + + pinctrl_select_default_state(data->dev); + regulator_bulk_disable(data->num_vregs, data->regulators); + + return 0; +} + +static int qca639x_probe(struct platform_device *pdev) +{ + struct qca639x_data *data; + struct device *dev = &pdev->dev; + int i, ret; + + if (!dev->pins || IS_ERR_OR_NULL(dev->pins->default_state)) + return -EINVAL; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev = dev; + data->num_vregs = ARRAY_SIZE(vregs); + + data->active_state = pinctrl_lookup_state(dev->pins->p, "active"); + if (IS_ERR(data->active_state)) { + ret = PTR_ERR(data->active_state); + dev_err(dev, "Failed to get active_state: %d\n", ret); + return ret; + } + + for (i = 0; i < data->num_vregs; i++) + data->regulators[i].supply = vregs[i].name; + ret = devm_regulator_bulk_get(dev, data->num_vregs, data->regulators); + if (ret < 0) + return ret; + + for (i = 0; i < data->num_vregs; i++) { + ret = regulator_set_load(data->regulators[i].consumer, vregs[i].load_uA); + if (ret) + return ret; + } + + data->pd.name = dev_name(dev); + data->pd.power_on = qca639x_power_on; + data->pd.power_off = qca639x_power_off; + + ret = pm_genpd_init(&data->pd, NULL, true); + if (ret < 0) + return ret; + + ret = of_genpd_add_provider_simple(dev->of_node, &data->pd); + if (ret < 0) { + pm_genpd_remove(&data->pd); + return ret; + } + + platform_set_drvdata(pdev, data); + + return 0; +} + +static int qca639x_remove(struct platform_device *pdev) +{ + struct qca639x_data *data = platform_get_drvdata(pdev); + + pm_genpd_remove(&data->pd); + + return 0; +} + +static const struct of_device_id qca639x_of_match[] = { + { .compatible = "qcom,qca6390" }, +}; + +static struct platform_driver qca639x_driver = { + .probe = qca639x_probe, + .remove = qca639x_remove, + .driver = { + .name = "qca639x", + .of_match_table = qca639x_of_match, + }, +}; + +module_platform_driver(qca639x_driver); +MODULE_AUTHOR("Dmitry Baryshkov "); +MODULE_DESCRIPTION("Power control for Qualcomm QCA639x BT/WiFi chip"); +MODULE_LICENSE("GPL v2"); From patchwork Thu Jan 28 17:52:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12054309 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 653FBC43381 for ; Thu, 28 Jan 2021 17:54:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1D91664E15 for ; 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Thu, 28 Jan 2021 09:52:34 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 2/5] arm64: qcom: dts: qrb5165-rb5: add qca6391 power device Date: Thu, 28 Jan 2021 20:52:22 +0300 Message-Id: <20210128175225.3102958-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add qca6391 to device tree as a way to provide power domain to WiFi and BT parts of the chip. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 61 ++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 8aebc3660b11..2b0c1cc9333b 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -151,6 +151,23 @@ vreg_s4a_1p8: vreg-s4a-1p8 { regulator-max-microvolt = <1800000>; regulator-always-on; }; + + qca6391: qca6391 { + compatible = "qcom,qca6390"; + #power-domain-cells = <0>; + + vddaon-supply = <&vreg_s6a_0p95>; + vddpmu-supply = <&vreg_s2f_0p95>; + vddrfa1-supply = <&vreg_s2f_0p95>; + vddrfa2-supply = <&vreg_s8c_1p3>; + vddrfa3-supply = <&vreg_s5a_1p9>; + vddpcie1-supply = <&vreg_s8c_1p3>; + vddpcie2-supply = <&vreg_s5a_1p9>; + vddio-supply = <&vreg_s4a_1p8>; + pinctrl-names = "default", "active"; + pinctrl-0 = <&wlan_default_state &bt_default_state>; + pinctrl-1 = <&wlan_active_state &bt_active_state>; + }; }; &adsp { @@ -1013,6 +1030,28 @@ &tlmm { "HST_WLAN_UART_TX", "HST_WLAN_UART_RX"; + bt_default_state: bt-default-state { + bt-en { + pins = "gpio21"; + function = "gpio"; + + drive-strength = <16>; + output-low; + bias-pull-up; + }; + }; + + bt_active_state: bt-active-state { + bt-en { + pins = "gpio21"; + function = "gpio"; + + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + lt9611_irq_pin: lt9611-irq { pins = "gpio63"; function = "gpio"; @@ -1119,6 +1158,28 @@ sdc2_card_det_n: sd-card-det-n { function = "gpio"; bias-pull-up; }; + + wlan_default_state: wlan-default-state { + wlan-en { + pins = "gpio20"; + function = "gpio"; + + drive-strength = <16>; + output-low; + bias-pull-up; + }; + }; + + wlan_active_state: wlan-active-state { + wlan-en { + pins = "gpio20"; + function = "gpio"; + + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; }; &uart12 { From patchwork Thu Jan 28 17:52:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12054315 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 336E3C433E0 for ; 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Thu, 28 Jan 2021 09:52:36 -0800 (PST) Received: from eriador.lan ([94.25.229.83]) by smtp.gmail.com with ESMTPSA id w10sm2216119ljj.37.2021.01.28.09.52.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 09:52:36 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 3/5] pcie-qcom: provide a way to power up qca6390 chip on RB5 platform Date: Thu, 28 Jan 2021 20:52:23 +0300 Message-Id: <20210128175225.3102958-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Some Qualcomm platforms require to power up an external device before probing the PCI bus. E.g. on RB5 platform the QCA6390 WiFi/BT chip needs to be powered up before PCIe0 bus is probed. Add a quirk to the respective PCIe root bridge to attach to the power domain if one is required, so that the QCA chip is started before scanning the PCIe bus. Signed-off-by: Dmitry Baryshkov --- drivers/pci/controller/dwc/pcie-qcom.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index ab21aa01c95d..eb73c8540d4d 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -1568,6 +1569,26 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class); +static void qcom_fixup_power(struct pci_dev *dev) +{ + int ret; + struct pcie_port *pp = dev->bus->sysdata; + struct dw_pcie *pci; + + if (!pci_is_root_bus(dev->bus)) + return; + + ret = dev_pm_domain_attach(&dev->dev, true); + if (ret < 0 || !dev->dev.pm_domain) + return; + + pci = to_dw_pcie_from_pp(pp); + dev_info(&dev->dev, "Bus powered up, waiting for link to come up\n"); + + dw_pcie_wait_for_link(pci); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x010b, qcom_fixup_power); + static struct platform_driver qcom_pcie_driver = { .probe = qcom_pcie_probe, .driver = { From patchwork Thu Jan 28 17:52:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12054313 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01E7DC433DB for ; Thu, 28 Jan 2021 17:55:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C0D1E64E17 for ; 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Thu, 28 Jan 2021 09:52:38 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dtb: qcom: qrb5165-rb5: add bridge@0,0 to power up qca6391 chip Date: Thu, 28 Jan 2021 20:52:24 +0300 Message-Id: <20210128175225.3102958-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If QCA6391 chip (connected to PCIe0) is not powered at the PCIe probe time, PCIe0 bus probe will timeout and the device will not be detected. So use qca6391 as pcie0's bridge power-domain. This allows us to make sure that QCA6391 chip is powered on before PCIe0 probe happens. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 2b0c1cc9333b..b39a9729395f 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -581,6 +581,18 @@ &pcie0 { wake-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pcie0_default_state>; + + bridge@0,0 { + compatible = "pci17cb,010b"; + reg = <0 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + /* Power on QCA639x chip sitting behind this bridge. */ + power-domains = <&qca6391>; + }; }; &pcie0_phy { From patchwork Thu Jan 28 17:52:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12054311 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAC58C433E6 for ; Thu, 28 Jan 2021 17:54:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8EBF964E15 for ; Thu, 28 Jan 2021 17:54:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231305AbhA1Ry2 (ORCPT ); Thu, 28 Jan 2021 12:54:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231146AbhA1RyF (ORCPT ); Thu, 28 Jan 2021 12:54:05 -0500 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 826A2C06121D for ; Thu, 28 Jan 2021 09:52:42 -0800 (PST) Received: by mail-lj1-x22a.google.com with SMTP id r14so7423516ljc.2 for ; Thu, 28 Jan 2021 09:52:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9xirdUoG4Ll4lVtpP53/4UjQ/mMXV3s/T44FiAusFTg=; b=HijFpgtDKzCt+F1Vszpyo4UAot2v3Wo7ywl19BCZmF6Jn1zYV92BJIoNi9APoJ5SR8 pKszdSR2/6VZ0IiW5D6N3OZwYyPp1Fc2Wi8VRc8/H6RRFK2/T1xvtL6MbvBBnx81aUKo e17S/ZSA4UDGZqfwP3dghScK2HyDSDUvyd0N/u5zwME+lq4WSLzHMFwbeVGBBNDNfK9P vsC/g8N8kXlXWefcBQcJaNkt+kvGTg4CHdK6XqTpvf7MebRIJf0IAFnZ4gUF9YyijdP2 4cF+Fe6UKf2xbLLTeNf+codZpf0Z4cbZJnBQ+lozrk8Q6pnN/fNXiL8xTQWKbJWF5mvD wNjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9xirdUoG4Ll4lVtpP53/4UjQ/mMXV3s/T44FiAusFTg=; b=NQfldtLVJCf8SwDG1RgR7PBqfKtPvG3Rz/ZnKn/8lpcZdFyDEBxQr8h5rbKbCccAa6 0ylYXS8LkN7P1XD4LM9w0PP0DRVCImwNzq4UkGI+u6ReDmxWZZSqXrV7Sx5yV5EuhuRz OaEsOEudwlWDMcifwuYMRg9T3ii4WDDm8UvR7St2amamDP2d965nuy8DZYdUECSsLVX2 Z06JJ/A7KYE3LDoB+X30CY9mxTkhbZs5KE14XQe6BPAI/cOeYVbR4n2XYM9TbglLoG95 1JhCVktjmFpf4LPlbdHzDSctnTiJ1vKLlCt77hlnShhebyTpxd+5bIOZixM32m4fwPkd E70g== X-Gm-Message-State: AOAM5339KXlo0xCy/r8PCMdjNXFxQ46Xus4LqQ5nCBxzs07lXf+C12VH ybrRBeZc1Uz3Xw61PtAw3jFWwQ== X-Google-Smtp-Source: ABdhPJysn9iMUtZv0ooelD8ZTgrcs6z9oIPbqb0gRaA/8BdgTlXZ/020aKDq/p9mBFGXUP7W9C6wdA== X-Received: by 2002:a2e:85ca:: with SMTP id h10mr247977ljj.474.1611856361059; Thu, 28 Jan 2021 09:52:41 -0800 (PST) Received: from eriador.lan ([94.25.229.83]) by smtp.gmail.com with ESMTPSA id w10sm2216119ljj.37.2021.01.28.09.52.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Jan 2021 09:52:40 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Arnd Bergmann , Greg Kroah-Hartman , Stanimir Varbanov , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: qcom: Add Bluetooth support on RB5 Date: Thu, 28 Jan 2021 20:52:25 +0300 Message-Id: <20210128175225.3102958-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> References: <20210128175225.3102958-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Manivannan Sadhasivam Add Bluetooth support on RB5 using the onboard QCA6391 WLAN+BT chipset. Signed-off-by: Manivannan Sadhasivam [DB: added qca6391 power domain, removed s2f regulator] Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 29 ++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index b39a9729395f..c65c13994a86 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -19,6 +19,7 @@ / { compatible = "qcom,qrb5165-rb5", "qcom,sm8250"; aliases { + hsuart0 = &uart6; serial0 = &uart12; sdhc2 = &sdhc_2; }; @@ -689,6 +690,26 @@ &pm8150_rtc { status = "okay"; }; +&qup_uart6_default { + ctsrx { + pins = "gpio16", "gpio19"; + drive-strength = <2>; + bias-disable; + }; + + rts { + pins = "gpio17"; + drive-strength = <2>; + bias-disable; + }; + + tx { + pins = "gpio18"; + drive-strength = <2>; + bias-pull-up; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -1194,6 +1215,14 @@ wlan-en { }; }; +&uart6 { + status = "okay"; + bluetooth { + compatible = "qcom,qca6390-bt"; + power-domains = <&qca6391>; + }; +}; + &uart12 { status = "okay"; };