From patchwork Mon Feb 1 04:54:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Like Xu X-Patchwork-Id: 12058033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 038A4C433DB for ; Mon, 1 Feb 2021 05:04:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4957664E2B for ; Mon, 1 Feb 2021 05:04:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4957664E2B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53096 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l6RNp-0002Pw-9b for qemu-devel@archiver.kernel.org; Mon, 01 Feb 2021 00:04:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39090) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6RML-0001Wc-Fj for qemu-devel@nongnu.org; Mon, 01 Feb 2021 00:02:45 -0500 Received: from mga01.intel.com ([192.55.52.88]:15891) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6RMG-0003NA-CX for qemu-devel@nongnu.org; Mon, 01 Feb 2021 00:02:45 -0500 IronPort-SDR: H5Cm86s4xcfTLYmudWBaYEIUEu85/C9GQT5m/JPFdilAMQMGIJkCoK8F0U4oUcZh4edzopDTPE NsCposXabKkw== X-IronPort-AV: E=McAfee;i="6000,8403,9881"; a="199523989" X-IronPort-AV: E=Sophos;i="5.79,391,1602572400"; d="scan'208";a="199523989" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2021 21:01:22 -0800 IronPort-SDR: nnd3WJquSgM3mwMtYwqN1zwFoDZGaur/Sx+v/5WK7C2a/dNTk+73bgWCUkPb1j3q5Cutl2D3R+ UbidhUjHN+KQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,391,1602572400"; d="scan'208";a="390690211" Received: from clx-ap-likexu.sh.intel.com ([10.239.48.108]) by orsmga008.jf.intel.com with ESMTP; 31 Jan 2021 21:01:19 -0800 From: Like Xu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v2 1/2] target/i386: add "-cpu, lbr-fmt=*" support to enable guest LBR Date: Mon, 1 Feb 2021 12:54:52 +0800 Message-Id: <20210201045453.240258-1-like.xu@linux.intel.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Received-SPF: none client-ip=192.55.52.88; envelope-from=like.xu@linux.intel.com; helo=mga01.intel.com X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The last branch recording (LBR) is a performance monitor unit (PMU) feature on Intel processors that records a running trace of the most recent branches taken by the processor in the LBR stack. The QEMU could configure whether it's enabled or not for each guest via CLI. The LBR feature would be enabled on the guest if: - the KVM is enabled and the PMU is enabled and, - the msr-based-feature IA32_PERF_CAPABILITIES is supporterd on KVM and, - the supported returned value for lbr_fmt from this msr is not zero and, - the requested guest vcpu model does support FEAT_1_ECX.CPUID_EXT_PDCM, - the configured lbr-fmt value is the same as the host lbr_fmt value or use the QEMU option "-cpu host,migratable=no". Cc: Eduardo Habkost Cc: Paolo Bonzini Signed-off-by: Like Xu --- target/i386/cpu.c | 16 ++++++++++++++++ target/i386/cpu.h | 10 ++++++++++ target/i386/kvm/kvm.c | 5 +++-- 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ae89024d36..80a5d3f0c2 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6504,6 +6504,13 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool verbose) x86_cpu_get_supported_feature_word(w, false); uint64_t requested_features = env->features[w]; uint64_t unavailable_features = requested_features & ~host_feat; + if (kvm_enabled() && w == FEAT_PERF_CAPABILITIES && + (requested_features & PERF_CAP_LBR_FMT)) { + if ((host_feat & PERF_CAP_LBR_FMT) != + (requested_features & PERF_CAP_LBR_FMT)) { + unavailable_features |= PERF_CAP_LBR_FMT; + } + } mark_unavailable_features(cpu, w, unavailable_features, prefix); } @@ -6611,6 +6618,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } } + if (cpu->lbr_fmt) { + if (!cpu->enable_pmu) { + error_setg(errp, "LBR is unsupported since guest PMU is disabled."); + return; + } + env->features[FEAT_PERF_CAPABILITIES] |= cpu->lbr_fmt; + } + /* mwait extended info: needed for Core compatibility */ /* We always wake on interrupt even if host does not have the capability */ cpu->mwait.ecx |= CPUID_MWAIT_EMX | CPUID_MWAIT_IBE; @@ -7184,6 +7199,7 @@ static Property x86_cpu_properties[] = { #endif DEFINE_PROP_INT32("node-id", X86CPU, node_id, CPU_UNSET_NUMA_NODE_ID), DEFINE_PROP_BOOL("pmu", X86CPU, enable_pmu, false), + DEFINE_PROP_UINT8("lbr-fmt", X86CPU, lbr_fmt, 0), DEFINE_PROP_UINT32("hv-spinlocks", X86CPU, hyperv_spinlock_attempts, HYPERV_SPINLOCK_NEVER_NOTIFY), diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d23a5b340a..64320bced2 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -354,6 +354,7 @@ typedef enum X86Seg { #define ARCH_CAP_TSX_CTRL_MSR (1<<7) #define MSR_IA32_PERF_CAPABILITIES 0x345 +#define PERF_CAP_LBR_FMT 0x3f #define MSR_IA32_TSX_CTRL 0x122 #define MSR_IA32_TSCDEADLINE 0x6e0 @@ -1709,6 +1710,15 @@ struct X86CPU { */ bool enable_pmu; + /* + * Configure LBR_FMT bits on IA32_PERF_CAPABILITIES MSR. + * This can't be enabled by default yet because it doesn't have + * ABI stability guarantees, as it is only allowed to pass all + * LBR_FMT bits returned by kvm_arch_get_supported_msr_feature() + * (that depends on host CPU and kernel capabilities) to the guest. + */ + uint8_t lbr_fmt; + /* LMCE support can be enabled/disabled via cpu option 'lmce=on/off'. It is * disabled by default to avoid breaking migration between QEMU with * different LMCE configurations. diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6dc1ee052d..49745efb78 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2705,8 +2705,9 @@ static void kvm_msr_entry_add_perf(X86CPU *cpu, FeatureWordArray f) MSR_IA32_PERF_CAPABILITIES); if (kvm_perf_cap) { - kvm_msr_entry_add(cpu, MSR_IA32_PERF_CAPABILITIES, - kvm_perf_cap & f[FEAT_PERF_CAPABILITIES]); + kvm_perf_cap = cpu->migratable ? + (kvm_perf_cap & f[FEAT_PERF_CAPABILITIES]) : kvm_perf_cap; + kvm_msr_entry_add(cpu, MSR_IA32_PERF_CAPABILITIES, kvm_perf_cap); } } From patchwork Mon Feb 1 04:54:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Like Xu X-Patchwork-Id: 12058031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8668C433E0 for ; Mon, 1 Feb 2021 05:04:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C8B864E2A for ; Mon, 1 Feb 2021 05:04:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C8B864E2A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53134 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l6RNp-0002RM-Af for qemu-devel@archiver.kernel.org; Mon, 01 Feb 2021 00:04:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6RMN-0001Wj-PX for qemu-devel@nongnu.org; Mon, 01 Feb 2021 00:02:47 -0500 Received: from mga01.intel.com ([192.55.52.88]:15891) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6RML-0003NA-S1 for qemu-devel@nongnu.org; Mon, 01 Feb 2021 00:02:47 -0500 IronPort-SDR: xJ4Sho8vQCjMpLe9+JT2O6HQNn3H0DRaG/yfZPaC5tIa3DHdKHVq3NIzdHtwGyD3miuXy1W9Jk 4Ewzw+6rGGTw== X-IronPort-AV: E=McAfee;i="6000,8403,9881"; a="199523990" X-IronPort-AV: E=Sophos;i="5.79,391,1602572400"; d="scan'208";a="199523990" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2021 21:01:22 -0800 IronPort-SDR: TrJipL50C9kzAIHzlR6VRHMU+k3JBIzUgZPSrGloCmBk8kyzDXXVon5b/t8P8fMHZjTytVEC/3 Xul0MrHzS9dA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,391,1602572400"; d="scan'208";a="390690218" Received: from clx-ap-likexu.sh.intel.com ([10.239.48.108]) by orsmga008.jf.intel.com with ESMTP; 31 Jan 2021 21:01:21 -0800 From: Like Xu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v2 2/2] target/i386: add kvm_exact_match_flags to FeatureWordInfo Date: Mon, 1 Feb 2021 12:54:53 +0800 Message-Id: <20210201045453.240258-2-like.xu@linux.intel.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210201045453.240258-1-like.xu@linux.intel.com> References: <20210201045453.240258-1-like.xu@linux.intel.com> MIME-Version: 1.0 Received-SPF: none client-ip=192.55.52.88; envelope-from=like.xu@linux.intel.com; helo=mga01.intel.com X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Eduardo has a suggestion: instead of hardcoding the PERF_CAPABILITIES rules in this loop, this could become a FeatureWordInfo field. It would be very useful for other features like intel-pt, where we need some bits to match the host too. Suggested-by: Eduardo Habkost Signed-off-by: Like Xu --- target/i386/cpu.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 80a5d3f0c2..8eaa5879ea 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -708,6 +708,8 @@ typedef struct FeatureWordInfo { uint64_t migratable_flags; /* Feature flags known to be migratable */ /* Features that shouldn't be auto-enabled by "-cpu host" */ uint64_t no_autoenable_flags; + /* Bits that must match host exactly when using KVM */ + uint64_t kvm_exact_match_flags; } FeatureWordInfo; static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { @@ -1147,6 +1149,11 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .msr = { .index = MSR_IA32_PERF_CAPABILITIES, }, + /* + * KVM is not able to emulate a VCPU with LBR_FMT different + * from the host, so LBR_FMT must match the host exactly. + */ + .kvm_exact_match_flags = PERF_CAP_LBR_FMT, }, [FEAT_VMX_PROCBASED_CTLS] = { @@ -6500,16 +6507,18 @@ static void x86_cpu_filter_features(X86CPU *cpu, bool verbose) } for (w = 0; w < FEATURE_WORDS; w++) { + FeatureWordInfo *fi = &feature_word_info[w]; + uint64_t match_flags = fi->kvm_exact_match_flags; uint64_t host_feat = x86_cpu_get_supported_feature_word(w, false); uint64_t requested_features = env->features[w]; uint64_t unavailable_features = requested_features & ~host_feat; - if (kvm_enabled() && w == FEAT_PERF_CAPABILITIES && - (requested_features & PERF_CAP_LBR_FMT)) { - if ((host_feat & PERF_CAP_LBR_FMT) != - (requested_features & PERF_CAP_LBR_FMT)) { - unavailable_features |= PERF_CAP_LBR_FMT; - } + if (kvm_enabled() && match_flags) { + uint64_t mismatches = (requested_features & match_flags) && + (requested_features ^ host_feat) & match_flags; + mark_unavailable_features(cpu, w, + mismatches, "feature doesn't match host"); + unavailable_features &= ~match_flags; } mark_unavailable_features(cpu, w, unavailable_features, prefix); }