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08 Feb 2021 17:55:27 -0800 IronPort-SDR: qM79qve4QzL6KrqsbEyzImNBo5OJJkyy+jlkOaaN9FxjA+URuEACSPM8FND0yH0MmpbWbbb0cj 97lAevIPHOpgM8kR2/CUeKtAFDXxAuOVp09PP/fafgMDRW0FUpsDbzPE+M4b3142Hc4rPYq45i AupSy5K4n14QYN4qOWDYAzL6U/wzFo3d/8LWDbRTlGdFErX6079bKLHJSCBdAh+5cHBvPRn0Mi h/w8XHDwwVBjFr0hiGHl4ijlF4C6MXcjxdTowqdJ97+JJAY1YjG6h5QF9Emwql6gYi+qkzHft/ yGk= WDCIronportException: Internal Received: from ilb000836.ad.shared (HELO alistair-risc6-laptop.hgst.com) ([10.86.63.217]) by uls-op-cesaip01.wdc.com with ESMTP; 08 Feb 2021 18:11:39 -0800 From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v1 1/1] MAINTAINERS: Add a SiFIve machine section Date: Mon, 8 Feb 2021 18:11:27 -0800 Message-Id: <6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alistair.francis@wdc.com> X-Mailer: git-send-email 2.30.0 MIME-Version: 1.0 Received-SPF: pass client-ip=68.232.143.124; envelope-from=prvs=667b40a3b=alistair.francis@wdc.com; helo=esa2.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair.francis@wdc.com, bmeng.cn@gmail.com, palmer@dabbelt.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alistair Francis Acked-by: Bin Meng Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8d8b0bf966..c347d49bd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1359,6 +1359,15 @@ F: include/hw/misc/mchp_pfsoc_dmc.h F: include/hw/misc/mchp_pfsoc_ioscb.h F: include/hw/misc/mchp_pfsoc_sysreg.h +SiFive Machines +M: Alistair Francis +M: Bin Meng +M: Palmer Dabbelt +L: qemu-riscv@nongnu.org +S: Supported +F: hw/*/*sifive*.c +F: include/hw/*/*sifive*.h + RX Machines ----------- rx-gdbsim