From patchwork Tue Feb 9 19:36:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12079015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AA1CC433DB for ; Tue, 9 Feb 2021 19:46:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C15B564EDE for ; Tue, 9 Feb 2021 19:46:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233608AbhBITml (ORCPT ); Tue, 9 Feb 2021 14:42:41 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38594 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233704AbhBITkK (ORCPT ); Tue, 9 Feb 2021 14:40:10 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 119Jb0N7021006; Tue, 9 Feb 2021 13:37:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1612899420; bh=L+EEqaOk39l/ZK4/cPCownGGhtcahLhY6Hqaye2jMSw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nTXw431atg3CpzIkKKPonnVVZR4eM0vjE8XBfgnuQcTm5r+zlZCjATmpaTDwFtisr s/1MV9rUe6GlToKp/wzwEe1bxtyl0Ibf40ua3d/dRDZfLgqlbUVal9aqIDxJTuVFBc un6uyw7doYYPD1jBt6xZqSoJA2ctyq+jvOLebsgE= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 119JaxN0054756 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 Feb 2021 13:36:59 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 9 Feb 2021 13:36:59 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 9 Feb 2021 13:36:59 -0600 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 119JaxsS117600; Tue, 9 Feb 2021 13:36:59 -0600 Received: from localhost ([10.250.35.110]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 119JaxQW082160; Tue, 9 Feb 2021 13:36:59 -0600 From: Suman Anna To: Jassi Brar , Rob Herring CC: , , , , Suman Anna Subject: [PATCH v2 1/2] dt-bindings: mailbox: omap: Update binding for AM64x SoCs Date: Tue, 9 Feb 2021 13:36:42 -0600 Message-ID: <20210209193643.24824-2-s-anna@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210209193643.24824-1-s-anna@ti.com> References: <20210209193643.24824-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Update the existing OMAP Mailbox binding to include the info for AM64x SoCs. There are some minor IP integration differences between the AM64x SoCs and the previous AM65x and J721E SoC families. Signed-off-by: Suman Anna Acked-by: Rob Herring --- v2: Remove AM64x example as per Rob's comments v1: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210127195600.23501-2-s-anna@ti.com/ Documentation/devicetree/bindings/mailbox/omap-mailbox.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt index 5fe80c1c19fc..12371f5c6cd9 100644 --- a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt +++ b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt @@ -28,6 +28,9 @@ SoCs has each of these instances form a cluster and combine multiple clusters into a single IP block present within the Main NavSS. The interrupt lines from all these clusters are multiplexed and routed to different processor subsystems over a limited number of common interrupt output lines of an Interrupt Router. +The AM64x SoCS also uses a single IP block comprising of multiple clusters, +but the number of clusters are smaller, and the interrupt output lines are +connected directly to various processors. Mailbox Device Node: ==================== @@ -42,6 +45,7 @@ Required properties: "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, AM43xx and DRA7xx SoCs "ti,am654-mailbox" for K3 AM65x and J721E SoCs + "ti,am64-mailbox" for K3 AM64x SoCs - reg: Contains the mailbox register address range (base address and length) - interrupts: Contains the interrupt information for the mailbox From patchwork Tue Feb 9 19:36:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12079017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAC36C433E0 for ; Tue, 9 Feb 2021 19:46:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6BE9564EAC for ; Tue, 9 Feb 2021 19:46:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233035AbhBITpH (ORCPT ); Tue, 9 Feb 2021 14:45:07 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38610 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233722AbhBITkK (ORCPT ); Tue, 9 Feb 2021 14:40:10 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 119Jb6fX021023; Tue, 9 Feb 2021 13:37:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1612899427; bh=L9YNORugLibqxGGcKUb7I7kHap34krhtwxZBPRsk79I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=A8FoptXT3H0vp39VQ0D4plELeFt6ZT38OLGqyM0GcgoCP2faAwuDMTExeAHDGdu2Y 58OENQU/gh9e/HqteVyj7m+UgBbiyK60KvJJTNEUcsRpyqrraLweaIttrrrn7vgf7F 0pEUzoDudHd855vMXQgfUyJon1bL5Fm0JYnayjCk= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 119Jb6Jo115654 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 Feb 2021 13:37:06 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 9 Feb 2021 13:37:06 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 9 Feb 2021 13:37:06 -0600 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 119Jb6Q1080251; Tue, 9 Feb 2021 13:37:06 -0600 Received: from localhost ([10.250.35.110]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 119Jb6Ah082592; Tue, 9 Feb 2021 13:37:06 -0600 From: Suman Anna To: Jassi Brar , Rob Herring CC: , , , , Suman Anna Subject: [PATCH v2 2/2] mailbox: omap: Add support for K3 AM64x SoCs Date: Tue, 9 Feb 2021 13:36:43 -0600 Message-ID: <20210209193643.24824-3-s-anna@ti.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210209193643.24824-1-s-anna@ti.com> References: <20210209193643.24824-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM64x SoC contains a Mailbox IP instance with multiple clusters in the MAIN domain, and is a variant of the IP on current AM65x and J721E SoCs. The AM64x SoC has only 8 clusters with no interrupts routed to the A53 core on the first 2 clusters. The interrupt outputs from the IP do not go through any Interrupt Routers and are hard-wired to each processor, with only couple of interrupts from each cluster reaching the A53 core. The IP is also not built with the K3 safety feature in hardware. Add the support for this IP through a new compatible. Signed-off-by: Suman Anna --- v2: No changes drivers/mailbox/omap-mailbox.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mailbox/omap-mailbox.c b/drivers/mailbox/omap-mailbox.c index 93fe08aef3ca..7295e3835e30 100644 --- a/drivers/mailbox/omap-mailbox.c +++ b/drivers/mailbox/omap-mailbox.c @@ -3,7 +3,7 @@ * OMAP mailbox driver * * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. - * Copyright (C) 2013-2019 Texas Instruments Incorporated - https://www.ti.com + * Copyright (C) 2013-2021 Texas Instruments Incorporated - https://www.ti.com * * Contact: Hiroshi DOYU * Suman Anna @@ -663,6 +663,10 @@ static const struct of_device_id omap_mailbox_of_match[] = { .compatible = "ti,am654-mailbox", .data = &omap4_data, }, + { + .compatible = "ti,am64-mailbox", + .data = &omap4_data, + }, { /* end */ },