From patchwork Fri Feb 12 13:19:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12085287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63CD0C433E0 for ; Fri, 12 Feb 2021 13:21:37 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 17B2264E02 for ; Fri, 12 Feb 2021 13:21:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 17B2264E02 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=KRD0s4ARAyJv2sV8LY0JhVEw+kUfEmr2sezOV+aZ3Zw=; b=TjcwrKwKRWXbJ6+eGQlHqCbhi wzRKTqxKYnORMrEBphmxCax0lxKed/438jdIn8sJtxi1cs2Ygz6i22Cb8249JfgjcqMTMzEg9vasW /atLprqYyjsZAnm434CXRAjcuNRv9gsTx6vh+XHy2laM0Aai0p2khnYroF5HXKBi0lwJdg4pI+K+e FJAyVlpG4XJrUzCB+Ve0iOyLromruE4CwijgKoKCRgFgEX+6fmvCzS3TserwQJB56pSGmsD91hNVZ 4Nq7dt5rghdZbTNm7v9TefyOEI4xZ7lcddC+azbNirYsx5bBbUHghkoY5uuHIKAobWc01xdRYGCHq T26ybrUFg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lAYML-0002HZ-MK; Fri, 12 Feb 2021 13:19:45 +0000 Received: from mo-csw1114.securemx.jp ([210.130.202.156] helo=mo-csw.securemx.jp) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lAYMF-0002Fu-BE for linux-arm-kernel@lists.infradead.org; Fri, 12 Feb 2021 13:19:40 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1114) id 11CDJS4j014513; Fri, 12 Feb 2021 22:19:28 +0900 X-Iguazu-Qid: 2wGqn5DuWpbZZCpp4q X-Iguazu-QSIG: v=2; s=0; t=1613135968; q=2wGqn5DuWpbZZCpp4q; m=Z20x/stw9IjYjNipnTj02kjN3WwyptGZtjzUyhmYWYQ= Received: from imx2.toshiba.co.jp (imx2.toshiba.co.jp [106.186.93.51]) by relay.securemx.jp (mx-mr1110) id 11CDJR6o026389; Fri, 12 Feb 2021 22:19:27 +0900 Received: from enc01.toshiba.co.jp ([106.186.93.100]) by imx2.toshiba.co.jp with ESMTP id 11CDJRA3018973; Fri, 12 Feb 2021 22:19:27 +0900 (JST) Received: from hop001.toshiba.co.jp ([133.199.164.63]) by enc01.toshiba.co.jp with ESMTP id 11CDJQRC001989; Fri, 12 Feb 2021 22:19:26 +0900 From: Nobuhiro Iwamatsu To: Rob Herring , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones Subject: [PATCH v2 1/2] dt-bindings: pwm: Add bindings for Toshiba Visconti PWM Controller Date: Fri, 12 Feb 2021 22:19:09 +0900 X-TSB-HOP: ON Message-Id: <20210212131910.557581-2-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.30.0.rc2 In-Reply-To: <20210212131910.557581-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20210212131910.557581-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210212_081939_815252_C77AE714 X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Nobuhiro Iwamatsu , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add bindings for the Toshiba Visconti PWM Controller. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Rob Herring --- .../bindings/pwm/toshiba,pwm-visconti.yaml | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml diff --git a/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml new file mode 100644 index 000000000000..f11558cdc32f --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/toshiba,pwm-visconti.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/toshiba,pwm-visconti.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti PWM Controller + +maintainers: + - Nobuhiro Iwamatsu + +properties: + compatible: + items: + - const: toshiba,pwm-visconti + + reg: + maxItems: 1 + + '#pwm-cells': + const: 2 + +required: + - compatible + - reg + - '#pwm-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + pwm: pwm@241c0000 { + compatible = "toshiba,pwm-visconti"; + reg = <0 0x241c0000 0 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_mux>; + #pwm-cells = <2>; + }; + }; From patchwork Fri Feb 12 13:19:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12085291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07589C433E0 for ; Fri, 12 Feb 2021 13:21:40 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E72D64E6B for ; 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Fri, 12 Feb 2021 22:19:26 +0900 From: Nobuhiro Iwamatsu To: Rob Herring , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones Subject: [PATCH v2 2/2] pwm: visconti: Add Toshiba Visconti SoC PWM support Date: Fri, 12 Feb 2021 22:19:10 +0900 X-TSB-HOP: ON Message-Id: <20210212131910.557581-3-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.30.0.rc2 In-Reply-To: <20210212131910.557581-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20210212131910.557581-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210212_081938_233105_BE1A662E X-CRM114-Status: GOOD ( 23.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Nobuhiro Iwamatsu , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add driver for the PWM controller on Toshiba Visconti ARM SoC. Signed-off-by: Nobuhiro Iwamatsu --- drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-visconti.c | 173 +++++++++++++++++++++++++++++++++++++ 3 files changed, 183 insertions(+) create mode 100644 drivers/pwm/pwm-visconti.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 9a4f66ae8070..8ae68d6203fb 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -601,6 +601,15 @@ config PWM_TWL_LED To compile this driver as a module, choose M here: the module will be called pwm-twl-led. +config PWM_VISCONTI + tristate "Toshiba Visconti PWM support" + depends on ARCH_VISCONTI || COMPILE_TEST + help + PWM Subsystem driver support for Toshiba Visconti SoCs. + + To compile this driver as a module, choose M here: the module + will be called pwm-visconti. + config PWM_VT8500 tristate "vt8500 PWM support" depends on ARCH_VT8500 || COMPILE_TEST diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 6374d3b1d6f3..d43b1e17e8e1 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -56,4 +56,5 @@ obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o obj-$(CONFIG_PWM_TWL) += pwm-twl.o obj-$(CONFIG_PWM_TWL_LED) += pwm-twl-led.o +obj-$(CONFIG_PWM_VISCONTI) += pwm-visconti.o obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o diff --git a/drivers/pwm/pwm-visconti.c b/drivers/pwm/pwm-visconti.c new file mode 100644 index 000000000000..2aa140f1ec04 --- /dev/null +++ b/drivers/pwm/pwm-visconti.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Toshiba Visconti pulse-width-modulation controller driver + * + * Copyright (c) 2020 TOSHIBA CORPORATION + * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation + * + * Authors: Nobuhiro Iwamatsu + * + */ + +#include +#include +#include +#include +#include +#include + + +#define PIPGM_PCSR(ch) (0x400 + 4 * (ch)) +#define PIPGM_PDUT(ch) (0x420 + 4 * (ch)) +#define PIPGM_PWMC(ch) (0x440 + 4 * (ch)) + +#define PIPGM_PWMC_PWMACT BIT(5) +#define PIPGM_PWMC_CLK_MASK GENMASK(1, 0) +#define PIPGM_PWMC_POLARITY_MASK GENMASK(5, 5) +#define PIPGM_PDUT_MAX 0xFFFF + +struct visconti_pwm_chip { + struct pwm_chip chip; + void __iomem *base; +}; + +#define to_visconti_chip(chip) \ + container_of(chip, struct visconti_pwm_chip, chip) + +static int visconti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) +{ + struct visconti_pwm_chip *priv = to_visconti_chip(chip); + u32 period, duty, pwmc0; + + dev_dbg(chip->dev, "%s: ch = %d en = %d p = 0x%llx d = 0x%llx\n", __func__, + pwm->hwpwm, state->enabled, state->period, state->duty_cycle); + + /* + * pwmc is a 2-bit divider for the input clock running at 1 MHz. + * When the settings of the PWM are modified, the new values are shadowed in hardware until + * the period register (PCSR) is written and the currently running period is completed. This + * way the hardware switches atomically from the old setting to the new. + * Also, disabling the hardware completes the currently running period and keeps the output + * at low level at all times. + */ + if (!state->enabled) { + writel(0, priv->base + PIPGM_PCSR(pwm->hwpwm)); + return 0; + } + + period = state->period / NSEC_PER_USEC; + duty = state->duty_cycle / NSEC_PER_USEC; + if (period < 0x10000) + pwmc0 = 0; + else if (period < 0x20000) + pwmc0 = 1; + else if (period < 0x40000) + pwmc0 = 2; + else if (period < 0x80000) + pwmc0 = 3; + else + return -EINVAL; + + if (duty > PIPGM_PDUT_MAX) + return -EINVAL; + + period >>= pwmc0; + duty >>= pwmc0; + + if (state->polarity == PWM_POLARITY_INVERSED) + pwmc0 |= PIPGM_PWMC_PWMACT; + + writel(pwmc0, priv->base + PIPGM_PWMC(pwm->hwpwm)); + writel(duty, priv->base + PIPGM_PDUT(pwm->hwpwm)); + writel(period, priv->base + PIPGM_PCSR(pwm->hwpwm)); + + return 0; +} + +static void visconti_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + struct visconti_pwm_chip *priv = to_visconti_chip(chip); + u32 period, duty, pwmc0, pwmc0_clk; + + period = readl(priv->base + PIPGM_PCSR(pwm->hwpwm)); + if (period) + state->enabled = true; + else + state->enabled = false; + + duty = readl(priv->base + PIPGM_PDUT(pwm->hwpwm)); + pwmc0 = readl(priv->base + PIPGM_PWMC(pwm->hwpwm)); + pwmc0_clk = pwmc0 & PIPGM_PWMC_CLK_MASK; + + state->period = (period << pwmc0_clk) * NSEC_PER_USEC; + state->duty_cycle = (duty << pwmc0_clk) * NSEC_PER_USEC; + if (pwmc0 & PIPGM_PWMC_POLARITY_MASK) + state->polarity = PWM_POLARITY_INVERSED; + else + state->polarity = PWM_POLARITY_NORMAL; +} + +static const struct pwm_ops visconti_pwm_ops = { + .apply = visconti_pwm_apply, + .get_state = visconti_pwm_get_state, + .owner = THIS_MODULE, +}; + +static int visconti_pwm_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct visconti_pwm_chip *priv; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + platform_set_drvdata(pdev, priv); + + priv->chip.dev = dev; + priv->chip.ops = &visconti_pwm_ops; + priv->chip.base = -1; + priv->chip.npwm = 4; + + ret = pwmchip_add(&priv->chip); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, "Cannot register visconti PWM\n"); + + dev_dbg(&pdev->dev, "visconti PWM registered\n"); + + return 0; +} + +static int visconti_pwm_remove(struct platform_device *pdev) +{ + struct visconti_pwm_chip *priv = platform_get_drvdata(pdev); + + return pwmchip_remove(&priv->chip); +} + +static const struct of_device_id visconti_pwm_of_match[] = { + { .compatible = "toshiba,pwm-visconti", }, + { } +}; +MODULE_DEVICE_TABLE(of, visconti_pwm_of_match); + +static struct platform_driver visconti_pwm_driver = { + .driver = { + .name = "pwm-visconti", + .of_match_table = visconti_pwm_of_match, + }, + .probe = visconti_pwm_probe, + .remove = visconti_pwm_remove, +}; +module_platform_driver(visconti_pwm_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Nobuhiro Iwamatsu "); +MODULE_ALIAS("platform:visconti-pwm");