From patchwork Tue Feb 23 21:45:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12100965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8A15C433E0 for ; Tue, 23 Feb 2021 21:46:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 945EC64E20 for ; Tue, 23 Feb 2021 21:46:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232046AbhBWVqZ (ORCPT ); Tue, 23 Feb 2021 16:46:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38476 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231815AbhBWVqX (ORCPT ); Tue, 23 Feb 2021 16:46:23 -0500 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F11F0C061786 for ; Tue, 23 Feb 2021 13:45:42 -0800 (PST) Received: by mail-pl1-x634.google.com with SMTP id 17so7373067pli.10 for ; Tue, 23 Feb 2021 13:45:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0m+u5aZAd9dcIGjz/xkZGfwxe/2CHxZAPhdRmcDTJ+c=; b=MQqpA6L+xv4gK1UfJbbjRa6WoukR2X4+1TPl6atilFwMyysdIrNje6ivCgKj+adw8K UAo3T3IKCAie6RVLwZ2q5K6asb9KRcfooOKn+8ZXp0YC5KG6SnCGb73ri1vnHqUV99eB C0VF4qbwETjejsIO6ROTUUqa/P/DDgSSC1KLk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0m+u5aZAd9dcIGjz/xkZGfwxe/2CHxZAPhdRmcDTJ+c=; b=iWVaCMlB+GuqgFYuqDoJMG7pIBv2jxwWD6knVfqc5hcCEKIy7HY/zvDS8DpylVLe65 POPTLAaevDsP3BFkSWtgj51znUB9ONgC3g/662Z4ACRtjZUXpjjJZUp3gO0AYwQ2f9MK Y0ooDmwMJTR9+ZiU+JdIIBQy3RZmDE8cwGIM2wcKWH71YMwLveuNq//MTigKf3wXgik3 IeJ9kQhoz14SPNs3BReXb/fE+6ee8ac3gned50XXVEpTaLBn9GgbePdMFcuzsS+/lhi1 NN0lKuTq/SqELzWtK6Rr/Wyms6Lj74b5NKbTaKJEzpQyZu5LfMAevgn6BP+rZo+JcbN9 8BnQ== X-Gm-Message-State: AOAM531AyDi16W4qy4FqNoPj2YbG0c0Qdon5TSVwkjZdpmD9FD1cdnyo cA5kbPbPkawr5q95Z+5p6yrh+A== X-Google-Smtp-Source: ABdhPJyiF11FhotGN8vvmdkM2cu1T9dli+VpxHQ/yf0ZrnPTo8yQyqgS0w6BEwxcsniRKzsPrJTbJg== X-Received: by 2002:a17:90a:ea86:: with SMTP id h6mr760077pjz.135.1614116742624; Tue, 23 Feb 2021 13:45:42 -0800 (PST) Received: from smtp.gmail.com ([2620:15c:202:201:68e6:d68b:3887:f216]) by smtp.gmail.com with ESMTPSA id r68sm137951pfc.49.2021.02.23.13.45.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Feb 2021 13:45:42 -0800 (PST) From: Stephen Boyd To: Andy Gross , Bjorn Andersson Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Brian Masney , Stephan Gerhold , Jeffrey Hugo , Douglas Anderson Subject: [PATCH 1/6] firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool Date: Tue, 23 Feb 2021 13:45:34 -0800 Message-Id: <20210223214539.1336155-2-swboyd@chromium.org> X-Mailer: git-send-email 2.30.0.617.g56c4b15f3c-goog In-Reply-To: <20210223214539.1336155-1-swboyd@chromium.org> References: <20210223214539.1336155-1-swboyd@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Make __qcom_scm_is_call_available() return bool instead of int. The function has "is" in the name, so it should return a bool to indicate the truth of the call being available. Unfortunately, it can return a number < 0 which also looks "true", but not all callers expect that and thus they think a call is available when really the check to see if the call is available failed to figure it out. Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Fixes: 0f206514749b ("scsi: firmware: qcom_scm: Add support for programming inline crypto keys") Fixes: 0434a4061471 ("firmware: qcom: scm: add support to restore secure config to qcm_scm-32") Fixes: b0a1614fb1f5 ("firmware: qcom: scm: add OCMEM lock/unlock interface") Signed-off-by: Stephen Boyd Reviewed-by: Bjorn Andersson --- drivers/firmware/qcom_scm.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index f57779fc7ee9..2be5573dce53 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -113,9 +113,6 @@ static void qcom_scm_clk_disable(void) clk_disable_unprepare(__scm->bus_clk); } -static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, - u32 cmd_id); - enum qcom_scm_convention qcom_scm_convention; static bool has_queried __read_mostly; static DEFINE_SPINLOCK(query_lock); @@ -219,8 +216,8 @@ static int qcom_scm_call_atomic(struct device *dev, } } -static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, - u32 cmd_id) +static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id, + u32 cmd_id) { int ret; struct qcom_scm_desc desc = { @@ -247,7 +244,7 @@ static int __qcom_scm_is_call_available(struct device *dev, u32 svc_id, ret = qcom_scm_call(dev, &desc, &res); - return ret ? : res.result[0]; + return ret ? false : !!res.result[0]; } /** @@ -585,9 +582,8 @@ bool qcom_scm_pas_supported(u32 peripheral) }; struct qcom_scm_res res; - ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, - QCOM_SCM_PIL_PAS_IS_SUPPORTED); - if (ret <= 0) + if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, + QCOM_SCM_PIL_PAS_IS_SUPPORTED)) return false; ret = qcom_scm_call(__scm->dev, &desc, &res); @@ -1060,17 +1056,18 @@ EXPORT_SYMBOL(qcom_scm_ice_set_key); */ bool qcom_scm_hdcp_available(void) { + bool avail; int ret = qcom_scm_clk_enable(); if (ret) return ret; - ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP, + avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP, QCOM_SCM_HDCP_INVOKE); qcom_scm_clk_disable(); - return ret > 0; + return avail; } EXPORT_SYMBOL(qcom_scm_hdcp_available); From patchwork Tue Feb 23 21:45:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12100967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23E14C433E0 for ; Tue, 23 Feb 2021 21:47:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E937564E6C for ; Tue, 23 Feb 2021 21:47:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232389AbhBWVrD (ORCPT ); Tue, 23 Feb 2021 16:47:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230268AbhBWVrC (ORCPT ); Tue, 23 Feb 2021 16:47:02 -0500 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F9E9C06178C for ; Tue, 23 Feb 2021 13:45:44 -0800 (PST) Received: by mail-pf1-x42b.google.com with SMTP id j12so9674295pfj.12 for ; Tue, 23 Feb 2021 13:45:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2Tx6PpXqyldYGLFbNHsTHVpykMytzBwI2ywunG7WWQc=; b=NDsJA6rX7vmtl4tSNItgvJx0TzTU5RypxDLyOD7YWMhybpDTwoEI24kVAt6CJ+Dwmt GirsVaDp0a5RKqYUscnRHJupJIfUB/0xDAcbG4hQw7ElvL2zjcrqBpyqJtN4jNXMs7zW dTE2523urD/n4wWysH5o3KyBrOd5DrwG4ImxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2Tx6PpXqyldYGLFbNHsTHVpykMytzBwI2ywunG7WWQc=; b=q8uXVUzAQkRW9N7o8WPQWO7jxznkYSgfzOh+sI45ImlzD87y8iDFMD73/MCDtTOOBt G0XhJj7OwslMKJnt9Jdqo6lJ4Dlzs8y++dsNAYiWm4aIpgE7kFAzhISK2AyABaiqTn5z Oxl4RE3pXSqRpTCK6QniVV50I5Q1wNgUqoL7QA0sKLP21KIbh0YKcTijlW9DoOkG+/Pb Z7LQqhsqKHMOT4SmjUXJ4Rz6VXQEYIXZLjuPEOkKXst8ccM4avFiALbG/Og93LBcrDYY IbgmKqG8GhL9oT/fLW/xH0e4iduXPmsnSIXATQhmQCR0OiV6wAZOORQ/JefiZ6wIdKq4 O+lw== X-Gm-Message-State: AOAM533p9QNNNoSDkogOKGfghcqS6EQAHtaETglho9Udeh3IECHPCfGR E4nAo4DfaYq8gLAlDvsZJSP5qg== X-Google-Smtp-Source: ABdhPJyZwrOprIzdvmcveFi7XyRmyoLKXPntzsi7yqJR4dS6RSmbWCWnn1Kn6QiuHpADj0GznlJV8w== X-Received: by 2002:a62:1896:0:b029:197:491c:be38 with SMTP id 144-20020a6218960000b0290197491cbe38mr28273517pfy.15.1614116743837; Tue, 23 Feb 2021 13:45:43 -0800 (PST) Received: from smtp.gmail.com ([2620:15c:202:201:68e6:d68b:3887:f216]) by smtp.gmail.com with ESMTPSA id r68sm137951pfc.49.2021.02.23.13.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Feb 2021 13:45:43 -0800 (PST) From: Stephen Boyd To: Andy Gross , Bjorn Andersson Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Brian Masney , Stephan Gerhold , Jeffrey Hugo , Douglas Anderson Subject: [PATCH 2/6] firmware: qcom_scm: Reduce locking section for __get_convention() Date: Tue, 23 Feb 2021 13:45:35 -0800 Message-Id: <20210223214539.1336155-3-swboyd@chromium.org> X-Mailer: git-send-email 2.30.0.617.g56c4b15f3c-goog In-Reply-To: <20210223214539.1336155-1-swboyd@chromium.org> References: <20210223214539.1336155-1-swboyd@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We shouldn't need to hold this spinlock here around the entire SCM call into the firmware and back. Instead, we should be able to query the firmware, potentially in parallel with other CPUs making the same convention detection firmware call, and then grab the lock to update the calling convention detected. The convention doesn't change at runtime so calling into firmware more than once is possibly wasteful but simpler. Besides, this is the slow path, not the fast path where we've already detected the convention used. More importantly, this allows us to add more logic here to workaround the case where the firmware call to check for availability isn't implemented in the firmware at all. In that case we can check the firmware node compatible string and force a calling convention. Note that we remove the 'has_queried' logic that is repeated twice. That could lead to the calling convention being printed multiple times to the kernel logs if the bool is true but __query_convention() is running on multiple CPUs. We also shorten the time where the lock is held, but we keep the lock held around the printk because it doesn't seem hugely important to drop it for that. Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Fixes: 9a434cee773a ("firmware: qcom_scm: Dynamically support SMCCC and legacy conventions") Signed-off-by: Stephen Boyd --- drivers/firmware/qcom_scm-smc.c | 12 ++++--- drivers/firmware/qcom_scm.c | 55 ++++++++++++++++----------------- drivers/firmware/qcom_scm.h | 7 +++-- 3 files changed, 39 insertions(+), 35 deletions(-) diff --git a/drivers/firmware/qcom_scm-smc.c b/drivers/firmware/qcom_scm-smc.c index 497c13ba98d6..d111833364ba 100644 --- a/drivers/firmware/qcom_scm-smc.c +++ b/drivers/firmware/qcom_scm-smc.c @@ -77,8 +77,10 @@ static void __scm_smc_do(const struct arm_smccc_args *smc, } while (res->a0 == QCOM_SCM_V2_EBUSY); } -int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, - struct qcom_scm_res *res, bool atomic) + +int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, + enum qcom_scm_convention qcom_convention, + struct qcom_scm_res *res, bool atomic) { int arglen = desc->arginfo & 0xf; int i; @@ -87,9 +89,8 @@ int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, size_t alloc_len; gfp_t flag = atomic ? GFP_ATOMIC : GFP_KERNEL; u32 smccc_call_type = atomic ? ARM_SMCCC_FAST_CALL : ARM_SMCCC_STD_CALL; - u32 qcom_smccc_convention = - (qcom_scm_convention == SMC_CONVENTION_ARM_32) ? - ARM_SMCCC_SMC_32 : ARM_SMCCC_SMC_64; + u32 qcom_smccc_convention = (qcom_convention == SMC_CONVENTION_ARM_32) ? + ARM_SMCCC_SMC_32 : ARM_SMCCC_SMC_64; struct arm_smccc_res smc_res; struct arm_smccc_args smc = {0}; @@ -148,4 +149,5 @@ int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, } return (long)smc_res.a0 ? qcom_scm_remap_error(smc_res.a0) : 0; + } diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 2be5573dce53..21e07a464bd9 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -113,11 +113,10 @@ static void qcom_scm_clk_disable(void) clk_disable_unprepare(__scm->bus_clk); } -enum qcom_scm_convention qcom_scm_convention; -static bool has_queried __read_mostly; -static DEFINE_SPINLOCK(query_lock); +enum qcom_scm_convention qcom_scm_convention = SMC_CONVENTION_UNKNOWN; +static DEFINE_SPINLOCK(scm_query_lock); -static void __query_convention(void) +static enum qcom_scm_convention __get_convention(void) { unsigned long flags; struct qcom_scm_desc desc = { @@ -130,36 +129,36 @@ static void __query_convention(void) .owner = ARM_SMCCC_OWNER_SIP, }; struct qcom_scm_res res; + enum qcom_scm_convention probed_convention; int ret; - spin_lock_irqsave(&query_lock, flags); - if (has_queried) - goto out; + if (likely(qcom_scm_convention != SMC_CONVENTION_UNKNOWN)) + return qcom_scm_convention; - qcom_scm_convention = SMC_CONVENTION_ARM_64; - // Device isn't required as there is only one argument - no device - // needed to dma_map_single to secure world - ret = scm_smc_call(NULL, &desc, &res, true); + /* + * Device isn't required as there is only one argument - no device + * needed to dma_map_single to secure world + */ + probed_convention = SMC_CONVENTION_ARM_64; + ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true); if (!ret && res.result[0] == 1) - goto out; + goto found; - qcom_scm_convention = SMC_CONVENTION_ARM_32; - ret = scm_smc_call(NULL, &desc, &res, true); + probed_convention = SMC_CONVENTION_ARM_32; + ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true); if (!ret && res.result[0] == 1) - goto out; - - qcom_scm_convention = SMC_CONVENTION_LEGACY; -out: - has_queried = true; - spin_unlock_irqrestore(&query_lock, flags); - pr_info("qcom_scm: convention: %s\n", - qcom_scm_convention_names[qcom_scm_convention]); -} + goto found; + + probed_convention = SMC_CONVENTION_LEGACY; +found: + spin_lock_irqsave(&scm_query_lock, flags); + if (probed_convention != qcom_scm_convention) { + qcom_scm_convention = probed_convention; + pr_info("qcom_scm: convention: %s\n", + qcom_scm_convention_names[qcom_scm_convention]); + } + spin_unlock_irqrestore(&scm_query_lock, flags); -static inline enum qcom_scm_convention __get_convention(void) -{ - if (unlikely(!has_queried)) - __query_convention(); return qcom_scm_convention; } @@ -1239,7 +1238,7 @@ static int qcom_scm_probe(struct platform_device *pdev) __scm = scm; __scm->dev = &pdev->dev; - __query_convention(); + __get_convention(); /* * If requested enable "download mode", from this point on warmboot diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 95cd1ac30ab0..632fe3142462 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -61,8 +61,11 @@ struct qcom_scm_res { }; #define SCM_SMC_FNID(s, c) ((((s) & 0xFF) << 8) | ((c) & 0xFF)) -extern int scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, - struct qcom_scm_res *res, bool atomic); +extern int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, + enum qcom_scm_convention qcom_convention, + struct qcom_scm_res *res, bool atomic); +#define scm_smc_call(dev, desc, res, atomic) \ + __scm_smc_call((dev), (desc), qcom_scm_convention, (res), (atomic)) #define SCM_LEGACY_FNID(s, c) (((s) << 10) | ((c) & 0x3ff)) extern int scm_legacy_call_atomic(struct device *dev, From patchwork Tue Feb 23 21:45:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12100969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10A56C433E0 for ; Tue, 23 Feb 2021 21:47:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE60564E20 for ; Tue, 23 Feb 2021 21:47:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232443AbhBWVrF (ORCPT ); Tue, 23 Feb 2021 16:47:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232306AbhBWVrC (ORCPT ); Tue, 23 Feb 2021 16:47:02 -0500 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DA78C061794 for ; Tue, 23 Feb 2021 13:45:45 -0800 (PST) Received: by mail-pf1-x42f.google.com with SMTP id w18so9677487pfu.9 for ; Tue, 23 Feb 2021 13:45:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tqWQhT3LjBz5MByIC+aXJToZ1jZ2b58/ZuDpVrbD+Uo=; b=Y/jL/5NhCl6kU+DaTLgVV6B8EkXtSb37eblUKcVW8JjbDaqdAo6oQ6glZf3vUe+i+N 9j9IM24PzKejIsunuWX5gdlecz8ZDBWOgV3zYKDJlChOfRinURMmxSZE1bWB7JSbP0wO 2yGti4I1CX8vc8Szvs6L+bsxKCtk0rzj7C9Qc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tqWQhT3LjBz5MByIC+aXJToZ1jZ2b58/ZuDpVrbD+Uo=; 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We detect the legacy calling convention on these firmwares, because the availability call always fails and legacy is the fallback. This leads to problems where the rmtfs driver fails to probe, because it tries to assign memory with a bad calling convention, which then leads to modem failing to load and all networking, even wifi, to fail. Ouch! Let's force the calling convention to be what it always is on this SoC, i.e. arm64. Of course, the calling convention is not the same thing as implementing the QCOM_SCM_INFO_IS_CALL_AVAIL API. The absence of the "is this call available" API from the firmware means that any call to __qcom_scm_is_call_available() fails. This is OK for now though because none of the calls that are checked for existence are implemented on firmware running on sc7180. If such a call needs to be checked for existence in the future, we presume that firmware will implement this API and then things will "just work". Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Fixes: 9a434cee773a ("firmware: qcom_scm: Dynamically support SMCCC and legacy conventions") Signed-off-by: Stephen Boyd --- drivers/firmware/qcom_scm.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 21e07a464bd9..9ac84b5d6ce0 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -131,6 +131,7 @@ static enum qcom_scm_convention __get_convention(void) struct qcom_scm_res res; enum qcom_scm_convention probed_convention; int ret; + bool forced = false; if (likely(qcom_scm_convention != SMC_CONVENTION_UNKNOWN)) return qcom_scm_convention; @@ -144,6 +145,18 @@ static enum qcom_scm_convention __get_convention(void) if (!ret && res.result[0] == 1) goto found; + /* + * Some SC7180 firmwares didn't implement the + * QCOM_SCM_INFO_IS_CALL_AVAIL call, so we fallback to forcing ARM_64 + * calling conventions on these firmwares. Luckily we don't make any + * early calls into the firmware on these SoCs so the device pointer + * will be valid here to check if the compatible matches. + */ + if (of_device_is_compatible(__scm ? __scm->dev->of_node : NULL, "qcom,scm-sc7180")) { + forced = true; + goto found; + } + probed_convention = SMC_CONVENTION_ARM_32; ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true); if (!ret && res.result[0] == 1) @@ -154,8 +167,9 @@ static enum qcom_scm_convention __get_convention(void) spin_lock_irqsave(&scm_query_lock, flags); if (probed_convention != qcom_scm_convention) { qcom_scm_convention = probed_convention; - pr_info("qcom_scm: convention: %s\n", - qcom_scm_convention_names[qcom_scm_convention]); + pr_info("qcom_scm: convention: %s%s\n", + qcom_scm_convention_names[qcom_scm_convention], + forced ? " (forced)" : ""); } spin_unlock_irqrestore(&scm_query_lock, flags); From patchwork Tue Feb 23 21:45:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12100973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75250C433E6 for ; Tue, 23 Feb 2021 21:47:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 24C0464E20 for ; Tue, 23 Feb 2021 21:47:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232563AbhBWVrK (ORCPT ); Tue, 23 Feb 2021 16:47:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232403AbhBWVrE (ORCPT ); Tue, 23 Feb 2021 16:47:04 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A486C0617A7 for ; Tue, 23 Feb 2021 13:45:46 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id l18so2901003pji.3 for ; Tue, 23 Feb 2021 13:45:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=niEv14NOkKJjaKQaXzaP2FFAvsr9oabzdLHL5oVtiLE=; b=X/XMKNruvhykGhsqLzDERdOHohFu5lLgGpyeNxihl5H0fQgjnUGaRUMc19Oz/5l1C5 eu+qI2gBcmq7wPLOram7J5YiUELdk+UrWdW5rPLpmkcXbO7D0xU39hAOsECfMHrpFGM2 HShxLBXH3EdWfy5t8OyfqlrI6mSKLKO/jxkbc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=niEv14NOkKJjaKQaXzaP2FFAvsr9oabzdLHL5oVtiLE=; b=pD1Lu+X+lVyWEjiBvfqc/nGYIRlbfgxBRZt3LK8Qs40cOLcPS2waQ5Wb5Rvm18JQOs 9h/FIemjvxNR74MhPs9FcYkothbgYjj43+KKZkoBy6C7GsWLzlH5B7qzbpsz+wzV7KjL CAwYf9zyxwOFjzhY4WIGI+P4G7JGSAmD6AjaodQA3D7f6ybtSm6mIx/9iEAVp6ywsVnd VwGpfIvmMkQTCUTgTBtA21oCTQvvpnfalsb+ZBbki4kjG49kd4sJZVT9/bFis6hqNb4J ac3Ub/hLuv0YbH2duWWlm3vKKeFC4fgJ0blkmDpU9o+PdHG8wfje3Wdoggk5rwfNQh8Z c5rg== X-Gm-Message-State: AOAM533NNgJCDx1B+TyEAa1jG7f2WwY2qBzvrNS6WenxgzgNmpmUo6W2 wjeNpb6c5pBAQ3jiwgdQkGKRIHxMkD1jZQ== X-Google-Smtp-Source: ABdhPJyCy5ckToNt32r6CZZqwU0hn80SFbKdwiAZiGtuoCfNxwxI6Lk6ZWg+Yl33mQKD/Zao9ss+9w== X-Received: by 2002:a17:90b:941:: with SMTP id dw1mr831063pjb.35.1614116745955; Tue, 23 Feb 2021 13:45:45 -0800 (PST) Received: from smtp.gmail.com ([2620:15c:202:201:68e6:d68b:3887:f216]) by smtp.gmail.com with ESMTPSA id r68sm137951pfc.49.2021.02.23.13.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Feb 2021 13:45:45 -0800 (PST) From: Stephen Boyd To: Andy Gross , Bjorn Andersson Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Brian Masney , Stephan Gerhold , Jeffrey Hugo , Douglas Anderson Subject: [PATCH 4/6] firmware: qcom_scm: Suppress sysfs bind attributes Date: Tue, 23 Feb 2021 13:45:37 -0800 Message-Id: <20210223214539.1336155-5-swboyd@chromium.org> X-Mailer: git-send-email 2.30.0.617.g56c4b15f3c-goog In-Reply-To: <20210223214539.1336155-1-swboyd@chromium.org> References: <20210223214539.1336155-1-swboyd@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We don't want userspace ejecting this driver at runtime. Various other drivers call into this code because it provides the mechanism to communicate with the secure world on qcom SoCs. It should probe once and be present forever after that. Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Signed-off-by: Stephen Boyd --- drivers/firmware/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 9ac84b5d6ce0..ee9cb545e73b 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -1301,6 +1301,7 @@ static struct platform_driver qcom_scm_driver = { .driver = { .name = "qcom_scm", .of_match_table = qcom_scm_dt_match, + .suppress_bind_attrs = true, }, .probe = qcom_scm_probe, .shutdown = qcom_scm_shutdown, From patchwork Tue Feb 23 21:45:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12100971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45BE3C433DB for ; Tue, 23 Feb 2021 21:47:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB1B564E6C for ; Tue, 23 Feb 2021 21:47:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232495AbhBWVrI (ORCPT ); Tue, 23 Feb 2021 16:47:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232404AbhBWVrE (ORCPT ); Tue, 23 Feb 2021 16:47:04 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6457DC0617A9 for ; Tue, 23 Feb 2021 13:45:47 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id t9so2722081pjl.5 for ; Tue, 23 Feb 2021 13:45:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GZZ4+isyvvBq3J9vCBIeGrq4NjZWjQ7x1vxpr0gQR+w=; b=mEhLT0SygSoX/t28f7YrV3MrUieLIR+/jhQtl7O26XtKMpO3tVFfTMVOFa1U+44Vj3 BJl+NwKPDKmGj5CYbQImNlIikA1cNhmjRBJDoIDS3rZvrtnirAptezK05bdC6F7VZr5/ fu6h8fsBCsVgtvCXGOjHBC3ejwLZ7uus4j2j8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GZZ4+isyvvBq3J9vCBIeGrq4NjZWjQ7x1vxpr0gQR+w=; b=beBbzvORaq3SFOZXntKkm68+UbDg5bXpXq6wCfRIxI0B435kJnWXJ2NGyl6xCzBwzH G3wpqQN3t+R+eDcMpEfMXH64CHi8Xa+HQnmL1KaZ3wLE6yH6c3dwWB4gs2rcxqZKEb1F /aDcS592HUxkllG6i/cg4oOvfv/a6LdMnPdQ4TMC+5IJAFm7/SX67BCJ/hEZ6meDWq+1 DeoUMha2JVCtc9q8ah+N2z+g7WYot3GECAk/ibXga3KsFYX/knVgbBypL3ucLG8VcLOO xEkgMbbe0FLecPQGaqZo3N/ZWMgN2+UTTGVCzvUUoCorHhFguBwAu9560128MVFrkMqI 1Kag== X-Gm-Message-State: AOAM532CqiVJKzbK0XIJ6Ms04F+H0mN4DwkijQ8QQrItKKHEOgvWeuZ4 txq24heqYPLqUx+x/vfTpEXf5A== X-Google-Smtp-Source: ABdhPJxJc903sUIztTzxmi80UqFSkT08yZw93ZuA7sAIlH/fyGCqwro42X/gy76qQ1RH8A0sZrqXrw== X-Received: by 2002:a17:90a:fb58:: with SMTP id iq24mr830916pjb.64.1614116747049; Tue, 23 Feb 2021 13:45:47 -0800 (PST) Received: from smtp.gmail.com ([2620:15c:202:201:68e6:d68b:3887:f216]) by smtp.gmail.com with ESMTPSA id r68sm137951pfc.49.2021.02.23.13.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Feb 2021 13:45:46 -0800 (PST) From: Stephen Boyd To: Andy Gross , Bjorn Andersson Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Brian Masney , Stephan Gerhold , Jeffrey Hugo , Douglas Anderson Subject: [PATCH 5/6] firmware: qcom_scm: Fix kernel-doc function names to match Date: Tue, 23 Feb 2021 13:45:38 -0800 Message-Id: <20210223214539.1336155-6-swboyd@chromium.org> X-Mailer: git-send-email 2.30.0.617.g56c4b15f3c-goog In-Reply-To: <20210223214539.1336155-1-swboyd@chromium.org> References: <20210223214539.1336155-1-swboyd@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org These functions were renamed but the kernel doc didn't follow along. Fix it. Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Fixes: 9a434cee773a ("firmware: qcom_scm: Dynamically support SMCCC and legacy conventions") Signed-off-by: Stephen Boyd --- drivers/firmware/qcom_scm-legacy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm-legacy.c b/drivers/firmware/qcom_scm-legacy.c index eba6b60bfb61..1829ba220576 100644 --- a/drivers/firmware/qcom_scm-legacy.c +++ b/drivers/firmware/qcom_scm-legacy.c @@ -118,7 +118,7 @@ static void __scm_legacy_do(const struct arm_smccc_args *smc, } /** - * qcom_scm_call() - Sends a command to the SCM and waits for the command to + * scm_legacy_call() - Sends a command to the SCM and waits for the command to * finish processing. * * A note on cache maintenance: @@ -209,7 +209,7 @@ int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, (n & 0xf)) /** - * qcom_scm_call_atomic() - Send an atomic SCM command with up to 5 arguments + * scm_legacy_call_atomic() - Send an atomic SCM command with up to 5 arguments * and 3 return values * @desc: SCM call descriptor containing arguments * @res: SCM call return values From patchwork Tue Feb 23 21:45:39 2021 Content-Type: text/plain; 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That's because PSCI, mandated on arm64, implements them for modern SoCs via the PSCI spec. Let's move them to the legacy file and only compile the legacy file into the kernel when CONFIG_ARM=y. Otherwise provide stubs and fail the calls. This saves a little bit of space in an arm64 allmodconfig. $ ./scripts/bloat-o-meter vmlinux.before vmlinux.after add/remove: 0/8 grow/shrink: 5/7 up/down: 509/-4405 (-3896) Function old new delta __qcom_scm_set_dload_mode.constprop 312 452 +140 qcom_scm_qsmmu500_wait_safe_toggle 288 416 +128 qcom_scm_io_writel 288 408 +120 qcom_scm_io_readl 376 492 +116 __param_str_download_mode 23 28 +5 __warned 4327 4326 -1 qcom_iommu_init 272 268 -4 e843419@0b3f_00010432_324 8 - -8 qcom_scm_call 228 208 -20 CSWTCH 5925 5877 -48 _sub_I_65535_1 163100 163040 -60 _sub_D_65535_0 163100 163040 -60 qcom_scm_wb 64 - -64 qcom_scm_lock 320 160 -160 qcom_scm_call_atomic 212 - -212 qcom_scm_cpu_power_down 308 - -308 scm_legacy_call_atomic 520 - -520 qcom_scm_set_warm_boot_addr 720 - -720 qcom_scm_set_cold_boot_addr 728 - -728 scm_legacy_call 1492 - -1492 Total: Before=66737642, After=66733746, chg -0.01% Commit 9a434cee773a ("firmware: qcom_scm: Dynamically support SMCCC and legacy conventions") didn't mention any motivating factors for keeping the legacy code around on arm64 kernels, i.e. presumably that commit wasn't trying to support these legacy APIs on arm64 kernels. Cc: Elliot Berman Cc: Brian Masney Cc: Stephan Gerhold Cc: Jeffrey Hugo Cc: Douglas Anderson Signed-off-by: Stephen Boyd Acked-by: Elliot Berman --- drivers/firmware/Makefile | 4 +- drivers/firmware/qcom_scm-legacy.c | 133 ++++++++++++++++++++++++++ drivers/firmware/qcom_scm.c | 145 +---------------------------- drivers/firmware/qcom_scm.h | 33 +++++++ include/linux/qcom_scm.h | 21 +++-- 5 files changed, 183 insertions(+), 153 deletions(-) diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 5e013b6a3692..0b7b35555a6c 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -17,7 +17,9 @@ obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o obj-$(CONFIG_RASPBERRYPI_FIRMWARE) += raspberrypi.o obj-$(CONFIG_FW_CFG_SYSFS) += qemu_fw_cfg.o -obj-$(CONFIG_QCOM_SCM) += qcom_scm.o qcom_scm-smc.o qcom_scm-legacy.o +obj-$(CONFIG_QCOM_SCM) += qcom_scm_objs.o +qcom_scm_objs-$(CONFIG_ARM) += qcom_scm-legacy.o +qcom_scm_objs-$(CONFIG_QCOM_SCM) += qcom_scm.o qcom_scm-smc.o obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o diff --git a/drivers/firmware/qcom_scm-legacy.c b/drivers/firmware/qcom_scm-legacy.c index 1829ba220576..d909fa2716bc 100644 --- a/drivers/firmware/qcom_scm-legacy.c +++ b/drivers/firmware/qcom_scm-legacy.c @@ -3,6 +3,7 @@ * Copyright (C) 2015 Linaro Ltd. */ +#include #include #include #include @@ -240,3 +241,135 @@ int scm_legacy_call_atomic(struct device *unused, return smc_res.a0; } + +#define QCOM_SCM_FLAG_COLDBOOT_CPU0 0x00 +#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 +#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 +#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 + +#define QCOM_SCM_FLAG_WARMBOOT_CPU0 0x04 +#define QCOM_SCM_FLAG_WARMBOOT_CPU1 0x02 +#define QCOM_SCM_FLAG_WARMBOOT_CPU2 0x10 +#define QCOM_SCM_FLAG_WARMBOOT_CPU3 0x40 + +struct qcom_scm_wb_entry { + int flag; + void *entry; +}; + +static struct qcom_scm_wb_entry qcom_scm_wb[] = { + { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU0 }, + { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU1 }, + { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU2 }, + { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU3 }, +}; + +/** + * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus + * @entry: Entry point function for the cpus + * @cpus: The cpumask of cpus that will use the entry point + * + * Set the Linux entry point for the SCM to transfer control to when coming + * out of a power down. CPU power down may be executed on cpuidle or hotplug. + */ +int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus) +{ + int ret; + int flags = 0; + int cpu; + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_BOOT, + .cmd = QCOM_SCM_BOOT_SET_ADDR, + .arginfo = QCOM_SCM_ARGS(2), + }; + + /* + * Reassign only if we are switching from hotplug entry point + * to cpuidle entry point or vice versa. + */ + for_each_cpu(cpu, cpus) { + if (entry == qcom_scm_wb[cpu].entry) + continue; + flags |= qcom_scm_wb[cpu].flag; + } + + /* No change in entry function */ + if (!flags) + return 0; + + desc.args[0] = flags; + desc.args[1] = virt_to_phys(entry); + + ret = scm_legacy_call(__scm->dev, &desc, NULL); + if (!ret) { + for_each_cpu(cpu, cpus) + qcom_scm_wb[cpu].entry = entry; + } + + return ret; +} +EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr); + +/** + * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus + * @entry: Entry point function for the cpus + * @cpus: The cpumask of cpus that will use the entry point + * + * Set the cold boot address of the cpus. Any cpu outside the supported + * range would be removed from the cpu present mask. + */ +int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) +{ + int flags = 0; + int cpu; + int scm_cb_flags[] = { + QCOM_SCM_FLAG_COLDBOOT_CPU0, + QCOM_SCM_FLAG_COLDBOOT_CPU1, + QCOM_SCM_FLAG_COLDBOOT_CPU2, + QCOM_SCM_FLAG_COLDBOOT_CPU3, + }; + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_BOOT, + .cmd = QCOM_SCM_BOOT_SET_ADDR, + .arginfo = QCOM_SCM_ARGS(2), + .owner = ARM_SMCCC_OWNER_SIP, + }; + + if (!cpus || (cpus && cpumask_empty(cpus))) + return -EINVAL; + + for_each_cpu(cpu, cpus) { + if (cpu < ARRAY_SIZE(scm_cb_flags)) + flags |= scm_cb_flags[cpu]; + else + set_cpu_present(cpu, false); + } + + desc.args[0] = flags; + desc.args[1] = virt_to_phys(entry); + + return scm_legacy_call_atomic(NULL, &desc, NULL); +} +EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr); + +/** + * qcom_scm_cpu_power_down() - Power down the cpu + * @flags - Flags to flush cache + * + * This is an end point to power down cpu. If there was a pending interrupt, + * the control would return from this function, otherwise, the cpu jumps to the + * warm boot entry point set for this cpu upon reset. + */ +void qcom_scm_cpu_power_down(u32 flags) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_BOOT, + .cmd = QCOM_SCM_BOOT_TERMINATE_PC, + .args[0] = flags & QCOM_SCM_FLUSH_FLAG_MASK, + .arginfo = QCOM_SCM_ARGS(1), + .owner = ARM_SMCCC_OWNER_SIP, + }; + + scm_legacy_call_atomic(NULL, &desc, NULL); +} +EXPORT_SYMBOL(qcom_scm_cpu_power_down); diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index ee9cb545e73b..29bce83f8a25 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -4,7 +4,6 @@ */ #include #include -#include #include #include #include @@ -26,16 +25,6 @@ module_param(download_mode, bool, 0); #define SCM_HAS_IFACE_CLK BIT(1) #define SCM_HAS_BUS_CLK BIT(2) -struct qcom_scm { - struct device *dev; - struct clk *core_clk; - struct clk *iface_clk; - struct clk *bus_clk; - struct reset_controller_dev reset; - - u64 dload_mode_addr; -}; - struct qcom_scm_current_perm_info { __le32 vmid; __le32 perm; @@ -49,28 +38,6 @@ struct qcom_scm_mem_map_info { __le64 mem_size; }; -#define QCOM_SCM_FLAG_COLDBOOT_CPU0 0x00 -#define QCOM_SCM_FLAG_COLDBOOT_CPU1 0x01 -#define QCOM_SCM_FLAG_COLDBOOT_CPU2 0x08 -#define QCOM_SCM_FLAG_COLDBOOT_CPU3 0x20 - -#define QCOM_SCM_FLAG_WARMBOOT_CPU0 0x04 -#define QCOM_SCM_FLAG_WARMBOOT_CPU1 0x02 -#define QCOM_SCM_FLAG_WARMBOOT_CPU2 0x10 -#define QCOM_SCM_FLAG_WARMBOOT_CPU3 0x40 - -struct qcom_scm_wb_entry { - int flag; - void *entry; -}; - -static struct qcom_scm_wb_entry qcom_scm_wb[] = { - { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU0 }, - { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU1 }, - { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU2 }, - { .flag = QCOM_SCM_FLAG_WARMBOOT_CPU3 }, -}; - static const char *qcom_scm_convention_names[] = { [SMC_CONVENTION_UNKNOWN] = "unknown", [SMC_CONVENTION_ARM_32] = "smc arm 32", @@ -78,7 +45,7 @@ static const char *qcom_scm_convention_names[] = { [SMC_CONVENTION_LEGACY] = "smc legacy", }; -static struct qcom_scm *__scm; +struct qcom_scm *__scm; static int qcom_scm_clk_enable(void) { @@ -260,116 +227,6 @@ static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id, return ret ? false : !!res.result[0]; } -/** - * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus - * @entry: Entry point function for the cpus - * @cpus: The cpumask of cpus that will use the entry point - * - * Set the Linux entry point for the SCM to transfer control to when coming - * out of a power down. CPU power down may be executed on cpuidle or hotplug. - */ -int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus) -{ - int ret; - int flags = 0; - int cpu; - struct qcom_scm_desc desc = { - .svc = QCOM_SCM_SVC_BOOT, - .cmd = QCOM_SCM_BOOT_SET_ADDR, - .arginfo = QCOM_SCM_ARGS(2), - }; - - /* - * Reassign only if we are switching from hotplug entry point - * to cpuidle entry point or vice versa. - */ - for_each_cpu(cpu, cpus) { - if (entry == qcom_scm_wb[cpu].entry) - continue; - flags |= qcom_scm_wb[cpu].flag; - } - - /* No change in entry function */ - if (!flags) - return 0; - - desc.args[0] = flags; - desc.args[1] = virt_to_phys(entry); - - ret = qcom_scm_call(__scm->dev, &desc, NULL); - if (!ret) { - for_each_cpu(cpu, cpus) - qcom_scm_wb[cpu].entry = entry; - } - - return ret; -} -EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr); - -/** - * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus - * @entry: Entry point function for the cpus - * @cpus: The cpumask of cpus that will use the entry point - * - * Set the cold boot address of the cpus. Any cpu outside the supported - * range would be removed from the cpu present mask. - */ -int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) -{ - int flags = 0; - int cpu; - int scm_cb_flags[] = { - QCOM_SCM_FLAG_COLDBOOT_CPU0, - QCOM_SCM_FLAG_COLDBOOT_CPU1, - QCOM_SCM_FLAG_COLDBOOT_CPU2, - QCOM_SCM_FLAG_COLDBOOT_CPU3, - }; - struct qcom_scm_desc desc = { - .svc = QCOM_SCM_SVC_BOOT, - .cmd = QCOM_SCM_BOOT_SET_ADDR, - .arginfo = QCOM_SCM_ARGS(2), - .owner = ARM_SMCCC_OWNER_SIP, - }; - - if (!cpus || (cpus && cpumask_empty(cpus))) - return -EINVAL; - - for_each_cpu(cpu, cpus) { - if (cpu < ARRAY_SIZE(scm_cb_flags)) - flags |= scm_cb_flags[cpu]; - else - set_cpu_present(cpu, false); - } - - desc.args[0] = flags; - desc.args[1] = virt_to_phys(entry); - - return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL); -} -EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr); - -/** - * qcom_scm_cpu_power_down() - Power down the cpu - * @flags - Flags to flush cache - * - * This is an end point to power down cpu. If there was a pending interrupt, - * the control would return from this function, otherwise, the cpu jumps to the - * warm boot entry point set for this cpu upon reset. - */ -void qcom_scm_cpu_power_down(u32 flags) -{ - struct qcom_scm_desc desc = { - .svc = QCOM_SCM_SVC_BOOT, - .cmd = QCOM_SCM_BOOT_TERMINATE_PC, - .args[0] = flags & QCOM_SCM_FLUSH_FLAG_MASK, - .arginfo = QCOM_SCM_ARGS(1), - .owner = ARM_SMCCC_OWNER_SIP, - }; - - qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL); -} -EXPORT_SYMBOL(qcom_scm_cpu_power_down); - int qcom_scm_set_remote_state(u32 state, u32 id) { struct qcom_scm_desc desc = { diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 632fe3142462..be23f96557da 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -4,6 +4,24 @@ #ifndef __QCOM_SCM_INT_H #define __QCOM_SCM_INT_H +#include +#include + +struct clk; +struct device; + +struct qcom_scm { + struct device *dev; + struct clk *core_clk; + struct clk *iface_clk; + struct clk *bus_clk; + struct reset_controller_dev reset; + + u64 dload_mode_addr; +}; + +extern struct qcom_scm *__scm; + enum qcom_scm_convention { SMC_CONVENTION_UNKNOWN, SMC_CONVENTION_LEGACY, @@ -68,11 +86,26 @@ extern int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, __scm_smc_call((dev), (desc), qcom_scm_convention, (res), (atomic)) #define SCM_LEGACY_FNID(s, c) (((s) << 10) | ((c) & 0x3ff)) +#if IS_ENABLED(CONFIG_ARM) extern int scm_legacy_call_atomic(struct device *dev, const struct qcom_scm_desc *desc, struct qcom_scm_res *res); extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, struct qcom_scm_res *res); +#else +static inline int scm_legacy_call_atomic(struct device *dev, + const struct qcom_scm_desc *desc, + struct qcom_scm_res *res) +{ + return -EINVAL; +} + +static inline int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, + struct qcom_scm_res *res) +{ + return -EINVAL; +} +#endif #define QCOM_SCM_SVC_BOOT 0x01 #define QCOM_SCM_BOOT_SET_ADDR 0x01 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 0165824c5128..0ec905d56e1a 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -64,9 +64,6 @@ enum qcom_scm_ice_cipher { #if IS_ENABLED(CONFIG_QCOM_SCM) extern bool qcom_scm_is_available(void); -extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); -extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus); -extern void qcom_scm_cpu_power_down(u32 flags); extern int qcom_scm_set_remote_state(u32 state, u32 id); extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, @@ -115,11 +112,6 @@ extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en); static inline bool qcom_scm_is_available(void) { return false; } -static inline int qcom_scm_set_cold_boot_addr(void *entry, - const cpumask_t *cpus) { return -ENODEV; } -static inline int qcom_scm_set_warm_boot_addr(void *entry, - const cpumask_t *cpus) { return -ENODEV; } -static inline void qcom_scm_cpu_power_down(u32 flags) {} static inline u32 qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; } @@ -171,4 +163,17 @@ static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) { return -ENODEV; } #endif + +#if IS_ENABLED(CONFIG_ARM) && IS_ENABLED(CONFIG_QCOM_SCM) +extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); +extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus); +extern void qcom_scm_cpu_power_down(u32 flags); +#else +static inline int qcom_scm_set_cold_boot_addr(void *entry, + const cpumask_t *cpus) { return -ENODEV; } +static inline int qcom_scm_set_warm_boot_addr(void *entry, + const cpumask_t *cpus) { return -ENODEV; } +static inline void qcom_scm_cpu_power_down(u32 flags) {} +#endif + #endif