From patchwork Thu Nov 15 22:40:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685183 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3A97314DB for ; Thu, 15 Nov 2018 22:41:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2A7322D502 for ; Thu, 15 Nov 2018 22:41:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1E7A22D523; Thu, 15 Nov 2018 22:41:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B35202D50B for ; Thu, 15 Nov 2018 22:41:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3Ay2zycV9QxlblS9+GVqX7gbgyg+td59g4cI0NTKpFo=; b=HgzIRo2gqnnCYS FrnZyKLCmdUfjRXakyj/PQzQ5hhc1iImqnuI16uzR1Hp+Korf4xJUGGUez/9do8yJZl+w1au1yLXU xZa8bm36kKpNJry0W37d/CELd/4Qgue96jAvGEqM642vt1QH09jdr3xtwO+oLlqoEevkOabSMOxw3 cQvdd6udztsCit1I3p7sJCiSzeyB+cY/QbvgSqMLJAzWFYWtcrBOpaFkXDMOFLb95UCFv1Db92L8E UyPDtpvaEIPP/QZC0ilTtK4sVckXygl8c9QR09WsoJL+FyIBRgcQLL9EvkoV82HjECi+E5XcZowzz DdJ44vXy8CI6IKrjklxA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQKT-0001cp-Jt; Thu, 15 Nov 2018 22:41:41 +0000 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQKG-0001OS-IU; Thu, 15 Nov 2018 22:41:30 +0000 Received: by mail-wm1-x344.google.com with SMTP id t15-v6so19512457wmt.0; Thu, 15 Nov 2018 14:41:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hBmjvcaHmhREoczRD+ZJjpcgQEWa7HVdYQV7xZ1p9X8=; b=oNnMo9HtZmfmuyukR/sGSk+L/Als8N3WvlTH0aNjQNb8dM+iy/pkcMDWlzCbTv+DwN GcMLqRv7eRMdYZ1Y2qDZGcOwYfNUh4eG8pJ+MdI75dcDw0XOsiPPAIZw7dwc38/6sdDo lT0U2KYkdfzEUxnarevFXcBJvJbiAWL6RpXu/gahr6o/fIVAwjB6QfzYZRcl08VWx6hm TFE0Sg8HaBaF898R6mH73jM8Ka07iPcyktQI3Xdey1wht6+7hXfRg/p6eOoQ4DqH9cCH M3xU8DRZVJb9/x2ZvaOFW2u1U4ubnCtnIXae/DOs411gVhZsB5nnrHKI0uAUpu08vXLb CEXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hBmjvcaHmhREoczRD+ZJjpcgQEWa7HVdYQV7xZ1p9X8=; b=gncmi03sAMnk22GnjXxd4MU/j9juhPyW1XkQRI+VlqrWBWtXRKfPUNNmMyo7aJik5F lQitVo7IIYaSyasAy9GCpLbKTo+/WmmNJdp0Oy2uWfZ6Gc88ziVNdqwawfCsU91997lt Cvcr4c6bkvOqp+Qr4YkUkO1ExfGxIGq0I77F2i12ecvtxMEYvYGvujWFtYfIY6vGv9LW /eYFwD2RS0KdG/6LwY2EkMm7kgd/OZd20z800dlHA+nIdEVI661eJBJDlzHz09T5Msts 0kqU9Pz1IRbQlBHLgmgvlnI2bMIFMcIJd9Rs0moTuX50+3wuGMmOjvtWjYeuQWoU2pFy KltA== X-Gm-Message-State: AGRZ1gKdzBWHlGs1w8/7vtCvk6GxpE0TV7KN3vJGf3HG88kw6dQXBEmO QqOaqlHbaowZy4y4z9XtdwrBMq68 X-Google-Smtp-Source: AJdET5dqT8jWFi5ieLab45zKx3nVBVs3bm04Nuoj/1PdpFAO61IY3f2y+O/0dw5cRFN5sCTCMHDNxA== X-Received: by 2002:a1c:c2d4:: with SMTP id s203-v6mr6332449wmf.97.1542321676658; Thu, 15 Nov 2018 14:41:16 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD717A100B85ACE585A885C51.dip0.t-ipconnect.de. [2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:15 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 1/6] clk: meson: clk-pll: check if the clock is already enabled Date: Thu, 15 Nov 2018 23:40:43 +0100 Message-Id: <20181115224048.13511-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144128_605710_37271187 X-CRM114-Status: GOOD ( 16.28 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Since commit 6f888e7bc7bd58 ("clk: meson: clk-pll: add enable bit") our PLLs also support the "enable" bit. Currently meson_clk_pll_enable unconditionally resets the PLL, enables it, takes it out of reset and waits until it is locked. This works fine for our current clock trees. However, there will be a problem once we allow modifications to sys_pll on Meson8, Meson8b and Meson8m2 (which will be required for CPU frequency scaling): the CPU clock is derived from the sys_pll clock. Once clk_enable is called on the CPU clock this will be propagated by the common clock framework up until the sys_pll clock. If we reset the PLL unconditionally in meson_clk_pll_enable the CPU will be stopped (on Meson8, Meson8b and Meson8m2). To prevent this we simply check if the PLL is already enabled and do reset the PLL if it's already enabled and locked. Now that we have a utility function to check whether the PLL is enabled we can also pass that to our clk_ops to let the common clock framework know about the status of the hardware clock. For now this is of limited use since the only common clock framework's internal "disabled unused clocks" mechanism checks for this. Everything else still uses the ref-counting (internal to the common clock framework) when clk_enable is called. Signed-off-by: Martin Blumenstingl Reviewed-by: Jerome Brunet --- drivers/clk/meson/clk-pll.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index f5b5b3fabe3c..afffc1547e20 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -200,11 +200,28 @@ static void meson_clk_pll_init(struct clk_hw *hw) } } +static int meson_clk_pll_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); + + if (meson_parm_read(clk->map, &pll->rst) || + !meson_parm_read(clk->map, &pll->en) || + !meson_parm_read(clk->map, &pll->l)) + return 0; + + return 1; +} + static int meson_clk_pll_enable(struct clk_hw *hw) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); + /* do nothing if the PLL is already enabled */ + if (clk_hw_is_enabled(hw)) + return 0; + /* Make sure the pll is in reset */ meson_parm_write(clk->map, &pll->rst, 1); @@ -288,10 +305,12 @@ const struct clk_ops meson_clk_pll_ops = { .recalc_rate = meson_clk_pll_recalc_rate, .round_rate = meson_clk_pll_round_rate, .set_rate = meson_clk_pll_set_rate, + .is_enabled = meson_clk_pll_is_enabled, .enable = meson_clk_pll_enable, .disable = meson_clk_pll_disable }; const struct clk_ops meson_clk_pll_ro_ops = { .recalc_rate = meson_clk_pll_recalc_rate, + .is_enabled = meson_clk_pll_is_enabled, }; From patchwork Thu Nov 15 22:40:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C00F5109C for ; Thu, 15 Nov 2018 22:42:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B0EE72D52B for ; Thu, 15 Nov 2018 22:42:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A51BA2D522; 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[2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:17 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 2/6] clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel Date: Thu, 15 Nov 2018 23:40:44 +0100 Message-Id: <20181115224048.13511-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144129_997709_EE0937C9 X-CRM114-Status: GOOD ( 13.87 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The cpu_div3 clock (cpu_in divided by 3) generates a signal with a duty cycle of 33%. The CPU clock however requires a clock signal with a duty cycle of 50% to run stable. cpu_div3 was observed to be problematic when cycling through all available CPU frequencies (with additional patches on top of this one) while running "stress --cpu 4" in the background. This caused sporadic hangs where the whole system would fully lock up. Amlogic's 3.10 kernel code also does not use the cpu_div3 clock either when changing the CPU clock. Signed-off-by: Martin Blumenstingl Reviewed-by: Jerome Brunet --- drivers/clk/meson/meson8b.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 9bd5920da0ff..a96bfee58a61 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -608,20 +608,27 @@ static struct clk_regmap meson8b_cpu_scale_div = { }, }; +static u32 mux_table_cpu_scale_out_sel[] = { 0, 1, 3 }; static struct clk_regmap meson8b_cpu_scale_out_sel = { .data = &(struct clk_regmap_mux_data){ .offset = HHI_SYS_CPU_CLK_CNTL0, .mask = 0x3, .shift = 2, + .table = mux_table_cpu_scale_out_sel, }, .hw.init = &(struct clk_init_data){ .name = "cpu_scale_out_sel", .ops = &clk_regmap_mux_ro_ops, + /* + * NOTE: We are skipping the parent with value 0x2 (which is + * "cpu_div3") because it results in a duty cycle of 33% which + * makes the system unstable and can result in a lockup of the + * whole system. + */ .parent_names = (const char *[]) { "cpu_in_sel", "cpu_div2", - "cpu_div3", "cpu_scale_div" }, - .num_parents = 4, + .num_parents = 3, .flags = CLK_SET_RATE_PARENT, }, }; From patchwork Thu Nov 15 22:40:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685191 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 444FD109C for ; Thu, 15 Nov 2018 22:41:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 34FE52D4FB for ; Thu, 15 Nov 2018 22:41:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 28E3A2D53E; Thu, 15 Nov 2018 22:41:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C3BE12D4FB for ; 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[2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:18 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 3/6] clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL Date: Thu, 15 Nov 2018 23:40:45 +0100 Message-Id: <20181115224048.13511-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144129_993538_6A7FF3B6 X-CRM114-Status: GOOD ( 16.60 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We don't want the common clock framework to disable the "cpu_clk" if it's not used by any device. The cpufreq-dt driver does not enable the CPU clocks. However, even if it would we would still want the CPU clock to be enabled at all times because the CPU clock is also required even if we disable CPU frequency scaling on a specific board. The reason why we want the CPU clock to be enabled is a clock further up in the tree: Since commit 6f888e7bc7bd58 ("clk: meson: clk-pll: add enable bit") the sys_pll can be disabled. However, since the CPU clock is derived from sys_pll we don't want sys_pll to get disabled. The common clock framework takes care of that for us by enabling all parent clocks of our CPU clock when we mark the CPU clock with CLK_IS_CRITICAL. Until now this is not a problem yet because all clocks in the CPU clock's tree (including sys_pll) are read-only. However, once we allow modifications to the clocks in that tree we will need this. Signed-off-by: Martin Blumenstingl Acked-by: Jerome Brunet --- drivers/clk/meson/meson8b.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index a96bfee58a61..41a5025364f9 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -646,7 +646,8 @@ static struct clk_regmap meson8b_cpu_clk = { "cpu_scale_out_sel" }, .num_parents = 2, .flags = (CLK_SET_RATE_PARENT | - CLK_SET_RATE_NO_REPARENT), + CLK_SET_RATE_NO_REPARENT | + CLK_IS_CRITICAL), }, }; From patchwork Thu Nov 15 22:40:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00AAB109C for ; Thu, 15 Nov 2018 22:42:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E2D472D4FA for ; Thu, 15 Nov 2018 22:42:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E0F882D59E; Thu, 15 Nov 2018 22:42:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 513EC2D58A for ; Thu, 15 Nov 2018 22:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xIWZqhrR0E/PHsYZJX07tN/sYpisW2QMKbkwK042LaM=; b=TAkyWBdMqcYVpU iPftZUcIhopCgM7xI9BmG/YoGhJMgjY2D5eALez7DxTbCdaJz9AYkYVGoJB9GsQL8mCRYViDeXNaA 4nP4/g+7qsvlQ4MNEdYbC1IMWnyYJALftHRxmS/AzonUgrBzXn9ubUEDFVu0vypKR0YYsVXITrQ7i 2wbARQXQyMF0deNDAz7AFsqJrkiWfWxO1iNSy2G3NpOZg6sSL894/Q2K8h+TtcWIaNg0jAQ+ijrjU LRVLLcfWVcP5NZd7PAoq6wKbKM9IwRurgkRLWTPydf7PTgqRtKuWqwhPR/PegPEgg5o/cZbFGmJ0A GAlcnYB3eDeDbYCmGZXQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQLJ-0002Xq-91; Thu, 15 Nov 2018 22:42:33 +0000 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQKK-0001Or-CX; Thu, 15 Nov 2018 22:41:33 +0000 Received: by mail-wm1-x341.google.com with SMTP id u13-v6so19474368wmc.4; Thu, 15 Nov 2018 14:41:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o1OnMjerHobgxeRKJqmEmHVjTlKqDa43MFe3VfFeUNA=; b=Eo3DyDfAUUClIgS3T9isr4frWLqyrNYCZ3u9sqvGgS78wGuCJQ0iVnxcpEwpvcXCUt MAxkSLGjzchwLIDSDIbGbVafUkJD7OKIqBpfU9fCSEPyj+tgHi56vcChIk6aYnNfRL18 KK+psZw0dUc5FOBb6qQpWIP0qGeda/DJzkIYW1JnK2r5W1OPoEpmROcjunOXv4PXjfiU AFv5n1yvljcOe6MMQRtMjRcSISGiY8DBTqbNgutCU/nn6s5tRCDf+kynDOsmqsmyVGyX tYMwZ5hq3kk07DJhP4FO+TVIFQJxqTkAM9X7NLu593mPxpnBIszfVwmFv8kfZUp7vfyX Y25w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o1OnMjerHobgxeRKJqmEmHVjTlKqDa43MFe3VfFeUNA=; b=XB0brvVSdK/j4m7zbXLcTJikjx51Y1O24eaEUxcJFIBT4zY2+qBeCINTSSly64wKDC FuAajUcYdy8m9hLtH0I/ppP8QWZc1dmK6O18oSu2Yu4xUrNptySbR382+SdEiYpB6lm9 PG9I1JeGfwYCfeN3Coh5Bo9t8CUQxmVAcmxcSmugZphoM8wQRw+DmfKlIcFtPQE7bGAX rrqv9MRB2JTGXuy6bsyoBJQsaeIjQo9SYXBxUnDsgr65lc1xmMnt8p2PGcvtCqXHnWvJ X22N4JHxTNWJXlCN+Tqmy6pnyOe9PyoPd4eOsTXW7zHwDtHZmbdsWr2qXxdXq2hC/fei LBfg== X-Gm-Message-State: AGRZ1gIACuIFYal3doyRF1FMSvTN3YPsklUz8ixzv0eYQbJ99HdzSTK7 ohyXQW3Y0oso40iYzZgA52FmJ4YI X-Google-Smtp-Source: AJdET5d+RuTFE5gNqRCuFYp4DNf62o0rc6lVciTY5Nxsgcfi1MaxXIzfiSEcItssW9iRHGdd6hMfpA== X-Received: by 2002:a1c:1792:: with SMTP id 140-v6mr614417wmx.117.1542321680273; Thu, 15 Nov 2018 14:41:20 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD717A100B85ACE585A885C51.dip0.t-ipconnect.de. [2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:19 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 4/6] clk: meson: meson8b: add support for more M/N values in sys_pll Date: Thu, 15 Nov 2018 23:40:46 +0100 Message-Id: <20181115224048.13511-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144132_435121_10F66EFA X-CRM114-Status: GOOD ( 14.97 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The sys_pll on the EC-100 board is configured to 1584MHz at boot (either by u-boot, firmware or chip defaults). This is achieved by using M = 66, N = 1 (24MHz * 66 / 1). At boot the CPU clock is running off sys_pll divided by 2 which results in 792MHz. Thus M = 66 is considered to be a "safe" value for Meson8b. To achieve 1608MHz (one of the CPU OPPs on Meson8 and Meson8m2) we need M = 67, N = 1. I ran "stress --cpu 4" while infinitely cycling through all available frequencies on my Meson8m2 board and could not spot any issues with this setting (after ~12 hours of running this). On Meson8, Meson8b and Meson8m2 we also want to be able to use 408MHz and 816MHz CPU frequencies. These can be achieved by dividing sys_pll by 4 (for 408MHz) or 2 (for 816MHz). That means that sys_pll has to run at 1632MHz which can be generated using M = 68, N = 1. Similarily we also want to be able to use 1008MHz as CPU frequency. This means that sys_pll has to run either at 1008MHz or 2016MHz. The former would result in an M value of 42, which is lower than the smallest value used by the 3.10 GPL kernel sources from Amlogic (50 is the lower limit there). Thus we need to run sys_pll at 2016MHz which can ge generated using M = 84, N = 1. I tested M = 68 and M = 84 on my Meson8b Odroid-C1 and my Meson8m2 board by running "stress --cpu 4" while infinitely cycling thorugh all available frequencies. I could not spot any issues after ~12 hours of running this. Amlogic's 3.10 GPL kernel sources have more M/N combinations. I did not add them yet because M = 74 (to achieve close to 1800MHz on Meson8) and M = 82 (to achieve close to 1992MHz on Meson8 as well) caused my Meson8m2 board to hang randomly. It's not clear why this is (for example because the board's voltage regulator design is bad, some missing bits for these values in our clk-pll driver, etc.). Thus the following M values from the Amlogic 3.10 GPL kernel sources are skipped as of now: 69, 70, 71, 72, 73, 74, 76, 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98 Signed-off-by: Martin Blumenstingl Acked-by: Jerome Brunet --- drivers/clk/meson/meson8b.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 41a5025364f9..b07a92ed7de3 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -43,6 +43,11 @@ static const struct pll_params_table sys_pll_params_table[] = { PLL_PARAMS(62, 1), PLL_PARAMS(63, 1), PLL_PARAMS(64, 1), + PLL_PARAMS(65, 1), + PLL_PARAMS(66, 1), + PLL_PARAMS(67, 1), + PLL_PARAMS(68, 1), + PLL_PARAMS(84, 1), { /* sentinel */ }, }; From patchwork Thu Nov 15 22:40:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D79B14DB for ; Thu, 15 Nov 2018 22:43:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F5C92D591 for ; Thu, 15 Nov 2018 22:43:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 239602D583; Thu, 15 Nov 2018 22:43:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9B3782D578 for ; Thu, 15 Nov 2018 22:43:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5jSSiga2ukv+9WxwM08oRxsdPf4jdy0N3/gsb+6GM3o=; b=bD0zhdSR/X4+g/ /coh76CQUBWlBQM/OJJz+uOlehrZ9PoNunSadqvY4SqC9fwsjrSUfwM7bLrSa+v4MK5zkL13AcqIm 6QBtxvT8/I0geYfF8dBXuD32k4zaMRnqoR6jZd5Q4o4y/XEC5TRRNZoQeAtd3VhKPBfkL5c6GTpCQ lRUwouHd+yE5kfmlKs/7/FNlG2g9h7gKfTzsSgBol9ct1QGdVtWoOMxiMBRUR6IuzY0OaSvoE5l41 1/oVH4/jXKU6iCf71jZhVRwHWeWvhaJk6FAXDL5FWcrApOttA5DR7JradCn+IIp/swQFAG3xsaJUh KP0DxmbK3VS/cp7Cu7RA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQLn-0002x0-6M; Thu, 15 Nov 2018 22:43:03 +0000 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQKL-0001Os-Gb; Thu, 15 Nov 2018 22:41:35 +0000 Received: by mail-wr1-x443.google.com with SMTP id r10so5373913wrs.10; Thu, 15 Nov 2018 14:41:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ocpvr4v/IalymL6Cfmgpy4xn0IPt/TDny70HjBkIVnQ=; b=getxhgJC6hg+ji7gWowQYLqG6ApfFgAi5irT4hgOttWDJ2K5Ue43mcY6Q4+G4Mn0Gz dNqRkvnKtHZLfN67jsl4daQMygYdeuJNohCyMd+vTKUwaWkahzV+PXoHQd7qcN22P3uz 4rgdFgcYmqL3FRBd+HqWgFSojTa8Ldkp+Ec4kNXIJiP8HY3Oc5OXmnDgL7YGAcXCQygO i081ts666V//8taGxtWTWjElOlF0eGUkcSwpnk8mc3NAmtoMHkqyC2yEEKzuAbefHt28 hVRyvdasfqbqPmczYQPZ3SCAHufoaDMN95IYMEVk80MHs7UIvhWyWlcR8UWIul+v9kWa 10VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ocpvr4v/IalymL6Cfmgpy4xn0IPt/TDny70HjBkIVnQ=; b=YDpLobw0Ja+MZerRN91Lj9fsyDsYk1D+aiN0vfXoOOcHtuC6KYzYo9giAFc7vDWH/j yDv8PHr4//vbPGskc0pmm6LaC3Tpor70Dl/LRSFUL/90yX4NM3QA9ksWz7qtgDdzYQCT nveZzgfTjlAGUrWv4X3j0OMe/YSkFchPxDORyXoxi3sHhNxnh2YWUwC9CosXZBr56Nyn fce54ku9mG0qZAKg1FzYyB8KYcpEpSuihLOeSarrmDGwg+T1j3hGHmbkZbmWd5P3nNHy wMELyLfQAfzARei+svgi86fmX+Fzoj7t+bWwcE9zdDiq4MLUQhL7LKwkW7JiID1wPVXZ itEw== X-Gm-Message-State: AGRZ1gK+1H5k2LTBUO2YCA0k/drnSBSSlmb4zQ5pgKo7avJ0ukWE31JO 1ZLr2dZJjp1G74YF3wS6PbTysXqT X-Google-Smtp-Source: AJdET5eIxNcbjlEsDJBwlBm8xGH49dS6nqNXq9wH7vfwUtUr9BuKp18Y1KLrN0CrQmMIX3O5E8P1Lg== X-Received: by 2002:a5d:5745:: with SMTP id q5-v6mr7165566wrw.161.1542321681386; Thu, 15 Nov 2018 14:41:21 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD717A100B85ACE585A885C51.dip0.t-ipconnect.de. [2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:20 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 5/6] clk: meson: meson8b: run from the XTAL when changing the CPU frequency Date: Thu, 15 Nov 2018 23:40:47 +0100 Message-Id: <20181115224048.13511-6-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144133_551947_AB2ADE79 X-CRM114-Status: GOOD ( 15.65 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Changing the CPU clock requires changing various clocks including the SYS PLL. The existing meson clk-pll and clk-regmap drivers can change all of the relevant clocks already. However, changing for exampe the SYS PLL is problematic because as long as the CPU is running off a clock derived from SYS PLL changing the latter results in a full system lockup. Fix this system lockup by switching the CPU clock to run off the XTAL while we are changing the any of the clocks in the CPU clock tree. Signed-off-by: Martin Blumenstingl Reviewed-by: Jerome Brunet --- drivers/clk/meson/meson8b.c | 63 +++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index b07a92ed7de3..c06a1a7faa4c 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -1116,6 +1116,53 @@ static const struct reset_control_ops meson8b_clk_reset_ops = { .deassert = meson8b_clk_reset_deassert, }; +struct meson8b_nb_data { + struct notifier_block nb; + struct clk_hw_onecell_data *onecell_data; +}; + +static int meson8b_cpu_clk_notifier_cb(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct meson8b_nb_data *nb_data = + container_of(nb, struct meson8b_nb_data, nb); + struct clk_hw **hws = nb_data->onecell_data->hws; + struct clk_hw *cpu_clk_hw, *parent_clk_hw; + struct clk *cpu_clk, *parent_clk; + int ret; + + switch (event) { + case PRE_RATE_CHANGE: + parent_clk_hw = hws[CLKID_XTAL]; + break; + + case POST_RATE_CHANGE: + parent_clk_hw = hws[CLKID_CPU_SCALE_OUT_SEL]; + break; + + default: + return NOTIFY_DONE; + } + + cpu_clk_hw = hws[CLKID_CPUCLK]; + cpu_clk = __clk_lookup(clk_hw_get_name(cpu_clk_hw)); + + parent_clk = __clk_lookup(clk_hw_get_name(parent_clk_hw)); + + ret = clk_set_parent(cpu_clk, parent_clk); + if (ret) + return notifier_from_errno(ret); + + udelay(100); + + return NOTIFY_OK; +} + +static struct meson8b_nb_data meson8b_cpu_nb_data = { + .nb.notifier_call = meson8b_cpu_clk_notifier_cb, + .onecell_data = &meson8b_hw_onecell_data, +}; + static const struct regmap_config clkc_regmap_config = { .reg_bits = 32, .val_bits = 32, @@ -1125,6 +1172,8 @@ static const struct regmap_config clkc_regmap_config = { static void __init meson8b_clkc_init(struct device_node *np) { struct meson8b_clk_reset *rstc; + const char *notifier_clk_name; + struct clk *notifier_clk; void __iomem *clk_base; struct regmap *map; int i, ret; @@ -1179,6 +1228,20 @@ static void __init meson8b_clkc_init(struct device_node *np) return; } + /* + * FIXME we shouldn't program the muxes in notifier handlers. The + * tricky programming sequence will be handled by the forthcoming + * coordinated clock rates mechanism once that feature is released. + */ + notifier_clk_name = clk_hw_get_name(&meson8b_cpu_scale_out_sel.hw); + notifier_clk = __clk_lookup(notifier_clk_name); + ret = clk_notifier_register(notifier_clk, &meson8b_cpu_nb_data.nb); + if (ret) { + pr_err("%s: failed to register the CPU clock notifier\n", + __func__); + return; + } + ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &meson8b_hw_onecell_data); if (ret) From patchwork Thu Nov 15 22:40:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10685207 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AC8B2109C for ; Thu, 15 Nov 2018 22:43:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9B0252D57E for ; Thu, 15 Nov 2018 22:43:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F3242D591; Thu, 15 Nov 2018 22:43:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 26A482D53F for ; Thu, 15 Nov 2018 22:43:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cliLyN0wJw+ujW3AbWvWKBFWdHitvy+WxqxdOdvTEi4=; b=Iy1yxs8yHF8Dq8 /X0h6C1fDPstDYxmf4QYNHi3k0q16qtmcEYjXvyTTnDAuoArmbz10Ggcr/geGjQxi9cJadMjdKtq2 GXmyaMg+JZ9N/Y/WOJl/wr3dgQWqPYT0OCexeyLbLkwgzioQndjgammzOOYrP/pPj75oA9yeIpClg Bt4z9aiLowCthFIujQi5JptgtrAeVwq/iZLNmuH1h94YV9UlNK/9tthNmI+NcLP+efaqTsZ5/WvWc EJ5jHCXh3xYPS93QPpBB2Bp07rFCLQejwc0uyDuInW5byL3cXLJrTCWXU9JzMdk+8e0UZIXkSDQqq ftDQYdknpunHpDGikDzw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQLj-0002tt-33; Thu, 15 Nov 2018 22:42:59 +0000 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNQKL-0001Ov-HK; Thu, 15 Nov 2018 22:41:35 +0000 Received: by mail-wr1-x443.google.com with SMTP id v18-v6so22894620wrt.8; Thu, 15 Nov 2018 14:41:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JvGZTbDWv4lGUG5na7L9lqIQ6L4IllGuR7w0yW3E6tM=; b=oQxAiuhuTC19CmRlMCwooBbPO2w9P3XOaYYQh7Zz/A+hOni6DBJ/8AyWZlnofgQ2OH DifB9Z17WK1WhwNOreLQyDUZ4sPyQuGIzsDtxG1VUKg/Hbc0R6CO07h44gAmF59Z/65I zize5Nhz0jfXBnReE7dKkxYkGCnXQCr8PNYVDdjipAzsqGeOv5AnuM7IiE0/2+PHd3/C yXpRKQ7EpR+3e9yqmwYfyCff6JEzPtZU++cMnoqkTpWx3tUv0qXSaDEEaFwvtdLIolhr PxeX7WpZT7gbXdyGMW8PN8o3oKlPS3W8y4l1b0xmqkS4Ch3q2V2YEg/idBpWom+8Yhlm v18Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JvGZTbDWv4lGUG5na7L9lqIQ6L4IllGuR7w0yW3E6tM=; b=B1KXBxMpFR59IjCaHQgi+N58ZnXZsAsscxhgVpepbAc1FQTSZY/OqO5M2odm0VXicF F4AmQXeaw+K4uS/zkHwiZX7kbaS6OZdsF2NziVQKeFRPvNtqJnaBA/6l+FF8QXgEO9n4 TPR8kySNVHXIl7UgPnlg1mDob8ldv1RQOooxjhO/np+MnNoYX4Q+E0NpsL90BJHNmNRv KdjoE236JrBSk7whD0LObyvbeeUkkwo/0DD2qjPiEUEdfRKAUnfTKidUA6RTNbJJPTY3 teIAlkJnOY4re2WpAPjmoNk68l9ilpBLXw0N/lmJW6LxqrZK4Jp+2e8dKG/8jcsKJVOq dW7A== X-Gm-Message-State: AA+aEWbEfrcGkIjtCbmxVNyG0Zell6hjx5gu5AkX9pcmzlKKqvsRMvNL JjrMm2ukl5vFYycp5c6mCPz3dbpl X-Google-Smtp-Source: AFSGD/XNFfL2ZMvD06MV6no/EWJzMZwwmDO+jWIos7isur5U5l3sgy1sEnxUzws07S16dDsNLCPnrQ== X-Received: by 2002:a5d:4c42:: with SMTP id n2-v6mr1698860wrt.298.1542321682553; Thu, 15 Nov 2018 14:41:22 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD717A100B85ACE585A885C51.dip0.t-ipconnect.de. [2003:dc:d717:a100:b85a:ce58:5a88:5c51]) by smtp.googlemail.com with ESMTPSA id x12sm2076388wmc.37.2018.11.15.14.41.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 14:41:21 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [PATCH v2 6/6] clk: meson: meson8b: allow changing the CPU clock tree Date: Thu, 15 Nov 2018 23:40:48 +0100 Message-Id: <20181115224048.13511-7-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> References: <20181115224048.13511-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181115_144133_593077_3F92EBB7 X-CRM114-Status: GOOD ( 13.06 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, Martin Blumenstingl , mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Currently all clocks in the CPU clock tree are marked as read-only (using the corresponding _ro_ clk_ops). This was correct since changing the clock tree could cause the system to lock up. Switch all clocks to their corresponding clk_ops variant which is not read-only to allow changing the CPU clock tree since the bug which locked up the system is now fixed (by switching the CPU clock temporary to run off XTAL while changing the CPU clock tree). Signed-off-by: Martin Blumenstingl Reviewed-by: Jerome Brunet --- drivers/clk/meson/meson8b.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index c06a1a7faa4c..b3bdc7e05441 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -203,7 +203,7 @@ static struct clk_regmap meson8b_sys_pll_dco = { }, .hw.init = &(struct clk_init_data){ .name = "sys_pll_dco", - .ops = &meson_clk_pll_ro_ops, + .ops = &meson_clk_pll_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, }, @@ -218,7 +218,7 @@ static struct clk_regmap meson8b_sys_pll = { }, .hw.init = &(struct clk_init_data){ .name = "sys_pll", - .ops = &clk_regmap_divider_ro_ops, + .ops = &clk_regmap_divider_ops, .parent_names = (const char *[]){ "sys_pll_dco" }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -552,7 +552,7 @@ static struct clk_regmap meson8b_cpu_in_sel = { }, .hw.init = &(struct clk_init_data){ .name = "cpu_in_sel", - .ops = &clk_regmap_mux_ro_ops, + .ops = &clk_regmap_mux_ops, .parent_names = (const char *[]){ "xtal", "sys_pll" }, .num_parents = 2, .flags = (CLK_SET_RATE_PARENT | @@ -606,7 +606,7 @@ static struct clk_regmap meson8b_cpu_scale_div = { }, .hw.init = &(struct clk_init_data){ .name = "cpu_scale_div", - .ops = &clk_regmap_divider_ro_ops, + .ops = &clk_regmap_divider_ops, .parent_names = (const char *[]){ "cpu_in_sel" }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, @@ -623,7 +623,7 @@ static struct clk_regmap meson8b_cpu_scale_out_sel = { }, .hw.init = &(struct clk_init_data){ .name = "cpu_scale_out_sel", - .ops = &clk_regmap_mux_ro_ops, + .ops = &clk_regmap_mux_ops, /* * NOTE: We are skipping the parent with value 0x2 (which is * "cpu_div3") because it results in a duty cycle of 33% which @@ -646,7 +646,7 @@ static struct clk_regmap meson8b_cpu_clk = { }, .hw.init = &(struct clk_init_data){ .name = "cpu_clk", - .ops = &clk_regmap_mux_ro_ops, + .ops = &clk_regmap_mux_ops, .parent_names = (const char *[]){ "xtal", "cpu_scale_out_sel" }, .num_parents = 2,