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Nguyen" Subject: [PATCH 1/4] dt-bindings: mfd: Add bindings for Ampere Altra SMPro drivers Date: Thu, 25 Feb 2021 17:18:51 +0700 Message-Id: <20210225101854.13896-2-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210225101854.13896-1-quan@os.amperecomputing.com> References: <20210225101854.13896-1-quan@os.amperecomputing.com> X-Originating-IP: [118.69.219.201] X-ClientProxiedBy: HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) To MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from hcm-sw-17.amperecomputing.com (118.69.219.201) by HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3890.19 via Frontend Transport; Thu, 25 Feb 2021 10:19:32 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 21d3b5fa-589d-41e7-33e7-08d8d976d9b3 X-MS-TrafficTypeDiagnostic: MWHPR01MB2320: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3826; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AVWkIgmV7GTeyjNFVs7NknQdHSb5u9j+mDh1GKCz6iBPCc6P7pnVSt6OU/1j+jpjcH3lOAQvZaivGkpWOx3r7zPEieZrgk4Jclr5OzbYbLB9Q+p9gJnu+vlERaF7lXh1ICQhukFwqHP/Z4WjCMmkoNkY+DhrZn602b37swlrht7tJgg+tt5egNNTVxSOfPDxEj2frpcCO6B7mXH0C+OktSZN5Z+/W1yZo1MODsbv8N0YlyDI6u4hVu7D682Fhk+ZJXaoQQ6dFzVoVodBuCJ7q7/0xCSKgcFpvnbsQsJ9qYOxHWCsLROIac9cfxreotAlvyRXVA7EeNu/BVotz1E1gPyNvB8JZv8qmlpTyUK3ufyW18YfmPvtYWHavrlPohVRU2j32dUNkRjwpgtBs2ytiA5bng7/CrMb3mLHuM9gvLNOcAJwvwtC/bLeXbq9NybQUl/3Yr0l+cb1M5N68C0c+s+ImeI/P3H42AWlE878/Dkund/KBAx2zeSc0uZV1wqU4ej63ILkDw+J4j8R3Cc8Bn7rMCpw1oWQNIYPfr7FxUHGlAL7deyU+RMAKPFgi2SqlorRU6QJF+17U/Exs3KkyD1S8PA9gzElM4VBg1UThbdeJzThUZjy6t7VwlyiFAWtyjQIanj1Kq2Rfpkkj6wMuA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MW2PR0102MB3482.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(376002)(396003)(346002)(136003)(39830400003)(366004)(83380400001)(956004)(2616005)(66556008)(6512007)(966005)(6666004)(107886003)(110136005)(66946007)(66476007)(52116002)(8936002)(921005)(316002)(86362001)(26005)(2906002)(1076003)(5660300002)(6486002)(186003)(4326008)(6506007)(16526019)(8676002)(7416002)(478600001)(54906003);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData: xPJ+j/F1QODEnfwQuHdJ3cBPXHGRQV+O/Sx/czO/a17kouk4gJk5dZWzaReqPyszaXFp4rCgvxZXMBN20iOI0t37TB59Qvr4fGXOuh3nWV+10ukxReoEwQtYlPe+j5t05aK/gdJMqlelBEH2w8Qq/Db41UIpyMb8eDvblt9kz8ch1kpMIliD+wrgXqw2Zng2rx4fljY1MOUcd+5GoZZ4n4QY3HO2m7EqDRMVafBQwkQ++0jQvqR0vhXpkJlHFhZHgpxjmqOhHGsyNwopokFxg/bxEB5rmv307HsZKdO/hiOsKvvWoSF4iwzDBvLVujlLZvVgcJi5r+mB7IKw/8q2bmu84Mvdw3huKoMnkMo+QlWot63WG17ZekCfOJbs71rOisdU4wsK2eFPd8aJfUQ8uPuaqI6tHoGii0sihdEQpLT5r/Oi9521yx616dJ8LKYLmE5TzitwoibH3MnE6L7WTjcuHjXXHix2442a+rr9AF4PWU6oZrgGPbLhJoNEnzncuGPj15BdCjusZ6hvEW4YYZnGFUXQdEPoG1g8fwlfvSaeooMJDir6ndHZr5KMuhUGlJfDzjn4RLWglOAbbE7O1TgTAgX7ajVO/Ipq7VOYkVHuKsc44jssQr/1/BbxAajybs8p91agm+5yOch8JPaOnStKgnqd3baG2xx35ioXj4G3k5O2YupOW8cP8w5UEUvF5TmrqTrtLfCHDTVhGUrsemKokRD0tUNF2p3nY0MCIb5QgugPYy6KAB8PNCQMDBpNZ6YhoTm0NQOTY9DVt+RL8HSJBX9NtfN04AQS8kPx6TnufR/5hhWmMo728Qo+t5AfyLXmUVaio6DctJvjJzPfgwzFxXvx423Q4jd81GiEOh2S3p255QmD0S2dKvWiMFxx8PIatrzHcYqm3Rle5YRUmiH5ioUaIaEq0bdGV4zSGcgyI+2Vm6dZNz2QHgjYcKxWG7NI1BmFxUtQXvt2Z7u7I2irrKLE/3YcapdL26BcnbfH9mEy0PgS1xGRTAkYUNlEsVfD9xFq2ll2lCP/MAi0TWWwDQiHiVVr2AoVdEDTTnrDSw5NWwCC/OJPDjJyWEpmFsLM/kOhvlIVdtjWicvBZZX1XdHsm9klV8Bilqt4/ybJ0sTjA1Q0EkzVHXzyKq9qfX/odkcXy+QPa9ZOvm4Mk6YvEFr2+OXi0ynHZzgjeEFFc1Q9VK8FVR7X8+8x58BT4Jo8Gwu5IheiN/J4qCEAb+mr2ImxcJb0X1ba/pxf6oNoRAJD8jXckti2xI+45PP9lxFDjL6pwHfD6/a2WXEMY9o79o74gNqcCTUDQwDWEkB+NnW2NdG5Ne8gCphqwPAy X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 21d3b5fa-589d-41e7-33e7-08d8d976d9b3 X-MS-Exchange-CrossTenant-AuthSource: MW2PR0102MB3482.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Feb 2021 10:19:35.9570 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tK8bX6EkWmjfB5LnHdy2nh6jQN8ZfhxvMoYKIrn8DfFT8XjK/SlfQCYQAWM+v97+AEHMtnp8yRu/AjgFKevTB4CVsX+sh1OkCZ7Tr/u03zo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR01MB2320 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds device tree bindings for SMPro drivers found on the Mt.Jade hardware reference platform with Ampere's Altra Processor family. Signed-off-by: Quan Nguyen --- .../bindings/hwmon/ampere,ac01-hwmon.yaml | 27 ++++++ .../bindings/mfd/ampere,ac01-smpro.yaml | 82 +++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/ampere,ac01-hwmon.yaml create mode 100644 Documentation/devicetree/bindings/mfd/ampere,ac01-smpro.yaml diff --git a/Documentation/devicetree/bindings/hwmon/ampere,ac01-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/ampere,ac01-hwmon.yaml new file mode 100644 index 000000000000..d13862ba646b --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/ampere,ac01-hwmon.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/ampere,ac01-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hardware monitoring driver for the Ampere Altra SMPro + +maintainers: + - Quan Nguyen + +description: | + This module is part of the Ampere Altra SMPro multi-function device. For more + details see ../mfd/ampere,ac01-smpro.yaml. + +properties: + compatible: + enum: + - ampere,ac01-hwmon + + reg: + maxItems: 1 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/ampere,ac01-smpro.yaml b/Documentation/devicetree/bindings/mfd/ampere,ac01-smpro.yaml new file mode 100644 index 000000000000..06b0239413ae --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ampere,ac01-smpro.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ampere,ac01-smpro.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ampere Altra SMPro firmware driver + +maintainers: + - Quan Nguyen + +description: | + Ampere Altra SMPro firmware may contain different blocks like hardware + monitoring, error monitoring and other miscellaneous features. + +properties: + compatible: + const: ampere,ac01-smpro + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^hwmon(@[0-9a-f]+)?$": + $ref: ../hwmon/ampere,ac01-hwmon.yaml + + "^misc(@[0-9a-f]+)?$": + type: object + description: Ampere Altra SMPro Misc driver + properties: + compatible: + const: "ampere,ac01-misc" + + "^errmon(@[0-9a-f]+)?$": + type: object + description: Ampere Altra SMPro Error Monitor driver + properties: + compatible: + const: "ampere,ac01-errmon" + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + smpro@4f { + compatible = "ampere,ac01-smpro"; + reg = <0x4f>; + #address-cells = <1>; + #size-cells = <0>; + + hwmon { + compatible = "ampere,ac01-hwmon"; + }; + + misc { + compatible = "ampere,ac01-misc"; + }; + + errmon { + compatible = "ampere,ac01-errmon"; + }; + + }; + }; From patchwork Thu Feb 25 10:18:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12103859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E67B5C433DB for ; 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Nguyen" Subject: [PATCH 2/4] mfd: simple-mfd-i2c: Adds Ampere's Altra SMpro support Date: Thu, 25 Feb 2021 17:18:52 +0700 Message-Id: <20210225101854.13896-3-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210225101854.13896-1-quan@os.amperecomputing.com> References: <20210225101854.13896-1-quan@os.amperecomputing.com> X-Originating-IP: [118.69.219.201] X-ClientProxiedBy: HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) To MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from hcm-sw-17.amperecomputing.com (118.69.219.201) by HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3890.19 via Frontend Transport; Thu, 25 Feb 2021 10:19:36 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3a030169-f550-4e2d-e13d-08d8d976dc18 X-MS-TrafficTypeDiagnostic: MWHPR01MB2320: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2449; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: V6M8VEb9wIR4tHqmFQa3PA5E6701XCTm8viGDpPDpccNocntxTEp8nIKdrXv49npvpTFsjOSKdHWewZxY9Pu8T/BlTn15fdvuM9lbrvUaod8WumIqDvUbCfg3x2xlGEsOxtY3laGCZFv3b5Itio6BT6hVAP7m6nR3s0lOLeipgSvLnkqy98REEJrWN6Y50JKyovtpo/ZXSU41+oKDysRk5o7W9PF3A7br1+jkhAUpVkvdFb7eBPj2VmLPxRAiZJyrS5Q//U/1UHVrghdSxK+Fk8LvJNayDQRXSrU9SF9zCwSo+/zM3J1jpuB4C5zRZ80rNBbaAKtOZVHBbBuW92AtNOxlllusf2cBIIeGoWkp7t2N0vvUI/7F4uCu2joskZQPNDrvfrvylGc1RU+2IcutwPj5DPLsUyyodIqKCb6lxeXpFP9HOtAjlEBjk+lQyQeWZIdiDxvW7nYR8YM4VOt4yTy234vG/EmQAn84rAMDy3EmPvgWOgJZp+Aw5Ga1YoOS1ywJpR3+kAV0UOBuG8GNajODkFxSZ842XK49B0oL6IDr0E4rxlNUAMQmu3RNbcj X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MW2PR0102MB3482.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(376002)(396003)(346002)(136003)(39830400003)(366004)(83380400001)(956004)(2616005)(66556008)(6512007)(6666004)(107886003)(110136005)(66946007)(66476007)(52116002)(8936002)(921005)(316002)(86362001)(26005)(2906002)(1076003)(5660300002)(6486002)(186003)(4326008)(6506007)(16526019)(8676002)(7416002)(478600001)(54906003);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData: x94G0oOrb3aBQ9XuPEQBBzSjy1E2xLbfpi+jgVjr/ZkdLvuIrFaHbDECPOMCugwl+AosXGGxF/bKxiZQQcTgls6e1Y/uvut2e2eqcremcPNZ0gSXoRnTORhC29V94BeVyP4Xa9igdHmMCGu0zvMs3RsPzCP1Bxfr8BFbmQ4mcqZX74BhdVXLzo57hQTTeBbCkAqqs1Meg1dwWCRXSUGaZwjWCaNXbuUTKm07dape5MQBvWbkJvMYFq6el0ohtRvIxRANAveTzEhL8uUO5czd8MPzCxx4e3AX4XqYKD9ESGp0bboDgSBALEGQXjIDuVZ7AIeOWr18TvY0wNjtKPv8cWAi/CoAk0LAPXQFDfi0HBpPWv9vuyRsF71NfwiiyDGOpF+nFZbAtdnN/hH5O5S7qc80QRxEmT+FAx/viTuwIMCJywprwUlF4cYZZIUeuWxXAw6vyCmfltH1SfQt8DYU2aKqoRD2oKt9PViEepV2UYJb4QJxz+1dfa0Spy0dpGp5WmfFVa57VUmtBHbRw3fAovgkItEq1S6Dh/c/DentcJpjF4IhRlOKFSjIMlrq1oatfg2MqXvjBO41LrG4k1BgqpVPY8LBjen62f6s0vFVvtISuPCbormcqMuS3uAI5dzfilm9l1Bd7cBjLDR1NQ6uQpQYryKzAfsiP5PH4llzO/T4Ml4ZtN1btkXTfWIkqT+eTJc3E5DnIwsa3UfQQlr5FwTbkOb7p5E2T2gElBvjNhxQgEYWmYF7Kg2tuFW50nDYnShk1ngiCrfXHydLWntkdk0WM6r1Of2pg8P8V5a1d2WcgaT0oVLS0YfFJutdafks0Mf3Sx3U4F2eXEUy84UVmNoHL/Hr0QR2FNJDRf6FaI2Co9N2gXE0N/mlGBSdjjTg3FxuQ3NIkn57U1VjuNS6Y6+Qc39EWj0VZ/Oyev2OKtbYTdMAHg/cBKXbEbtrcIVT+AQ+WzHSQhBPr+fVBNCbaZ5+ud2wtR+Qdl3+6iM4gFwVS6xvvYIEEuZo3JstmssADUQnG6ImHLdGxW4p/xHYlsNqwufSe3E97955zi/hc3RlcGmgfZDsWoxhmCZzqVbH9WRGjwa5cX6MA2z6FLsCL1QB1ygxsX6ZFbnu3myda8Ap9nfVffPy7pmIEtfawugl/xNV+nAqBPr146I8tzjUiCys+ltxDvacNi6KrrYWYGx9uXnbfq7iepIelvJxfC/tHlvYf/Ke+dQREcKrwQHBHK0UZJMfC6ZcSbX5rWqBvfmrKhe9Y+T8n246542kIJYZvrC18GA4INeVetMGQQjmsFtE1/FMuJAqps5e92hpgNE1klcyic4Id44NkeI/mq9d X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3a030169-f550-4e2d-e13d-08d8d976dc18 X-MS-Exchange-CrossTenant-AuthSource: MW2PR0102MB3482.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Feb 2021 10:19:39.9798 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: z/jxPnz08fSj1nWJwRTwOsoZ/tezdBaGVCyBGiBvT0Nd9CJvXLqqlzBlzinT97noPB9RLyDKpTCvhzi7wY2mQkAmUBOUSLhvBkaFSu7fdtY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR01MB2320 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds an MFD driver for SMpro found on the Mt.Jade hardware reference platform with Ampere's Altra processor family. Signed-off-by: Quan Nguyen --- drivers/mfd/Kconfig | 10 ++++++++++ drivers/mfd/simple-mfd-i2c.c | 15 +++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b74efa469e90..5414371bdea1 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -77,6 +77,16 @@ config MFD_AS3711 help Support for the AS3711 PMIC from AMS +config MFD_SMPRO + tristate "Ampere Computing MFD SMpro core driver" + select MFD_SIMPLE_MFD_I2C + help + Say yes here to enable SMpro driver support for Ampere's Altra + processor family. + + Ampere's Altra SMpro exposes an I2C regmap interface that can + be accessed by child devices. + config MFD_AS3722 tristate "ams AS3722 Power Management IC" select MFD_CORE diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 87f684cff9a1..0459a9fbd3f5 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -21,14 +21,24 @@ static const struct regmap_config simple_regmap_config = { .val_bits = 8, }; +static const struct regmap_config simple_word_regmap_config = { + .reg_bits = 8, + .val_bits = 16, +}; + static int simple_mfd_i2c_probe(struct i2c_client *i2c) { const struct regmap_config *config; struct regmap *regmap; config = device_get_match_data(&i2c->dev); - if (!config) - config = &simple_regmap_config; + if (!config) { + if (of_device_is_compatible(i2c->dev.of_node, + "ampere,ac01-smpro")) + config = &simple_word_regmap_config; + else + config = &simple_regmap_config; + } regmap = devm_regmap_init_i2c(i2c, config); if (IS_ERR(regmap)) @@ -39,6 +49,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) static const struct of_device_id simple_mfd_i2c_of_match[] = { { .compatible = "kontron,sl28cpld" }, + { .compatible = "ampere,ac01-smpro" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); From patchwork Thu Feb 25 10:18:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12103863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AB94C433E9 for ; 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Nguyen" Subject: [PATCH 3/4] hwmon: smpro: Add Ampere's Altra smpro-hwmon driver Date: Thu, 25 Feb 2021 17:18:53 +0700 Message-Id: <20210225101854.13896-4-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210225101854.13896-1-quan@os.amperecomputing.com> References: <20210225101854.13896-1-quan@os.amperecomputing.com> X-Originating-IP: [118.69.219.201] X-ClientProxiedBy: HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) To MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from hcm-sw-17.amperecomputing.com (118.69.219.201) by HK0PR01CA0061.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3890.19 via Frontend Transport; Thu, 25 Feb 2021 10:19:40 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 92b473fa-c1fb-47e6-8e82-08d8d976de7e X-MS-TrafficTypeDiagnostic: MWHPR01MB2320: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1850; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BnYWbr2xN6JzflhTs73r9h71d2vM6lwM0NVYIT2QAsP6J9R60WOc/PHZgdFhgXlMT5FPzBRgUIakM45vj2e3GbFOEXk17geP9/um15+dTjbCXVaBk2TEXkenvg5hmhraH+GlkVjgsgy1MZacdbeyi/CYZxxLUePsqdX1yD5EVtFC+U1sCsSOy7QK38H15CWRmevrQ8PeFUyFb1MeC3s9kDCiucUt+W4hEIRimNp1z0ZhWS+4WgItUC/wp8mJ4W+I1dHNJpcGJI5FMe1WWPZdzD1WRk97KLZ4UznAU/pGIvdTw5OX3cwFlYegxwV62SpqXEchYeAzukPZsb2SHfHrKfRjtaJrbL6l1dwbV6APCwuy8oKciw44Xb6Nns6KIkq1iG6wKXw/p2UBcU8oOQsJidGQty4Oam6oLpSBMpc7k04Ptc4CQk/NCIYNGwhxzdlL/KNokm9mpW/A9+Mz0l7GU7r0jt57PnQEinrHb7pGCmtJDLoU2N+neJlwROZkaQxs1AajGvteuwX+clzVU17I4grdr/yewSLS1B6ga+/EU+3gNX6VANWQmWvzihvJiY04i1yCpBjIZ5yDXHJbP+VVFzdFZNWtYVfBkibgFPV/ewgaK/yBQSHyUwHC9oRLLnvtWwsP5Hl20WKMhNrOh7fgM4tSJX7KE6/iR6Tkd681hsE= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:MW2PR0102MB3482.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(376002)(396003)(346002)(136003)(39830400003)(366004)(83380400001)(956004)(2616005)(66556008)(6512007)(6666004)(107886003)(110136005)(66946007)(66476007)(52116002)(8936002)(921005)(316002)(86362001)(26005)(2906002)(1076003)(5660300002)(6486002)(186003)(4326008)(30864003)(6506007)(16526019)(8676002)(7416002)(478600001)(54906003)(2004002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData: UchllQNoVDDZuw2oNK6JrNQMVti/5mTxsL7fXVmeImrOPpLdA3JBE6dGqnNmfKfUKBZ/Zbd9FR7H6/a0iji3RwEEU+c0818g8rWoL0yIGvfCbVqUxIl92BBiHHz5/FcEd6arF8Equ5Cktt7HGFWTS+on+vaxsG3mTOrFDjD1yaGtVwORmlYrbgOeebnRcRdaYjRJnuM+9tSGo1CzSFKWZ2TL+wAG6Y2tj+HAFwqqM4xtqbTU9BsnpEwzgNwUqZys7WWFW42p7jgyfJX0uhm6XkOyDbofne/fClL4dAXl2REJS0dYr4VENuF3LAEZsIN5QqMIGuYeQYoETDrLiYpLJGaxTOXUucmyDJlT66+wICf2jQUJF4Kvp1sNy0fJp5xjnK/CWiXaeB+P6oYFj4jWBikLkavv0KL1T3Nv9fpuTAuVxoP1e2+DYmsf82WK159/PZI1JxJlhQBvE+2tKsFZ49ZsDndD7RdIUH0nhGEbvB9x84L6I95LFLp7/4elk1YXvSUZg9bjjgeG5VaVaO56mJKHfgYjaem6kYUKf+KpjforrA2JkzjO5ighlyxFVotTQ3jD+GOqjYv5QKkz01faYiVq4ZBMrOucbHl1cf8uGBU3Zr52sqZFZWPCWtjFcZIe/c16fDQLq69GMvFSUAAI+AbHAZQ9FJyB+N0/C7fPVDhD2w82c+a5peE4kV0GFGK7OI46SZ7H1el9iZpXO+NppfdmQ3WtOJxHn8QzsR2R3KXMEQHL6q6W5tjmaIkPRarSzSE96qQOmL4QOxL2TGDztADILoe5eYIru3fb1RHQR7QOSS36SBzjRQUHKXwjIcnaN6HvSI+pFJuqNm/R1IqJlOJ58WzCQU/w2qMOWRqK5uhDjQtLmq89oQ9/OpO6+Vy8YgPxaNT51BmSHkYC4JLZms/w2O+C82xO5t8wZklpcT0yyNDriNuwIepQLIzVRutMYkIUzAuKLQ2zEYaL5vlg2nSJpZ7ED2Mf/xchYQCUnneuDAtIrgtY+Fi5Z5yW32SmTak4Xp15fDk2MEsD7uq2FkLffzAEXkqN7zi/fcZI7mYAi3TkXrMLGyR1Vv4LVcIDzs1gWVpwgsULUSDI8TDG6CMEQ0dKpR8uLy2YdM1ntFUYQIWNEY6GBIlvtO4WTLvgGLdsFtjXAQuvIEGsnN4Ov3igyeYmwhxtyUPVJEyCOzJCyV+SJ4EtVvqpXTs9WIecm/22g2yIzqrwsO9SFZWcHJ85jO1n9iarC2N/y35pAnabsV4AQoS9ht9sH9CSQtwWj012fhNKMlXXEGVXpu9WqIU6uXAp1HSQ+qxUcytaBaARkHmC2nZtJOYKFl7uCRUB X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 92b473fa-c1fb-47e6-8e82-08d8d976de7e X-MS-Exchange-CrossTenant-AuthSource: MW2PR0102MB3482.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Feb 2021 10:19:43.9666 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /0I6MhyGfFW7Gzx7XunjZjCj8eanTu9VM9MwORSw49HzXtu0u6PEkLeWuEQS7pJCFzU7eqwM0mPi0Pwmks7XdmoQMbN5OlLigM7JIVoHIqY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR01MB2320 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds support for Ampere SMpro hwmon driver. This driver supports accessing various CPU sensors provided by the SMpro co-processor including temperature, power, voltages, and current. Signed-off-by: Quan Nguyen --- drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 + drivers/hwmon/smpro-hwmon.c | 620 ++++++++++++++++++++++++++++++++++++ 3 files changed, 629 insertions(+) create mode 100644 drivers/hwmon/smpro-hwmon.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 54f04e61fb83..7b0458bf903c 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -67,6 +67,14 @@ config SENSORS_ABITUGURU3 This driver can also be built as a module. If so, the module will be called abituguru3. +config SENSORS_SMPRO + tristate "Ampere's Altra SMpro hardware monitoring driver" + depends on MFD_SMPRO + help + If you say yes here you get support for the thermal, voltage, + current and power sensors of Ampere's Altra processor family SoC + with SMpro co-processor. + config SENSORS_AD7314 tristate "Analog Devices AD7314 and compatibles" depends on SPI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index fe38e8a5c979..ac0892540abb 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -173,6 +173,7 @@ obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o obj-$(CONFIG_SENSORS_SMM665) += smm665.o +obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o diff --git a/drivers/hwmon/smpro-hwmon.c b/drivers/hwmon/smpro-hwmon.c new file mode 100644 index 000000000000..d70764ffc78f --- /dev/null +++ b/drivers/hwmon/smpro-hwmon.c @@ -0,0 +1,620 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMPro Hardware Monitoring Driver + * + * Copyright (c) 2021, Ampere Computing LLC + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Identification Registers */ +#define MANUFACTURER_ID_REG 0x02 +#define AMPERE_MANUFACTURER_ID 0xCD3A + +/* Capability Registers */ +#define SOC_TDP_REG 0x0E + +/* Logical Power Sensor Registers */ +#define SOC_TEMP_REG 0x10 +#define SOC_VRD_TEMP_REG 0x11 +#define DIMM_VRD_TEMP_REG 0x12 +#define CORE_VRD_TEMP_REG 0x13 +#define CH0_DIMM_TEMP_REG 0x14 +#define CH1_DIMM_TEMP_REG 0x15 +#define CH2_DIMM_TEMP_REG 0x16 +#define CH3_DIMM_TEMP_REG 0x17 +#define CH4_DIMM_TEMP_REG 0x18 +#define CH5_DIMM_TEMP_REG 0x19 +#define CH6_DIMM_TEMP_REG 0x1A +#define CH7_DIMM_TEMP_REG 0x1B +#define RCA_VRD_TEMP_REG 0x1C + +#define CORE_VRD_PWR_REG 0x20 +#define SOC_PWR_REG 0x21 +#define DIMM_VRD1_PWR_REG 0x22 +#define DIMM_VRD2_PWR_REG 0x23 +#define CORE_VRD_PWR_MW_REG 0x26 +#define SOC_PWR_MW_REG 0x27 +#define DIMM_VRD1_PWR_MW_REG 0x28 +#define DIMM_VRD2_PWR_MW_REG 0x29 +#define RCA_VRD_PWR_REG 0x2A +#define RCA_VRD_PWR_MW_REG 0x2B + +#define MEM_HOT_THRESHOLD_REG 0x32 +#define SOC_VR_HOT_THRESHOLD_REG 0x33 +#define CORE_VRD_VOLT_REG 0x34 +#define SOC_VRD_VOLT_REG 0x35 +#define DIMM_VRD1_VOLT_REG 0x36 +#define DIMM_VRD2_VOLT_REG 0x37 +#define RCA_VRD_VOLT_REG 0x38 + +#define CORE_VRD_CURR_REG 0x39 +#define SOC_VRD_CURR_REG 0x3A +#define DIMM_VRD1_CURR_REG 0x3B +#define DIMM_VRD2_CURR_REG 0x3C +#define RCA_VRD_CURR_REG 0x3D + +/* Add for DIMM group */ +#define DIMM_GROUP_DUMMY_REG 0xFF + +struct smpro_hwmon { + struct regmap *regmap; +}; + +static const u8 temp_regs[] = { + SOC_TEMP_REG, + SOC_VRD_TEMP_REG, + DIMM_VRD_TEMP_REG, + CORE_VRD_TEMP_REG, + /* reserved for DIMM G0 */ + DIMM_GROUP_DUMMY_REG, + CH0_DIMM_TEMP_REG, + CH1_DIMM_TEMP_REG, + CH2_DIMM_TEMP_REG, + CH3_DIMM_TEMP_REG, + /* reserved for DIMM G1 */ + DIMM_GROUP_DUMMY_REG, + CH4_DIMM_TEMP_REG, + CH5_DIMM_TEMP_REG, + CH6_DIMM_TEMP_REG, + CH7_DIMM_TEMP_REG, + MEM_HOT_THRESHOLD_REG, + SOC_VR_HOT_THRESHOLD_REG, + RCA_VRD_TEMP_REG, +}; + +static const u8 volt_regs[] = { + CORE_VRD_VOLT_REG, + SOC_VRD_VOLT_REG, + DIMM_VRD1_VOLT_REG, + DIMM_VRD2_VOLT_REG, + /* vrd1 has higher priority than vrd2 using vrd1 as output for ddr */ + DIMM_VRD1_VOLT_REG, + RCA_VRD_VOLT_REG, +}; + +static const u8 curr_regs[] = { + CORE_VRD_CURR_REG, + SOC_VRD_CURR_REG, + DIMM_VRD1_CURR_REG, + DIMM_VRD2_CURR_REG, + RCA_VRD_CURR_REG, +}; + +enum pwr_regs { + CORE_VRD_PWR, + SOC_PWR, + DIMM_VRD1_PWR, + DIMM_VRD2_PWR, + CPU_VRD_PWR, + DIMM_VRD_PWR, + RCA_VRD_PWR, + SOC_TDP_PWR, +}; +static const char * const label[] = { + "SoC", + "SoC VRD", + "DIMM VRD", + "DIMM VRD1", + "DIMM VRD2", + "CORE VRD", + "CH0 DIMM", + "CH1 DIMM", + "CH2 DIMM", + "CH3 DIMM", + "CH4 DIMM", + "CH5 DIMM", + "CH6 DIMM", + "CH7 DIMM", + "MEM HOT", + "SoC VR HOT", + "CPU VRD", + "RCA VRD", + "SOC TDP", + "DIMM G0", + "DIMM G1", +}; + +static int smpro_read_temp(struct device *dev, u32 attr, int channel, + long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int t_max = 0xffffffff; + unsigned int value; + s32 i; + int ret; + + switch (attr) { + case hwmon_temp_input: + if (temp_regs[channel] == DIMM_GROUP_DUMMY_REG) { + for (i = 1; i <= 4; i++) { + ret = regmap_read(hwmon->regmap, + temp_regs[channel + i], &value); + if (ret) + return ret; + /* continue if invalid */ + if (value == 0xffff) + continue; + + value &= 0x1ff; /* 9-bit value */ + if (t_max != 0xffffffff) + t_max = (value > t_max) ? value : t_max; + else + t_max = value; + } + + if (t_max == 0xffffffff) + return -1; + + *val = t_max * 1000; + } else { + ret = regmap_read(hwmon->regmap, + temp_regs[channel], &value); + if (ret) + return ret; + *val = (value & 0x1ff) * 1000; + } + break; + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int smpro_read_in(struct device *dev, u32 attr, int channel, + long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_in_input: + ret = regmap_read(hwmon->regmap, volt_regs[channel], &value); + if (ret < 0) + return ret; + *val = value & 0x7fff; /* 15-bit value */ + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_curr(struct device *dev, u32 attr, int channel, + long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_curr_input: + ret = regmap_read(hwmon->regmap, curr_regs[channel], &value); + if (ret < 0) + return ret; + *val = value & 0x7fff; /* 15-bit value */ + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_power(struct device *dev, u32 attr, int channel, + long *val_pwr) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int val2, val2_mw; + unsigned int val, val_mw; + int ret; + + switch (attr) { + case hwmon_power_input: + switch (channel) { + case CORE_VRD_PWR: + ret = regmap_read(hwmon->regmap, + CORE_VRD_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + CORE_VRD_PWR_MW_REG, &val_mw); + if (ret) + return ret; + break; + case SOC_PWR: + ret = regmap_read(hwmon->regmap, + SOC_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + SOC_PWR_MW_REG, &val_mw); + if (ret) + return ret; + break; + case DIMM_VRD1_PWR: + ret = regmap_read(hwmon->regmap, + DIMM_VRD1_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + DIMM_VRD1_PWR_MW_REG, &val_mw); + if (ret) + return ret; + break; + case DIMM_VRD2_PWR: + ret = regmap_read(hwmon->regmap, + DIMM_VRD2_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + DIMM_VRD2_PWR_MW_REG, &val_mw); + if (ret) + return ret; + break; + case RCA_VRD_PWR: + ret = regmap_read(hwmon->regmap, + RCA_VRD_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + RCA_VRD_PWR_MW_REG, &val_mw); + if (ret) + return ret; + break; + case SOC_TDP_PWR: + ret = regmap_read(hwmon->regmap, + SOC_TDP_REG, &val); + if (ret) + return ret; + break; + case CPU_VRD_PWR: + ret = regmap_read(hwmon->regmap, + CORE_VRD_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + CORE_VRD_PWR_MW_REG, &val_mw); + if (!ret) + ret = regmap_read(hwmon->regmap, + SOC_PWR_REG, &val2); + if (!ret) + ret = regmap_read(hwmon->regmap, + SOC_PWR_MW_REG, &val2_mw); + if (ret) + return ret; + break; + case DIMM_VRD_PWR: + ret = regmap_read(hwmon->regmap, + DIMM_VRD1_PWR_REG, &val); + if (!ret) + ret = regmap_read(hwmon->regmap, + DIMM_VRD1_PWR_MW_REG, &val_mw); + if (!ret) + ret = regmap_read(hwmon->regmap, + DIMM_VRD2_PWR_REG, &val2); + if (!ret) + ret = regmap_read(hwmon->regmap, + DIMM_VRD2_PWR_MW_REG, &val2_mw); + if (ret) + return ret; + break; + default: + return -EOPNOTSUPP; + } + /* Set to 0 if invalid */ + if (val_mw == 0xffff) + val_mw = 0; + if (val2_mw == 0xffff) + val2_mw = 0; + + *val_pwr = (val + val2) * 1000000 + (val_mw + val2_mw) * 1000; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_temp: + return smpro_read_temp(dev, attr, channel, val); + case hwmon_in: + return smpro_read_in(dev, attr, channel, val); + case hwmon_power: + return smpro_read_power(dev, attr, channel, val); + case hwmon_curr: + return smpro_read_curr(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static int smpro_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + return -EOPNOTSUPP; +} + +static umode_t smpro_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + return 0444; +} + +static ssize_t show_label(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + int index = to_sensor_dev_attr(devattr)->index; + + return sprintf(buf, "%s\n", label[index]); +} + +static const u32 smpro_temp_config[] = { + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + HWMON_T_INPUT, + 0 +}; + +static const struct hwmon_channel_info smpro_temp = { + .type = hwmon_temp, + .config = smpro_temp_config, +}; + +static const u32 smpro_in_config[] = { + HWMON_I_INPUT, + HWMON_I_INPUT, + HWMON_I_INPUT, + HWMON_I_INPUT, + HWMON_I_INPUT, + HWMON_I_INPUT, + 0 +}; + +static const struct hwmon_channel_info smpro_in = { + .type = hwmon_in, + .config = smpro_in_config, +}; + +static const u32 smpro_curr_config[] = { + HWMON_C_INPUT, + HWMON_C_INPUT, + HWMON_C_INPUT, + HWMON_C_INPUT, + HWMON_C_INPUT, + 0 +}; + +static const struct hwmon_channel_info smpro_curr = { + .type = hwmon_curr, + .config = smpro_curr_config, +}; + +static const u32 smpro_power_config[] = { + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + HWMON_P_INPUT, + 0 +}; + +static const struct hwmon_channel_info smpro_power = { + .type = hwmon_power, + .config = smpro_power_config, +}; + +static const struct hwmon_channel_info *smpro_info[] = { + &smpro_temp, + &smpro_in, + &smpro_power, + &smpro_curr, + NULL +}; + +static const struct hwmon_ops smpro_hwmon_ops = { + .is_visible = smpro_is_visible, + .read = smpro_read, + .write = smpro_write, +}; + +static const struct hwmon_chip_info smpro_chip_info = { + .ops = &smpro_hwmon_ops, + .info = smpro_info, +}; + +static SENSOR_DEVICE_ATTR(temp1_label, 0444, show_label, NULL, 0); +static SENSOR_DEVICE_ATTR(temp2_label, 0444, show_label, NULL, 1); +static SENSOR_DEVICE_ATTR(temp3_label, 0444, show_label, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_label, 0444, show_label, NULL, 5); +static SENSOR_DEVICE_ATTR(temp5_label, 0444, show_label, NULL, 19); +static SENSOR_DEVICE_ATTR(temp6_label, 0444, show_label, NULL, 6); +static SENSOR_DEVICE_ATTR(temp7_label, 0444, show_label, NULL, 7); +static SENSOR_DEVICE_ATTR(temp8_label, 0444, show_label, NULL, 8); +static SENSOR_DEVICE_ATTR(temp9_label, 0444, show_label, NULL, 9); +static SENSOR_DEVICE_ATTR(temp10_label, 0444, show_label, NULL, 20); +static SENSOR_DEVICE_ATTR(temp11_label, 0444, show_label, NULL, 10); +static SENSOR_DEVICE_ATTR(temp12_label, 0444, show_label, NULL, 11); +static SENSOR_DEVICE_ATTR(temp13_label, 0444, show_label, NULL, 12); +static SENSOR_DEVICE_ATTR(temp14_label, 0444, show_label, NULL, 13); +static SENSOR_DEVICE_ATTR(temp15_label, 0444, show_label, NULL, 14); +static SENSOR_DEVICE_ATTR(temp16_label, 0444, show_label, NULL, 15); +static SENSOR_DEVICE_ATTR(temp17_label, 0444, show_label, NULL, 17); + +static SENSOR_DEVICE_ATTR(in0_label, 0444, show_label, NULL, 5); +static SENSOR_DEVICE_ATTR(in1_label, 0444, show_label, NULL, 1); +static SENSOR_DEVICE_ATTR(in2_label, 0444, show_label, NULL, 3); +static SENSOR_DEVICE_ATTR(in3_label, 0444, show_label, NULL, 4); +static SENSOR_DEVICE_ATTR(in4_label, 0444, show_label, NULL, 2); +static SENSOR_DEVICE_ATTR(in5_label, 0444, show_label, NULL, 17); + +static SENSOR_DEVICE_ATTR(power1_label, 0444, show_label, NULL, 5); +static SENSOR_DEVICE_ATTR(power2_label, 0444, show_label, NULL, 0); +static SENSOR_DEVICE_ATTR(power3_label, 0444, show_label, NULL, 3); +static SENSOR_DEVICE_ATTR(power4_label, 0444, show_label, NULL, 4); +static SENSOR_DEVICE_ATTR(power5_label, 0444, show_label, NULL, 16); +static SENSOR_DEVICE_ATTR(power6_label, 0444, show_label, NULL, 2); +static SENSOR_DEVICE_ATTR(power7_label, 0444, show_label, NULL, 17); +static SENSOR_DEVICE_ATTR(power8_label, 0444, show_label, NULL, 18); + +static SENSOR_DEVICE_ATTR(curr1_label, 0444, show_label, NULL, 5); +static SENSOR_DEVICE_ATTR(curr2_label, 0444, show_label, NULL, 1); +static SENSOR_DEVICE_ATTR(curr3_label, 0444, show_label, NULL, 3); +static SENSOR_DEVICE_ATTR(curr4_label, 0444, show_label, NULL, 4); +static SENSOR_DEVICE_ATTR(curr5_label, 0444, show_label, NULL, 17); + +static struct attribute *smpro_attrs[] = { + &sensor_dev_attr_temp1_label.dev_attr.attr, + &sensor_dev_attr_temp2_label.dev_attr.attr, + &sensor_dev_attr_temp3_label.dev_attr.attr, + &sensor_dev_attr_temp4_label.dev_attr.attr, + &sensor_dev_attr_temp5_label.dev_attr.attr, + &sensor_dev_attr_temp6_label.dev_attr.attr, + &sensor_dev_attr_temp7_label.dev_attr.attr, + &sensor_dev_attr_temp8_label.dev_attr.attr, + &sensor_dev_attr_temp9_label.dev_attr.attr, + &sensor_dev_attr_temp10_label.dev_attr.attr, + &sensor_dev_attr_temp11_label.dev_attr.attr, + &sensor_dev_attr_temp12_label.dev_attr.attr, + &sensor_dev_attr_temp13_label.dev_attr.attr, + &sensor_dev_attr_temp14_label.dev_attr.attr, + &sensor_dev_attr_temp15_label.dev_attr.attr, + &sensor_dev_attr_temp16_label.dev_attr.attr, + &sensor_dev_attr_temp17_label.dev_attr.attr, + + &sensor_dev_attr_in0_label.dev_attr.attr, + &sensor_dev_attr_in1_label.dev_attr.attr, + &sensor_dev_attr_in2_label.dev_attr.attr, + &sensor_dev_attr_in3_label.dev_attr.attr, + &sensor_dev_attr_in4_label.dev_attr.attr, + &sensor_dev_attr_in5_label.dev_attr.attr, + + &sensor_dev_attr_curr1_label.dev_attr.attr, + &sensor_dev_attr_curr2_label.dev_attr.attr, + &sensor_dev_attr_curr3_label.dev_attr.attr, + &sensor_dev_attr_curr4_label.dev_attr.attr, + &sensor_dev_attr_curr5_label.dev_attr.attr, + + &sensor_dev_attr_power1_label.dev_attr.attr, + &sensor_dev_attr_power2_label.dev_attr.attr, + &sensor_dev_attr_power3_label.dev_attr.attr, + &sensor_dev_attr_power4_label.dev_attr.attr, + &sensor_dev_attr_power5_label.dev_attr.attr, + &sensor_dev_attr_power6_label.dev_attr.attr, + &sensor_dev_attr_power7_label.dev_attr.attr, + &sensor_dev_attr_power8_label.dev_attr.attr, + + NULL +}; +ATTRIBUTE_GROUPS(smpro); + +static int is_valid_id(struct regmap *regmap) +{ + unsigned int val; + int ret; + + ret = regmap_read(regmap, MANUFACTURER_ID_REG, &val); + + return (ret || (val != AMPERE_MANUFACTURER_ID)) ? 0 : 1; +} + +static int smpro_hwmon_probe(struct platform_device *pdev) +{ + struct smpro_hwmon *hwmon; + struct device *hwmon_dev; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_hwmon), + GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + /* Check for valid ID */ + if (!is_valid_id(hwmon->regmap)) + dev_warn(&pdev->dev, "Hmmh, SMPro not ready yet\n"); + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, + "smpro_hwmon", hwmon, + &smpro_chip_info, smpro_groups); + if (IS_ERR(hwmon_dev)) + dev_err(&pdev->dev, "failed to register as hwmon device"); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static const struct of_device_id smpro_hwmon_of_match[] = { + { .compatible = "ampere,ac01-hwmon" }, + {} +}; +MODULE_DEVICE_TABLE(of, smpro_hwmon_of_match); + +static struct platform_driver smpro_hwmon_driver = { + .probe = smpro_hwmon_probe, + .driver = { + .name = "smpro-hwmon", + .of_match_table = smpro_hwmon_of_match, + }, +}; + +module_platform_driver(smpro_hwmon_driver); + +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMPro hwmon driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Feb 25 10:18:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12103861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A57AC43381 for ; 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dkim=none (message not signed) header.d=none;jms.id.au; dmarc=none action=none header.from=os.amperecomputing.com; Received: from MW2PR0102MB3482.prod.exchangelabs.com (2603:10b6:302:c::32) by MWHPR01MB2320.prod.exchangelabs.com (2603:10b6:300:26::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3890.19; Thu, 25 Feb 2021 10:19:48 +0000 Received: from MW2PR0102MB3482.prod.exchangelabs.com ([fe80::682c:4e20:b53d:e660]) by MW2PR0102MB3482.prod.exchangelabs.com ([fe80::682c:4e20:b53d:e660%7]) with mapi id 15.20.3890.019; Thu, 25 Feb 2021 10:19:48 +0000 From: Quan Nguyen To: Joel Stanley , Andrew Jeffery , Jean Delvare , Guenter Roeck , Rob Herring , Lee Jones , Jonathan Corbet , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org Cc: Open Source Submission , Phong Vo , "Thang Q . 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Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/smpro-hwmon.rst | 100 ++++++++++++++++++++++++++++ 2 files changed, 101 insertions(+) create mode 100644 Documentation/hwmon/smpro-hwmon.rst diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 8d5a2df1ecb6..b48a980ed08b 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -164,6 +164,7 @@ Hardware Monitoring Kernel Drivers sis5595 sl28cpld smm665 + smpro-hwmon smsc47b397 smsc47m192 smsc47m1 diff --git a/Documentation/hwmon/smpro-hwmon.rst b/Documentation/hwmon/smpro-hwmon.rst new file mode 100644 index 000000000000..d546b90982e5 --- /dev/null +++ b/Documentation/hwmon/smpro-hwmon.rst @@ -0,0 +1,100 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R)'s Altra(R) SMpro hwmon +============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following sensor types are supported by the driver: + + * temperature + * voltage + * current + * power + +The SMpro interface provides the registers to query the various sensors and +their values which are then exported to userspace by this driver. + +Usage Notes +----------- + +SMpro hwmon driver creates two sysfs files for each sensor. + +* File ``_label`` reports the sensor label. +* File ``_input`` returns the sensor value. + +The sysfs files are allocated in the SMpro root fs folder. +There is one root folder for each SMpro instance. + +When the SoC is turned off, the driver is failed to read the registers. +It returns TIMEDOUT Error(-110) for the read sensors. + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +=============== ============= ======= =============================================== +Name Unit Perm Description +temp1_input mili Celsius RO SoC temperature +temp2_input mili Celsius RO Highest temperature reported by the SoC VRDs +temp3_input mili Celsius RO Highest temperature reported by the DIMM VRDs +temp4_input mili Celsius RO Highest temperature reported by the Core VRDs +temp5_input mili Celsius RO Highest temperature of DIMM Channel 0 to 3 +temp6_input mili Celsius RO Temperature of DIMM0 on CH0 +temp7_input mili Celsius RO Temperature of DIMM0 on CH1 +temp8_input mili Celsius RO Temperature of DIMM0 on CH2 +temp9_input mili Celsius RO Temperature of DIMM0 on CH3 +temp10_input mili Celsius RO Highest temperature of DIMM Channel 4 to 7 +temp11_input mili Celsius RO Temperature of DIMM0 on CH4 +temp12_input mili Celsius RO Temperature of DIMM0 on CH5 +temp13_input mili Celsius RO Temperature of DIMM0 on CH6 +temp14_input mili Celsius RO Temperature of DIMM0 on CH7 +temp15_input mili Celsius RO MEM HOT Threshold +temp16_input mili Celsius RO SoC VRD HOT Threshold +temp17_input mili Celsius RO Highest temperature reported by the RCA VRD +in0_input mili Volt RO Core voltage +in1_input mili Volt RO SoC voltage +in2_input mili Volt RO DIMM VRD1 voltage +in3_input mili Volt RO DIMM VRD2 voltage +in4_input mili Volt RO Maximum voltage of DIMM VRD1 and VRD2 +in5_input mili Volt RO RCA VRD voltage +cur1_input mili Ampere RO Core VRD current +cur2_input mili Ampere RO SoC VRD current +cur3_input mili Ampere RO DIMM VRD1 current +cur4_input mili Ampere RO DIMM VRD2 current +cur5_input mili Ampere RO RCA VRD current +power1_input nano Wat RO Core VRD power +power2_input nano Wat RO SoC VRD power +power3_input nano Wat RO DIMM VRD1 power +power4_input nano Wat RO DIMM VRD2 power +power5_input nano Wat RO CPU VRD power, total of SoC and Core VRD power +power6_input nano Wat RO Total of DIMM VRD1 and VRD2 power +power7_input nano Wat RO RCA VRD power +power8_input nano Wat RO Socket TDP +=============== ============= ======= =============================================== + +Example:: + + # cat in0_input + 830 + # cat temp1_input + 37000 + # cat curr1_input + 9000 + # cat power5_input + 19500000