From patchwork Fri Feb 26 16:32:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AD57C433E6 for ; Fri, 26 Feb 2021 16:35:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F2B564EE2 for ; Fri, 26 Feb 2021 16:35:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1F2B564EE2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:42860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFg5D-00064V-To for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:35:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg2k-0003u2-Fp; Fri, 26 Feb 2021 11:32:43 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]:33992) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg2i-0007YJ-Us; Fri, 26 Feb 2021 11:32:42 -0500 Received: by mail-wm1-x336.google.com with SMTP id o10so1302185wmc.1; Fri, 26 Feb 2021 08:32:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nOq5iyMcYnp2lkKz6qC+70BZoqGGdKahRqfZnxYC4Rc=; b=MIivNJ7e9XPkANOqJbGY5lKphhSSmVnEPU8TXNAme91nhvYlV5u1pKA33EglzJuvTV lj9BQrcNXtdW/XViGNOniAlJiuwJZZPyJdbD0twF5tWYxclU134oMsjarOc2MZ7OZg7L jxeCloPB3+5n3dbOVN12nwB8yFcBTCZds9U+9LCZFw/Nj+t3lMl/VQyFng5WfMFqwBYX 3mnea/cFnniO8tHvUuY0cSnbTPzxSThKJ1DoFZMsJxdPbt2w+fkUKKo+J5VDSvm3bKei RcCiBfLXGQKpWYGPMKVizJI+Hb9DkDLTeZuMl/evTmF0I5P4HnKhh6STDCVB2nQrh24K pVlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=nOq5iyMcYnp2lkKz6qC+70BZoqGGdKahRqfZnxYC4Rc=; b=guYrGcig9E6dTHIWl5lPGuWFxvhkYdmauDp+d5Ur9bbeXgLHmtOFmyUSyRHkukS3Sb xoqm28tCVaQZ621+D74w7Ppo93awrkN6Oa0+p8IV6aByB5PKBrcK/LwMLpAdxVhvboTp 9gRAg36tkEqdp0pJDnDc3Yry/feZNBqdsK7BZfr7E6bcCGp1l2KFKjpQbyOij9/mQkps 7uCMtx+44A8aIMbwkWb6iwx+EKV/8mXwLgvCiJBiEyzo6mZsWGaX3J3Zv6k/V4aXH8No yrNMS1ZZT8g6XWyutnAxL3wysu40Uutg1hm4+ARJE8e4DlkP01i6xdN9aDnBO9ZZzweX z8dg== X-Gm-Message-State: AOAM531wJlxHDXLpD+DfaohzC9diO4Wa8qDoEq9cZKzvCoS+0JHARlJY zLsqaGbv30on9yCmlPUJ+Hlb3L3lyGU= X-Google-Smtp-Source: ABdhPJw1ssbsvOTtNWYtOVhhF1Q3Lrudc5JKlRWS1P8CFhiboT0XSXm+MjaaX+AdJ3khfagJ6zKOeA== X-Received: by 2002:a7b:c10c:: with SMTP id w12mr705868wmi.112.1614357157921; Fri, 26 Feb 2021 08:32:37 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id d29sm14123456wra.51.2021.02.26.08.32.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:32:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 01/16] target: Set CPUClass::vmsd instead of DeviceClass::vmsd Date: Fri, 26 Feb 2021 17:32:12 +0100 Message-Id: <20210226163227.4097950-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x336.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The cpu model is the single device available in user-mode. Since we want to restrict some fields to user-mode emulation, we prefer to set the vmsd field of CPUClass, rather than the DeviceClass one. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 2 +- target/cris/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/unicore32/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 27192b62e22..faabffe0796 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -237,7 +237,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = alpha_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_alpha_cpu; + cc->vmsd = &vmstate_alpha_cpu; #endif cc->disas_set_info = alpha_cpu_disas_set_info; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index ed983380fca..29a865b75d2 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -293,7 +293,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = cris_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = cris_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_cris_cpu; + cc->vmsd = &vmstate_cris_cpu; #endif cc->gdb_num_core_regs = 49; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index d8fad52d1fe..4f142de6e45 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -162,7 +162,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = hppa_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_hppa_cpu; + cc->vmsd = &vmstate_hppa_cpu; #endif cc->disas_set_info = hppa_cpu_disas_set_info; cc->gdb_num_core_regs = 128; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 37d2ed9dc79..c98fb1e33be 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -533,7 +533,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->gdb_write_register = m68k_cpu_gdb_write_register; #if defined(CONFIG_SOFTMMU) cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_m68k_cpu; + cc->vmsd = &vmstate_m68k_cpu; #endif cc->disas_set_info = m68k_cpu_disas_set_info; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 433ba202037..335dfdc734e 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -387,7 +387,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug; - dc->vmsd = &vmstate_mb_cpu; + cc->vmsd = &vmstate_mb_cpu; #endif device_class_set_props(dc, mb_properties); cc->gdb_num_core_regs = 32 + 27; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 2c64842f46b..79d246d1930 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -204,7 +204,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_openrisc_cpu; + cc->vmsd = &vmstate_openrisc_cpu; #endif cc->gdb_num_core_regs = 32 + 3; cc->disas_set_info = openrisc_disas_set_info; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index ac65c88f1f8..bd44de53729 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -262,7 +262,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_num_core_regs = 59; - dc->vmsd = &vmstate_sh_cpu; + cc->vmsd = &vmstate_sh_cpu; cc->tcg_ops = &superh_tcg_ops; } diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 0258884f845..12894ffac6a 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -146,7 +146,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = uc32_cpu_dump_state; cc->set_pc = uc32_cpu_set_pc; cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug; - dc->vmsd = &vmstate_uc32_cpu; + cc->vmsd = &vmstate_uc32_cpu; cc->tcg_ops = &uc32_tcg_ops; } diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index e2b2c7a71c1..6bedd5b97b8 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -218,7 +218,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; #endif cc->disas_set_info = xtensa_cpu_disas_set_info; - dc->vmsd = &vmstate_xtensa_cpu; + cc->vmsd = &vmstate_xtensa_cpu; cc->tcg_ops = &xtensa_tcg_ops; } From patchwork Fri Feb 26 16:32:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D2FEC433E6 for ; Fri, 26 Feb 2021 16:39:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DF62964F13 for ; Fri, 26 Feb 2021 16:39:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DF62964F13 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52724 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFg9K-0002C7-UJ for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:39:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg2r-0003xo-32; Fri, 26 Feb 2021 11:32:49 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:44834) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg2o-0007Zm-Q3; Fri, 26 Feb 2021 11:32:48 -0500 Received: by mail-wr1-x42b.google.com with SMTP id h98so9140259wrh.11; Fri, 26 Feb 2021 08:32:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UQM81mur+9UHjxbQN0Zv4wGjBmPMsrfz+L5iL9ZySpM=; b=hS9C85/oo+y2Yc3FC6Hq/wW/6MOhCok3wlDBQ4fIK52mjwH2SNfsJdL9E4jDk6uF1u myIEPX+MIlA7yhaqncVRUft7WD5a2sGTSy4m7qD9w+Ru1ghouBPLbXMUkgjLKP9A/JwC f2yyUJC0cJrgj18U/TsJnGx54V7jPmV8qThIGZrRPXwNgvJn5RNqtobZfdSV18lKrNUv xxlbIfgP8O4+byfH+OTqYKKyhCRQUa40K3PfApfYwWiCfxVkVJlkR4gv6Q7BqxNSpGS3 bF0XQKAEs3JNuYdCPFU8mSNjtKCJd2Y3b9FtSnXhfVBQz9ANK1K8pWc8MUCUunQh2p7C BfjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=UQM81mur+9UHjxbQN0Zv4wGjBmPMsrfz+L5iL9ZySpM=; b=kfzyH0huvtDR/GKrRZpzK9ZMESTxA4FYYFEjKdr1ShYjqDdxK4LrZON3cT7SMQsm4S e6pMMIbg65FaqiIbkj5ioTiTh7bGBjACSVnE+TskthLKvxGmdcfUNo9VRSxKj/AiiYOj 2LhRvlFmp/w9YAxnWlqOy0maQuMJQQ0DeM1nz+uYwv/0Y3mgLWj1HrqdGdPJnJe3Mk8x 983mIJ5VECe2AS0BqUdPRchq66NVCxRG4uLSGkofnPuwjoXx8bNcfr6UhNoM1w/7/JMn 2NiW5gFuC1uTQcHf/hr9nOIp5Ap8TlVLyBbsCILMVXrDTjc2Hb8aeacQX5K9QWbhkmzE m3Zg== X-Gm-Message-State: AOAM530G3N9gwgLVQCvxk0mHmDGDQuscdjJQb3VcS2aWJPNBm9N7rVFe xf0yEln1GDRgTvtA/IzSj4ODqnpbOHI= X-Google-Smtp-Source: ABdhPJzImIoHGIqzmSEscH67EA8q0vm8DYLiMAdRlkpSxbxE8lkYw/NVJptyGI7VkNaymQqhD75XBw== X-Received: by 2002:adf:e60e:: with SMTP id p14mr4034695wrm.221.1614357163853; Fri, 26 Feb 2021 08:32:43 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id b15sm14268366wmd.41.2021.02.26.08.32.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:32:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 02/16] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Date: Fri, 26 Feb 2021 17:32:13 +0100 Message-Id: <20210226163227.4097950-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To be able to later extract the cpu_get_phys_page_debug() and cpu_asidx_from_attrs() handlers from CPUClass, un-inline them from "hw/core/cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 33 ++++----------------------------- hw/core/cpu.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+), 29 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c005d3dc2d8..2d43f78819f 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -578,18 +578,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags); * * Returns: Corresponding physical page address or -1 if no page found. */ -static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, - MemTxAttrs *attrs) -{ - CPUClass *cc = CPU_GET_CLASS(cpu); - - if (cc->get_phys_page_attrs_debug) { - return cc->get_phys_page_attrs_debug(cpu, addr, attrs); - } - /* Fallback for CPUs which don't implement the _attrs_ hook */ - *attrs = MEMTXATTRS_UNSPECIFIED; - return cc->get_phys_page_debug(cpu, addr); -} +hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, + MemTxAttrs *attrs); /** * cpu_get_phys_page_debug: @@ -601,12 +591,7 @@ static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, * * Returns: Corresponding physical page address or -1 if no page found. */ -static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) -{ - MemTxAttrs attrs = {}; - - return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs); -} +hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); /** cpu_asidx_from_attrs: * @cpu: CPU @@ -615,17 +600,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) * Returns the address space index specifying the CPU AddressSpace * to use for a memory access with the given transaction attributes. */ -static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs) -{ - CPUClass *cc = CPU_GET_CLASS(cpu); - int ret = 0; - - if (cc->asidx_from_attrs) { - ret = cc->asidx_from_attrs(cpu, attrs); - assert(ret < cpu->num_ases && ret >= 0); - } - return ret; -} +int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); #endif /* CONFIG_USER_ONLY */ diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 00330ba07de..4dce35f832f 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -94,6 +94,38 @@ static void cpu_common_get_memory_mapping(CPUState *cpu, error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); } +hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, + MemTxAttrs *attrs) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->get_phys_page_attrs_debug) { + return cc->get_phys_page_attrs_debug(cpu, addr, attrs); + } + /* Fallback for CPUs which don't implement the _attrs_ hook */ + *attrs = MEMTXATTRS_UNSPECIFIED; + return cc->get_phys_page_debug(cpu, addr); +} + +hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) +{ + MemTxAttrs attrs = {}; + + return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs); +} + +int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + int ret = 0; + + if (cc->asidx_from_attrs) { + ret = cc->asidx_from_attrs(cpu, attrs); + assert(ret < cpu->num_ases && ret >= 0); + } + return ret; +} + /* Resetting the IRQ comes from across the code base so we take the * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) From patchwork Fri Feb 26 16:32:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9BC1C433DB for ; Fri, 26 Feb 2021 16:44:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5737964F14 for ; Fri, 26 Feb 2021 16:44:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5737964F14 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33000 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgEJ-00062U-DW for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:44:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg2w-00045e-9Y; Fri, 26 Feb 2021 11:32:54 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:39105) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg2u-0007ao-LH; Fri, 26 Feb 2021 11:32:53 -0500 Received: by mail-wr1-x42d.google.com with SMTP id b18so2678394wrn.6; Fri, 26 Feb 2021 08:32:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=alNnX6GeE8sTwFbIWBvN2VrnGh2+v4nR5yjKLFDEoAw=; b=uyLMHlRDhmj2W3V3ce9VzgPU9r6OpFofbOSN9lX/cs7+Tmdo/xSLuzIAUfNU0EMI4I 23Ze1PKYwLOkQn7eEaZgrTKXetGQprjQrfqOu6co1hwfi1og/IyqrUDIt5QvCk9DdvKT mYhhjzPXto23Dhqs5Pukg9PsRMu4WhzkzF4hjTxLplbu2kkKYTnwOsxCjM4Rpv4NgEOy /mB+EUK2gj5Au/d/Mwuk4AsG0Lj7LlfkFMvmpBcS0eeiCMebZw5VDoDr1F6bdEbKS1Ro 4KOSfzmq2Qi9TvR563kHISpz3tA3QNMs7n0pCw1IcDTwRxE7F9aHdgkpRQt+52QKAyCU w3mQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=alNnX6GeE8sTwFbIWBvN2VrnGh2+v4nR5yjKLFDEoAw=; b=XmjCsNk9bRW8mmTUkwll739YDMrHXxqW0dKO1qRTjaC6gxJwAwICHP/ouyQcNMD74o psWfN2aESVEyLEmcx8mh3r0wFsBK6zxHnrapzMtMxZPFSXUa4dlt3j8Cgd0qRKU4L8rs MpAn98OgZvL3tH0LFuHGRbpAbx1/hVZn7DOfDKObDDcZc3BganwlqLWU3vGGNYUwOmOv ZvCCnaqptgYGYhnP4na6AI6HOoBX5V5ix7D7mJCQzS8kxFIJ093o7InntgBFP2JILhVe SYp3Lm5QF5G2IW97F3vOfIz97YgOimDjkzwTM+Rcp8wczvzcohvCjKp8X/YWpvM+QIT/ FTwQ== X-Gm-Message-State: AOAM533IqQIvDsJKfcuTyA52AMEvq0eVLQEV2EhxTmgMDVkcpZwig+fy D4aRBaxty50syKVNY2VzWK1dB6mlANU= X-Google-Smtp-Source: ABdhPJzDkN6tyMjmW6kiH+JF3nWHZrnzVfI10cUhsz+my/NvSxcjCUQIcnL4ukyU+tijzW/+2XMUqA== X-Received: by 2002:a5d:6ca6:: with SMTP id a6mr1465183wra.179.1614357169623; Fri, 26 Feb 2021 08:32:49 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id k15sm16661875wrn.0.2021.02.26.08.32.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:32:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 03/16] cpu: Introduce cpu_virtio_is_big_endian() Date: Fri, 26 Feb 2021 17:32:14 +0100 Message-Id: <20210226163227.4097950-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42d.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Introduce the cpu_virtio_is_big_endian() generic helper to avoid calling CPUClass internal virtio_is_big_endian() one. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 9 +++++++++ hw/core/cpu.c | 8 ++++++-- hw/virtio/virtio.c | 4 +--- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2d43f78819f..b12028c3c03 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -602,6 +602,15 @@ hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); */ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs); +/** + * cpu_virtio_is_big_endian: + * @cpu: CPU + + * Returns %true if a CPU which supports runtime configurable endianness + * is currently big-endian. + */ +bool cpu_virtio_is_big_endian(CPUState *cpu); + #endif /* CONFIG_USER_ONLY */ /** diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 4dce35f832f..daaff56a79e 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -218,8 +218,13 @@ static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) return 0; } -static bool cpu_common_virtio_is_big_endian(CPUState *cpu) +bool cpu_virtio_is_big_endian(CPUState *cpu) { + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->virtio_is_big_endian) { + return cc->virtio_is_big_endian(cpu); + } return target_words_bigendian(); } @@ -438,7 +443,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->write_elf64_note = cpu_common_write_elf64_note; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; - k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 1fd1917ca0f..fe6a4be99e4 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -1973,9 +1973,7 @@ static enum virtio_device_endian virtio_default_endian(void) static enum virtio_device_endian virtio_current_cpu_endian(void) { - CPUClass *cc = CPU_GET_CLASS(current_cpu); - - if (cc->virtio_is_big_endian(current_cpu)) { + if (cpu_virtio_is_big_endian(current_cpu)) { return VIRTIO_DEVICE_ENDIAN_BIG; } else { return VIRTIO_DEVICE_ENDIAN_LITTLE; From patchwork Fri Feb 26 16:32:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 717EFC433E0 for ; Fri, 26 Feb 2021 16:36:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0FBB964F0D for ; Fri, 26 Feb 2021 16:36:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0FBB964F0D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46876 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFg6b-0007wv-3y for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:36:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg32-0004KP-8L; Fri, 26 Feb 2021 11:33:00 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:39386) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg30-0007cc-Jb; Fri, 26 Feb 2021 11:33:00 -0500 Received: by mail-wm1-x333.google.com with SMTP id u125so8313661wmg.4; Fri, 26 Feb 2021 08:32:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VJm0iGgu/pocJ2Vudv8ibS2Ot9Xd+ih0+p5aBEZz7PY=; b=AvV3HzGz6b/FxsITj4P+nmJUJQc0hWFWajeyGY2576inTmfr58Uxlen0K113mri4FX 1JeATUrLlt7rlomIPZwF54l28sA5yY/kPnDRpdiSVVhRwRxPKJe5bIMLGSh8UDbTIWqw XAdg0NCQYabBASrsNCznKn16XIRBa39OwiRmnrGXJ0gzkS5BSH1Cdjnt0CGa3XG5TwRf ABNtaOmo1H6pQLT7bVepiBCitq56o8CHATraAUjItnqzibrjHNcOR/NW4U9ppMrjodlW i5wx45gaYlN3fy2IvMvDRR7DkkaM3wOOkB5PSVoxJFNcEWPyEd4mhygPjJ57IBZhzW7Q I0JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=VJm0iGgu/pocJ2Vudv8ibS2Ot9Xd+ih0+p5aBEZz7PY=; b=maEoktb2ApRtdUUVRi6kxL4HemrsgLchjxXX9/tnQRFUh8WriWmJnyMzjtUsiAPgdY 2d8UJlcjtEiBLAcOkgyhal/31LIvSENgLWuAC6g9CyPb0AItaee5hNtS3SAx4tnNakIt 1D4xsOg/S7KDQBk+AlQ+u3SDrSbUwOnRfxgilNdr5axWeTdRHLTPyMYLjN82EUHmRyep WAGaUNNd0Tropzz/CXGXpjRMogHWFKBZ6eYXD5aAiK413OpbcBAVnh8zl7X819m5mhpg 2hRw3Ln2ywQZLebujEapvQRcTURoj/EuxtH6Tac2FHw9dHV6ykho7pLEDfFwn6TXh+tY M5uQ== X-Gm-Message-State: AOAM530KfS2t4zx8odGpuPOXndS1ABZ/RCcNHKwRu2B2SYfoXRC2Y/SY LbyRlRUTHJiO6tQeNiR2q7TyLDQ0+8Q= X-Google-Smtp-Source: ABdhPJy2diKC+uzbdNrnj6CbxvZ0e04xhEmDFH5D/f0q/qJQc22GX1GxaoChg+LID1dCZnOMcBehSw== X-Received: by 2002:a7b:c010:: with SMTP id c16mr3757539wmb.46.1614357175503; Fri, 26 Feb 2021 08:32:55 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id c12sm14340059wru.71.2021.02.26.08.32.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:32:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 04/16] cpu: Directly use cpu_write_elf*() fallback handlers in place Date: Fri, 26 Feb 2021 17:32:15 +0100 Message-Id: <20210226163227.4097950-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x333.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" No code directly accesses CPUClass::write_elf*() handlers out of hw/core/cpu.c (the rest are assignation in target/ code): $ git grep -F -- '->write_elf' hw/core/cpu.c:157: return (*cc->write_elf32_qemunote)(f, cpu, opaque); hw/core/cpu.c:171: return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); hw/core/cpu.c:186: return (*cc->write_elf64_qemunote)(f, cpu, opaque); hw/core/cpu.c:200: return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); hw/core/cpu.c:440: k->write_elf32_qemunote = cpu_common_write_elf32_qemunote; hw/core/cpu.c:441: k->write_elf32_note = cpu_common_write_elf32_note; hw/core/cpu.c:442: k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; hw/core/cpu.c:443: k->write_elf64_note = cpu_common_write_elf64_note; target/arm/cpu.c:2304: cc->write_elf64_note = arm_cpu_write_elf64_note; target/arm/cpu.c:2305: cc->write_elf32_note = arm_cpu_write_elf32_note; target/i386/cpu.c:7425: cc->write_elf64_note = x86_cpu_write_elf64_note; target/i386/cpu.c:7426: cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote; target/i386/cpu.c:7427: cc->write_elf32_note = x86_cpu_write_elf32_note; target/i386/cpu.c:7428: cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote; target/ppc/translate_init.c.inc:10891: cc->write_elf64_note = ppc64_cpu_write_elf64_note; target/ppc/translate_init.c.inc:10892: cc->write_elf32_note = ppc32_cpu_write_elf32_note; target/s390x/cpu.c:522: cc->write_elf64_note = s390_cpu_write_elf64_note; Check the handler presence in place and remove the common fallback code. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu.c | 43 ++++++++++++------------------------------- 1 file changed, 12 insertions(+), 31 deletions(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index daaff56a79e..a9ee2c74ec5 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -154,60 +154,45 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, { CPUClass *cc = CPU_GET_CLASS(cpu); + if (!cc->write_elf32_qemunote) { + return 0; + } return (*cc->write_elf32_qemunote)(f, cpu, opaque); } -static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f, - CPUState *cpu, void *opaque) -{ - return 0; -} - int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque) { CPUClass *cc = CPU_GET_CLASS(cpu); + if (!cc->write_elf32_note) { + return -1; + } return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); } -static int cpu_common_write_elf32_note(WriteCoreDumpFunction f, - CPUState *cpu, int cpuid, - void *opaque) -{ - return -1; -} - int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void *opaque) { CPUClass *cc = CPU_GET_CLASS(cpu); + if (!cc->write_elf64_qemunote) { + return 0; + } return (*cc->write_elf64_qemunote)(f, cpu, opaque); } -static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f, - CPUState *cpu, void *opaque) -{ - return 0; -} - int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque) { CPUClass *cc = CPU_GET_CLASS(cpu); + if (!cc->write_elf64_note) { + return -1; + } return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); } -static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, - CPUState *cpu, int cpuid, - void *opaque) -{ - return -1; -} - - static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) { return 0; @@ -437,10 +422,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->has_work = cpu_common_has_work; k->get_paging_enabled = cpu_common_get_paging_enabled; k->get_memory_mapping = cpu_common_get_memory_mapping; - k->write_elf32_qemunote = cpu_common_write_elf32_qemunote; - k->write_elf32_note = cpu_common_write_elf32_note; - k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; - k->write_elf64_note = cpu_common_write_elf64_note; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); From patchwork Fri Feb 26 16:32:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80871C433DB for ; Fri, 26 Feb 2021 16:41:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BF8CA64F0E for ; Fri, 26 Feb 2021 16:41:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BF8CA64F0E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55752 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgBA-0003Xz-Hp for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:41:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg37-0004XK-PM; Fri, 26 Feb 2021 11:33:05 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]:55879) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg36-0007er-AL; Fri, 26 Feb 2021 11:33:05 -0500 Received: by mail-wm1-x331.google.com with SMTP id w7so7895423wmb.5; Fri, 26 Feb 2021 08:33:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yI5v3ChjpgUoMVznW3/vQVCaXLpm+f+cFTMRG3SQklk=; b=BRX2O+8rPgMmAhoMuArR6BGQp9RPtIMCCDWft0DsYREYvSmofpcL+CWu+E2K4+ANba +i6L5uoXgpMwGS7GPuSGa4hku2StEpsEN8VWJL/8Og6ToJOkY7W3PFk9yJuSnDCSH4E0 tq2cKQc3VI1yNDxWQCJriUXuc1hXwJrhqfz+L92ql4JTkOvatwZnvpNGIGNlhV2xETp7 93eMcnE5X3/X0JmbORZETZCLIv+JRGLK9nVaeqAoFhmZqtMUdXj7t4h9NVIJuSN8+Ohd /Xuqu8hAHm2q914h2DjZvk/4ksJt7YvvCDCu9MMzebWMhWlxmC8Wbg5EZ5rLm2RZfJU1 rbGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=yI5v3ChjpgUoMVznW3/vQVCaXLpm+f+cFTMRG3SQklk=; b=TsPjvc0OuKtVYq9J+WLmPHWqtcNTScUjZtgkg/aAZAPKVaUhktIzZorTiJkQCvmnq+ DzzalSNlCO1/itox7DrZkzWCjgIUiNzFQ1lUyL5MfMeCN8lNG4SUNYT3/R2+LglvuTMM kjIg/gEhbBiUvkqGmbB7HQZlMbQKRYV67Hiq/JEq973yqqq7CTvqX2nUQGyqR3PRVpoo 1ucqjv8DR3h9oFmwTCe2nVCQSwFMQjP9BjMqM8NvG0c3gXzWbaKoF5KdeZPukhi9YYqV BPl7+vlHihnQ9sPn/R1CfF9CyRdlcchcwlJ98c4aSRMLaz5IU0uvDTyTAfFbXxNDpGQm 0CQw== X-Gm-Message-State: AOAM533yR+esQSfu5gMdHVaijVSIuL2jCnI6uNrWKlaTggDVW398rLo0 XCAsEojFWjyK3fQLSazIKQT2hA8wJAU= X-Google-Smtp-Source: ABdhPJwCBhB2ciT+Du95bx+5RDuSosOJPrCa8N0jHOr+l+XBkasB6CnQVnlRXwMsyaCwStcBFRU3Xg== X-Received: by 2002:a7b:c4d5:: with SMTP id g21mr3644774wmk.161.1614357181284; Fri, 26 Feb 2021 08:33:01 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id c128sm12749844wma.37.2021.02.26.08.32.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 05/16] cpu: Directly use get_paging_enabled() fallback handlers in place Date: Fri, 26 Feb 2021 17:32:16 +0100 Message-Id: <20210226163227.4097950-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x331.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" No code uses CPUClass::get_paging_enabled() outside of hw/core/cpu.c: $ git grep -F -- '->get_paging_enabled' hw/core/cpu.c:74: return cc->get_paging_enabled(cpu); hw/core/cpu.c:438: k->get_paging_enabled = cpu_common_get_paging_enabled; target/i386/cpu.c:7418: cc->get_paging_enabled = x86_cpu_get_paging_enabled; Check the handler presence in place and remove the common fallback code. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index a9ee2c74ec5..1de00bbb474 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -71,11 +71,10 @@ bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); - return cc->get_paging_enabled(cpu); -} + if (cc->get_paging_enabled) { + return cc->get_paging_enabled(cpu); + } -static bool cpu_common_get_paging_enabled(const CPUState *cpu) -{ return false; } @@ -420,7 +419,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->parse_features = cpu_common_parse_features; k->get_arch_id = cpu_common_get_arch_id; k->has_work = cpu_common_has_work; - k->get_paging_enabled = cpu_common_get_paging_enabled; k->get_memory_mapping = cpu_common_get_memory_mapping; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; From patchwork Fri Feb 26 16:32:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106933 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 067CDC433E0 for ; Fri, 26 Feb 2021 16:51:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8783264F0E for ; Fri, 26 Feb 2021 16:51:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8783264F0E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:44576 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgKW-0002cP-Ei for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:51:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53574) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3D-0004jd-JJ; Fri, 26 Feb 2021 11:33:17 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:42052) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3C-0007g7-3R; Fri, 26 Feb 2021 11:33:11 -0500 Received: by mail-wr1-x432.google.com with SMTP id r3so9145174wro.9; Fri, 26 Feb 2021 08:33:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iDkHmNWDJUjsisDNEA+tDXF79jqbgWv+Yeaa+F2Cdm4=; b=rhVyMHsN6sD4XaBIDbOSPH1f1Gxr3TD8f2RxmMFKtq7gJOLr9b9PCG7lF2RGJdV+a3 EPKU5+KwYMhmhmFfgwQ846SFNCq9yEwx90M2M4mamOpZr0rr3DuqHZyHUaX3z9qovWfY fLc+IKIokbn1R+jlLTV1aJ+ZbjWU/3ZDv3zn4RoRCAWR9uxMY6YYaK9G/381qbrMSbIl 2NfWE/eMlHxRTeiJog1gV8HCQO7afmWuqVXh1gAOqHWTwX8LkGaXz8xt6Ie5vadA6U2c WeFjXCAvr79dn/okef5E+E3lmQMd4G0ygdkqSUHgf12ErIe1czDxwREOBsGJ2/e3F0gd PPsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=iDkHmNWDJUjsisDNEA+tDXF79jqbgWv+Yeaa+F2Cdm4=; b=W0UoRJiNHNf/VdkGb1rgTtPa0BUTvDcnCPQIsoxL5u0lXZOvnDmIor5Lm/M0bDZ+fm D8dcR1IsO8MM/Ga36LmnipXnount3sNZmQtG8sJHaxNRglCg+aCw85IuQvIUiS7ZD1Vw iBVsiOprEfUMYb5zwW/gvtnsej2O53IRPvycovnEqY0XAwz+tg5M0/uAIHrVRkHwmIFL ZEzYfs0W/Rerq2ge3/nHxVaBXP2MWXGx8Ig0WGO4yX8VcakTPw/4ENsbXU/n4HSX0Rmy iO6jzaRETqdixcwjPs9R8VDDfk/DWUvwIIJbfi6bTU8mldoHLqjojtyHcOOhuthFIaCj Tyng== X-Gm-Message-State: AOAM531BtWY8jnpwJTsGWzNaxilso6tCpWvhW13NACKUHmqiIM2JZu6E +ySBVpCSTsW1/T1ySEVzTl2yxgdKrjU= X-Google-Smtp-Source: ABdhPJxqjSMsXYtj2QXQr+6zgeLmiV+MsnF1M83EQ0njAM80bc1w/PXXjJ1efpDeWkDlTSCXO7L4pQ== X-Received: by 2002:adf:dcd2:: with SMTP id x18mr4226702wrm.361.1614357187210; Fri, 26 Feb 2021 08:33:07 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id u4sm13542416wrr.37.2021.02.26.08.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 06/16] cpu: Directly use get_memory_mapping() fallback handlers in place Date: Fri, 26 Feb 2021 17:32:17 +0100 Message-Id: <20210226163227.4097950-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x432.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" No code uses CPUClass::get_memory_mapping() outside of hw/core/cpu.c: $ git grep -F -- '->get_memory_mapping' hw/core/cpu.c:87: cc->get_memory_mapping(cpu, list, errp); hw/core/cpu.c:439: k->get_memory_mapping = cpu_common_get_memory_mapping; target/i386/cpu.c:7422: cc->get_memory_mapping = x86_cpu_get_memory_mapping; Check the handler presence in place and remove the common fallback code. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 1de00bbb474..5abf8bed2e4 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -83,13 +83,11 @@ void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, { CPUClass *cc = CPU_GET_CLASS(cpu); - cc->get_memory_mapping(cpu, list, errp); -} + if (cc->get_memory_mapping) { + cc->get_memory_mapping(cpu, list, errp); + return; + } -static void cpu_common_get_memory_mapping(CPUState *cpu, - MemoryMappingList *list, - Error **errp) -{ error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); } @@ -419,7 +417,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->parse_features = cpu_common_parse_features; k->get_arch_id = cpu_common_get_arch_id; k->has_work = cpu_common_has_work; - k->get_memory_mapping = cpu_common_get_memory_mapping; k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); From patchwork Fri Feb 26 16:32:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D776C433DB for ; Fri, 26 Feb 2021 16:43:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8FC1064F14 for ; Fri, 26 Feb 2021 16:43:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8FC1064F14 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58832 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgDR-00051d-I0 for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:43:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53722) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3X-0004pp-9H; Fri, 26 Feb 2021 11:33:31 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:42056) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3P-0007i0-Pi; Fri, 26 Feb 2021 11:33:30 -0500 Received: by mail-wr1-x435.google.com with SMTP id r3so9145468wro.9; Fri, 26 Feb 2021 08:33:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cqYmlwAyP4EwEP7vrTu/PZK1/0mxFb/0cmm6txRTavI=; b=Q/GVwYuNkGxJ/Q9ke2SuYtBSrUx9A0eBdyi9iyh/L1/r8tBvCHUEzBfvy/KNeNNiSn Cr9TNGEdwYFcSYMMdCyOeY1i/Ba4c8agsZ1NOCvMqIbZU4KXJ2kcFOqOJpuAsO31fGSc h0OJ0ZsXfoXThyE0Sa14wpmw+MsUuHlaWW5dGVBOSDCOaZHZigJnejCy28de26GfIfDu Zhcl+lJwEuDk4cM2C5NLpB+DAjfuBIMhXccHgVE/27sLDUUqxlUkIs8RvpNvdacpnubd rB9gusji7bHn0Ai3bFKvCZlU4J/GUpdCOtvKWGy9nA32xrkBfuQJAnM0Y4+CEOMDDs37 4jIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=cqYmlwAyP4EwEP7vrTu/PZK1/0mxFb/0cmm6txRTavI=; b=WnExRvIl2DSsdTCYEiwNapSqbE7Df0TN+ZBbh0Uk1YU08//bKGNY4Br+gmiAVv9v1n yAX/VG5b9XEnOLcnRXuIKVowRYGwVYkEUW9tk2KVqLdiyT+qS1gciI5Q3UtLu9WD1eyJ rWu20Y72XN4G9jkwjCsICradMUjtPOdulow6sqyL2H6O0kkb9MB+5YWe7NYQFIiUwhXp Uq9s9fN2NqZwk/6yTyC0YQAZpJz5VG0mQPJyEksmzpGw35Jr/aCcafzK7i/QIf/JElSA Xj0PqKbW6ShdEILdtq+gUMFpVq9xxM5ozM+lkOSEt+KzKlViW0SQlGffd3UbrdpJOg7B pbeg== X-Gm-Message-State: AOAM532oRI5dDTO4z54VwkcEMNWSvHLM/PX/+SVdyO2D380ANLKrqww4 m1ET3ZBzpZuORH0iwVxVeUxDZPMraPM= X-Google-Smtp-Source: ABdhPJyVKet7fLK7FFHIzc2XCusgC2/GSoYvxHG+n79W7ILnKLJBaG7CY5eh5N1nm9IzkHfSN4GVnQ== X-Received: by 2002:adf:f1c4:: with SMTP id z4mr4226490wro.404.1614357192932; Fri, 26 Feb 2021 08:33:12 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id 6sm14814560wra.63.2021.02.26.08.33.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:12 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 07/16] cpu: Introduce CPUSystemOperations structure Date: Fri, 26 Feb 2021 17:32:18 +0100 Message-Id: <20210226163227.4097950-8-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x435.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b12028c3c03..ab89235cb45 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -80,6 +80,12 @@ struct TCGCPUOps; /* see accel-cpu.h */ struct AccelCPUClass; +/* + * struct CPUSystemOperations: System operations specific to a CPU class + */ +typedef struct CPUSystemOperations { +} CPUSystemOperations; + /** * CPUClass: * @class_by_name: Callback to map -cpu command line model name to an @@ -190,6 +196,9 @@ struct CPUClass { bool gdb_stop_before_watchpoint; struct AccelCPUClass *accel_cpu; + /* when system emulation is not available, this pointer is NULL */ + struct CPUSystemOperations system_ops; + /* when TCG is not available, this pointer is NULL */ struct TCGCPUOps *tcg_ops; }; From patchwork Fri Feb 26 16:32:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74ED6C433E0 for ; Fri, 26 Feb 2021 16:55:53 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CCBCD64F0D for ; Fri, 26 Feb 2021 16:55:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CCBCD64F0D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55322 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgP9-0007aK-Qr for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:55:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53740) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3X-0004qf-Lj; Fri, 26 Feb 2021 11:33:31 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:53382) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3Q-0007iz-Br; Fri, 26 Feb 2021 11:33:31 -0500 Received: by mail-wm1-x32e.google.com with SMTP id x16so7890761wmk.3; Fri, 26 Feb 2021 08:33:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vuc9PsSLt2QcMz7V44LFADU1+acM0s5lJbReK29D000=; b=Bfi19QPGpQFQ3L5Iqi+WyuiNpxkTNf4P8xxDYMle/dTLWa+0XAxhG2ERuZEfItnFGg GeELWChCYC79YyddyOATVRgUstihC+kGEWhApztxLfHBk8M/h+CXrxovwUSEp1dsipxj n4E+wh0kJVhJAfVXp7EgsIU5+2fowHNTl4x/P99wJB1UfE206Zmh3PbQYbNSeKfPjU08 p5k4IdCULqrNCRKoqkTaYER70ZDB2mweOxJ6Z1UiWnkiQJc808WOhltnkLL3LxKB0MYl f9/dXvAHbTZAWyttCUDcAv/Dg2VGDZhVvMoOzQQ2MthYAFB0Hwt3c/D6J55kV8CXfFg/ wVIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Vuc9PsSLt2QcMz7V44LFADU1+acM0s5lJbReK29D000=; b=OfttT2ASUwVvhA88+b5qtVx3whkc9ClgLpKjfxIVfhZJSNcjvLppm68t1XFHpXlUQj Ap+e9hmkXQKuY6Kl2Q45tO+sH9NCAIpGJcE79HCgubBzi6XB3Hd/8nU/u+01Z1bgbR6V gOE2CzT8FFqICohmXWsGsiREyECMRmCtL8F+Y/CRrWirR+0ALlrwTMilNNv5RDsGuwP0 G7N0ZYp6AYrOsCRiM5aZUcMw2eGsYjbuiHrxYH+c3OXgNArWiWlEWrf4vHpM+81N6rH6 4JbcK/pMwPJhwTk7+Y7qn997ZpZrs4PG4Fsrk/XWsSPkxzFeGPRVa7m1pEJWl2s6DqF7 pI3A== X-Gm-Message-State: AOAM5330I9AMUm7dfic329W3S4Y/G4h7m7AGJbiJWs8zXV+Y6xBispyX igSlkRubzJjFKB2ZQBdeRq8y6Yk0ZD8= X-Google-Smtp-Source: ABdhPJyhPNOa1XWROgQB+EA4KJqUQUEQ597fWUb8xq1bcW7m5/CqxV8d2Gxq0gAR4w78qCB6yjD4Tg== X-Received: by 2002:a7b:c119:: with SMTP id w25mr3617650wmi.127.1614357199103; Fri, 26 Feb 2021 08:33:19 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id f2sm10929721wrq.34.2021.02.26.08.33.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:18 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 08/16] cpu: Move CPUClass::vmsd to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:19 +0100 Message-Id: <20210226163227.4097950-9-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x32e.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Migration is specific to system emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 ++++-- cpu.c | 12 ++++++------ target/alpha/cpu.c | 2 +- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/cris/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/lm32/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/moxie/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/unicore32/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- target/ppc/translate_init.c.inc | 2 +- 21 files changed, 29 insertions(+), 27 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ab89235cb45..bd1cb3b0d37 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,10 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @vmsd: State description for migration. + */ + const VMStateDescription *vmsd; } CPUSystemOperations; /** @@ -128,7 +132,6 @@ typedef struct CPUSystemOperations { * 32-bit VM coredump. * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF * note to a 32-bit VM coredump. - * @vmsd: State description for migration. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop @@ -183,7 +186,6 @@ struct CPUClass { int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, void *opaque); - const VMStateDescription *vmsd; const char *gdb_core_xml_file; gchar * (*gdb_arch_name)(CPUState *cpu); const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname); diff --git a/cpu.c b/cpu.c index bfbe5a66f95..619b8c14f94 100644 --- a/cpu.c +++ b/cpu.c @@ -138,13 +138,13 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #endif /* CONFIG_TCG */ #ifdef CONFIG_USER_ONLY - assert(cc->vmsd == NULL); + assert(cc->system_ops.vmsd == NULL); #else if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); } - if (cc->vmsd != NULL) { - vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu); + if (cc->system_ops.vmsd != NULL) { + vmstate_register(NULL, cpu->cpu_index, cc->system_ops.vmsd, cpu); } #endif /* CONFIG_USER_ONLY */ } @@ -154,10 +154,10 @@ void cpu_exec_unrealizefn(CPUState *cpu) CPUClass *cc = CPU_GET_CLASS(cpu); #ifdef CONFIG_USER_ONLY - assert(cc->vmsd == NULL); + assert(cc->system_ops.vmsd == NULL); #else - if (cc->vmsd != NULL) { - vmstate_unregister(NULL, cc->vmsd, cpu); + if (cc->system_ops.vmsd != NULL) { + vmstate_unregister(NULL, cc->system_ops.vmsd, cpu); } if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { vmstate_unregister(NULL, &vmstate_cpu_common, cpu); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index faabffe0796..ee65971da8e 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -237,7 +237,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = alpha_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_alpha_cpu; + cc->system_ops.vmsd = &vmstate_alpha_cpu; #endif cc->disas_set_info = alpha_cpu_disas_set_info; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b8bc89e71fc..11505e1db10 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2299,7 +2299,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs = arm_asidx_from_attrs; - cc->vmsd = &vmstate_arm_cpu; + cc->system_ops.vmsd = &vmstate_arm_cpu; cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian; cc->write_elf64_note = arm_cpu_write_elf64_note; cc->write_elf32_note = arm_cpu_write_elf32_note; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 0f4596932ba..0e55d5f4838 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -213,7 +213,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->set_pc = avr_cpu_set_pc; cc->memory_rw_debug = avr_cpu_memory_rw_debug; cc->get_phys_page_debug = avr_cpu_get_phys_page_debug; - cc->vmsd = &vms_avr_cpu; + cc->system_ops.vmsd = &vms_avr_cpu; cc->disas_set_info = avr_cpu_disas_set_info; cc->gdb_read_register = avr_cpu_gdb_read_register; cc->gdb_write_register = avr_cpu_gdb_write_register; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 29a865b75d2..c0392c7def3 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -293,7 +293,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = cris_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = cris_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_cris_cpu; + cc->system_ops.vmsd = &vmstate_cris_cpu; #endif cc->gdb_num_core_regs = 49; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 4f142de6e45..58c09824fff 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -162,7 +162,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = hppa_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_hppa_cpu; + cc->system_ops.vmsd = &vmstate_hppa_cpu; #endif cc->disas_set_info = hppa_cpu_disas_set_info; cc->gdb_num_core_regs = 128; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6a53446e6a5..ae7f7763dfc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7426,7 +7426,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote; cc->write_elf32_note = x86_cpu_write_elf32_note; cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote; - cc->vmsd = &vmstate_x86_cpu; + cc->system_ops.vmsd = &vmstate_x86_cpu; #endif /* !CONFIG_USER_ONLY */ cc->gdb_arch_name = x86_gdb_arch_name; diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index c23d72874c0..bc5f448584c 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -241,7 +241,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = lm32_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_lm32_cpu; + cc->system_ops.vmsd = &vmstate_lm32_cpu; #endif cc->gdb_num_core_regs = 32 + 7; cc->gdb_stop_before_watchpoint = true; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index c98fb1e33be..30cf308633f 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -533,7 +533,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->gdb_write_register = m68k_cpu_gdb_write_register; #if defined(CONFIG_SOFTMMU) cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_m68k_cpu; + cc->system_ops.vmsd = &vmstate_m68k_cpu; #endif cc->disas_set_info = m68k_cpu_disas_set_info; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 335dfdc734e..17670bbfb59 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -387,7 +387,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug; - cc->vmsd = &vmstate_mb_cpu; + cc->system_ops.vmsd = &vmstate_mb_cpu; #endif device_class_set_props(dc, mb_properties); cc->gdb_num_core_regs = 32 + 27; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bf70c77295f..3389b879087 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -720,7 +720,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->gdb_write_register = mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = mips_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_mips_cpu; + cc->system_ops.vmsd = &vmstate_mips_cpu; #endif cc->disas_set_info = mips_cpu_disas_set_info; cc->gdb_num_core_regs = 73; diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 83bec34d36c..953a440576f 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -122,7 +122,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data) cc->set_pc = moxie_cpu_set_pc; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_moxie_cpu; + cc->system_ops.vmsd = &vmstate_moxie_cpu; #endif cc->disas_set_info = moxie_cpu_disas_set_info; cc->tcg_ops = &moxie_tcg_ops; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 79d246d1930..c127bcc0680 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -204,7 +204,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_openrisc_cpu; + cc->system_ops.vmsd = &vmstate_openrisc_cpu; #endif cc->gdb_num_core_regs = 32 + 3; cc->disas_set_info = openrisc_disas_set_info; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 16f1a342388..70651c9b721 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -623,7 +623,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; /* For now, mark unmigratable: */ - cc->vmsd = &vmstate_riscv_cpu; + cc->system_ops.vmsd = &vmstate_riscv_cpu; #endif cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index d35eb39a1bb..8ba8a96b4d5 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -517,7 +517,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_s390_cpu; + cc->system_ops.vmsd = &vmstate_s390_cpu; cc->get_crash_info = s390_cpu_get_crash_info; cc->write_elf64_note = s390_cpu_write_elf64_note; #endif diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index bd44de53729..706ef971c3d 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -262,7 +262,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_num_core_regs = 59; - cc->vmsd = &vmstate_sh_cpu; + cc->system_ops.vmsd = &vmstate_sh_cpu; cc->tcg_ops = &superh_tcg_ops; } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index aece2c7dc83..f14a26c154a 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -889,7 +889,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = sparc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_sparc_cpu; + cc->system_ops.vmsd = &vmstate_sparc_cpu; #endif cc->disas_set_info = cpu_sparc_disas_set_info; diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 12894ffac6a..277b41194fb 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -146,7 +146,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = uc32_cpu_dump_state; cc->set_pc = uc32_cpu_set_pc; cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_uc32_cpu; + cc->system_ops.vmsd = &vmstate_uc32_cpu; cc->tcg_ops = &uc32_tcg_ops; } diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 6bedd5b97b8..80f12ebf995 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -218,7 +218,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; #endif cc->disas_set_info = xtensa_cpu_disas_set_info; - cc->vmsd = &vmstate_xtensa_cpu; + cc->system_ops.vmsd = &vmstate_xtensa_cpu; cc->tcg_ops = &xtensa_tcg_ops; } diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index e7324e85cdb..65c45e7870a 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10885,7 +10885,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = ppc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug; - cc->vmsd = &vmstate_ppc_cpu; + cc->system_ops.vmsd = &vmstate_ppc_cpu; #endif #if defined(CONFIG_SOFTMMU) cc->write_elf64_note = ppc64_cpu_write_elf64_note; From patchwork Fri Feb 26 16:32:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84459C433DB for ; Fri, 26 Feb 2021 16:47:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 21D4464F03 for ; Fri, 26 Feb 2021 16:47:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 21D4464F03 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38282 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgHS-0008Pq-3h for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:47:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53764) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3Z-0004tM-3B; Fri, 26 Feb 2021 11:33:33 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]:40923) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3W-0007kM-OX; Fri, 26 Feb 2021 11:33:32 -0500 Received: by mail-wr1-x429.google.com with SMTP id d11so9156767wrj.7; Fri, 26 Feb 2021 08:33:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R56Oi6nr8e9B0WiiV+if7tvwfnjn9mxxVgPa8IGhuYc=; b=GIK9QnVGxJj+2JyxxpSs2kwEIQSaQgByN23qMxB9CnyIZlfO11v5Cy1mdDF7/FZg9S hT+clxlxxrXwtpxbNMie7alBa+EdYWAPFEAIaFZlxCQ4PMR4QUAAbyeidWQs4SugWkBB NkiTYrLn8oYYy6TZzgU6+066q+Z5gvVDK2YqIxJPrMgcsA2OjQTLDskYj5SgvzExQkfi MWS5BPvufyr6ibMRkbheWeD1oYk1KUxGr2CNrhDeezx0guNLLylObuwgI+JZL8gary51 h5FgfO14/4kLCyrquBEp/OMkE2yq+6lPMzxvemYCBDVaTIokK+szjW0RmD93Pv6362SI NmmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=R56Oi6nr8e9B0WiiV+if7tvwfnjn9mxxVgPa8IGhuYc=; b=nZnpXKX2e+eaOhhnKjLxLwFsXsPnDeUJ3cBvNRsMfthh0HMQynACX3+zdFlYyLLtba cJ/KjXPtXViKq2s9TvbRrhTmgYfiQzZzIBxrpH/r7U4+pYvqeZ96LC3hpSGnAEoa3dAF stsAC++dj3Ohux50eyv+o53fxCqKNAbE9T5A5diRJXkDzuHplFEmGObYrZHgxmUVZNom +WLP2G9UlgjMJHTeQ6JlbZpIKMoCn3pVh463EKYlXnLB59l2LzCtSvrwlJ46Q/cfeVtF zGM2Xdj7JUR0nCPUeI3l1UFkvAgafhlb6ql9T45ldyOQKByi9XzltL1IRd0G0jhgPTOU /elg== X-Gm-Message-State: AOAM530BdVL/C/gMC+U3aUUpOT0W0VV/HrYeMExt7FxY/Ey5z75goVJN ceICxt/2xCOgDKLbhkw1NMUhDan4IPY= X-Google-Smtp-Source: ABdhPJxDb1NSzZxAVDXyJpmM/HE7k20qbNt0LkezV0LwNuf9xxvYg+GA9NeqMNOj3xAo6Ws07C81uQ== X-Received: by 2002:a5d:570c:: with SMTP id a12mr4117870wrv.209.1614357205310; Fri, 26 Feb 2021 08:33:25 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id m6sm14242583wrv.73.2021.02.26.08.33.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:24 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 09/16] cpu: Move CPUClass::virtio_is_big_endian to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:20 +0100 Message-Id: <20210226163227.4097950-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x429.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 13 ++++++++----- hw/core/cpu.c | 4 ++-- target/arm/cpu.c | 2 +- target/ppc/translate_init.c.inc | 2 +- 4 files changed, 12 insertions(+), 9 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index bd1cb3b0d37..fe85a1b81e6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,14 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @virtio_is_big_endian: Callback to return %true if a CPU which supports + * runtime configurable endianness is currently big-endian. + * Non-configurable CPUs can use the default implementation of this method. + * This method should not be used by any callers other than the pre-1.0 + * virtio devices. + */ + bool (*virtio_is_big_endian)(CPUState *cpu); /** * @vmsd: State description for migration. */ @@ -97,10 +105,6 @@ typedef struct CPUSystemOperations { * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. Non-configurable - * CPUs can use the default implementation of this method. This method should - * not be used by any callers other than the pre-1.0 virtio devices. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. @@ -159,7 +163,6 @@ struct CPUClass { int reset_dump_flags; bool (*has_work)(CPUState *cpu); - bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 5abf8bed2e4..86b65624a9e 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -204,8 +204,8 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); - if (cc->virtio_is_big_endian) { - return cc->virtio_is_big_endian(cpu); + if (cc->system_ops.virtio_is_big_endian) { + return cc->system_ops.virtio_is_big_endian(cpu); } return target_words_bigendian(); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 11505e1db10..3cbb17a5879 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2300,7 +2300,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs = arm_asidx_from_attrs; cc->system_ops.vmsd = &vmstate_arm_cpu; - cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian; + cc->system_ops.virtio_is_big_endian = arm_cpu_virtio_is_big_endian; cc->write_elf64_note = arm_cpu_write_elf64_note; cc->write_elf32_note = arm_cpu_write_elf32_note; #endif diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index 65c45e7870a..2e5c272190b 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10909,7 +10909,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_core_xml_file = "power-core.xml"; #endif #ifndef CONFIG_USER_ONLY - cc->virtio_is_big_endian = ppc_cpu_is_big_endian; + cc->system_ops.virtio_is_big_endian = ppc_cpu_is_big_endian; #endif cc->disas_set_info = ppc_disas_set_info; From patchwork Fri Feb 26 16:32:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0978BC433E0 for ; Fri, 26 Feb 2021 16:53:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E34364E85 for ; Fri, 26 Feb 2021 16:53:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E34364E85 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49582 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgMk-0004qa-FP for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:53:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53784) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3b-0004vO-9j; Fri, 26 Feb 2021 11:33:36 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:33426) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3Z-0007ln-Rt; Fri, 26 Feb 2021 11:33:35 -0500 Received: by mail-wr1-x42c.google.com with SMTP id 7so9180968wrz.0; Fri, 26 Feb 2021 08:33:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=baCqRvN00Z/k/DEXOAL/5KZeUutEyX82NGJVX6NTZLs=; b=u9dJ4pVzXSwxq5IiQhegu1sOjFWEW7egjSz/FQoJsphQZou4dOyYMt0eyvd1ZgYI6r zqw8JHbducASA5HS/LZ3IDuoCxy/JoYX7PmwaANwfv1Bt2SEWk1ESZ13U652VxxjYQcA chHDFzB3YckwqnfDNaOi+A6mErQGQNHVzHcCmjtSipUb3q/7Q52B+ef0+5arwqIKxXGs c2m4stWcUo+fvEELRbJmVZjoPiEV8XVgtNdsjt4Mko0ETa5Q4OzMZezwFlgDHwg6t1fl 9og7VK24NfaTw4gzWLjpa73mLaO+wnVBT4cca6dgJXNwAfR9uX2xvLRSNbyt3Qqr5nJk j07g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=baCqRvN00Z/k/DEXOAL/5KZeUutEyX82NGJVX6NTZLs=; b=FAU3wRZYClB+mHLdsjhMwJgXCXpkdWzpm3AzdkkZ93qcxwKdeAREwJ5bHlOMpr7vP4 Q5WK8EoAQYiN+sf/V7pCpZFxC48o3k7+fPcMQP7rP/JnME6bfD8Q58suLmJYIhVQsXUZ funXQKoaDyAq4ymIywMjcF6eE7YTnxMWVO+dNS1Wszu0H8v532904ksAl5ItFDaRkrHt ryWJEMorBGWRhnDTbvBEQCTtZAw6ziWXX8fZ9rOsOTps8KtNTvY1UCNHQj8IIQBI7wNQ 42JtpmP9xCUXk3VfqJ3bB9eNr2swuBBqTSDonSUujnzV1LxEdt79BqfvCJgKkhUxs5kG Acwg== X-Gm-Message-State: AOAM532aRaBHdtM1fd3jmv2Q+p96beG4omQaFe9Dtlevws+gb2axb4Jd FlCdycJNQUTanRGYf3/KE9FqEskDjbQ= X-Google-Smtp-Source: ABdhPJxjCs2JxncQfVm0YSDcSrxNvscTyYbwl/6+HAP3K697dMGc/y0VN2x7nHDMh7k8w+9BY14CcA== X-Received: by 2002:a5d:558b:: with SMTP id i11mr4035012wrv.176.1614357210978; Fri, 26 Feb 2021 08:33:30 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id k15sm16664975wrn.0.2021.02.26.08.33.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 10/16] cpu: Move CPUClass::get_crash_info to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:21 +0100 Message-Id: <20210226163227.4097950-11-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42c.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" cpu_get_crash_info() is called on GUEST_PANICKED events, which only occur in system emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 +++++- hw/core/cpu.c | 4 ++-- target/i386/cpu.c | 2 +- target/s390x/cpu.c | 2 +- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index fe85a1b81e6..87186e85d44 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,11 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @get_crash_info: Callback for reporting guest crash information in + * GUEST_PANICKED events. + */ + GuestPanicInformation* (*get_crash_info)(CPUState *cpu); /** * @virtio_is_big_endian: Callback to return %true if a CPU which supports * runtime configurable endianness is currently big-endian. @@ -166,7 +171,6 @@ struct CPUClass { int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); - GuestPanicInformation* (*get_crash_info)(CPUState *cpu); void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); bool (*get_paging_enabled)(const CPUState *cpu); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 86b65624a9e..ddf5635d87b 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -220,8 +220,8 @@ GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) CPUClass *cc = CPU_GET_CLASS(cpu); GuestPanicInformation *res = NULL; - if (cc->get_crash_info) { - res = cc->get_crash_info(cpu); + if (cc->system_ops.get_crash_info) { + res = cc->system_ops.get_crash_info(cpu); } return res; } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ae7f7763dfc..9692843256c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7421,7 +7421,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->asidx_from_attrs = x86_asidx_from_attrs; cc->get_memory_mapping = x86_cpu_get_memory_mapping; cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; - cc->get_crash_info = x86_cpu_get_crash_info; + cc->system_ops.get_crash_info = x86_cpu_get_crash_info; cc->write_elf64_note = x86_cpu_write_elf64_note; cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote; cc->write_elf32_note = x86_cpu_write_elf32_note; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 8ba8a96b4d5..f9107cb7179 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -518,7 +518,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_s390_cpu; - cc->get_crash_info = s390_cpu_get_crash_info; + cc->system_ops.get_crash_info = s390_cpu_get_crash_info; cc->write_elf64_note = s390_cpu_write_elf64_note; #endif cc->disas_set_info = s390_cpu_disas_set_info; From patchwork Fri Feb 26 16:32:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDCA0C433DB for ; Fri, 26 Feb 2021 16:56:38 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 619AC64EEE for ; Fri, 26 Feb 2021 16:56:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 619AC64EEE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58962 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgPt-0000rX-H7 for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:56:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53822) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3j-0004yH-BM; Fri, 26 Feb 2021 11:33:45 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:38047) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3g-0007nF-7K; Fri, 26 Feb 2021 11:33:42 -0500 Received: by mail-wm1-x330.google.com with SMTP id n4so6904833wmq.3; Fri, 26 Feb 2021 08:33:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yppSFDQsnap9fkQDMIB4LM/Hd6+rcDegPvCr9hlrbG4=; b=RqsbZxiETkb9P1vuejki+clVSger/BhVc0Y+i01T/lyJFro47QMOYFEMQqeEX1LpL7 egUkAka5uPw2lBcHNJ0vmPvzX9kShILCt1LYd8Pc9NUFZF7PVRR9mU/2Ba6LPYuoFGiX 0QzMPnkIQ8Gipw3mRI7eJ5wJbatX3hOLnjEQwf7/+Ea9Hazd3VKiE3yb8f1F8053wia+ 8dVtdlIqd1a81+yFEZNVyrWfaC1WXzW0A1HUaR85voFyhcrK+7V6v7I6GBmEZphGFTaO SNXSDtatdL7TS9VV6VAY2aMOUueFGtwOyHf5y1DLVof1oYhLzgBmOalNvfEGE7DeiYIl 6cRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=yppSFDQsnap9fkQDMIB4LM/Hd6+rcDegPvCr9hlrbG4=; b=VQpeohn97auRht7GdS5WCjYStRWDXeD9mOnBlJI5rLvAxsjpn0qjWxH0TA4SSP0Ymv b5DA4nDnGIhflQgL0o/xsw0m3iDcUKdsj9RQQCtQYqKY/D1vHHBNO+4y2HOZwOo+tLQz AJCnZ6fh2bAv5XnHv0stT2T3gjPIztdvlYd8m6kDr1O03zVKwkIusmvPFL+NkbDZk3aZ JsnLyPjlELIApkDeiowXfn3deu3M9FgEF8aM+FBwTd8n3yNxZ5HeBlccLvrCcFoiYNqS Bb2CGbWLHC8Pjn2Ie+6JFJTliFGiFrBs8mVsGrlMbIEuOOHRv6kKd5V3z2Zz77kvxjh0 VstQ== X-Gm-Message-State: AOAM531aFs1o6u57DNKO+UjNT3CbGYWqtyPsTZNwsGrymsiISDMiwc+U c1qTRg501AVgbUhrJHo8FOy2Cvt+Od0= X-Google-Smtp-Source: ABdhPJyOK9RTuFTedODbjc7g1TL8cebAOnvvMApPg5J3vznBAKYuBzcDbmpndB9iBqkymNzHHyJROA== X-Received: by 2002:a1c:f409:: with SMTP id z9mr3633637wma.141.1614357217212; Fri, 26 Feb 2021 08:33:37 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id i8sm15756579wry.90.2021.02.26.08.33.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:36 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 11/16] cpu: Move CPUClass::write_elf* to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:22 +0100 Message-Id: <20210226163227.4097950-12-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x330.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The write_elf*() handlers are used to dump vmcore images. This feature is only meaningful for system emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 41 +++++++++++++++++++-------------- hw/core/cpu.c | 16 ++++++------- target/arm/cpu.c | 4 ++-- target/i386/cpu.c | 8 +++---- target/s390x/cpu.c | 2 +- target/ppc/translate_init.c.inc | 4 ++-- 6 files changed, 41 insertions(+), 34 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 87186e85d44..e8c2e9af3bb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -89,6 +89,30 @@ typedef struct CPUSystemOperations { * GUEST_PANICKED events. */ GuestPanicInformation* (*get_crash_info)(CPUState *cpu); + /** + * @write_elf32_note: Callback for writing a CPU-specific ELF note to a + * 32-bit VM coredump. + */ + int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + /** + * @write_elf64_note: Callback for writing a CPU-specific ELF note to a + * 64-bit VM coredump. + */ + int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, + int cpuid, void *opaque); + /** + * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF + * note to a 32-bit VM coredump. + */ + int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); + /** + * @write_elf64_qemunote: Callback for writing a CPU- and QEMU-specific ELF + * note to a 64-bit VM coredump. + */ + int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, + void *opaque); /** * @virtio_is_big_endian: Callback to return %true if a CPU which supports * runtime configurable endianness is currently big-endian. @@ -133,14 +157,6 @@ typedef struct CPUSystemOperations { * a memory access with the specified memory transaction attributes. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. - * @write_elf64_note: Callback for writing a CPU-specific ELF note to a - * 64-bit VM coredump. - * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF - * note to a 32-bit VM coredump. - * @write_elf32_note: Callback for writing a CPU-specific ELF note to a - * 32-bit VM coredump. - * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF - * note to a 32-bit VM coredump. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop @@ -184,15 +200,6 @@ struct CPUClass { int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); - int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, - int cpuid, void *opaque); - int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, - void *opaque); - int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu, - int cpuid, void *opaque); - int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, - void *opaque); - const char *gdb_core_xml_file; gchar * (*gdb_arch_name)(CPUState *cpu); const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index ddf5635d87b..3dc8faf6086 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -151,10 +151,10 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (!cc->write_elf32_qemunote) { + if (!cc->system_ops.write_elf32_qemunote) { return 0; } - return (*cc->write_elf32_qemunote)(f, cpu, opaque); + return (*cc->system_ops.write_elf32_qemunote)(f, cpu, opaque); } int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, @@ -162,10 +162,10 @@ int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (!cc->write_elf32_note) { + if (!cc->system_ops.write_elf32_note) { return -1; } - return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); + return (*cc->system_ops.write_elf32_note)(f, cpu, cpuid, opaque); } int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, @@ -173,10 +173,10 @@ int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (!cc->write_elf64_qemunote) { + if (!cc->system_ops.write_elf64_qemunote) { return 0; } - return (*cc->write_elf64_qemunote)(f, cpu, opaque); + return (*cc->system_ops.write_elf64_qemunote)(f, cpu, opaque); } int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, @@ -184,10 +184,10 @@ int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (!cc->write_elf64_note) { + if (!cc->system_ops.write_elf64_note) { return -1; } - return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); + return (*cc->system_ops.write_elf64_note)(f, cpu, cpuid, opaque); } static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 3cbb17a5879..4941a651e64 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2301,8 +2301,8 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->asidx_from_attrs = arm_asidx_from_attrs; cc->system_ops.vmsd = &vmstate_arm_cpu; cc->system_ops.virtio_is_big_endian = arm_cpu_virtio_is_big_endian; - cc->write_elf64_note = arm_cpu_write_elf64_note; - cc->write_elf32_note = arm_cpu_write_elf32_note; + cc->system_ops.write_elf64_note = arm_cpu_write_elf64_note; + cc->system_ops.write_elf32_note = arm_cpu_write_elf32_note; #endif cc->gdb_num_core_regs = 26; cc->gdb_core_xml_file = "arm-core.xml"; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9692843256c..c34d41d4c79 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7422,10 +7422,10 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->get_memory_mapping = x86_cpu_get_memory_mapping; cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; cc->system_ops.get_crash_info = x86_cpu_get_crash_info; - cc->write_elf64_note = x86_cpu_write_elf64_note; - cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote; - cc->write_elf32_note = x86_cpu_write_elf32_note; - cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote; + cc->system_ops.write_elf64_note = x86_cpu_write_elf64_note; + cc->system_ops.write_elf64_qemunote = x86_cpu_write_elf64_qemunote; + cc->system_ops.write_elf32_note = x86_cpu_write_elf32_note; + cc->system_ops.write_elf32_qemunote = x86_cpu_write_elf32_qemunote; cc->system_ops.vmsd = &vmstate_x86_cpu; #endif /* !CONFIG_USER_ONLY */ diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index f9107cb7179..dcfbb7832e1 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -519,7 +519,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_s390_cpu; cc->system_ops.get_crash_info = s390_cpu_get_crash_info; - cc->write_elf64_note = s390_cpu_write_elf64_note; + cc->system_ops.write_elf64_note = s390_cpu_write_elf64_note; #endif cc->disas_set_info = s390_cpu_disas_set_info; cc->gdb_num_core_regs = S390_NUM_CORE_REGS; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index 2e5c272190b..b1ac3291be1 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10888,8 +10888,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->system_ops.vmsd = &vmstate_ppc_cpu; #endif #if defined(CONFIG_SOFTMMU) - cc->write_elf64_note = ppc64_cpu_write_elf64_note; - cc->write_elf32_note = ppc32_cpu_write_elf32_note; + cc->system_ops.write_elf64_note = ppc64_cpu_write_elf64_note; + cc->system_ops.write_elf32_note = ppc32_cpu_write_elf32_note; #endif cc->gdb_num_core_regs = 71; From patchwork Fri Feb 26 16:32:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106943 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F15CC433DB for ; Fri, 26 Feb 2021 16:56:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7688364F0D for ; Fri, 26 Feb 2021 16:56:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7688364F0D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56564 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgPM-0008Dr-Ax for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:56:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53878) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg3w-00051p-Pk; Fri, 26 Feb 2021 11:33:58 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:39396) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3s-0007ph-8g; Fri, 26 Feb 2021 11:33:54 -0500 Received: by mail-wm1-x335.google.com with SMTP id u125so8315968wmg.4; Fri, 26 Feb 2021 08:33:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2B3Q/ylS5ZNA1mrgb7ev39AiksBcxa1Cjiz4dKBsJpg=; b=SRMILkPUFjVtR86aa3EyK1deYZtGw3fRznVtQ3u0RMONqxpvpx3ctxR1gPPgP35PYt CVClTcxxdrLzUz5a5pEkfThbVAM/dxYOI/fDWI1u1CNV6TtR2PjfpcwIXB6qBE2a/S/m FIBKlQRCKakqDLASCb7sme3oZaphogi0YsmdCS2SIt1TBh/nCd5pAfGhjOn2RcJtflPC wHB1R48ZNlgWWiGks0yCIvJc6O/7aXFdbnjdWdczF/mmAbwOaWozuV4Njab5NW7S1Xq1 XVoq4TL0IG04qCxl4mtyNq0ZKlTDhyw41gPXjp1qxEzwGKGbT8ei3U/mCaq/3SSHermc lOXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=2B3Q/ylS5ZNA1mrgb7ev39AiksBcxa1Cjiz4dKBsJpg=; b=Ac/PWzb+2IkiS63dAFTPyFhohqKxstV7rnvHXU3TMbmRSsBRNr7VEfKNdSKLJvhUu/ QmJJ8OomRNKcg5TOZq0FnpYAjvgLsm7bbmZgAyk28KGXDe9aHvQFnLAMFI1GuFInuLEV dybOAtFzU4bnN30tt4Pod/yflVjqlvk6FOtyM8rtfpqME19uzWfd+WuJLpxm83OrJSL+ vSb6znIpQIk8qN0f8XOwgWPjQdFQAzToA03Scv+qtCS4gj3Wnco/qKSzQUjeSVgr5OlN zG2rDbnKlhkHJSVnkoG7XbgU9qMhw///Vny9PnPccFSNAHk4Evhp5NvzUyGBNq477mNH XAEA== X-Gm-Message-State: AOAM531bSE3UTXJ6yE+Vg5pvBSlnu/xwZ5eRR+i1LaAomQgVGgaNCu/U 6pk+dssDIOnpK4QIXjS5w3An5Okwamo= X-Google-Smtp-Source: ABdhPJxoLdAPZ0Ft6m7N2DlNxzLfZNEnULVAX158KT3cXTWU060IUvNJcDv/7GGgqlyNaOfQPTBGvw== X-Received: by 2002:a05:600c:2298:: with SMTP id 24mr3790497wmf.136.1614357228294; Fri, 26 Feb 2021 08:33:48 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id t14sm14686281wru.64.2021.02.26.08.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 12/16] cpu: Move CPUClass::asidx_from_attrs to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:23 +0100 Message-Id: <20210226163227.4097950-13-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x335.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 +++++--- hw/core/cpu.c | 4 ++-- target/arm/cpu.c | 2 +- target/i386/cpu.c | 2 +- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index e8c2e9af3bb..fc3c4c217b1 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,11 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for + * a memory access with the specified memory transaction attributes. + */ + int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); /** * @get_crash_info: Callback for reporting guest crash information in * GUEST_PANICKED events. @@ -153,8 +158,6 @@ typedef struct CPUSystemOperations { * associated memory transaction attributes to use for the access. * CPUs which use memory transaction attributes should implement this * instead of get_phys_page_debug. - * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for - * a memory access with the specified memory transaction attributes. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @gdb_num_core_regs: Number of core registers accessible to GDB. @@ -196,7 +199,6 @@ struct CPUClass { hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); - int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 3dc8faf6086..d38eda36bc3 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -116,8 +116,8 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs) CPUClass *cc = CPU_GET_CLASS(cpu); int ret = 0; - if (cc->asidx_from_attrs) { - ret = cc->asidx_from_attrs(cpu, attrs); + if (cc->system_ops.asidx_from_attrs) { + ret = cc->system_ops.asidx_from_attrs(cpu, attrs); assert(ret < cpu->num_ases && ret >= 0); } return ret; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4941a651e64..86af15b0625 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2298,7 +2298,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = arm_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; - cc->asidx_from_attrs = arm_asidx_from_attrs; + cc->system_ops.asidx_from_attrs = arm_asidx_from_attrs; cc->system_ops.vmsd = &vmstate_arm_cpu; cc->system_ops.virtio_is_big_endian = arm_cpu_virtio_is_big_endian; cc->system_ops.write_elf64_note = arm_cpu_write_elf64_note; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c34d41d4c79..36b34eee62f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7418,7 +7418,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->get_paging_enabled = x86_cpu_get_paging_enabled; #ifndef CONFIG_USER_ONLY - cc->asidx_from_attrs = x86_asidx_from_attrs; + cc->system_ops.asidx_from_attrs = x86_asidx_from_attrs; cc->get_memory_mapping = x86_cpu_get_memory_mapping; cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; cc->system_ops.get_crash_info = x86_cpu_get_crash_info; From patchwork Fri Feb 26 16:32:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCF71C433DB for ; Fri, 26 Feb 2021 17:01:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 29EA064EEE for ; Fri, 26 Feb 2021 17:01:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 29EA064EEE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39600 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgUD-0004dU-7L for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 12:01:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53938) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg42-00056g-Qk; Fri, 26 Feb 2021 11:34:02 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:41371) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg3y-0007rF-HO; Fri, 26 Feb 2021 11:34:02 -0500 Received: by mail-wr1-x434.google.com with SMTP id f12so5360860wrx.8; Fri, 26 Feb 2021 08:33:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gQ4YHlwNbSL25AZUo/xOoa8axE7iYMW7r02UBMH2a6M=; b=DkI5fKT3UPEsAUYxLuKMv3jzzcXgExFTLX6nF4QIqTkXbaKOFW5+KNOfqxec7JfznW 0fwTVjOGyr/dKGHpEZiay1mHgBKHBWrU4ESfMf8SYVWsMcED9hEXdH++r29oKRYC91c/ 6PK21j6JtF6tUvG9P1HXSisnADjG7kLZEg4tSbNUSuhWuqwsgI0YrZUgVEAYSMqVN2zv bD8S5d8BnsJmxORm6SeRCdROGKxOQRi6HJ3M1KBjfGgcHm/2NyEFrqGlF8adb9Bjxa4t 9q+8JMuNrr0SmKCZ7PExWoVDftG0sAB6L0eIzcny0iUmKrR2IxzoNfd27oaO5iO7rwSI k7sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=gQ4YHlwNbSL25AZUo/xOoa8axE7iYMW7r02UBMH2a6M=; b=udyj7U+8jmUcQ/GdxiFB6HTW7fnQexzbEwR1YhLpjUQU7vHP3Xkf/Ud+f2fL4mlYvh BgR/8C5nHbyNn8Z2J+Ln/T/Jg89kMuud72AnUjavkIzQEjTmyRkBm8kBk9lBqrhPWbr5 7suANsD/ed2vSc5xyKrigqcHiFYLNSW64WvVeQSfy1TO4sp4/VE9nc92viNT82OcEHpw gJS3QlEOwvlcaEQ5hHTuaford/xgoBRZy0IeGYM42DNGQR+9oR7yyq0pewnCo7V5Abio quL6kRzFfMeQjzmtXlqTF2MN7jTLROlqWdn+KlxDs5mJzX0A7V4NNkUMmNXAI9zIjzE8 bHHw== X-Gm-Message-State: AOAM532hw4XyylCtw4Ni/1roc3TnOM5Ny7P/pNkjENo1G/WyV2Y2d6Jt ceQGQEsVZfNQTodU3HxLlhrnjAsZBXQ= X-Google-Smtp-Source: ABdhPJx1Mzhs4AoKmJtCNTryhP1c2cJTsmBcpFJwcPJsWyebPgg0DRG2DcDjr5ApFn+jJkWWBZgJzw== X-Received: by 2002:adf:d1ce:: with SMTP id b14mr4089240wrd.126.1614357234852; Fri, 26 Feb 2021 08:33:54 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id a14sm15954469wrg.84.2021.02.26.08.33.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:33:54 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 13/16] cpu: Move CPUClass::get_phys_page_debug to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:24 +0100 Message-Id: <20210226163227.4097950-14-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 21 +++++++++++++-------- hw/core/cpu.c | 6 +++--- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/cris/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/lm32/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/moxie/cpu.c | 2 +- target/nios2/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/tricore/cpu.c | 2 +- target/unicore32/cpu.c | 2 +- target/xtensa/cpu.c | 2 +- target/ppc/translate_init.c.inc | 2 +- 24 files changed, 38 insertions(+), 33 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index fc3c4c217b1..5bc66653c19 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,19 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @get_phys_page_debug: Callback for obtaining a physical address. + */ + hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); + /** + * @get_phys_page_attrs_debug: Callback for obtaining a physical address + * and the associated memory transaction attributes to use for the + * access. + * CPUs which use memory transaction attributes should implement this + * instead of get_phys_page_debug. + */ + hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, + MemTxAttrs *attrs); /** * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for * a memory access with the specified memory transaction attributes. @@ -153,11 +166,6 @@ typedef struct CPUSystemOperations { * If the target behaviour here is anything other than "set * the PC register to the value passed in" then the target must * also implement the synchronize_from_tb hook. - * @get_phys_page_debug: Callback for obtaining a physical address. - * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the - * associated memory transaction attributes to use for the access. - * CPUs which use memory transaction attributes should implement this - * instead of get_phys_page_debug. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @gdb_num_core_regs: Number of core registers accessible to GDB. @@ -196,9 +204,6 @@ struct CPUClass { void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); void (*set_pc)(CPUState *cpu, vaddr value); - hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); - hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, - MemTxAttrs *attrs); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index d38eda36bc3..f0c558c002e 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -96,12 +96,12 @@ hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (cc->get_phys_page_attrs_debug) { - return cc->get_phys_page_attrs_debug(cpu, addr, attrs); + if (cc->system_ops.get_phys_page_attrs_debug) { + return cc->system_ops.get_phys_page_attrs_debug(cpu, addr, attrs); } /* Fallback for CPUs which don't implement the _attrs_ hook */ *attrs = MEMTXATTRS_UNSPECIFIED; - return cc->get_phys_page_debug(cpu, addr); + return cc->system_ops.get_phys_page_debug(cpu, addr); } hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index ee65971da8e..b430771b7c8 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -236,7 +236,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = alpha_cpu_gdb_read_register; cc->gdb_write_register = alpha_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = alpha_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_alpha_cpu; #endif cc->disas_set_info = alpha_cpu_disas_set_info; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 86af15b0625..87a581fa47c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2297,7 +2297,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = arm_cpu_gdb_read_register; cc->gdb_write_register = arm_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; + cc->system_ops.get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; cc->system_ops.asidx_from_attrs = arm_asidx_from_attrs; cc->system_ops.vmsd = &vmstate_arm_cpu; cc->system_ops.virtio_is_big_endian = arm_cpu_virtio_is_big_endian; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 0e55d5f4838..d532a579c1b 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -212,7 +212,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = avr_cpu_dump_state; cc->set_pc = avr_cpu_set_pc; cc->memory_rw_debug = avr_cpu_memory_rw_debug; - cc->get_phys_page_debug = avr_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = avr_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vms_avr_cpu; cc->disas_set_info = avr_cpu_disas_set_info; cc->gdb_read_register = avr_cpu_gdb_read_register; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index c0392c7def3..6434f170387 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -292,7 +292,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = cris_cpu_gdb_read_register; cc->gdb_write_register = cris_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = cris_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = cris_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_cris_cpu; #endif diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 58c09824fff..cc72a6ea1ce 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -161,7 +161,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = hppa_cpu_gdb_read_register; cc->gdb_write_register = hppa_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = hppa_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_hppa_cpu; #endif cc->disas_set_info = hppa_cpu_disas_set_info; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 36b34eee62f..f6f5c333b7e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7420,7 +7420,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->system_ops.asidx_from_attrs = x86_asidx_from_attrs; cc->get_memory_mapping = x86_cpu_get_memory_mapping; - cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; + cc->system_ops.get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; cc->system_ops.get_crash_info = x86_cpu_get_crash_info; cc->system_ops.write_elf64_note = x86_cpu_write_elf64_note; cc->system_ops.write_elf64_qemunote = x86_cpu_write_elf64_qemunote; diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index bc5f448584c..515728b7f5d 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -240,7 +240,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = lm32_cpu_gdb_read_register; cc->gdb_write_register = lm32_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = lm32_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_lm32_cpu; #endif cc->gdb_num_core_regs = 32 + 7; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 30cf308633f..63c45e98e97 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -532,7 +532,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->gdb_read_register = m68k_cpu_gdb_read_register; cc->gdb_write_register = m68k_cpu_gdb_write_register; #if defined(CONFIG_SOFTMMU) - cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = m68k_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_m68k_cpu; #endif cc->disas_set_info = m68k_cpu_disas_set_info; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 17670bbfb59..73e99d2d9be 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -386,7 +386,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = mb_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug; + cc->system_ops.get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug; cc->system_ops.vmsd = &vmstate_mb_cpu; #endif device_class_set_props(dc, mb_properties); diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 3389b879087..b95856e3137 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -719,7 +719,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->gdb_read_register = mips_cpu_gdb_read_register; cc->gdb_write_register = mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = mips_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = mips_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_mips_cpu; #endif cc->disas_set_info = mips_cpu_disas_set_info; diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 953a440576f..8512bc50715 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -121,7 +121,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data) cc->dump_state = moxie_cpu_dump_state; cc->set_pc = moxie_cpu_set_pc; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = moxie_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_moxie_cpu; #endif cc->disas_set_info = moxie_cpu_disas_set_info; diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index e9c9fc3a389..615aed9729f 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -237,7 +237,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data) cc->set_pc = nios2_cpu_set_pc; cc->disas_set_info = nios2_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = nios2_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = nios2_cpu_get_phys_page_debug; #endif cc->gdb_read_register = nios2_cpu_gdb_read_register; cc->gdb_write_register = nios2_cpu_gdb_write_register; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index c127bcc0680..02397842757 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -203,7 +203,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = openrisc_cpu_gdb_read_register; cc->gdb_write_register = openrisc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = openrisc_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_openrisc_cpu; #endif cc->gdb_num_core_regs = 32 + 3; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 70651c9b721..7abf7685184 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -621,7 +621,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = riscv_cpu_get_phys_page_debug; /* For now, mark unmigratable: */ cc->system_ops.vmsd = &vmstate_riscv_cpu; #endif diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 7ac6618b26b..1191c686637 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -204,7 +204,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) cc->gdb_read_register = rx_cpu_gdb_read_register; cc->gdb_write_register = rx_cpu_gdb_write_register; - cc->get_phys_page_debug = rx_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = rx_cpu_get_phys_page_debug; cc->disas_set_info = rx_cpu_disas_set_info; cc->gdb_num_core_regs = 26; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index dcfbb7832e1..11acf9b5727 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -516,7 +516,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = s390_cpu_gdb_read_register; cc->gdb_write_register = s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = s390_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_s390_cpu; cc->system_ops.get_crash_info = s390_cpu_get_crash_info; cc->system_ops.write_elf64_note = s390_cpu_write_elf64_note; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 706ef971c3d..533e02bd3d9 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -256,7 +256,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = superh_cpu_gdb_read_register; cc->gdb_write_register = superh_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = superh_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = superh_cpu_get_phys_page_debug; #endif cc->disas_set_info = superh_cpu_disas_set_info; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index f14a26c154a..46d3e0ec668 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -888,7 +888,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = sparc_cpu_gdb_read_register; cc->gdb_write_register = sparc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = sparc_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = sparc_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_sparc_cpu; #endif cc->disas_set_info = cpu_sparc_disas_set_info; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 0b1e139bcba..c9ae4249fc1 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -170,7 +170,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) cc->dump_state = tricore_cpu_dump_state; cc->set_pc = tricore_cpu_set_pc; - cc->get_phys_page_debug = tricore_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = tricore_cpu_get_phys_page_debug; cc->tcg_ops = &tricore_tcg_ops; } diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 277b41194fb..eb4eec341a1 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -145,7 +145,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data) cc->has_work = uc32_cpu_has_work; cc->dump_state = uc32_cpu_dump_state; cc->set_pc = uc32_cpu_set_pc; - cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = uc32_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_uc32_cpu; cc->tcg_ops = &uc32_tcg_ops; } diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 80f12ebf995..befcb004d6f 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -215,7 +215,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_write_register = xtensa_cpu_gdb_write_register; cc->gdb_stop_before_watchpoint = true; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = xtensa_cpu_get_phys_page_debug; #endif cc->disas_set_info = xtensa_cpu_disas_set_info; cc->system_ops.vmsd = &vmstate_xtensa_cpu; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index b1ac3291be1..82438c5c72b 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10884,7 +10884,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = ppc_cpu_gdb_read_register; cc->gdb_write_register = ppc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug; + cc->system_ops.get_phys_page_debug = ppc_cpu_get_phys_page_debug; cc->system_ops.vmsd = &vmstate_ppc_cpu; #endif #if defined(CONFIG_SOFTMMU) From patchwork Fri Feb 26 16:32:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F9FFC433E0 for ; Fri, 26 Feb 2021 16:56:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9BC564F0E for ; Fri, 26 Feb 2021 16:56:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A9BC564F0E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:56546 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgPM-0008DV-OD for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:56:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg45-0005Dq-Gj; Fri, 26 Feb 2021 11:34:05 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]:38490) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg43-0007tb-SX; Fri, 26 Feb 2021 11:34:05 -0500 Received: by mail-wr1-x433.google.com with SMTP id b3so9163700wrj.5; Fri, 26 Feb 2021 08:34:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yTanq6JfzM3gaBH0H5tWyaeDUZu7wVaLTH7Xl4MKE/E=; b=ITu5LX2ZI2JgkpR4iVu6NfsUJpxJeZlNMyg46p/tmS8LfsT0HI9bbllQfQXKzN/+au RZGdcIN8W7aOgtLTLnEWb98wEp6p3YSWO+lOZ05WetzYcUN0mXSa6nHpbVofD4YkbYqg se+HthTebJlRMrhwqLwYGOp8EmPYADXUn/UjfiraVZh0cnrf3kmFzHDMRjbLYCxVfg8y wNqq7iitezppheyLnerS5ErdJbcFnwoni/JotWF8hXuuQWDF0jbSnCuGLMiTuw4rEsyy F6xFGtzYVbqMTwq+bvv6EGGPPMps2AsERWWFn/kCVt6q0AI4dQgaNucHk6p2mWCa7NC2 IYbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=yTanq6JfzM3gaBH0H5tWyaeDUZu7wVaLTH7Xl4MKE/E=; b=Ixz4j0OXbt91d4+zcSA/PeeuvrdajtFKVuuG3v7Yp2RpSQrRskLZ6Tv4FLk2O8/9P6 caZXkLDya6cOL5lJMMn6xMw/WhF5i6Wvt5QCCDadiB11YS+CkTmuExwDPZGvOQy1N9lK iSuW0aq58+GDkJbG0vmWddp8FxpLFrUy6ACt8rmtkOSj+iedTi2BJnE2cqDGxzFRy+JW aRt4D46+xyGya48oKRSrUGP1K9c8mynu0LYdjytpHnWxsREoujeFeFj1ofmgUFA5rRK/ 3hSGLKNNpEUho+MeARPzfDAsBnG8RGptw96kr3D/LD7IzS2iVo1sQMMJ2PHFkhYS5SUF gWww== X-Gm-Message-State: AOAM531vuMkhQ7+E+5d/ADAS5ZB7FgdY2yhGsYjbOxOm5hbrTymTsU4V iJonpaFvMbdFoLfbphMTj1jmrTycauA= X-Google-Smtp-Source: ABdhPJzOTZ6UwHTS7Bvdqp61Ih9ss51SNMlWeHMb8F2NTz6lmT5nBAnqAYjA6kU0xWRWvddEWoF/qg== X-Received: by 2002:a5d:47a8:: with SMTP id 8mr3981793wrb.180.1614357240762; Fri, 26 Feb 2021 08:34:00 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id q18sm14489461wrw.91.2021.02.26.08.33.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:34:00 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 14/16] cpu: Move CPUClass::get_memory_mapping to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:25 +0100 Message-Id: <20210226163227.4097950-15-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 8 +++++--- hw/core/cpu.c | 4 ++-- target/i386/cpu.c | 2 +- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5bc66653c19..caca5896592 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -84,6 +84,11 @@ struct AccelCPUClass; * struct CPUSystemOperations: System operations specific to a CPU class */ typedef struct CPUSystemOperations { + /** + * @get_memory_mapping: Callback for obtaining the memory mappings. + */ + void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, + Error **errp); /** * @get_phys_page_debug: Callback for obtaining a physical address. */ @@ -157,7 +162,6 @@ typedef struct CPUSystemOperations { * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. * @get_paging_enabled: Callback for inquiring whether paging is enabled. - * @get_memory_mapping: Callback for obtaining the memory mappings. * @set_pc: Callback for setting the Program Counter register. This * should have the semantics used by the target architecture when * setting the PC from a source such as an ELF file entry point; @@ -201,8 +205,6 @@ struct CPUClass { void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); bool (*get_paging_enabled)(const CPUState *cpu); - void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, - Error **errp); void (*set_pc)(CPUState *cpu, vaddr value); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index f0c558c002e..606fc753bf0 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -83,8 +83,8 @@ void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, { CPUClass *cc = CPU_GET_CLASS(cpu); - if (cc->get_memory_mapping) { - cc->get_memory_mapping(cpu, list, errp); + if (cc->system_ops.get_memory_mapping) { + cc->system_ops.get_memory_mapping(cpu, list, errp); return; } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f6f5c333b7e..92691a22de5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7419,7 +7419,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->system_ops.asidx_from_attrs = x86_asidx_from_attrs; - cc->get_memory_mapping = x86_cpu_get_memory_mapping; + cc->system_ops.get_memory_mapping = x86_cpu_get_memory_mapping; cc->system_ops.get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug; cc->system_ops.get_crash_info = x86_cpu_get_crash_info; cc->system_ops.write_elf64_note = x86_cpu_write_elf64_note; From patchwork Fri Feb 26 16:32:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31DE0C433DB for ; Fri, 26 Feb 2021 16:59:27 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A711764F0E for ; Fri, 26 Feb 2021 16:59:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A711764F0E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:38006 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgSb-0003vk-Ok for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 11:59:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54032) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg4B-0005Kb-3L; Fri, 26 Feb 2021 11:34:12 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:37357) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg49-0007va-LG; Fri, 26 Feb 2021 11:34:10 -0500 Received: by mail-wr1-x42b.google.com with SMTP id v15so9179862wrx.4; Fri, 26 Feb 2021 08:34:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1HLdFJWL8bdcObinvQ00cBeAj9ZX31JFSy5j9SyL+cY=; b=CK0+fUr9Ri8+o36olFsTDqO4jHpX4S2hLUOCMak8AFIZuvFCkl4UZY5Sde7CDzdoAZ VN7hNDmTHdCR40Fsbqa2HUHcJXfsb5WCj9+CfXWx0xuEoqZ2VUC3p9ViOosLoleU6VGW eKILoFtYMLRlkrL+ZFi1wWJzd417jaMdhOVdty16IvRkvRWc+1egm1/b9/N+7dQvfcVM YERC41+mZBzv3PbjZpAIAXSZFasITmylFC/4oV3e+mDLHiJGGNbVjox2RLgd5tDSJkKm rAVIf5EpViILwr3JGUUoj3q1OpiQAKiD+WSPJsI3Ljzfhk2ztY8lawfBQz6R5zpVYhfo Z+5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=1HLdFJWL8bdcObinvQ00cBeAj9ZX31JFSy5j9SyL+cY=; b=F8regIPL1VWZY3KvwQ1Qk1fbiaqrDb+999/HmOsATz3gdiOWk80ckXi8uqdkfPsMVE aO18Z933sQOamK0u9auNwWc3b/qFh/Rt1TCfZPGSYe9gVYD0jXR3O+b3mgzrVgAMHY9x PyJxEbpp5bJRAb/dCXauEUPmmRWV6LLvnpaQRPz/WiC0YNxyIVhsKfBt5k2jk/7JL5UA Rri3qwlL9K+00gwzzXdT4AfQmTFvfle2F5a65+qxyIGSsmCzp4KN+R50vVlJE+vRmjWv dHxkh+CjYPQc+MFBVWu1OXwOypZWB1YoGG8QujejKkycb9MMROwtagcsB1cSc/N8F90I NmFQ== X-Gm-Message-State: AOAM5313mktBcOsFr6GaIG5G8KlEfWQls/JfnJpt3m9oudDFNojjrZm5 2JAyLQWhtoHrLs0dBpwOe9WBjTC3YaI= X-Google-Smtp-Source: ABdhPJygu1zzxtF+KSEGtXf/vZOYHEd9DYBa2h1OBnS7mEAls1N7pxpqK3sUHi25llu9AoBf/ObXJg== X-Received: by 2002:adf:bac8:: with SMTP id w8mr4196713wrg.68.1614357246883; Fri, 26 Feb 2021 08:34:06 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id f7sm11919094wmh.39.2021.02.26.08.34.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:34:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 15/16] cpu: Move CPUClass::get_paging_enabled to CPUSystemOperations Date: Fri, 26 Feb 2021 17:32:26 +0100 Message-Id: <20210226163227.4097950-16-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 ++++-- hw/core/cpu.c | 4 ++-- target/i386/cpu.c | 2 +- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index caca5896592..47e65d517f6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -89,6 +89,10 @@ typedef struct CPUSystemOperations { */ void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); + /** + * @get_paging_enabled: Callback for inquiring whether paging is enabled. + */ + bool (*get_paging_enabled)(const CPUState *cpu); /** * @get_phys_page_debug: Callback for obtaining a physical address. */ @@ -161,7 +165,6 @@ typedef struct CPUSystemOperations { * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. - * @get_paging_enabled: Callback for inquiring whether paging is enabled. * @set_pc: Callback for setting the Program Counter register. This * should have the semantics used by the target architecture when * setting the PC from a source such as an ELF file entry point; @@ -204,7 +207,6 @@ struct CPUClass { void (*dump_state)(CPUState *cpu, FILE *, int flags); void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); - bool (*get_paging_enabled)(const CPUState *cpu); void (*set_pc)(CPUState *cpu, vaddr value); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 606fc753bf0..8bd7bda6b0b 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -71,8 +71,8 @@ bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu); - if (cc->get_paging_enabled) { - return cc->get_paging_enabled(cpu); + if (cc->system_ops.get_paging_enabled) { + return cc->system_ops.get_paging_enabled(cpu); } return false; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 92691a22de5..743c6b6d164 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7415,7 +7415,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = x86_cpu_gdb_read_register; cc->gdb_write_register = x86_cpu_gdb_write_register; cc->get_arch_id = x86_cpu_get_arch_id; - cc->get_paging_enabled = x86_cpu_get_paging_enabled; + cc->system_ops.get_paging_enabled = x86_cpu_get_paging_enabled; #ifndef CONFIG_USER_ONLY cc->system_ops.asidx_from_attrs = x86_asidx_from_attrs; From patchwork Fri Feb 26 16:32:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12106997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3B2DC433E0 for ; Fri, 26 Feb 2021 17:06:55 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A09C64EEE for ; Fri, 26 Feb 2021 17:06:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7A09C64EEE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:50928 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lFgZq-0001Hz-Aa for qemu-devel@archiver.kernel.org; Fri, 26 Feb 2021 12:06:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54104) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lFg4J-0005Ob-So; Fri, 26 Feb 2021 11:34:21 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:38051) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lFg4H-0007xn-TB; Fri, 26 Feb 2021 11:34:18 -0500 Received: by mail-wm1-x330.google.com with SMTP id n4so6906372wmq.3; Fri, 26 Feb 2021 08:34:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PprgWzaisAMGWPHww2n0qNOft5TZjwIRKtLOc4TMAEs=; b=fuKckJ4TE33Pak2neWxSvjeCDGfEBe5OI4VvvYE7upnN7YW65eSvXkzDVPy792b2oR 7+32toOnxKag5RUh5Rdj9YZLR6jRGo8a6CdImCDp0s0ptT7S1Ju4ZyqXzpDAogd9s3bd AalOQlpEThHlN8VIIrP2rDslZHFsUgVuFU+YOWJj3ZC6/q7HRWyhOl5q7IwfVdmpo2iy lsRktn4tPQts9R+p6lW9J+3Im+atzEtWPtsX/94kom6vuIL/b9UZ8jOViXq9SK0oqFMp wRYqMbfffGHItIkhFwUHzxlyrURua2CsWH+mWqr3M48B3xHf0DQj22heQJnWkmo76q0L y4Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=PprgWzaisAMGWPHww2n0qNOft5TZjwIRKtLOc4TMAEs=; b=Ax51bVsOW0h89GAIS5GfTXtjt+erC/9mjQ7rqb0YgqhcPEXyKfVlYmZjZxLtlYOakW 9Vh2OIu8dst7YzysYOtp/1C8eY22T6GXXZrFnYlxn/RBYBX5moPwoHOf/Chq4U2yUIpB pyhmYUL8IrK+4pzwScJm2er1QN8iG0e/ZVJQfNcYq1qmopV/ZYF7nAhh+IEiKpbzGaKi zxQ69urPjU68B+GU8DFggvvMtZNMlxy69r9muZO5PEWbyvReWNlEQiUykbArRcL2ZLdU ++t/o950yspZIAI+N3OCldoeSxBDl80iyndfdKFIwpKKA09dVKg7OuPVhu29hipoN/74 2FOQ== X-Gm-Message-State: AOAM533ea6/LvjLgvLZeak4t3DMI+RukOZrv58DTNYWcccIukYzC66f8 vzYnxMoUNcBfqxOKsZruFaa6W2nDbvA= X-Google-Smtp-Source: ABdhPJz1v3KCRjGGB0E6fhsxandwsh0yCO9HrvXjARyoJ89417mlFvI7GVKmBNlyu2hIh/hHajJ1wA== X-Received: by 2002:a1c:c244:: with SMTP id s65mr3706705wmf.96.1614357253121; Fri, 26 Feb 2021 08:34:13 -0800 (PST) Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id m6sm14245609wrv.73.2021.02.26.08.34.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Feb 2021 08:34:12 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 16/16] cpu: Restrict cpu_paging_enabled / cpu_get_memory_mapping to sysemu Date: Fri, 26 Feb 2021 17:32:27 +0100 Message-Id: <20210226163227.4097950-17-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210226163227.4097950-1-f4bug@amsat.org> References: <20210226163227.4097950-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x330.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Thomas Huth , Laurent Vivier , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 47e65d517f6..29e1623f775 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -499,6 +499,8 @@ static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) extern bool mttcg_enabled; #define qemu_tcg_mttcg_enabled() (mttcg_enabled) +#if !defined(CONFIG_USER_ONLY) + /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. @@ -516,8 +518,6 @@ bool cpu_paging_enabled(const CPUState *cpu); void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); -#if !defined(CONFIG_USER_ONLY) - /** * cpu_write_elf64_note: * @f: pointer to a function that writes memory to a file