From patchwork Fri Nov 16 21:30:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10687041 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C839F14BD for ; Fri, 16 Nov 2018 21:32:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7FD32D423 for ; Fri, 16 Nov 2018 21:32:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 98FEE2D607; Fri, 16 Nov 2018 21:32:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F0E282D423 for ; Fri, 16 Nov 2018 21:32:37 +0000 (UTC) Received: from localhost ([::1]:47055 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNljA-0001CT-K4 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 16 Nov 2018 16:32:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59598) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gNlhd-0000Ge-7O for qemu-devel@nongnu.org; Fri, 16 Nov 2018 16:31:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gNlha-0001f3-7S for qemu-devel@nongnu.org; Fri, 16 Nov 2018 16:31:01 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]:40583) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gNlha-0001ej-1f for qemu-devel@nongnu.org; Fri, 16 Nov 2018 16:30:58 -0500 Received: by mail-pl1-x62e.google.com with SMTP id b22-v6so6273515pls.7 for ; Fri, 16 Nov 2018 13:30:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=subject:date:message-id:in-reply-to:references:cc:from:to; bh=kKTGbZL7bN1GM/CR1Si/5nLh5T86DrU/+KfJ0CFSfOM=; b=NRHTo6eVE6EJYYoe6vqcgkRmYG46Tu4n2iwtRfpaykDHp1e9HbjALDVjsltbX8nVX6 HNjBBESzeNxgMlJrf9KYNg3F5lCnr35/gbm9mAl2syuNRHHNRQQSoMRB2mDiOzCU14Zk zbWfLroieznE7Je9PZzQjylm9zR57gD2qQf4TyNbX9Bx+0D8gVs4MgVodsYv+0BdSPMU MK0JFpx9rS1yskfAsRLHmKrpS00LHQgGDe3b7K8wYNcfoLnwj5H/tdQi7/r9+SM0u5qt wMseaAlOMPJGj/62sf+3HQIKmFstGeLJ7cfnJRrwGvF0ZbyMQo4zHu6/8xQ92j05cxXv I5aQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:date:message-id:in-reply-to:references :cc:from:to; bh=kKTGbZL7bN1GM/CR1Si/5nLh5T86DrU/+KfJ0CFSfOM=; b=irdlqh5g7KU9Wm3t4VKNCBKopbbss8Jii5yoTn+cMWXZBbx1K6KAtZxv2pSPxQSjMT IOEjqRWqSTGMWX9j2WFv6L30PLRipeuNrOWEpqIu/w83Th5XDPXR7buva2xAiMSUkLYy f3IUxEkMlj4NIlLd+eFzDgkZJiPX/3kuIvgAOoCKfZ/dPuLyzf848ZbtmDklq54Dg+2p 2hjE3rebB8TcJgmihcu0FuhnWdlISDP1SsPz6BeQRJ/ig0POW4TGMGo9I7s4+y/DzJ8u AsQ7bOHoTEV9enlfLAHovvymAUJLmVGajJfvylA792YuFY/IRaQL04RIp0cQYMwS3Ysz mxqg== X-Gm-Message-State: AA+aEWb+b4FZP6CIcWbu0Dw6UmUNv5x3ApObZqmncciczh8zLWl68HqY R4Go4nQjXaefqv6yEpv1yVMRz3YWdWokVA== X-Google-Smtp-Source: AFSGD/U3O8zofWxV1LRzF6zDSpHQNOjs7rz6rAniSVqSnya6Svhqd94XysJYee0tJpBfRGvn1QLwSQ== X-Received: by 2002:a17:902:1681:: with SMTP id h1mr2188519plh.129.1542403856709; Fri, 16 Nov 2018 13:30:56 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id w10-v6sm37168621pfg.1.2018.11.16.13.30.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 13:30:55 -0800 (PST) Date: Fri, 16 Nov 2018 13:30:41 -0800 Message-Id: <20181116213045.19825-2-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181116213045.19825-1-palmer@sifive.com> References: <20181116213045.19825-1-palmer@sifive.com> From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::62e Subject: [Qemu-devel] [PULL 1/4] hw/riscv/virt: Free the test device tree node name X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Alistair Francis Signed-off-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- hw/riscv/virt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4a137a503c8a..2b38f890702c 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -240,6 +240,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[VIRT_TEST].base, 0x0, memmap[VIRT_TEST].size); + g_free(nodename); nodename = g_strdup_printf("/uart@%lx", (long)memmap[VIRT_UART0].base); From patchwork Fri Nov 16 21:30:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10687043 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D0BB14D6 for ; Fri, 16 Nov 2018 21:32:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E82E2D423 for ; Fri, 16 Nov 2018 21:32:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 32DCD2D468; Fri, 16 Nov 2018 21:32:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 42CB62D453 for ; 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X-Received-From: 2607:f8b0:4864:20::62f Subject: [Qemu-devel] [PULL 2/4] target/riscv: Fix FCLASS_D being treated as RV64 only X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Bastian Koppelmann Signed-off-by: Bastian Koppelmann Reviewed-by: Richard Henderson Signed-off-by: Palmer Dabbelt --- target/riscv/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 18d7b6d1471d..5359088e24bc 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1237,13 +1237,14 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd, tcg_temp_free(t0); break; -#if defined(TARGET_RISCV64) case OPC_RISC_FMV_X_D: /* also OPC_RISC_FCLASS_D */ switch (rm) { +#if defined(TARGET_RISCV64) case 0: /* FMV */ gen_set_gpr(rd, cpu_fpr[rs1]); break; +#endif case 1: t0 = tcg_temp_new(); gen_helper_fclass_d(t0, cpu_fpr[rs1]); @@ -1255,6 +1256,7 @@ static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd, } break; +#if defined(TARGET_RISCV64) case OPC_RISC_FMV_D_X: t0 = tcg_temp_new(); gen_get_gpr(t0, rs1); From patchwork Fri Nov 16 21:30:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10687049 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65FF014D6 for ; Fri, 16 Nov 2018 21:35:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 573322D1DF for ; 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Fri, 16 Nov 2018 13:30:59 -0800 (PST) Date: Fri, 16 Nov 2018 13:30:43 -0800 Message-Id: <20181116213045.19825-4-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181116213045.19825-1-palmer@sifive.com> References: <20181116213045.19825-1-palmer@sifive.com> From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PULL 3/4] target/riscv: Fix sfence.vm/a both available in any priv version X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bastian Koppelmann , Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Bastian Koppelmann sfence.vm has been replaced in priv v1.10 spec by sfence.vma. Reported-by: Richard Henderson Signed-off-by: Bastian Koppelmann Reviewed-by: Richard Henderson Signed-off-by: Palmer Dabbelt --- target/riscv/translate.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 5359088e24bc..f44eb9c41b48 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1292,10 +1292,14 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc, #ifndef CONFIG_USER_ONLY /* Extract funct7 value and check whether it matches SFENCE.VMA */ if ((opc == OPC_RISC_ECALL) && ((csr >> 5) == 9)) { - /* sfence.vma */ - /* TODO: handle ASID specific fences */ - gen_helper_tlb_flush(cpu_env); - return; + if (env->priv_ver == PRIV_VERSION_1_10_0) { + /* sfence.vma */ + /* TODO: handle ASID specific fences */ + gen_helper_tlb_flush(cpu_env); + return; + } else { + gen_exception_illegal(ctx); + } } #endif @@ -1342,7 +1346,11 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc, gen_helper_wfi(cpu_env); break; case 0x104: /* SFENCE.VM */ - gen_helper_tlb_flush(cpu_env); + if (env->priv_ver <= PRIV_VERSION_1_09_1) { + gen_helper_tlb_flush(cpu_env); + } else { + gen_exception_illegal(ctx); + } break; #endif default: From patchwork Fri Nov 16 21:30:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 10687047 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 379AF14D6 for ; Fri, 16 Nov 2018 21:35:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D56A2D1DF for ; Fri, 16 Nov 2018 21:35:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0DF612D54A; Fri, 16 Nov 2018 21:35:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DDD072D1DF for ; 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Fri, 16 Nov 2018 13:31:02 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id c13sm11588314pfo.121.2018.11.16.13.31.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 13:31:01 -0800 (PST) Date: Fri, 16 Nov 2018 13:30:44 -0800 Message-Id: <20181116213045.19825-5-palmer@sifive.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181116213045.19825-1-palmer@sifive.com> References: <20181116213045.19825-1-palmer@sifive.com> From: Palmer Dabbelt To: Peter Maydell X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 Subject: [Qemu-devel] [PULL 4/4] RISC-V: Respect fences for user-only emulators X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Our current fence implementation ignores fences for the user-only configurations. This is incorrect but unlikely to manifest: it requires multi-threaded user-only code that takes advantage of the weakness in the host's memory model and can be inlined by TCG. This patch simply treats fences the same way for all our emulators. I've given it to testing as I don't want to construct a test that would actually trigger the failure. Our fence implementation has an additional deficiency where we map all RISC-V fences to full fences. Now that we have a formal memory model for RISC-V we can start to take advantage of the strength bits on our fence instructions. This requires a bit more though, so I'm going to split it out because the implementation is still correct without taking advantage of these weaker fences. Thanks to Richard Henderson for pointing out both of the issues. Signed-off-by: Palmer Dabbelt Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/translate.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index f44eb9c41b48..312bf298b3c2 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1776,7 +1776,6 @@ static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx) GET_RM(ctx->opcode)); break; case OPC_RISC_FENCE: -#ifndef CONFIG_USER_ONLY if (ctx->opcode & 0x1000) { /* FENCE_I is a no-op in QEMU, * however we need to end the translation block */ @@ -1787,7 +1786,6 @@ static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx) /* FENCE is a full memory barrier. */ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); } -#endif break; case OPC_RISC_SYSTEM: gen_system(env, ctx, MASK_OP_SYSTEM(ctx->opcode), rd, rs1,