From patchwork Tue Nov 20 18:58:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ho, Kenny" X-Patchwork-Id: 10691143 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 00FE15A4 for ; Tue, 20 Nov 2018 18:59:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E2E972ACD3 for ; Tue, 20 Nov 2018 18:59:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D62312ACD5; Tue, 20 Nov 2018 18:59:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D32642ACD3 for ; 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Tue, 20 Nov 2018 18:58:58 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV02.amd.com (165.204.84.17) by BY2NAM03FT025.mail.protection.outlook.com (10.152.84.232) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.1339.10 via Frontend Transport; Tue, 20 Nov 2018 18:58:57 +0000 Received: from kho-5039A.amd.com (10.180.168.240) by SATLEXCHOV02.amd.com (10.181.40.72) with Microsoft SMTP Server id 14.3.389.1; Tue, 20 Nov 2018 12:58:56 -0600 From: Kenny Ho To: , , , , , Subject: [PATCH RFC 1/5] cgroup: Introduce cgroup for drm subsystem Date: Tue, 20 Nov 2018 13:58:10 -0500 Message-ID: <20181120185814.13362-2-Kenny.Ho@amd.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181120185814.13362-1-Kenny.Ho@amd.com> References: <20181120185814.13362-1-Kenny.Ho@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB0752 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Change-Id: I6830d3990f63f0c13abeba29b1d330cf28882831 Signed-off-by: Kenny Ho --- include/linux/cgroup_drm.h | 32 ++++++++++++++++++++++++ include/linux/cgroup_subsys.h | 4 +++ init/Kconfig | 5 ++++ kernel/cgroup/Makefile | 1 + kernel/cgroup/drm.c | 46 +++++++++++++++++++++++++++++++++++ 5 files changed, 88 insertions(+) create mode 100644 include/linux/cgroup_drm.h create mode 100644 kernel/cgroup/drm.c diff --git a/include/linux/cgroup_drm.h b/include/linux/cgroup_drm.h new file mode 100644 index 000000000000..79ab38b0f46d --- /dev/null +++ b/include/linux/cgroup_drm.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2018 Advanced Micro Devices, Inc. + */ +#ifndef _CGROUP_DRM_H +#define _CGROUP_DRM_H + +#ifdef CONFIG_CGROUP_DRM + +#include + +struct drmcgrp { + struct cgroup_subsys_state css; +}; + +static inline struct drmcgrp *css_drmcgrp(struct cgroup_subsys_state *css) +{ + return css ? container_of(css, struct drmcgrp, css) : NULL; +} + +static inline struct drmcgrp *get_drmcgrp(struct task_struct *task) +{ + return css_drmcgrp(task_get_css(task, drm_cgrp_id)); +} + + +static inline struct drmcgrp *parent_drmcgrp(struct drmcgrp *cg) +{ + return css_drmcgrp(cg->css.parent); +} + +#endif /* CONFIG_CGROUP_DRM */ +#endif /* _CGROUP_DRM_H */ diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h index acb77dcff3b4..ddedad809e8b 100644 --- a/include/linux/cgroup_subsys.h +++ b/include/linux/cgroup_subsys.h @@ -61,6 +61,10 @@ SUBSYS(pids) SUBSYS(rdma) #endif +#if IS_ENABLED(CONFIG_CGROUP_DRM) +SUBSYS(drm) +#endif + /* * The following subsystems are not supported on the default hierarchy. */ diff --git a/init/Kconfig b/init/Kconfig index a4112e95724a..bee1e164443a 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -836,6 +836,11 @@ config CGROUP_RDMA Attaching processes with active RDMA resources to the cgroup hierarchy is allowed even if can cross the hierarchy's limit. +config CGROUP_DRM + bool "DRM controller (EXPERIMENTAL)" + help + Provides accounting and enforcement of resources in the DRM subsystem. + config CGROUP_FREEZER bool "Freezer controller" help diff --git a/kernel/cgroup/Makefile b/kernel/cgroup/Makefile index bfcdae896122..6af14bd93050 100644 --- a/kernel/cgroup/Makefile +++ b/kernel/cgroup/Makefile @@ -4,5 +4,6 @@ obj-y := cgroup.o rstat.o namespace.o cgroup-v1.o obj-$(CONFIG_CGROUP_FREEZER) += freezer.o obj-$(CONFIG_CGROUP_PIDS) += pids.o obj-$(CONFIG_CGROUP_RDMA) += rdma.o +obj-$(CONFIG_CGROUP_DRM) += drm.o obj-$(CONFIG_CPUSETS) += cpuset.o obj-$(CONFIG_CGROUP_DEBUG) += debug.o diff --git a/kernel/cgroup/drm.c b/kernel/cgroup/drm.c new file mode 100644 index 000000000000..d9e194b9aead --- /dev/null +++ b/kernel/cgroup/drm.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: MIT +// Copyright 2018 Advanced Micro Devices, Inc. +#include +#include +#include + +static u64 drmcgrp_test_read(struct cgroup_subsys_state *css, + struct cftype *cft) +{ + return 88; +} + +static void drmcgrp_css_free(struct cgroup_subsys_state *css) +{ + struct drmcgrp *drmcgrp = css_drmcgrp(css); + + kfree(css_drmcgrp(css)); +} + +static struct cgroup_subsys_state * +drmcgrp_css_alloc(struct cgroup_subsys_state *parent_css) +{ + struct drmcgrp *drmcgrp; + + drmcgrp = kzalloc(sizeof(struct drmcgrp), GFP_KERNEL); + if (!drmcgrp) + return ERR_PTR(-ENOMEM); + + return &drmcgrp->css; +} + +struct cftype files[] = { + { + .name = "drm_test", + .read_u64 = drmcgrp_test_read, + }, + { } /* terminate */ +}; + +struct cgroup_subsys drm_cgrp_subsys = { + .css_alloc = drmcgrp_css_alloc, + .css_free = drmcgrp_css_free, + .early_init = false, + .legacy_cftypes = files, + .dfl_cftypes = files, +}; From patchwork Tue Nov 20 18:58:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ho, Kenny" X-Patchwork-Id: 10691151 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7F9A25A4 for ; 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Tue, 20 Nov 2018 12:58:56 -0600 From: Kenny Ho To: , , , , , Subject: [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices Date: Tue, 20 Nov 2018 13:58:11 -0500 Message-ID: <20181120185814.13362-3-Kenny.Ho@amd.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181120185814.13362-1-Kenny.Ho@amd.com> References: <20181120185814.13362-1-Kenny.Ho@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(39860400002)(396003)(376002)(136003)(346002)(2980300002)(428003)(189003)(199004)(50466002)(478600001)(48376002)(426003)(186003)(575784001)(86362001)(217873002)(47776003)(26005)(2906002)(72206003)(77096007)(2201001)(51416003)(7696005)(50226002)(76176011)(2870700001)(8936002)(336012)(8676002)(81166006)(446003)(68736007)(81156014)(14444005)(126002)(476003)(2616005)(110136005)(11346002)(486006)(53416004)(104016004)(53936002)(1076002)(305945005)(105586002)(6666004)(36756003)(97736004)(356004)(5660300001)(316002)(106466001)(39060400002); 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB0751 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Since many parts of the DRM subsystem has vendor-specific implementations, we introduce mechanisms for vendor to register their specific resources and control files to the DRM cgroup subsystem. A vendor will register itself with the DRM cgroup subsystem first before registering individual DRM devices to the cgroup subsystem. In addition to the cgroup_subsys_state that is common to all DRM devices, a device-specific state is introduced and it is allocated according to the vendor of the device. Change-Id: I908ee6975ea0585e4c30eafde4599f87094d8c65 Signed-off-by: Kenny Ho --- include/drm/drm_cgroup.h | 39 ++++++++++++++++ include/drm/drmcgrp_vendors.h | 7 +++ include/linux/cgroup_drm.h | 26 +++++++++++ kernel/cgroup/drm.c | 84 +++++++++++++++++++++++++++++++++++ 4 files changed, 156 insertions(+) create mode 100644 include/drm/drm_cgroup.h create mode 100644 include/drm/drmcgrp_vendors.h diff --git a/include/drm/drm_cgroup.h b/include/drm/drm_cgroup.h new file mode 100644 index 000000000000..26cbea7059a6 --- /dev/null +++ b/include/drm/drm_cgroup.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2018 Advanced Micro Devices, Inc. + */ +#ifndef __DRM_CGROUP_H__ +#define __DRM_CGROUP_H__ + +#define DRMCGRP_VENDOR(_x) _x ## _drmcgrp_vendor_id, +enum drmcgrp_vendor_id { +#include + DRMCGRP_VENDOR_COUNT, +}; +#undef DRMCGRP_VENDOR + +#define DRMCGRP_VENDOR(_x) extern struct drmcgrp_vendor _x ## _drmcgrp_vendor; +#include +#undef DRMCGRP_VENDOR + + + +#ifdef CONFIG_CGROUP_DRM + +extern struct drmcgrp_vendor *drmcgrp_vendors[]; + +int drmcgrp_register_vendor(struct drmcgrp_vendor *vendor, enum drmcgrp_vendor_id id); +int drmcgrp_register_device(struct drm_device *device, enum drmcgrp_vendor_id id); + +#else +static int drmcgrp_register_vendor(struct drmcgrp_vendor *vendor, enum drmcgrp_vendor_id id) +{ + return 0; +} + +static int drmcgrp_register_device(struct drm_device *device, enum drmcgrp_vendor_id id) +{ + return 0; +} + +#endif /* CONFIG_CGROUP_DRM */ +#endif /* __DRM_CGROUP_H__ */ diff --git a/include/drm/drmcgrp_vendors.h b/include/drm/drmcgrp_vendors.h new file mode 100644 index 000000000000..b04d8649851b --- /dev/null +++ b/include/drm/drmcgrp_vendors.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2018 Advanced Micro Devices, Inc. + */ +#if IS_ENABLED(CONFIG_CGROUP_DRM) + + +#endif diff --git a/include/linux/cgroup_drm.h b/include/linux/cgroup_drm.h index 79ab38b0f46d..a776662d9593 100644 --- a/include/linux/cgroup_drm.h +++ b/include/linux/cgroup_drm.h @@ -6,10 +6,36 @@ #ifdef CONFIG_CGROUP_DRM +#include #include +#include +#include + +/* limit defined per the way drm_minor_alloc operates */ +#define MAX_DRM_DEV (64 * DRM_MINOR_RENDER) + +struct drmcgrp_device { + enum drmcgrp_vendor_id vid; + struct drm_device *dev; + struct mutex mutex; +}; + +/* vendor-common resource counting goes here */ +/* this struct should be included in the vendor specific resource */ +struct drmcgrp_device_resource { + struct drmcgrp_device *ddev; +}; + +struct drmcgrp_vendor { + struct cftype *(*get_cftypes)(void); + struct drmcgrp_device_resource *(*alloc_dev_resource)(void); + void (*free_dev_resource)(struct drmcgrp_device_resource *dev_resource); +}; + struct drmcgrp { struct cgroup_subsys_state css; + struct drmcgrp_device_resource *dev_resources[MAX_DRM_DEV]; }; static inline struct drmcgrp *css_drmcgrp(struct cgroup_subsys_state *css) diff --git a/kernel/cgroup/drm.c b/kernel/cgroup/drm.c index d9e194b9aead..f9630cc389bc 100644 --- a/kernel/cgroup/drm.c +++ b/kernel/cgroup/drm.c @@ -1,8 +1,30 @@ // SPDX-License-Identifier: MIT // Copyright 2018 Advanced Micro Devices, Inc. +#include #include #include +#include +#include +#include #include +#include +#include + +/* generate an array of drm cgroup vendor pointers */ +#define DRMCGRP_VENDOR(_x)[_x ## _drmcgrp_vendor_id] = NULL, +struct drmcgrp_vendor *drmcgrp_vendors[] = { +#include +}; +#undef DRMCGRP_VENDOR +EXPORT_SYMBOL(drmcgrp_vendors); + +static DEFINE_MUTEX(drmcgrp_mutex); + +/* indexed by drm_minor for access speed */ +static struct drmcgrp_device *known_drmcgrp_devs[MAX_DRM_DEV]; + +static int max_minor; + static u64 drmcgrp_test_read(struct cgroup_subsys_state *css, struct cftype *cft) @@ -13,6 +35,12 @@ static u64 drmcgrp_test_read(struct cgroup_subsys_state *css, static void drmcgrp_css_free(struct cgroup_subsys_state *css) { struct drmcgrp *drmcgrp = css_drmcgrp(css); + int i; + + for (i = 0; i <= max_minor; i++) { + if (drmcgrp->dev_resources[i] != NULL) + drmcgrp_vendors[known_drmcgrp_devs[i]->vid]->free_dev_resource(drmcgrp->dev_resources[i]); + } kfree(css_drmcgrp(css)); } @@ -21,11 +49,27 @@ static struct cgroup_subsys_state * drmcgrp_css_alloc(struct cgroup_subsys_state *parent_css) { struct drmcgrp *drmcgrp; + int i; drmcgrp = kzalloc(sizeof(struct drmcgrp), GFP_KERNEL); if (!drmcgrp) return ERR_PTR(-ENOMEM); + for (i = 0; i <= max_minor; i++) { + if (known_drmcgrp_devs[i] != NULL) { + struct drmcgrp_device_resource *ddr = + drmcgrp_vendors[known_drmcgrp_devs[i]->vid]->alloc_dev_resource(); + + if (IS_ERR(ddr)) { + drmcgrp_css_free(&drmcgrp->css); + return ERR_PTR(-ENOMEM); + } + + drmcgrp->dev_resources[i] = ddr; + drmcgrp->dev_resources[i]->ddev = known_drmcgrp_devs[i]; + } + } + return &drmcgrp->css; } @@ -44,3 +88,43 @@ struct cgroup_subsys drm_cgrp_subsys = { .legacy_cftypes = files, .dfl_cftypes = files, }; + +int drmcgrp_register_vendor(struct drmcgrp_vendor *vendor, enum drmcgrp_vendor_id id) +{ + int rc = 0; + struct cftype *cfts; + + // TODO: root css created before any registration + if (drmcgrp_vendors[id] == NULL) { + drmcgrp_vendors[id] = vendor; + cfts = vendor->get_cftypes(); + if (cfts != NULL) + rc = cgroup_add_legacy_cftypes(&drm_cgrp_subsys, cfts); + } + return rc; +} +EXPORT_SYMBOL(drmcgrp_register_vendor); + + +int drmcgrp_register_device(struct drm_device *dev, enum drmcgrp_vendor_id id) +{ + struct drmcgrp_device *ddev; + + ddev = kzalloc(sizeof(struct drmcgrp_device), GFP_KERNEL); + if (!ddev) + return -ENOMEM; + + mutex_lock(&drmcgrp_mutex); + + ddev->vid = id; + ddev->dev = dev; + mutex_init(&ddev->mutex); + + known_drmcgrp_devs[dev->primary->index] = ddev; + + max_minor = max(max_minor, dev->primary->index); + + mutex_unlock(&drmcgrp_mutex); + return 0; +} +EXPORT_SYMBOL(drmcgrp_register_device); From patchwork Tue Nov 20 18:58:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ho, Kenny" X-Patchwork-Id: 10691149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 030D913AD for ; Tue, 20 Nov 2018 18:59:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6BAB2ACD3 for ; Tue, 20 Nov 2018 18:59:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB0822ACD5; Tue, 20 Nov 2018 18:59:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 767EF2ACD3 for ; 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB0742 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Change-Id: Ib66c44ac1b1c367659e362a2fc05b6fbb3805876 Signed-off-by: Kenny Ho --- drivers/gpu/drm/amd/amdgpu/Makefile | 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c | 37 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h | 19 +++++++++++ include/drm/drmcgrp_vendors.h | 1 + 5 files changed, 67 insertions(+) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile index 138cb787d27e..5cf8048f2d75 100644 --- a/drivers/gpu/drm/amd/amdgpu/Makefile +++ b/drivers/gpu/drm/amd/amdgpu/Makefile @@ -186,4 +186,7 @@ amdgpu-y += $(AMD_DISPLAY_FILES) endif +#DRM cgroup controller +amdgpu-y += amdgpu_drmcgrp.o + obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 30bc345d6fdf..ad0373f83ed3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -2645,6 +2646,12 @@ int amdgpu_device_init(struct amdgpu_device *adev, goto failed; } + /* TODO:docs */ + if (drmcgrp_vendors[amd_drmcgrp_vendor_id] == NULL) + drmcgrp_register_vendor(&amd_drmcgrp_vendor, amd_drmcgrp_vendor_id); + + drmcgrp_register_device(adev->ddev, amd_drmcgrp_vendor_id); + return 0; failed: diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c new file mode 100644 index 000000000000..ed8aac17769c --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: MIT +// Copyright 2018 Advanced Micro Devices, Inc. +#include +#include +#include +#include "amdgpu_drmcgrp.h" + +struct cftype files[] = { + { } /* terminate */ +}; + +struct cftype *drmcgrp_amd_get_cftypes(void) +{ + return files; +} + +struct drmcgrp_device_resource *amd_drmcgrp_alloc_dev_resource(void) +{ + struct amd_drmcgrp_dev_resource *a_ddr; + + a_ddr = kzalloc(sizeof(struct amd_drmcgrp_dev_resource), GFP_KERNEL); + if (!a_ddr) + return ERR_PTR(-ENOMEM); + + return &a_ddr->ddr; +} + +void amd_drmcgrp_free_dev_resource(struct drmcgrp_device_resource *ddr) +{ + kfree(ddr_amdddr(ddr)); +} + +struct drmcgrp_vendor amd_drmcgrp_vendor = { + .get_cftypes = drmcgrp_amd_get_cftypes, + .alloc_dev_resource = amd_drmcgrp_alloc_dev_resource, + .free_dev_resource = amd_drmcgrp_free_dev_resource, +}; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h new file mode 100644 index 000000000000..e2934b7a49f5 --- /dev/null +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: MIT + * Copyright 2018 Advanced Micro Devices, Inc. + */ +#ifndef _AMDGPU_DRMCGRP_H +#define _AMDGPU_DRMCGRP_H + +#include + +/* for AMD specific DRM resources */ +struct amd_drmcgrp_dev_resource { + struct drmcgrp_device_resource ddr; +}; + +static inline struct amd_drmcgrp_dev_resource *ddr_amdddr(struct drmcgrp_device_resource *ddr) +{ + return ddr ? container_of(ddr, struct amd_drmcgrp_dev_resource, ddr) : NULL; +} + +#endif /* _AMDGPU_DRMCGRP_H */ diff --git a/include/drm/drmcgrp_vendors.h b/include/drm/drmcgrp_vendors.h index b04d8649851b..6cfbf1825344 100644 --- a/include/drm/drmcgrp_vendors.h +++ b/include/drm/drmcgrp_vendors.h @@ -3,5 +3,6 @@ */ #if IS_ENABLED(CONFIG_CGROUP_DRM) +DRMCGRP_VENDOR(amd) #endif From patchwork Tue Nov 20 18:58:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ho, Kenny" X-Patchwork-Id: 10691147 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 413FF13AD for ; Tue, 20 Nov 2018 18:59:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F59D2ACD3 for ; Tue, 20 Nov 2018 18:59:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 23B1A2ACD5; Tue, 20 Nov 2018 18:59:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9E71F2ACD3 for ; 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Change-Id: Ibc22e5bda600f54fe820fe0af5400ca348691550 Signed-off-by: Kenny Ho --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c | 54 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h | 5 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 15 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +- 5 files changed, 83 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 663043c8f0f5..b448160aed89 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -33,6 +33,7 @@ #include "amdgpu_trace.h" #include "amdgpu_gmc.h" #include "amdgpu_gem.h" +#include "amdgpu_drmcgrp.h" static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p, struct drm_amdgpu_cs_chunk_fence *data, @@ -1275,6 +1276,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) union drm_amdgpu_cs *cs = data; struct amdgpu_cs_parser parser = {}; bool reserved_buffers = false; + struct amdgpu_ring *ring; int i, r; if (!adev->accel_working) @@ -1317,6 +1319,9 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) if (r) goto out; + ring = to_amdgpu_ring(parser.entity->rq->sched); + amdgpu_drmcgrp_count_cs(current, dev, ring->funcs->type); + r = amdgpu_cs_submit(&parser, cs); out: diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c index ed8aac17769c..853b77532428 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c @@ -1,11 +1,65 @@ // SPDX-License-Identifier: MIT // Copyright 2018 Advanced Micro Devices, Inc. #include +#include #include #include +#include "amdgpu_ring.h" #include "amdgpu_drmcgrp.h" +void amdgpu_drmcgrp_count_cs(struct task_struct *task, struct drm_device *dev, + enum amdgpu_ring_type r_type) +{ + struct drmcgrp *drmcgrp = get_drmcgrp(task); + struct drmcgrp_device_resource *ddr; + struct drmcgrp *p; + struct amd_drmcgrp_dev_resource *a_ddr; + + if (drmcgrp == NULL) + return; + + ddr = drmcgrp->dev_resources[dev->primary->index]; + + mutex_lock(&ddr->ddev->mutex); + for (p = drmcgrp; p != NULL; p = parent_drmcgrp(drmcgrp)) { + a_ddr = ddr_amdddr(p->dev_resources[dev->primary->index]); + + a_ddr->cs_count[r_type]++; + } + mutex_unlock(&ddr->ddev->mutex); +} + +int amd_drmcgrp_cmd_submit_accounting_read(struct seq_file *sf, void *v) +{ + struct drmcgrp *drmcgrp = css_drmcgrp(seq_css(sf)); + struct drmcgrp_device_resource *ddr = NULL; + struct amd_drmcgrp_dev_resource *a_ddr = NULL; + int i, j; + + seq_puts(sf, "---\n"); + for (i = 0; i < MAX_DRM_DEV; i++) { + ddr = drmcgrp->dev_resources[i]; + + if (ddr == NULL || ddr->ddev->vid != amd_drmcgrp_vendor_id) + continue; + + a_ddr = ddr_amdddr(ddr); + + seq_printf(sf, "card%d:\n", i); + for (j = 0; j < __MAX_AMDGPU_RING_TYPE; j++) + seq_printf(sf, " %s: %llu\n", amdgpu_ring_names[j], a_ddr->cs_count[j]); + } + + return 0; +} + + struct cftype files[] = { + { + .name = "x.cmd_submitted.amd.stat", + .seq_show = amd_drmcgrp_cmd_submit_accounting_read, + .flags = CFTYPE_NOT_ON_ROOT, + }, { } /* terminate */ }; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h index e2934b7a49f5..f894a9a1059f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h @@ -5,12 +5,17 @@ #define _AMDGPU_DRMCGRP_H #include +#include "amdgpu_ring.h" /* for AMD specific DRM resources */ struct amd_drmcgrp_dev_resource { struct drmcgrp_device_resource ddr; + u64 cs_count[__MAX_AMDGPU_RING_TYPE]; }; +void amdgpu_drmcgrp_count_cs(struct task_struct *task, struct drm_device *dev, + enum amdgpu_ring_type r_type); + static inline struct amd_drmcgrp_dev_resource *ddr_amdddr(struct drmcgrp_device_resource *ddr) { return ddr ? container_of(ddr, struct amd_drmcgrp_dev_resource, ddr) : NULL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c index b70e85ec147d..1606f84d2334 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c @@ -34,6 +34,21 @@ #include "amdgpu.h" #include "atom.h" +char const *amdgpu_ring_names[] = { + [AMDGPU_RING_TYPE_GFX] = "gfx", + [AMDGPU_RING_TYPE_COMPUTE] = "compute", + [AMDGPU_RING_TYPE_SDMA] = "sdma", + [AMDGPU_RING_TYPE_UVD] = "uvd", + [AMDGPU_RING_TYPE_VCE] = "vce", + [AMDGPU_RING_TYPE_KIQ] = "kiq", + [AMDGPU_RING_TYPE_UVD_ENC] = "uvd_enc", + [AMDGPU_RING_TYPE_VCN_DEC] = "vcn_dec", + [AMDGPU_RING_TYPE_VCN_ENC] = "vcn_enc", + [AMDGPU_RING_TYPE_VCN_JPEG] = "vcn_jpeg", + [__MAX_AMDGPU_RING_TYPE] = "_max" + +}; + /* * Rings * Most engines on the GPU are fed via ring buffers. Ring diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index 4caa301ce454..e292b7e89c6a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -56,9 +56,12 @@ enum amdgpu_ring_type { AMDGPU_RING_TYPE_UVD_ENC, AMDGPU_RING_TYPE_VCN_DEC, AMDGPU_RING_TYPE_VCN_ENC, - AMDGPU_RING_TYPE_VCN_JPEG + AMDGPU_RING_TYPE_VCN_JPEG, + __MAX_AMDGPU_RING_TYPE }; +extern char const *amdgpu_ring_names[]; + struct amdgpu_device; struct amdgpu_ring; struct amdgpu_ib; From patchwork Tue Nov 20 18:58:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ho, Kenny" X-Patchwork-Id: 10691145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A27C5A4 for ; Tue, 20 Nov 2018 18:59:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 193022ACD3 for ; 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Tue, 20 Nov 2018 12:58:58 -0600 From: Kenny Ho To: , , , , , Subject: [PATCH RFC 5/5] drm/amdgpu: Add accounting of buffer object creation request via DRM cgroup Date: Tue, 20 Nov 2018 13:58:14 -0500 Message-ID: <20181120185814.13362-6-Kenny.Ho@amd.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181120185814.13362-1-Kenny.Ho@amd.com> References: <20181120185814.13362-1-Kenny.Ho@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(346002)(376002)(39860400002)(136003)(396003)(2980300002)(428003)(189003)(199004)(336012)(126002)(36756003)(217873002)(76176011)(110136005)(7696005)(316002)(53936002)(2870700001)(39060400002)(356004)(6666004)(106466001)(51416003)(486006)(14444005)(476003)(2616005)(105586002)(72206003)(11346002)(426003)(305945005)(81156014)(8676002)(81166006)(446003)(47776003)(8936002)(50226002)(97736004)(2201001)(5660300001)(50466002)(478600001)(86362001)(48376002)(68736007)(104016004)(1076002)(15650500001)(2906002)(186003)(77096007)(53416004)(26005); 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB0426 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Account for the total size of buffer object requested to amdgpu by buffer type on a per cgroup basis. x prefix in the control file name x.bo_requested.amd.stat signify experimental. Change-Id: Ifb680c4bcf3652879a7a659510e25680c2465cf6 Signed-off-by: Kenny Ho --- drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c | 56 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h | 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 13 +++++ include/uapi/drm/amdgpu_drm.h | 24 ++++++--- 4 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c index 853b77532428..e3d98ed01b79 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.c @@ -7,6 +7,57 @@ #include "amdgpu_ring.h" #include "amdgpu_drmcgrp.h" +void amdgpu_drmcgrp_count_bo_req(struct task_struct *task, struct drm_device *dev, + u32 domain, unsigned long size) +{ + struct drmcgrp *drmcgrp = get_drmcgrp(task); + struct drmcgrp_device_resource *ddr; + struct drmcgrp *p; + struct amd_drmcgrp_dev_resource *a_ddr; + int i; + + if (drmcgrp == NULL) + return; + + ddr = drmcgrp->dev_resources[dev->primary->index]; + + mutex_lock(&ddr->ddev->mutex); + for (p = drmcgrp; p != NULL; p = parent_drmcgrp(drmcgrp)) { + a_ddr = ddr_amdddr(p->dev_resources[dev->primary->index]); + + for (i = 0; i < __MAX_AMDGPU_MEM_DOMAIN; i++) + if ( (1 << i) & domain) + a_ddr->bo_req_count[i] += size; + } + mutex_unlock(&ddr->ddev->mutex); +} + +int amd_drmcgrp_bo_req_stat_read(struct seq_file *sf, void *v) +{ + struct drmcgrp *drmcgrp = css_drmcgrp(seq_css(sf)); + struct drmcgrp_device_resource *ddr = NULL; + struct amd_drmcgrp_dev_resource *a_ddr = NULL; + int i, j; + + seq_puts(sf, "---\n"); + for (i = 0; i < MAX_DRM_DEV; i++) { + ddr = drmcgrp->dev_resources[i]; + + if (ddr == NULL || ddr->ddev->vid != amd_drmcgrp_vendor_id) + continue; + + a_ddr = ddr_amdddr(ddr); + + seq_printf(sf, "card%d:\n", i); + for (j = 0; j < __MAX_AMDGPU_MEM_DOMAIN; j++) + seq_printf(sf, " %s: %llu\n", amdgpu_mem_domain_names[j], a_ddr->bo_req_count[j]); + } + + return 0; +} + + + void amdgpu_drmcgrp_count_cs(struct task_struct *task, struct drm_device *dev, enum amdgpu_ring_type r_type) { @@ -55,6 +106,11 @@ int amd_drmcgrp_cmd_submit_accounting_read(struct seq_file *sf, void *v) struct cftype files[] = { + { + .name = "x.bo_requested.amd.stat", + .seq_show = amd_drmcgrp_bo_req_stat_read, + .flags = CFTYPE_NOT_ON_ROOT, + }, { .name = "x.cmd_submitted.amd.stat", .seq_show = amd_drmcgrp_cmd_submit_accounting_read, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h index f894a9a1059f..8b9d61e47dde 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drmcgrp.h @@ -11,10 +11,13 @@ struct amd_drmcgrp_dev_resource { struct drmcgrp_device_resource ddr; u64 cs_count[__MAX_AMDGPU_RING_TYPE]; + u64 bo_req_count[__MAX_AMDGPU_MEM_DOMAIN]; }; void amdgpu_drmcgrp_count_cs(struct task_struct *task, struct drm_device *dev, enum amdgpu_ring_type r_type); +void amdgpu_drmcgrp_count_bo_req(struct task_struct *task, struct drm_device *dev, + u32 domain, unsigned long size); static inline struct amd_drmcgrp_dev_resource *ddr_amdddr(struct drmcgrp_device_resource *ddr) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 7b3d1ebda9df..339e1d3edad8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c @@ -31,6 +31,17 @@ #include #include "amdgpu.h" #include "amdgpu_display.h" +#include "amdgpu_drmcgrp.h" + +char const *amdgpu_mem_domain_names[] = { + [AMDGPU_MEM_DOMAIN_CPU] = "cpu", + [AMDGPU_MEM_DOMAIN_GTT] = "gtt", + [AMDGPU_MEM_DOMAIN_VRAM] = "vram", + [AMDGPU_MEM_DOMAIN_GDS] = "gds", + [AMDGPU_MEM_DOMAIN_GWS] = "gws", + [AMDGPU_MEM_DOMAIN_OA] = "oa", + [__MAX_AMDGPU_MEM_DOMAIN] = "_max" +}; void amdgpu_gem_object_free(struct drm_gem_object *gobj) { @@ -52,6 +63,8 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, struct amdgpu_bo_param bp; int r; + amdgpu_drmcgrp_count_bo_req(current, adev->ddev, initial_domain, size); + memset(&bp, 0, sizeof(bp)); *obj = NULL; /* At least align on page size */ diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 370e9a5536ef..531726443104 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -72,6 +72,18 @@ extern "C" { #define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle) #define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched) +enum amdgpu_mem_domain { + AMDGPU_MEM_DOMAIN_CPU, + AMDGPU_MEM_DOMAIN_GTT, + AMDGPU_MEM_DOMAIN_VRAM, + AMDGPU_MEM_DOMAIN_GDS, + AMDGPU_MEM_DOMAIN_GWS, + AMDGPU_MEM_DOMAIN_OA, + __MAX_AMDGPU_MEM_DOMAIN +}; + +extern char const *amdgpu_mem_domain_names[]; + /** * DOC: memory domains * @@ -95,12 +107,12 @@ extern "C" { * %AMDGPU_GEM_DOMAIN_OA Ordered append, used by 3D or Compute engines * for appending data. */ -#define AMDGPU_GEM_DOMAIN_CPU 0x1 -#define AMDGPU_GEM_DOMAIN_GTT 0x2 -#define AMDGPU_GEM_DOMAIN_VRAM 0x4 -#define AMDGPU_GEM_DOMAIN_GDS 0x8 -#define AMDGPU_GEM_DOMAIN_GWS 0x10 -#define AMDGPU_GEM_DOMAIN_OA 0x20 +#define AMDGPU_GEM_DOMAIN_CPU (1 << AMDGPU_MEM_DOMAIN_CPU) +#define AMDGPU_GEM_DOMAIN_GTT (1 << AMDGPU_MEM_DOMAIN_GTT) +#define AMDGPU_GEM_DOMAIN_VRAM (1 << AMDGPU_MEM_DOMAIN_VRAM) +#define AMDGPU_GEM_DOMAIN_GDS (1 << AMDGPU_MEM_DOMAIN_GDS) +#define AMDGPU_GEM_DOMAIN_GWS (1 << AMDGPU_MEM_DOMAIN_GWS) +#define AMDGPU_GEM_DOMAIN_OA (1 << AMDGPU_MEM_DOMAIN_OA) #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \ AMDGPU_GEM_DOMAIN_GTT | \ AMDGPU_GEM_DOMAIN_VRAM | \