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Wysocki" , Viresh Kumar , Rob Herring , Matthias Brugger CC: Seiya Wang , , , , , , Subject: [PATCH 1/2] clk: mediatek: remove deprecated CLK_INFRA_CA57SEL for MT8173 SoC Date: Fri, 26 Mar 2021 11:12:26 +0800 Message-ID: <20210326031227.2357-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210326_031308_638021_3B6092C4 X-CRM114-Status: GOOD ( 11.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove CLK_INFRA_CA57SEL for MT8173 since it's no longer used. Signed-off-by: Seiya Wang Acked-by: Rob Herring Reviewed-by: Matthias Brugger --- include/dt-bindings/clock/mt8173-clk.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index 3acebe937bfc..3d00c98b9654 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -186,7 +186,6 @@ #define CLK_INFRA_PMICWRAP 11 #define CLK_INFRA_CLK_13M 12 #define CLK_INFRA_CA53SEL 13 -#define CLK_INFRA_CA57SEL 14 /* Deprecated. Don't use it. */ #define CLK_INFRA_CA72SEL 14 #define CLK_INFRA_NR_CLK 15 From patchwork Fri Mar 26 03:12:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seiya Wang X-Patchwork-Id: 12165703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3DD1C433DB for ; Fri, 26 Mar 2021 03:15:18 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 18BA861A10 for ; Fri, 26 Mar 2021 03:15:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 18BA861A10 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jhKs6JH+irvYp3THdhFw6pb8Y+3Nz221HuvurQZzilE=; b=RHDZHz4tKYuSfNJkZuHLnUVlk Nsh8JHIGgFSPlAirQUJ5vReA40W/5MnqeGYjTjn5Z7JezaWLJPjtovooGQdWKsIfctfE6PNxUeFrJ +mXY0gpT1162UWrTOm0UifwteqSfljn5mQo5spem9j6dR9xepDB1+3zHlcmSJBHuNMuC2ZMj3af3O 1/elfH+pPJaKgMewa8s8KRUMzvrZwTqerSQcv/8rIESanfndkwgDuvLH10PrtMQvqaQBSxeZOxLw+ S3NZcB9lD8xQM58AMv5tUyoFpYuqQ4nvwI1UGPKUDteF8uhW7xs3YgkPI1eKnPKzgugD/bXLN3d/J YGDJqtBHA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lPcue-002fRX-By; Fri, 26 Mar 2021 03:13:28 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lPcuP-002fPi-03; Fri, 26 Mar 2021 03:13:15 +0000 X-UUID: 2c4443ef04ee49e9acc61f4b8b9b84dc-20210325 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=CHCSQowiX1nrYaEgrPue176Tk7t0rhH3dzhmwvZF6b8=; b=iHii/zAkNx06CLnW33JRap35QqPQw7YQR7ia8Zu1zSU6um3k4kZuF1jlCqWeuqbNIvpIR4EKXzkjeU8+XgixHiHEA+12YEl28FY2CIpOJlgTc8fsQR3MPb4t1epz9FbvAi+yFY/pr/b4WsfMqumb2tmXLT0V/kzDJdP6wfjk7A8=; X-UUID: 2c4443ef04ee49e9acc61f4b8b9b84dc-20210325 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 400324802; Thu, 25 Mar 2021 19:13:06 -0800 Received: from mtkmbs08n1.mediatek.inc (172.21.101.55) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 25 Mar 2021 20:13:04 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 26 Mar 2021 11:13:03 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 26 Mar 2021 11:13:02 +0800 From: Seiya Wang To: "Rafael J . Wysocki" , Viresh Kumar , Rob Herring , Matthias Brugger CC: Seiya Wang , , , , , , Subject: [PATCH 2/2] dt-bindings: cpufreq: update cpu type and clock name for MT8173 SoC Date: Fri, 26 Mar 2021 11:12:27 +0800 Message-ID: <20210326031227.2357-2-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210326031227.2357-1-seiya.wang@mediatek.com> References: <20210326031227.2357-1-seiya.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210326_031313_473414_A6D60EA4 X-CRM114-Status: GOOD ( 10.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the cpu type of cpu2 and cpu3 since MT8173 used Cortex-a72. Signed-off-by: Seiya Wang Acked-by: Viresh Kumar Acked-by: Rob Herring Reviewed-by: Matthias Brugger --- Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt index ea4994b35207..ef68711716fb 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt @@ -202,11 +202,11 @@ Example 2 (MT8173 SoC): cpu2: cpu@100 { device_type = "cpu"; - compatible = "arm,cortex-a57"; + compatible = "arm,cortex-a72"; reg = <0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA57SEL>, + clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cpu_opp_table_b>; @@ -214,11 +214,11 @@ Example 2 (MT8173 SoC): cpu3: cpu@101 { device_type = "cpu"; - compatible = "arm,cortex-a57"; + compatible = "arm,cortex-a72"; reg = <0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&infracfg CLK_INFRA_CA57SEL>, + clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cpu_opp_table_b>;