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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=RQdEbh2S4Ikdo2tTc3Res9TZJ3yFT7BUQh31RjAuPqg=; b=MEA4lUSj7bBd9PNusaov5bYvh2UxMLYG7E310I9xozesgY30DW7RlpGxmhewilk3Wj uPXElnOoTpFjnO96vB7WpFlHD9ZkdoW1Z8FhNqcHrO4uj2vrv4yr0BJg5ydG+h4yiRi7 kbT9ntTnPOvTjxTGu805o3rV0ZyOuOD+yezozbHEsAxmKem5zHVRVfcuLajOptpqdvAv ec6T+ymQDU7pTex/PeWpTL+u1nSJN5PWKH7hYsISSfbHoveIJLttMIbDVBKHkk9TN6wK c9pxEuZUH5clDJHQ36Lnlpx5oPmOignXNto3sCMPCfJJPcSKnXe7v2t4wtE/iLYTGQI/ QuZA== X-Gm-Message-State: AOAM532uW1rximpeL6eXit4qdycB3wTmjykTvuOJSglxfU4RSwYaIZ94 6dG9HlGtiV1ck918e/cA29Ot9tM= X-Google-Smtp-Source: ABdhPJxJvADz7idTF/W9m3puCNj2TDmDarfYaBdV32v9uHC35+vNowGdE7DMS/+hzV6sZz0PQby50B4= X-Received: from pcc-desktop.svl.corp.google.com ([2620:15c:2ce:0:3dc0:b59f:6f36:16d2]) (user=pcc job=sendgmr) by 2002:a25:4dc4:: with SMTP id a187mr13337921ybb.78.1617296152778; Thu, 01 Apr 2021 09:55:52 -0700 (PDT) Date: Thu, 1 Apr 2021 09:55:43 -0700 Message-Id: <20210401165543.3957816-1-pcc@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.31.0.291.g576ba9dcdaf-goog Subject: [PATCH] arm: fix inline asm in load_unaligned_zeropad() From: Peter Collingbourne To: Catalin Marinas , Will Deacon , Russell King Cc: Peter Collingbourne , linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210401_175554_767603_47074F29 X-CRM114-Status: GOOD ( 13.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The inline asm's addr operand is marked as input-only, however in the case where an exception is taken it may be modified by the BIC instruction on the exception path. Fix the problem by using a temporary register as the destination register for the BIC instruction. Signed-off-by: Peter Collingbourne Cc: stable@vger.kernel.org Link: https://linux-review.googlesource.com/id/I0f9ad1682821f874fb9b47e1279721943b2e5325 Acked-by: Will Deacon --- arch/arm/include/asm/word-at-a-time.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/word-at-a-time.h b/arch/arm/include/asm/word-at-a-time.h index 352ab213520d..2e6d0b4349f4 100644 --- a/arch/arm/include/asm/word-at-a-time.h +++ b/arch/arm/include/asm/word-at-a-time.h @@ -66,7 +66,7 @@ static inline unsigned long find_zero(unsigned long mask) */ static inline unsigned long load_unaligned_zeropad(const void *addr) { - unsigned long ret, offset; + unsigned long ret, tmp; /* Load word from unaligned pointer addr */ asm( @@ -74,9 +74,9 @@ static inline unsigned long load_unaligned_zeropad(const void *addr) "2:\n" " .pushsection .text.fixup,\"ax\"\n" " .align 2\n" - "3: and %1, %2, #0x3\n" - " bic %2, %2, #0x3\n" - " ldr %0, [%2]\n" + "3: bic %1, %2, #0x3\n" + " ldr %0, [%1]\n" + " and %1, %2, #0x3\n" " lsl %1, %1, #0x3\n" #ifndef __ARMEB__ " lsr %0, %0, %1\n" @@ -89,7 +89,7 @@ static inline unsigned long load_unaligned_zeropad(const void *addr) " .align 3\n" " .long 1b, 3b\n" " .popsection" - : "=&r" (ret), "=&r" (offset) + : "=&r" (ret), "=&r" (tmp) : "r" (addr), "Qo" (*(unsigned long *)addr)); return ret;